processor.c 13 KB

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  1. /*
  2. * Initial setup-routines for HP 9000 based hardware.
  3. *
  4. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  5. * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
  6. * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
  7. * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
  8. * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
  9. * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
  10. *
  11. * Initial PA-RISC Version: 04-23-1999 by Helge Deller
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2, or (at your option)
  16. * any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. *
  27. */
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/mm.h>
  31. #include <linux/module.h>
  32. #include <linux/seq_file.h>
  33. #include <linux/random.h>
  34. #include <linux/slab.h>
  35. #include <linux/cpu.h>
  36. #include <asm/param.h>
  37. #include <asm/cache.h>
  38. #include <asm/hardware.h> /* for register_parisc_driver() stuff */
  39. #include <asm/processor.h>
  40. #include <asm/page.h>
  41. #include <asm/pdc.h>
  42. #include <asm/pdcpat.h>
  43. #include <asm/irq.h> /* for struct irq_region */
  44. #include <asm/parisc-device.h>
  45. struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
  46. EXPORT_SYMBOL(boot_cpu_data);
  47. #ifdef CONFIG_PA8X00
  48. int _parisc_requires_coherency __read_mostly;
  49. EXPORT_SYMBOL(_parisc_requires_coherency);
  50. #endif
  51. DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
  52. /*
  53. ** PARISC CPU driver - claim "device" and initialize CPU data structures.
  54. **
  55. ** Consolidate per CPU initialization into (mostly) one module.
  56. ** Monarch CPU will initialize boot_cpu_data which shouldn't
  57. ** change once the system has booted.
  58. **
  59. ** The callback *should* do per-instance initialization of
  60. ** everything including the monarch. "Per CPU" init code in
  61. ** setup.c:start_parisc() has migrated here and start_parisc()
  62. ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
  63. **
  64. ** The goal of consolidating CPU initialization into one place is
  65. ** to make sure all CPUs get initialized the same way.
  66. ** The code path not shared is how PDC hands control of the CPU to the OS.
  67. ** The initialization of OS data structures is the same (done below).
  68. */
  69. /**
  70. * init_cpu_profiler - enable/setup per cpu profiling hooks.
  71. * @cpunum: The processor instance.
  72. *
  73. * FIXME: doesn't do much yet...
  74. */
  75. static void
  76. init_percpu_prof(unsigned long cpunum)
  77. {
  78. }
  79. /**
  80. * processor_probe - Determine if processor driver should claim this device.
  81. * @dev: The device which has been found.
  82. *
  83. * Determine if processor driver should claim this chip (return 0) or not
  84. * (return 1). If so, initialize the chip and tell other partners in crime
  85. * they have work to do.
  86. */
  87. static int __init processor_probe(struct parisc_device *dev)
  88. {
  89. unsigned long txn_addr;
  90. unsigned long cpuid;
  91. struct cpuinfo_parisc *p;
  92. struct pdc_pat_cpu_num cpu_info = { };
  93. #ifdef CONFIG_SMP
  94. if (num_online_cpus() >= nr_cpu_ids) {
  95. printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
  96. return 1;
  97. }
  98. #else
  99. if (boot_cpu_data.cpu_count > 0) {
  100. printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
  101. return 1;
  102. }
  103. #endif
  104. /* logical CPU ID and update global counter
  105. * May get overwritten by PAT code.
  106. */
  107. cpuid = boot_cpu_data.cpu_count;
  108. txn_addr = dev->hpa.start; /* for legacy PDC */
  109. cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
  110. #ifdef CONFIG_64BIT
  111. if (is_pdc_pat()) {
  112. ulong status;
  113. unsigned long bytecnt;
  114. pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
  115. pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
  116. if (!pa_pdc_cell)
  117. panic("couldn't allocate memory for PDC_PAT_CELL!");
  118. status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
  119. dev->mod_index, PA_VIEW, pa_pdc_cell);
  120. BUG_ON(PDC_OK != status);
  121. /* verify it's the same as what do_pat_inventory() found */
  122. BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
  123. BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
  124. txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
  125. kfree(pa_pdc_cell);
  126. /* get the cpu number */
  127. status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
  128. BUG_ON(PDC_OK != status);
  129. pr_info("Logical CPU #%lu is physical cpu #%lu at location "
  130. "0x%lx with hpa %pa\n",
  131. cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
  132. &dev->hpa.start);
  133. #undef USE_PAT_CPUID
  134. #ifdef USE_PAT_CPUID
  135. /* We need contiguous numbers for cpuid. Firmware's notion
  136. * of cpuid is for physical CPUs and we just don't care yet.
  137. * We'll care when we need to query PAT PDC about a CPU *after*
  138. * boot time (ie shutdown a CPU from an OS perspective).
  139. */
  140. if (cpu_info.cpu_num >= NR_CPUS) {
  141. printk(KERN_WARNING "IGNORING CPU at %pa,"
  142. " cpu_slot_id > NR_CPUS"
  143. " (%ld > %d)\n",
  144. &dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
  145. /* Ignore CPU since it will only crash */
  146. boot_cpu_data.cpu_count--;
  147. return 1;
  148. } else {
  149. cpuid = cpu_info.cpu_num;
  150. }
  151. #endif
  152. }
  153. #endif
  154. p = &per_cpu(cpu_data, cpuid);
  155. boot_cpu_data.cpu_count++;
  156. /* initialize counters - CPU 0 gets it_value set in time_init() */
  157. if (cpuid)
  158. memset(p, 0, sizeof(struct cpuinfo_parisc));
  159. p->loops_per_jiffy = loops_per_jiffy;
  160. p->dev = dev; /* Save IODC data in case we need it */
  161. p->hpa = dev->hpa.start; /* save CPU hpa */
  162. p->cpuid = cpuid; /* save CPU id */
  163. p->txn_addr = txn_addr; /* save CPU IRQ address */
  164. p->cpu_num = cpu_info.cpu_num;
  165. p->cpu_loc = cpu_info.cpu_loc;
  166. store_cpu_topology(cpuid);
  167. #ifdef CONFIG_SMP
  168. /*
  169. ** FIXME: review if any other initialization is clobbered
  170. ** for boot_cpu by the above memset().
  171. */
  172. init_percpu_prof(cpuid);
  173. #endif
  174. /*
  175. ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
  176. ** OS control. RENDEZVOUS is the default state - see mem_set above.
  177. ** p->state = STATE_RENDEZVOUS;
  178. */
  179. #if 0
  180. /* CPU 0 IRQ table is statically allocated/initialized */
  181. if (cpuid) {
  182. struct irqaction actions[];
  183. /*
  184. ** itimer and ipi IRQ handlers are statically initialized in
  185. ** arch/parisc/kernel/irq.c. ie Don't need to register them.
  186. */
  187. actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
  188. if (!actions) {
  189. /* not getting it's own table, share with monarch */
  190. actions = cpu_irq_actions[0];
  191. }
  192. cpu_irq_actions[cpuid] = actions;
  193. }
  194. #endif
  195. /*
  196. * Bring this CPU up now! (ignore bootstrap cpuid == 0)
  197. */
  198. #ifdef CONFIG_SMP
  199. if (cpuid) {
  200. set_cpu_present(cpuid, true);
  201. cpu_up(cpuid);
  202. }
  203. #endif
  204. return 0;
  205. }
  206. /**
  207. * collect_boot_cpu_data - Fill the boot_cpu_data structure.
  208. *
  209. * This function collects and stores the generic processor information
  210. * in the boot_cpu_data structure.
  211. */
  212. void __init collect_boot_cpu_data(void)
  213. {
  214. unsigned long cr16_seed;
  215. memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
  216. cr16_seed = get_cycles();
  217. add_device_randomness(&cr16_seed, sizeof(cr16_seed));
  218. boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
  219. /* get CPU-Model Information... */
  220. #define p ((unsigned long *)&boot_cpu_data.pdc.model)
  221. if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
  222. printk(KERN_INFO
  223. "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
  224. p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
  225. add_device_randomness(&boot_cpu_data.pdc.model,
  226. sizeof(boot_cpu_data.pdc.model));
  227. }
  228. #undef p
  229. if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
  230. printk(KERN_INFO "vers %08lx\n",
  231. boot_cpu_data.pdc.versions);
  232. add_device_randomness(&boot_cpu_data.pdc.versions,
  233. sizeof(boot_cpu_data.pdc.versions));
  234. }
  235. if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
  236. printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
  237. (boot_cpu_data.pdc.cpuid >> 5) & 127,
  238. boot_cpu_data.pdc.cpuid & 31,
  239. boot_cpu_data.pdc.cpuid);
  240. add_device_randomness(&boot_cpu_data.pdc.cpuid,
  241. sizeof(boot_cpu_data.pdc.cpuid));
  242. }
  243. if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
  244. printk(KERN_INFO "capabilities 0x%lx\n",
  245. boot_cpu_data.pdc.capabilities);
  246. if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
  247. printk(KERN_INFO "model %s\n",
  248. boot_cpu_data.pdc.sys_model_name);
  249. boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
  250. boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
  251. boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
  252. boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
  253. boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
  254. #ifdef CONFIG_PA8X00
  255. _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
  256. (boot_cpu_data.cpu_type == mako2);
  257. #endif
  258. }
  259. /**
  260. * init_per_cpu - Handle individual processor initializations.
  261. * @cpunum: logical processor number.
  262. *
  263. * This function handles initialization for *every* CPU
  264. * in the system:
  265. *
  266. * o Set "default" CPU width for trap handlers
  267. *
  268. * o Enable FP coprocessor
  269. * REVISIT: this could be done in the "code 22" trap handler.
  270. * (frowands idea - that way we know which processes need FP
  271. * registers saved on the interrupt stack.)
  272. * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
  273. * formatted printing of %lx for example (double divides I think)
  274. *
  275. * o Enable CPU profiling hooks.
  276. */
  277. int __init init_per_cpu(int cpunum)
  278. {
  279. int ret;
  280. struct pdc_coproc_cfg coproc_cfg;
  281. set_firmware_width();
  282. ret = pdc_coproc_cfg(&coproc_cfg);
  283. store_cpu_topology(cpunum);
  284. if(ret >= 0 && coproc_cfg.ccr_functional) {
  285. mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
  286. /* FWIW, FP rev/model is a more accurate way to determine
  287. ** CPU type. CPU rev/model has some ambiguous cases.
  288. */
  289. per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
  290. per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
  291. if (cpunum == 0)
  292. printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
  293. cpunum, coproc_cfg.revision, coproc_cfg.model);
  294. /*
  295. ** store status register to stack (hopefully aligned)
  296. ** and clear the T-bit.
  297. */
  298. asm volatile ("fstd %fr0,8(%sp)");
  299. } else {
  300. printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
  301. " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
  302. #ifdef CONFIG_64BIT
  303. "Halting Machine - FP required\n"
  304. #endif
  305. , coproc_cfg.ccr_functional);
  306. #ifdef CONFIG_64BIT
  307. mdelay(100); /* previous chars get pushed to console */
  308. panic("FP CoProc not reported");
  309. #endif
  310. }
  311. /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
  312. init_percpu_prof(cpunum);
  313. return ret;
  314. }
  315. /*
  316. * Display CPU info for all CPUs.
  317. */
  318. int
  319. show_cpuinfo (struct seq_file *m, void *v)
  320. {
  321. unsigned long cpu;
  322. for_each_online_cpu(cpu) {
  323. const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
  324. #ifdef CONFIG_SMP
  325. if (0 == cpuinfo->hpa)
  326. continue;
  327. #endif
  328. seq_printf(m, "processor\t: %lu\n"
  329. "cpu family\t: PA-RISC %s\n",
  330. cpu, boot_cpu_data.family_name);
  331. seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
  332. /* cpu MHz */
  333. seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
  334. boot_cpu_data.cpu_hz / 1000000,
  335. boot_cpu_data.cpu_hz % 1000000 );
  336. #ifdef CONFIG_PARISC_CPU_TOPOLOGY
  337. seq_printf(m, "physical id\t: %d\n",
  338. topology_physical_package_id(cpu));
  339. seq_printf(m, "siblings\t: %d\n",
  340. cpumask_weight(topology_core_cpumask(cpu)));
  341. seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
  342. #endif
  343. seq_printf(m, "capabilities\t:");
  344. if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
  345. seq_puts(m, " os32");
  346. if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
  347. seq_puts(m, " os64");
  348. if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
  349. seq_puts(m, " iopdir_fdc");
  350. switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
  351. case PDC_MODEL_NVA_SUPPORTED:
  352. seq_puts(m, " nva_supported");
  353. break;
  354. case PDC_MODEL_NVA_SLOW:
  355. seq_puts(m, " nva_slow");
  356. break;
  357. case PDC_MODEL_NVA_UNSUPPORTED:
  358. seq_puts(m, " needs_equivalent_aliasing");
  359. break;
  360. }
  361. seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
  362. seq_printf(m, "model\t\t: %s\n"
  363. "model name\t: %s\n",
  364. boot_cpu_data.pdc.sys_model_name,
  365. cpuinfo->dev ?
  366. cpuinfo->dev->name : "Unknown");
  367. seq_printf(m, "hversion\t: 0x%08x\n"
  368. "sversion\t: 0x%08x\n",
  369. boot_cpu_data.hversion,
  370. boot_cpu_data.sversion );
  371. /* print cachesize info */
  372. show_cache_info(m);
  373. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  374. cpuinfo->loops_per_jiffy / (500000 / HZ),
  375. (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
  376. seq_printf(m, "software id\t: %ld\n\n",
  377. boot_cpu_data.pdc.model.sw_id);
  378. }
  379. return 0;
  380. }
  381. static const struct parisc_device_id processor_tbl[] __initconst = {
  382. { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
  383. { 0, }
  384. };
  385. static struct parisc_driver cpu_driver __refdata = {
  386. .name = "CPU",
  387. .id_table = processor_tbl,
  388. .probe = processor_probe
  389. };
  390. /**
  391. * processor_init - Processor initialization procedure.
  392. *
  393. * Register this driver.
  394. */
  395. void __init processor_init(void)
  396. {
  397. register_parisc_driver(&cpu_driver);
  398. }