core.c 96 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/list_sort.h>
  14. #include <linux/libnvdimm.h>
  15. #include <linux/module.h>
  16. #include <linux/mutex.h>
  17. #include <linux/ndctl.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/delay.h>
  20. #include <linux/list.h>
  21. #include <linux/acpi.h>
  22. #include <linux/sort.h>
  23. #include <linux/io.h>
  24. #include <linux/nd.h>
  25. #include <asm/cacheflush.h>
  26. #include <acpi/nfit.h>
  27. #include "nfit.h"
  28. #include "intel.h"
  29. /*
  30. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  31. * irrelevant.
  32. */
  33. #include <linux/io-64-nonatomic-hi-lo.h>
  34. static bool force_enable_dimms;
  35. module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
  36. MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
  37. static bool disable_vendor_specific;
  38. module_param(disable_vendor_specific, bool, S_IRUGO);
  39. MODULE_PARM_DESC(disable_vendor_specific,
  40. "Limit commands to the publicly specified set");
  41. static unsigned long override_dsm_mask;
  42. module_param(override_dsm_mask, ulong, S_IRUGO);
  43. MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions");
  44. static int default_dsm_family = -1;
  45. module_param(default_dsm_family, int, S_IRUGO);
  46. MODULE_PARM_DESC(default_dsm_family,
  47. "Try this DSM type first when identifying NVDIMM family");
  48. static bool no_init_ars;
  49. module_param(no_init_ars, bool, 0644);
  50. MODULE_PARM_DESC(no_init_ars, "Skip ARS run at nfit init time");
  51. LIST_HEAD(acpi_descs);
  52. DEFINE_MUTEX(acpi_desc_lock);
  53. static struct workqueue_struct *nfit_wq;
  54. struct nfit_table_prev {
  55. struct list_head spas;
  56. struct list_head memdevs;
  57. struct list_head dcrs;
  58. struct list_head bdws;
  59. struct list_head idts;
  60. struct list_head flushes;
  61. };
  62. static guid_t nfit_uuid[NFIT_UUID_MAX];
  63. const guid_t *to_nfit_uuid(enum nfit_uuids id)
  64. {
  65. return &nfit_uuid[id];
  66. }
  67. EXPORT_SYMBOL(to_nfit_uuid);
  68. static struct acpi_nfit_desc *to_acpi_nfit_desc(
  69. struct nvdimm_bus_descriptor *nd_desc)
  70. {
  71. return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
  72. }
  73. static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
  74. {
  75. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  76. /*
  77. * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
  78. * acpi_device.
  79. */
  80. if (!nd_desc->provider_name
  81. || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
  82. return NULL;
  83. return to_acpi_device(acpi_desc->dev);
  84. }
  85. static int xlat_bus_status(void *buf, unsigned int cmd, u32 status)
  86. {
  87. struct nd_cmd_clear_error *clear_err;
  88. struct nd_cmd_ars_status *ars_status;
  89. u16 flags;
  90. switch (cmd) {
  91. case ND_CMD_ARS_CAP:
  92. if ((status & 0xffff) == NFIT_ARS_CAP_NONE)
  93. return -ENOTTY;
  94. /* Command failed */
  95. if (status & 0xffff)
  96. return -EIO;
  97. /* No supported scan types for this range */
  98. flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
  99. if ((status >> 16 & flags) == 0)
  100. return -ENOTTY;
  101. return 0;
  102. case ND_CMD_ARS_START:
  103. /* ARS is in progress */
  104. if ((status & 0xffff) == NFIT_ARS_START_BUSY)
  105. return -EBUSY;
  106. /* Command failed */
  107. if (status & 0xffff)
  108. return -EIO;
  109. return 0;
  110. case ND_CMD_ARS_STATUS:
  111. ars_status = buf;
  112. /* Command failed */
  113. if (status & 0xffff)
  114. return -EIO;
  115. /* Check extended status (Upper two bytes) */
  116. if (status == NFIT_ARS_STATUS_DONE)
  117. return 0;
  118. /* ARS is in progress */
  119. if (status == NFIT_ARS_STATUS_BUSY)
  120. return -EBUSY;
  121. /* No ARS performed for the current boot */
  122. if (status == NFIT_ARS_STATUS_NONE)
  123. return -EAGAIN;
  124. /*
  125. * ARS interrupted, either we overflowed or some other
  126. * agent wants the scan to stop. If we didn't overflow
  127. * then just continue with the returned results.
  128. */
  129. if (status == NFIT_ARS_STATUS_INTR) {
  130. if (ars_status->out_length >= 40 && (ars_status->flags
  131. & NFIT_ARS_F_OVERFLOW))
  132. return -ENOSPC;
  133. return 0;
  134. }
  135. /* Unknown status */
  136. if (status >> 16)
  137. return -EIO;
  138. return 0;
  139. case ND_CMD_CLEAR_ERROR:
  140. clear_err = buf;
  141. if (status & 0xffff)
  142. return -EIO;
  143. if (!clear_err->cleared)
  144. return -EIO;
  145. if (clear_err->length > clear_err->cleared)
  146. return clear_err->cleared;
  147. return 0;
  148. default:
  149. break;
  150. }
  151. /* all other non-zero status results in an error */
  152. if (status)
  153. return -EIO;
  154. return 0;
  155. }
  156. #define ACPI_LABELS_LOCKED 3
  157. static int xlat_nvdimm_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd,
  158. u32 status)
  159. {
  160. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  161. switch (cmd) {
  162. case ND_CMD_GET_CONFIG_SIZE:
  163. /*
  164. * In the _LSI, _LSR, _LSW case the locked status is
  165. * communicated via the read/write commands
  166. */
  167. if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags))
  168. break;
  169. if (status >> 16 & ND_CONFIG_LOCKED)
  170. return -EACCES;
  171. break;
  172. case ND_CMD_GET_CONFIG_DATA:
  173. if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)
  174. && status == ACPI_LABELS_LOCKED)
  175. return -EACCES;
  176. break;
  177. case ND_CMD_SET_CONFIG_DATA:
  178. if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags)
  179. && status == ACPI_LABELS_LOCKED)
  180. return -EACCES;
  181. break;
  182. default:
  183. break;
  184. }
  185. /* all other non-zero status results in an error */
  186. if (status)
  187. return -EIO;
  188. return 0;
  189. }
  190. static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd,
  191. u32 status)
  192. {
  193. if (!nvdimm)
  194. return xlat_bus_status(buf, cmd, status);
  195. return xlat_nvdimm_status(nvdimm, buf, cmd, status);
  196. }
  197. /* convert _LS{I,R} packages to the buffer object acpi_nfit_ctl expects */
  198. static union acpi_object *pkg_to_buf(union acpi_object *pkg)
  199. {
  200. int i;
  201. void *dst;
  202. size_t size = 0;
  203. union acpi_object *buf = NULL;
  204. if (pkg->type != ACPI_TYPE_PACKAGE) {
  205. WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
  206. pkg->type);
  207. goto err;
  208. }
  209. for (i = 0; i < pkg->package.count; i++) {
  210. union acpi_object *obj = &pkg->package.elements[i];
  211. if (obj->type == ACPI_TYPE_INTEGER)
  212. size += 4;
  213. else if (obj->type == ACPI_TYPE_BUFFER)
  214. size += obj->buffer.length;
  215. else {
  216. WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
  217. obj->type);
  218. goto err;
  219. }
  220. }
  221. buf = ACPI_ALLOCATE(sizeof(*buf) + size);
  222. if (!buf)
  223. goto err;
  224. dst = buf + 1;
  225. buf->type = ACPI_TYPE_BUFFER;
  226. buf->buffer.length = size;
  227. buf->buffer.pointer = dst;
  228. for (i = 0; i < pkg->package.count; i++) {
  229. union acpi_object *obj = &pkg->package.elements[i];
  230. if (obj->type == ACPI_TYPE_INTEGER) {
  231. memcpy(dst, &obj->integer.value, 4);
  232. dst += 4;
  233. } else if (obj->type == ACPI_TYPE_BUFFER) {
  234. memcpy(dst, obj->buffer.pointer, obj->buffer.length);
  235. dst += obj->buffer.length;
  236. }
  237. }
  238. err:
  239. ACPI_FREE(pkg);
  240. return buf;
  241. }
  242. static union acpi_object *int_to_buf(union acpi_object *integer)
  243. {
  244. union acpi_object *buf = ACPI_ALLOCATE(sizeof(*buf) + 4);
  245. void *dst = NULL;
  246. if (!buf)
  247. goto err;
  248. if (integer->type != ACPI_TYPE_INTEGER) {
  249. WARN_ONCE(1, "BIOS bug, unexpected element type: %d\n",
  250. integer->type);
  251. goto err;
  252. }
  253. dst = buf + 1;
  254. buf->type = ACPI_TYPE_BUFFER;
  255. buf->buffer.length = 4;
  256. buf->buffer.pointer = dst;
  257. memcpy(dst, &integer->integer.value, 4);
  258. err:
  259. ACPI_FREE(integer);
  260. return buf;
  261. }
  262. static union acpi_object *acpi_label_write(acpi_handle handle, u32 offset,
  263. u32 len, void *data)
  264. {
  265. acpi_status rc;
  266. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  267. struct acpi_object_list input = {
  268. .count = 3,
  269. .pointer = (union acpi_object []) {
  270. [0] = {
  271. .integer.type = ACPI_TYPE_INTEGER,
  272. .integer.value = offset,
  273. },
  274. [1] = {
  275. .integer.type = ACPI_TYPE_INTEGER,
  276. .integer.value = len,
  277. },
  278. [2] = {
  279. .buffer.type = ACPI_TYPE_BUFFER,
  280. .buffer.pointer = data,
  281. .buffer.length = len,
  282. },
  283. },
  284. };
  285. rc = acpi_evaluate_object(handle, "_LSW", &input, &buf);
  286. if (ACPI_FAILURE(rc))
  287. return NULL;
  288. return int_to_buf(buf.pointer);
  289. }
  290. static union acpi_object *acpi_label_read(acpi_handle handle, u32 offset,
  291. u32 len)
  292. {
  293. acpi_status rc;
  294. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  295. struct acpi_object_list input = {
  296. .count = 2,
  297. .pointer = (union acpi_object []) {
  298. [0] = {
  299. .integer.type = ACPI_TYPE_INTEGER,
  300. .integer.value = offset,
  301. },
  302. [1] = {
  303. .integer.type = ACPI_TYPE_INTEGER,
  304. .integer.value = len,
  305. },
  306. },
  307. };
  308. rc = acpi_evaluate_object(handle, "_LSR", &input, &buf);
  309. if (ACPI_FAILURE(rc))
  310. return NULL;
  311. return pkg_to_buf(buf.pointer);
  312. }
  313. static union acpi_object *acpi_label_info(acpi_handle handle)
  314. {
  315. acpi_status rc;
  316. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  317. rc = acpi_evaluate_object(handle, "_LSI", NULL, &buf);
  318. if (ACPI_FAILURE(rc))
  319. return NULL;
  320. return pkg_to_buf(buf.pointer);
  321. }
  322. static u8 nfit_dsm_revid(unsigned family, unsigned func)
  323. {
  324. static const u8 revid_table[NVDIMM_FAMILY_MAX+1][32] = {
  325. [NVDIMM_FAMILY_INTEL] = {
  326. [NVDIMM_INTEL_GET_MODES] = 2,
  327. [NVDIMM_INTEL_GET_FWINFO] = 2,
  328. [NVDIMM_INTEL_START_FWUPDATE] = 2,
  329. [NVDIMM_INTEL_SEND_FWUPDATE] = 2,
  330. [NVDIMM_INTEL_FINISH_FWUPDATE] = 2,
  331. [NVDIMM_INTEL_QUERY_FWUPDATE] = 2,
  332. [NVDIMM_INTEL_SET_THRESHOLD] = 2,
  333. [NVDIMM_INTEL_INJECT_ERROR] = 2,
  334. },
  335. };
  336. u8 id;
  337. if (family > NVDIMM_FAMILY_MAX)
  338. return 0;
  339. if (func > 31)
  340. return 0;
  341. id = revid_table[family][func];
  342. if (id == 0)
  343. return 1; /* default */
  344. return id;
  345. }
  346. int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
  347. unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc)
  348. {
  349. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  350. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  351. union acpi_object in_obj, in_buf, *out_obj;
  352. const struct nd_cmd_desc *desc = NULL;
  353. struct device *dev = acpi_desc->dev;
  354. struct nd_cmd_pkg *call_pkg = NULL;
  355. const char *cmd_name, *dimm_name;
  356. unsigned long cmd_mask, dsm_mask;
  357. u32 offset, fw_status = 0;
  358. acpi_handle handle;
  359. unsigned int func;
  360. const guid_t *guid;
  361. int rc, i;
  362. if (cmd_rc)
  363. *cmd_rc = -EINVAL;
  364. func = cmd;
  365. if (cmd == ND_CMD_CALL) {
  366. call_pkg = buf;
  367. func = call_pkg->nd_command;
  368. for (i = 0; i < ARRAY_SIZE(call_pkg->nd_reserved2); i++)
  369. if (call_pkg->nd_reserved2[i])
  370. return -EINVAL;
  371. }
  372. if (nvdimm) {
  373. struct acpi_device *adev = nfit_mem->adev;
  374. if (!adev)
  375. return -ENOTTY;
  376. if (call_pkg && nfit_mem->family != call_pkg->nd_family)
  377. return -ENOTTY;
  378. dimm_name = nvdimm_name(nvdimm);
  379. cmd_name = nvdimm_cmd_name(cmd);
  380. cmd_mask = nvdimm_cmd_mask(nvdimm);
  381. dsm_mask = nfit_mem->dsm_mask;
  382. desc = nd_cmd_dimm_desc(cmd);
  383. guid = to_nfit_uuid(nfit_mem->family);
  384. handle = adev->handle;
  385. } else {
  386. struct acpi_device *adev = to_acpi_dev(acpi_desc);
  387. cmd_name = nvdimm_bus_cmd_name(cmd);
  388. cmd_mask = nd_desc->cmd_mask;
  389. dsm_mask = cmd_mask;
  390. if (cmd == ND_CMD_CALL)
  391. dsm_mask = nd_desc->bus_dsm_mask;
  392. desc = nd_cmd_bus_desc(cmd);
  393. guid = to_nfit_uuid(NFIT_DEV_BUS);
  394. handle = adev->handle;
  395. dimm_name = "bus";
  396. }
  397. if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
  398. return -ENOTTY;
  399. if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask))
  400. return -ENOTTY;
  401. in_obj.type = ACPI_TYPE_PACKAGE;
  402. in_obj.package.count = 1;
  403. in_obj.package.elements = &in_buf;
  404. in_buf.type = ACPI_TYPE_BUFFER;
  405. in_buf.buffer.pointer = buf;
  406. in_buf.buffer.length = 0;
  407. /* libnvdimm has already validated the input envelope */
  408. for (i = 0; i < desc->in_num; i++)
  409. in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
  410. i, buf);
  411. if (call_pkg) {
  412. /* skip over package wrapper */
  413. in_buf.buffer.pointer = (void *) &call_pkg->nd_payload;
  414. in_buf.buffer.length = call_pkg->nd_size_in;
  415. }
  416. dev_dbg(dev, "%s cmd: %d: func: %d input length: %d\n",
  417. dimm_name, cmd, func, in_buf.buffer.length);
  418. print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4,
  419. in_buf.buffer.pointer,
  420. min_t(u32, 256, in_buf.buffer.length), true);
  421. /* call the BIOS, prefer the named methods over _DSM if available */
  422. if (nvdimm && cmd == ND_CMD_GET_CONFIG_SIZE
  423. && test_bit(NFIT_MEM_LSR, &nfit_mem->flags))
  424. out_obj = acpi_label_info(handle);
  425. else if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA
  426. && test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) {
  427. struct nd_cmd_get_config_data_hdr *p = buf;
  428. out_obj = acpi_label_read(handle, p->in_offset, p->in_length);
  429. } else if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA
  430. && test_bit(NFIT_MEM_LSW, &nfit_mem->flags)) {
  431. struct nd_cmd_set_config_hdr *p = buf;
  432. out_obj = acpi_label_write(handle, p->in_offset, p->in_length,
  433. p->in_buf);
  434. } else {
  435. u8 revid;
  436. if (nvdimm)
  437. revid = nfit_dsm_revid(nfit_mem->family, func);
  438. else
  439. revid = 1;
  440. out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj);
  441. }
  442. if (!out_obj) {
  443. dev_dbg(dev, "%s _DSM failed cmd: %s\n", dimm_name, cmd_name);
  444. return -EINVAL;
  445. }
  446. if (call_pkg) {
  447. call_pkg->nd_fw_size = out_obj->buffer.length;
  448. memcpy(call_pkg->nd_payload + call_pkg->nd_size_in,
  449. out_obj->buffer.pointer,
  450. min(call_pkg->nd_fw_size, call_pkg->nd_size_out));
  451. ACPI_FREE(out_obj);
  452. /*
  453. * Need to support FW function w/o known size in advance.
  454. * Caller can determine required size based upon nd_fw_size.
  455. * If we return an error (like elsewhere) then caller wouldn't
  456. * be able to rely upon data returned to make calculation.
  457. */
  458. if (cmd_rc)
  459. *cmd_rc = 0;
  460. return 0;
  461. }
  462. if (out_obj->package.type != ACPI_TYPE_BUFFER) {
  463. dev_dbg(dev, "%s unexpected output object type cmd: %s type: %d\n",
  464. dimm_name, cmd_name, out_obj->type);
  465. rc = -EINVAL;
  466. goto out;
  467. }
  468. dev_dbg(dev, "%s cmd: %s output length: %d\n", dimm_name,
  469. cmd_name, out_obj->buffer.length);
  470. print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4,
  471. out_obj->buffer.pointer,
  472. min_t(u32, 128, out_obj->buffer.length), true);
  473. for (i = 0, offset = 0; i < desc->out_num; i++) {
  474. u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
  475. (u32 *) out_obj->buffer.pointer,
  476. out_obj->buffer.length - offset);
  477. if (offset + out_size > out_obj->buffer.length) {
  478. dev_dbg(dev, "%s output object underflow cmd: %s field: %d\n",
  479. dimm_name, cmd_name, i);
  480. break;
  481. }
  482. if (in_buf.buffer.length + offset + out_size > buf_len) {
  483. dev_dbg(dev, "%s output overrun cmd: %s field: %d\n",
  484. dimm_name, cmd_name, i);
  485. rc = -ENXIO;
  486. goto out;
  487. }
  488. memcpy(buf + in_buf.buffer.length + offset,
  489. out_obj->buffer.pointer + offset, out_size);
  490. offset += out_size;
  491. }
  492. /*
  493. * Set fw_status for all the commands with a known format to be
  494. * later interpreted by xlat_status().
  495. */
  496. if (i >= 1 && ((!nvdimm && cmd >= ND_CMD_ARS_CAP
  497. && cmd <= ND_CMD_CLEAR_ERROR)
  498. || (nvdimm && cmd >= ND_CMD_SMART
  499. && cmd <= ND_CMD_VENDOR)))
  500. fw_status = *(u32 *) out_obj->buffer.pointer;
  501. if (offset + in_buf.buffer.length < buf_len) {
  502. if (i >= 1) {
  503. /*
  504. * status valid, return the number of bytes left
  505. * unfilled in the output buffer
  506. */
  507. rc = buf_len - offset - in_buf.buffer.length;
  508. if (cmd_rc)
  509. *cmd_rc = xlat_status(nvdimm, buf, cmd,
  510. fw_status);
  511. } else {
  512. dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
  513. __func__, dimm_name, cmd_name, buf_len,
  514. offset);
  515. rc = -ENXIO;
  516. }
  517. } else {
  518. rc = 0;
  519. if (cmd_rc)
  520. *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status);
  521. }
  522. out:
  523. ACPI_FREE(out_obj);
  524. return rc;
  525. }
  526. EXPORT_SYMBOL_GPL(acpi_nfit_ctl);
  527. static const char *spa_type_name(u16 type)
  528. {
  529. static const char *to_name[] = {
  530. [NFIT_SPA_VOLATILE] = "volatile",
  531. [NFIT_SPA_PM] = "pmem",
  532. [NFIT_SPA_DCR] = "dimm-control-region",
  533. [NFIT_SPA_BDW] = "block-data-window",
  534. [NFIT_SPA_VDISK] = "volatile-disk",
  535. [NFIT_SPA_VCD] = "volatile-cd",
  536. [NFIT_SPA_PDISK] = "persistent-disk",
  537. [NFIT_SPA_PCD] = "persistent-cd",
  538. };
  539. if (type > NFIT_SPA_PCD)
  540. return "unknown";
  541. return to_name[type];
  542. }
  543. int nfit_spa_type(struct acpi_nfit_system_address *spa)
  544. {
  545. int i;
  546. for (i = 0; i < NFIT_UUID_MAX; i++)
  547. if (guid_equal(to_nfit_uuid(i), (guid_t *)&spa->range_guid))
  548. return i;
  549. return -1;
  550. }
  551. static bool add_spa(struct acpi_nfit_desc *acpi_desc,
  552. struct nfit_table_prev *prev,
  553. struct acpi_nfit_system_address *spa)
  554. {
  555. struct device *dev = acpi_desc->dev;
  556. struct nfit_spa *nfit_spa;
  557. if (spa->header.length != sizeof(*spa))
  558. return false;
  559. list_for_each_entry(nfit_spa, &prev->spas, list) {
  560. if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) {
  561. list_move_tail(&nfit_spa->list, &acpi_desc->spas);
  562. return true;
  563. }
  564. }
  565. nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa),
  566. GFP_KERNEL);
  567. if (!nfit_spa)
  568. return false;
  569. INIT_LIST_HEAD(&nfit_spa->list);
  570. memcpy(nfit_spa->spa, spa, sizeof(*spa));
  571. list_add_tail(&nfit_spa->list, &acpi_desc->spas);
  572. dev_dbg(dev, "spa index: %d type: %s\n",
  573. spa->range_index,
  574. spa_type_name(nfit_spa_type(spa)));
  575. return true;
  576. }
  577. static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
  578. struct nfit_table_prev *prev,
  579. struct acpi_nfit_memory_map *memdev)
  580. {
  581. struct device *dev = acpi_desc->dev;
  582. struct nfit_memdev *nfit_memdev;
  583. if (memdev->header.length != sizeof(*memdev))
  584. return false;
  585. list_for_each_entry(nfit_memdev, &prev->memdevs, list)
  586. if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) {
  587. list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  588. return true;
  589. }
  590. nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev),
  591. GFP_KERNEL);
  592. if (!nfit_memdev)
  593. return false;
  594. INIT_LIST_HEAD(&nfit_memdev->list);
  595. memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev));
  596. list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  597. dev_dbg(dev, "memdev handle: %#x spa: %d dcr: %d flags: %#x\n",
  598. memdev->device_handle, memdev->range_index,
  599. memdev->region_index, memdev->flags);
  600. return true;
  601. }
  602. int nfit_get_smbios_id(u32 device_handle, u16 *flags)
  603. {
  604. struct acpi_nfit_memory_map *memdev;
  605. struct acpi_nfit_desc *acpi_desc;
  606. struct nfit_mem *nfit_mem;
  607. mutex_lock(&acpi_desc_lock);
  608. list_for_each_entry(acpi_desc, &acpi_descs, list) {
  609. mutex_lock(&acpi_desc->init_mutex);
  610. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  611. memdev = __to_nfit_memdev(nfit_mem);
  612. if (memdev->device_handle == device_handle) {
  613. mutex_unlock(&acpi_desc->init_mutex);
  614. mutex_unlock(&acpi_desc_lock);
  615. *flags = memdev->flags;
  616. return memdev->physical_id;
  617. }
  618. }
  619. mutex_unlock(&acpi_desc->init_mutex);
  620. }
  621. mutex_unlock(&acpi_desc_lock);
  622. return -ENODEV;
  623. }
  624. EXPORT_SYMBOL_GPL(nfit_get_smbios_id);
  625. /*
  626. * An implementation may provide a truncated control region if no block windows
  627. * are defined.
  628. */
  629. static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr)
  630. {
  631. if (dcr->header.length < offsetof(struct acpi_nfit_control_region,
  632. window_size))
  633. return 0;
  634. if (dcr->windows)
  635. return sizeof(*dcr);
  636. return offsetof(struct acpi_nfit_control_region, window_size);
  637. }
  638. static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
  639. struct nfit_table_prev *prev,
  640. struct acpi_nfit_control_region *dcr)
  641. {
  642. struct device *dev = acpi_desc->dev;
  643. struct nfit_dcr *nfit_dcr;
  644. if (!sizeof_dcr(dcr))
  645. return false;
  646. list_for_each_entry(nfit_dcr, &prev->dcrs, list)
  647. if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) {
  648. list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  649. return true;
  650. }
  651. nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr),
  652. GFP_KERNEL);
  653. if (!nfit_dcr)
  654. return false;
  655. INIT_LIST_HEAD(&nfit_dcr->list);
  656. memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr));
  657. list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  658. dev_dbg(dev, "dcr index: %d windows: %d\n",
  659. dcr->region_index, dcr->windows);
  660. return true;
  661. }
  662. static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
  663. struct nfit_table_prev *prev,
  664. struct acpi_nfit_data_region *bdw)
  665. {
  666. struct device *dev = acpi_desc->dev;
  667. struct nfit_bdw *nfit_bdw;
  668. if (bdw->header.length != sizeof(*bdw))
  669. return false;
  670. list_for_each_entry(nfit_bdw, &prev->bdws, list)
  671. if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) {
  672. list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
  673. return true;
  674. }
  675. nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw),
  676. GFP_KERNEL);
  677. if (!nfit_bdw)
  678. return false;
  679. INIT_LIST_HEAD(&nfit_bdw->list);
  680. memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw));
  681. list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
  682. dev_dbg(dev, "bdw dcr: %d windows: %d\n",
  683. bdw->region_index, bdw->windows);
  684. return true;
  685. }
  686. static size_t sizeof_idt(struct acpi_nfit_interleave *idt)
  687. {
  688. if (idt->header.length < sizeof(*idt))
  689. return 0;
  690. return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1);
  691. }
  692. static bool add_idt(struct acpi_nfit_desc *acpi_desc,
  693. struct nfit_table_prev *prev,
  694. struct acpi_nfit_interleave *idt)
  695. {
  696. struct device *dev = acpi_desc->dev;
  697. struct nfit_idt *nfit_idt;
  698. if (!sizeof_idt(idt))
  699. return false;
  700. list_for_each_entry(nfit_idt, &prev->idts, list) {
  701. if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt))
  702. continue;
  703. if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) {
  704. list_move_tail(&nfit_idt->list, &acpi_desc->idts);
  705. return true;
  706. }
  707. }
  708. nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt),
  709. GFP_KERNEL);
  710. if (!nfit_idt)
  711. return false;
  712. INIT_LIST_HEAD(&nfit_idt->list);
  713. memcpy(nfit_idt->idt, idt, sizeof_idt(idt));
  714. list_add_tail(&nfit_idt->list, &acpi_desc->idts);
  715. dev_dbg(dev, "idt index: %d num_lines: %d\n",
  716. idt->interleave_index, idt->line_count);
  717. return true;
  718. }
  719. static size_t sizeof_flush(struct acpi_nfit_flush_address *flush)
  720. {
  721. if (flush->header.length < sizeof(*flush))
  722. return 0;
  723. return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1);
  724. }
  725. static bool add_flush(struct acpi_nfit_desc *acpi_desc,
  726. struct nfit_table_prev *prev,
  727. struct acpi_nfit_flush_address *flush)
  728. {
  729. struct device *dev = acpi_desc->dev;
  730. struct nfit_flush *nfit_flush;
  731. if (!sizeof_flush(flush))
  732. return false;
  733. list_for_each_entry(nfit_flush, &prev->flushes, list) {
  734. if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush))
  735. continue;
  736. if (memcmp(nfit_flush->flush, flush,
  737. sizeof_flush(flush)) == 0) {
  738. list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
  739. return true;
  740. }
  741. }
  742. nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush)
  743. + sizeof_flush(flush), GFP_KERNEL);
  744. if (!nfit_flush)
  745. return false;
  746. INIT_LIST_HEAD(&nfit_flush->list);
  747. memcpy(nfit_flush->flush, flush, sizeof_flush(flush));
  748. list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
  749. dev_dbg(dev, "nfit_flush handle: %d hint_count: %d\n",
  750. flush->device_handle, flush->hint_count);
  751. return true;
  752. }
  753. static bool add_platform_cap(struct acpi_nfit_desc *acpi_desc,
  754. struct acpi_nfit_capabilities *pcap)
  755. {
  756. struct device *dev = acpi_desc->dev;
  757. u32 mask;
  758. mask = (1 << (pcap->highest_capability + 1)) - 1;
  759. acpi_desc->platform_cap = pcap->capabilities & mask;
  760. dev_dbg(dev, "cap: %#x\n", acpi_desc->platform_cap);
  761. return true;
  762. }
  763. static void *add_table(struct acpi_nfit_desc *acpi_desc,
  764. struct nfit_table_prev *prev, void *table, const void *end)
  765. {
  766. struct device *dev = acpi_desc->dev;
  767. struct acpi_nfit_header *hdr;
  768. void *err = ERR_PTR(-ENOMEM);
  769. if (table >= end)
  770. return NULL;
  771. hdr = table;
  772. if (!hdr->length) {
  773. dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
  774. hdr->type);
  775. return NULL;
  776. }
  777. switch (hdr->type) {
  778. case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
  779. if (!add_spa(acpi_desc, prev, table))
  780. return err;
  781. break;
  782. case ACPI_NFIT_TYPE_MEMORY_MAP:
  783. if (!add_memdev(acpi_desc, prev, table))
  784. return err;
  785. break;
  786. case ACPI_NFIT_TYPE_CONTROL_REGION:
  787. if (!add_dcr(acpi_desc, prev, table))
  788. return err;
  789. break;
  790. case ACPI_NFIT_TYPE_DATA_REGION:
  791. if (!add_bdw(acpi_desc, prev, table))
  792. return err;
  793. break;
  794. case ACPI_NFIT_TYPE_INTERLEAVE:
  795. if (!add_idt(acpi_desc, prev, table))
  796. return err;
  797. break;
  798. case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
  799. if (!add_flush(acpi_desc, prev, table))
  800. return err;
  801. break;
  802. case ACPI_NFIT_TYPE_SMBIOS:
  803. dev_dbg(dev, "smbios\n");
  804. break;
  805. case ACPI_NFIT_TYPE_CAPABILITIES:
  806. if (!add_platform_cap(acpi_desc, table))
  807. return err;
  808. break;
  809. default:
  810. dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
  811. break;
  812. }
  813. return table + hdr->length;
  814. }
  815. static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
  816. struct nfit_mem *nfit_mem)
  817. {
  818. u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  819. u16 dcr = nfit_mem->dcr->region_index;
  820. struct nfit_spa *nfit_spa;
  821. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  822. u16 range_index = nfit_spa->spa->range_index;
  823. int type = nfit_spa_type(nfit_spa->spa);
  824. struct nfit_memdev *nfit_memdev;
  825. if (type != NFIT_SPA_BDW)
  826. continue;
  827. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  828. if (nfit_memdev->memdev->range_index != range_index)
  829. continue;
  830. if (nfit_memdev->memdev->device_handle != device_handle)
  831. continue;
  832. if (nfit_memdev->memdev->region_index != dcr)
  833. continue;
  834. nfit_mem->spa_bdw = nfit_spa->spa;
  835. return;
  836. }
  837. }
  838. dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
  839. nfit_mem->spa_dcr->range_index);
  840. nfit_mem->bdw = NULL;
  841. }
  842. static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
  843. struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
  844. {
  845. u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
  846. struct nfit_memdev *nfit_memdev;
  847. struct nfit_bdw *nfit_bdw;
  848. struct nfit_idt *nfit_idt;
  849. u16 idt_idx, range_index;
  850. list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
  851. if (nfit_bdw->bdw->region_index != dcr)
  852. continue;
  853. nfit_mem->bdw = nfit_bdw->bdw;
  854. break;
  855. }
  856. if (!nfit_mem->bdw)
  857. return;
  858. nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
  859. if (!nfit_mem->spa_bdw)
  860. return;
  861. range_index = nfit_mem->spa_bdw->range_index;
  862. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  863. if (nfit_memdev->memdev->range_index != range_index ||
  864. nfit_memdev->memdev->region_index != dcr)
  865. continue;
  866. nfit_mem->memdev_bdw = nfit_memdev->memdev;
  867. idt_idx = nfit_memdev->memdev->interleave_index;
  868. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  869. if (nfit_idt->idt->interleave_index != idt_idx)
  870. continue;
  871. nfit_mem->idt_bdw = nfit_idt->idt;
  872. break;
  873. }
  874. break;
  875. }
  876. }
  877. static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc,
  878. struct acpi_nfit_system_address *spa)
  879. {
  880. struct nfit_mem *nfit_mem, *found;
  881. struct nfit_memdev *nfit_memdev;
  882. int type = spa ? nfit_spa_type(spa) : 0;
  883. switch (type) {
  884. case NFIT_SPA_DCR:
  885. case NFIT_SPA_PM:
  886. break;
  887. default:
  888. if (spa)
  889. return 0;
  890. }
  891. /*
  892. * This loop runs in two modes, when a dimm is mapped the loop
  893. * adds memdev associations to an existing dimm, or creates a
  894. * dimm. In the unmapped dimm case this loop sweeps for memdev
  895. * instances with an invalid / zero range_index and adds those
  896. * dimms without spa associations.
  897. */
  898. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  899. struct nfit_flush *nfit_flush;
  900. struct nfit_dcr *nfit_dcr;
  901. u32 device_handle;
  902. u16 dcr;
  903. if (spa && nfit_memdev->memdev->range_index != spa->range_index)
  904. continue;
  905. if (!spa && nfit_memdev->memdev->range_index)
  906. continue;
  907. found = NULL;
  908. dcr = nfit_memdev->memdev->region_index;
  909. device_handle = nfit_memdev->memdev->device_handle;
  910. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  911. if (__to_nfit_memdev(nfit_mem)->device_handle
  912. == device_handle) {
  913. found = nfit_mem;
  914. break;
  915. }
  916. if (found)
  917. nfit_mem = found;
  918. else {
  919. nfit_mem = devm_kzalloc(acpi_desc->dev,
  920. sizeof(*nfit_mem), GFP_KERNEL);
  921. if (!nfit_mem)
  922. return -ENOMEM;
  923. INIT_LIST_HEAD(&nfit_mem->list);
  924. nfit_mem->acpi_desc = acpi_desc;
  925. list_add(&nfit_mem->list, &acpi_desc->dimms);
  926. }
  927. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  928. if (nfit_dcr->dcr->region_index != dcr)
  929. continue;
  930. /*
  931. * Record the control region for the dimm. For
  932. * the ACPI 6.1 case, where there are separate
  933. * control regions for the pmem vs blk
  934. * interfaces, be sure to record the extended
  935. * blk details.
  936. */
  937. if (!nfit_mem->dcr)
  938. nfit_mem->dcr = nfit_dcr->dcr;
  939. else if (nfit_mem->dcr->windows == 0
  940. && nfit_dcr->dcr->windows)
  941. nfit_mem->dcr = nfit_dcr->dcr;
  942. break;
  943. }
  944. list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
  945. struct acpi_nfit_flush_address *flush;
  946. u16 i;
  947. if (nfit_flush->flush->device_handle != device_handle)
  948. continue;
  949. nfit_mem->nfit_flush = nfit_flush;
  950. flush = nfit_flush->flush;
  951. nfit_mem->flush_wpq = devm_kcalloc(acpi_desc->dev,
  952. flush->hint_count,
  953. sizeof(struct resource),
  954. GFP_KERNEL);
  955. if (!nfit_mem->flush_wpq)
  956. return -ENOMEM;
  957. for (i = 0; i < flush->hint_count; i++) {
  958. struct resource *res = &nfit_mem->flush_wpq[i];
  959. res->start = flush->hint_address[i];
  960. res->end = res->start + 8 - 1;
  961. }
  962. break;
  963. }
  964. if (dcr && !nfit_mem->dcr) {
  965. dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
  966. spa->range_index, dcr);
  967. return -ENODEV;
  968. }
  969. if (type == NFIT_SPA_DCR) {
  970. struct nfit_idt *nfit_idt;
  971. u16 idt_idx;
  972. /* multiple dimms may share a SPA when interleaved */
  973. nfit_mem->spa_dcr = spa;
  974. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  975. idt_idx = nfit_memdev->memdev->interleave_index;
  976. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  977. if (nfit_idt->idt->interleave_index != idt_idx)
  978. continue;
  979. nfit_mem->idt_dcr = nfit_idt->idt;
  980. break;
  981. }
  982. nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
  983. } else if (type == NFIT_SPA_PM) {
  984. /*
  985. * A single dimm may belong to multiple SPA-PM
  986. * ranges, record at least one in addition to
  987. * any SPA-DCR range.
  988. */
  989. nfit_mem->memdev_pmem = nfit_memdev->memdev;
  990. } else
  991. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  992. }
  993. return 0;
  994. }
  995. static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
  996. {
  997. struct nfit_mem *a = container_of(_a, typeof(*a), list);
  998. struct nfit_mem *b = container_of(_b, typeof(*b), list);
  999. u32 handleA, handleB;
  1000. handleA = __to_nfit_memdev(a)->device_handle;
  1001. handleB = __to_nfit_memdev(b)->device_handle;
  1002. if (handleA < handleB)
  1003. return -1;
  1004. else if (handleA > handleB)
  1005. return 1;
  1006. return 0;
  1007. }
  1008. static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
  1009. {
  1010. struct nfit_spa *nfit_spa;
  1011. int rc;
  1012. /*
  1013. * For each SPA-DCR or SPA-PMEM address range find its
  1014. * corresponding MEMDEV(s). From each MEMDEV find the
  1015. * corresponding DCR. Then, if we're operating on a SPA-DCR,
  1016. * try to find a SPA-BDW and a corresponding BDW that references
  1017. * the DCR. Throw it all into an nfit_mem object. Note, that
  1018. * BDWs are optional.
  1019. */
  1020. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  1021. rc = __nfit_mem_init(acpi_desc, nfit_spa->spa);
  1022. if (rc)
  1023. return rc;
  1024. }
  1025. /*
  1026. * If a DIMM has failed to be mapped into SPA there will be no
  1027. * SPA entries above. Find and register all the unmapped DIMMs
  1028. * for reporting and recovery purposes.
  1029. */
  1030. rc = __nfit_mem_init(acpi_desc, NULL);
  1031. if (rc)
  1032. return rc;
  1033. list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
  1034. return 0;
  1035. }
  1036. static ssize_t bus_dsm_mask_show(struct device *dev,
  1037. struct device_attribute *attr, char *buf)
  1038. {
  1039. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1040. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1041. return sprintf(buf, "%#lx\n", nd_desc->bus_dsm_mask);
  1042. }
  1043. static struct device_attribute dev_attr_bus_dsm_mask =
  1044. __ATTR(dsm_mask, 0444, bus_dsm_mask_show, NULL);
  1045. static ssize_t revision_show(struct device *dev,
  1046. struct device_attribute *attr, char *buf)
  1047. {
  1048. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1049. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1050. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1051. return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
  1052. }
  1053. static DEVICE_ATTR_RO(revision);
  1054. static ssize_t hw_error_scrub_show(struct device *dev,
  1055. struct device_attribute *attr, char *buf)
  1056. {
  1057. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1058. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1059. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1060. return sprintf(buf, "%d\n", acpi_desc->scrub_mode);
  1061. }
  1062. /*
  1063. * The 'hw_error_scrub' attribute can have the following values written to it:
  1064. * '0': Switch to the default mode where an exception will only insert
  1065. * the address of the memory error into the poison and badblocks lists.
  1066. * '1': Enable a full scrub to happen if an exception for a memory error is
  1067. * received.
  1068. */
  1069. static ssize_t hw_error_scrub_store(struct device *dev,
  1070. struct device_attribute *attr, const char *buf, size_t size)
  1071. {
  1072. struct nvdimm_bus_descriptor *nd_desc;
  1073. ssize_t rc;
  1074. long val;
  1075. rc = kstrtol(buf, 0, &val);
  1076. if (rc)
  1077. return rc;
  1078. device_lock(dev);
  1079. nd_desc = dev_get_drvdata(dev);
  1080. if (nd_desc) {
  1081. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1082. switch (val) {
  1083. case HW_ERROR_SCRUB_ON:
  1084. acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON;
  1085. break;
  1086. case HW_ERROR_SCRUB_OFF:
  1087. acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF;
  1088. break;
  1089. default:
  1090. rc = -EINVAL;
  1091. break;
  1092. }
  1093. }
  1094. device_unlock(dev);
  1095. if (rc)
  1096. return rc;
  1097. return size;
  1098. }
  1099. static DEVICE_ATTR_RW(hw_error_scrub);
  1100. /*
  1101. * This shows the number of full Address Range Scrubs that have been
  1102. * completed since driver load time. Userspace can wait on this using
  1103. * select/poll etc. A '+' at the end indicates an ARS is in progress
  1104. */
  1105. static ssize_t scrub_show(struct device *dev,
  1106. struct device_attribute *attr, char *buf)
  1107. {
  1108. struct nvdimm_bus_descriptor *nd_desc;
  1109. ssize_t rc = -ENXIO;
  1110. device_lock(dev);
  1111. nd_desc = dev_get_drvdata(dev);
  1112. if (nd_desc) {
  1113. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1114. mutex_lock(&acpi_desc->init_mutex);
  1115. rc = sprintf(buf, "%d%s", acpi_desc->scrub_count,
  1116. acpi_desc->scrub_busy
  1117. && !acpi_desc->cancel ? "+\n" : "\n");
  1118. mutex_unlock(&acpi_desc->init_mutex);
  1119. }
  1120. device_unlock(dev);
  1121. return rc;
  1122. }
  1123. static ssize_t scrub_store(struct device *dev,
  1124. struct device_attribute *attr, const char *buf, size_t size)
  1125. {
  1126. struct nvdimm_bus_descriptor *nd_desc;
  1127. ssize_t rc;
  1128. long val;
  1129. rc = kstrtol(buf, 0, &val);
  1130. if (rc)
  1131. return rc;
  1132. if (val != 1)
  1133. return -EINVAL;
  1134. device_lock(dev);
  1135. nd_desc = dev_get_drvdata(dev);
  1136. if (nd_desc) {
  1137. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  1138. rc = acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG);
  1139. }
  1140. device_unlock(dev);
  1141. if (rc)
  1142. return rc;
  1143. return size;
  1144. }
  1145. static DEVICE_ATTR_RW(scrub);
  1146. static bool ars_supported(struct nvdimm_bus *nvdimm_bus)
  1147. {
  1148. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1149. const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START
  1150. | 1 << ND_CMD_ARS_STATUS;
  1151. return (nd_desc->cmd_mask & mask) == mask;
  1152. }
  1153. static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n)
  1154. {
  1155. struct device *dev = container_of(kobj, struct device, kobj);
  1156. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  1157. if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus))
  1158. return 0;
  1159. return a->mode;
  1160. }
  1161. static struct attribute *acpi_nfit_attributes[] = {
  1162. &dev_attr_revision.attr,
  1163. &dev_attr_scrub.attr,
  1164. &dev_attr_hw_error_scrub.attr,
  1165. &dev_attr_bus_dsm_mask.attr,
  1166. NULL,
  1167. };
  1168. static const struct attribute_group acpi_nfit_attribute_group = {
  1169. .name = "nfit",
  1170. .attrs = acpi_nfit_attributes,
  1171. .is_visible = nfit_visible,
  1172. };
  1173. static const struct attribute_group *acpi_nfit_attribute_groups[] = {
  1174. &nvdimm_bus_attribute_group,
  1175. &acpi_nfit_attribute_group,
  1176. NULL,
  1177. };
  1178. static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
  1179. {
  1180. struct nvdimm *nvdimm = to_nvdimm(dev);
  1181. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1182. return __to_nfit_memdev(nfit_mem);
  1183. }
  1184. static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
  1185. {
  1186. struct nvdimm *nvdimm = to_nvdimm(dev);
  1187. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1188. return nfit_mem->dcr;
  1189. }
  1190. static ssize_t handle_show(struct device *dev,
  1191. struct device_attribute *attr, char *buf)
  1192. {
  1193. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  1194. return sprintf(buf, "%#x\n", memdev->device_handle);
  1195. }
  1196. static DEVICE_ATTR_RO(handle);
  1197. static ssize_t phys_id_show(struct device *dev,
  1198. struct device_attribute *attr, char *buf)
  1199. {
  1200. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  1201. return sprintf(buf, "%#x\n", memdev->physical_id);
  1202. }
  1203. static DEVICE_ATTR_RO(phys_id);
  1204. static ssize_t vendor_show(struct device *dev,
  1205. struct device_attribute *attr, char *buf)
  1206. {
  1207. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1208. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id));
  1209. }
  1210. static DEVICE_ATTR_RO(vendor);
  1211. static ssize_t rev_id_show(struct device *dev,
  1212. struct device_attribute *attr, char *buf)
  1213. {
  1214. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1215. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id));
  1216. }
  1217. static DEVICE_ATTR_RO(rev_id);
  1218. static ssize_t device_show(struct device *dev,
  1219. struct device_attribute *attr, char *buf)
  1220. {
  1221. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1222. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id));
  1223. }
  1224. static DEVICE_ATTR_RO(device);
  1225. static ssize_t subsystem_vendor_show(struct device *dev,
  1226. struct device_attribute *attr, char *buf)
  1227. {
  1228. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1229. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id));
  1230. }
  1231. static DEVICE_ATTR_RO(subsystem_vendor);
  1232. static ssize_t subsystem_rev_id_show(struct device *dev,
  1233. struct device_attribute *attr, char *buf)
  1234. {
  1235. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1236. return sprintf(buf, "0x%04x\n",
  1237. be16_to_cpu(dcr->subsystem_revision_id));
  1238. }
  1239. static DEVICE_ATTR_RO(subsystem_rev_id);
  1240. static ssize_t subsystem_device_show(struct device *dev,
  1241. struct device_attribute *attr, char *buf)
  1242. {
  1243. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1244. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id));
  1245. }
  1246. static DEVICE_ATTR_RO(subsystem_device);
  1247. static int num_nvdimm_formats(struct nvdimm *nvdimm)
  1248. {
  1249. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1250. int formats = 0;
  1251. if (nfit_mem->memdev_pmem)
  1252. formats++;
  1253. if (nfit_mem->memdev_bdw)
  1254. formats++;
  1255. return formats;
  1256. }
  1257. static ssize_t format_show(struct device *dev,
  1258. struct device_attribute *attr, char *buf)
  1259. {
  1260. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1261. return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code));
  1262. }
  1263. static DEVICE_ATTR_RO(format);
  1264. static ssize_t format1_show(struct device *dev,
  1265. struct device_attribute *attr, char *buf)
  1266. {
  1267. u32 handle;
  1268. ssize_t rc = -ENXIO;
  1269. struct nfit_mem *nfit_mem;
  1270. struct nfit_memdev *nfit_memdev;
  1271. struct acpi_nfit_desc *acpi_desc;
  1272. struct nvdimm *nvdimm = to_nvdimm(dev);
  1273. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1274. nfit_mem = nvdimm_provider_data(nvdimm);
  1275. acpi_desc = nfit_mem->acpi_desc;
  1276. handle = to_nfit_memdev(dev)->device_handle;
  1277. /* assumes DIMMs have at most 2 published interface codes */
  1278. mutex_lock(&acpi_desc->init_mutex);
  1279. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1280. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  1281. struct nfit_dcr *nfit_dcr;
  1282. if (memdev->device_handle != handle)
  1283. continue;
  1284. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  1285. if (nfit_dcr->dcr->region_index != memdev->region_index)
  1286. continue;
  1287. if (nfit_dcr->dcr->code == dcr->code)
  1288. continue;
  1289. rc = sprintf(buf, "0x%04x\n",
  1290. le16_to_cpu(nfit_dcr->dcr->code));
  1291. break;
  1292. }
  1293. if (rc != ENXIO)
  1294. break;
  1295. }
  1296. mutex_unlock(&acpi_desc->init_mutex);
  1297. return rc;
  1298. }
  1299. static DEVICE_ATTR_RO(format1);
  1300. static ssize_t formats_show(struct device *dev,
  1301. struct device_attribute *attr, char *buf)
  1302. {
  1303. struct nvdimm *nvdimm = to_nvdimm(dev);
  1304. return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
  1305. }
  1306. static DEVICE_ATTR_RO(formats);
  1307. static ssize_t serial_show(struct device *dev,
  1308. struct device_attribute *attr, char *buf)
  1309. {
  1310. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1311. return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number));
  1312. }
  1313. static DEVICE_ATTR_RO(serial);
  1314. static ssize_t family_show(struct device *dev,
  1315. struct device_attribute *attr, char *buf)
  1316. {
  1317. struct nvdimm *nvdimm = to_nvdimm(dev);
  1318. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1319. if (nfit_mem->family < 0)
  1320. return -ENXIO;
  1321. return sprintf(buf, "%d\n", nfit_mem->family);
  1322. }
  1323. static DEVICE_ATTR_RO(family);
  1324. static ssize_t dsm_mask_show(struct device *dev,
  1325. struct device_attribute *attr, char *buf)
  1326. {
  1327. struct nvdimm *nvdimm = to_nvdimm(dev);
  1328. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1329. if (nfit_mem->family < 0)
  1330. return -ENXIO;
  1331. return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask);
  1332. }
  1333. static DEVICE_ATTR_RO(dsm_mask);
  1334. static ssize_t flags_show(struct device *dev,
  1335. struct device_attribute *attr, char *buf)
  1336. {
  1337. struct nvdimm *nvdimm = to_nvdimm(dev);
  1338. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1339. u16 flags = __to_nfit_memdev(nfit_mem)->flags;
  1340. if (test_bit(NFIT_MEM_DIRTY, &nfit_mem->flags))
  1341. flags |= ACPI_NFIT_MEM_FLUSH_FAILED;
  1342. return sprintf(buf, "%s%s%s%s%s%s%s\n",
  1343. flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
  1344. flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
  1345. flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
  1346. flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
  1347. flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "",
  1348. flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "",
  1349. flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : "");
  1350. }
  1351. static DEVICE_ATTR_RO(flags);
  1352. static ssize_t id_show(struct device *dev,
  1353. struct device_attribute *attr, char *buf)
  1354. {
  1355. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1356. if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID)
  1357. return sprintf(buf, "%04x-%02x-%04x-%08x\n",
  1358. be16_to_cpu(dcr->vendor_id),
  1359. dcr->manufacturing_location,
  1360. be16_to_cpu(dcr->manufacturing_date),
  1361. be32_to_cpu(dcr->serial_number));
  1362. else
  1363. return sprintf(buf, "%04x-%08x\n",
  1364. be16_to_cpu(dcr->vendor_id),
  1365. be32_to_cpu(dcr->serial_number));
  1366. }
  1367. static DEVICE_ATTR_RO(id);
  1368. static ssize_t dirty_shutdown_show(struct device *dev,
  1369. struct device_attribute *attr, char *buf)
  1370. {
  1371. struct nvdimm *nvdimm = to_nvdimm(dev);
  1372. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1373. return sprintf(buf, "%d\n", nfit_mem->dirty_shutdown);
  1374. }
  1375. static DEVICE_ATTR_RO(dirty_shutdown);
  1376. static struct attribute *acpi_nfit_dimm_attributes[] = {
  1377. &dev_attr_handle.attr,
  1378. &dev_attr_phys_id.attr,
  1379. &dev_attr_vendor.attr,
  1380. &dev_attr_device.attr,
  1381. &dev_attr_rev_id.attr,
  1382. &dev_attr_subsystem_vendor.attr,
  1383. &dev_attr_subsystem_device.attr,
  1384. &dev_attr_subsystem_rev_id.attr,
  1385. &dev_attr_format.attr,
  1386. &dev_attr_formats.attr,
  1387. &dev_attr_format1.attr,
  1388. &dev_attr_serial.attr,
  1389. &dev_attr_flags.attr,
  1390. &dev_attr_id.attr,
  1391. &dev_attr_family.attr,
  1392. &dev_attr_dsm_mask.attr,
  1393. &dev_attr_dirty_shutdown.attr,
  1394. NULL,
  1395. };
  1396. static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
  1397. struct attribute *a, int n)
  1398. {
  1399. struct device *dev = container_of(kobj, struct device, kobj);
  1400. struct nvdimm *nvdimm = to_nvdimm(dev);
  1401. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1402. if (!to_nfit_dcr(dev)) {
  1403. /* Without a dcr only the memdev attributes can be surfaced */
  1404. if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr
  1405. || a == &dev_attr_flags.attr
  1406. || a == &dev_attr_family.attr
  1407. || a == &dev_attr_dsm_mask.attr)
  1408. return a->mode;
  1409. return 0;
  1410. }
  1411. if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
  1412. return 0;
  1413. if (!test_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags)
  1414. && a == &dev_attr_dirty_shutdown.attr)
  1415. return 0;
  1416. return a->mode;
  1417. }
  1418. static const struct attribute_group acpi_nfit_dimm_attribute_group = {
  1419. .name = "nfit",
  1420. .attrs = acpi_nfit_dimm_attributes,
  1421. .is_visible = acpi_nfit_dimm_attr_visible,
  1422. };
  1423. static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
  1424. &nvdimm_attribute_group,
  1425. &nd_device_attribute_group,
  1426. &acpi_nfit_dimm_attribute_group,
  1427. NULL,
  1428. };
  1429. static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
  1430. u32 device_handle)
  1431. {
  1432. struct nfit_mem *nfit_mem;
  1433. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  1434. if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
  1435. return nfit_mem->nvdimm;
  1436. return NULL;
  1437. }
  1438. void __acpi_nvdimm_notify(struct device *dev, u32 event)
  1439. {
  1440. struct nfit_mem *nfit_mem;
  1441. struct acpi_nfit_desc *acpi_desc;
  1442. dev_dbg(dev->parent, "%s: event: %d\n", dev_name(dev),
  1443. event);
  1444. if (event != NFIT_NOTIFY_DIMM_HEALTH) {
  1445. dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev),
  1446. event);
  1447. return;
  1448. }
  1449. acpi_desc = dev_get_drvdata(dev->parent);
  1450. if (!acpi_desc)
  1451. return;
  1452. /*
  1453. * If we successfully retrieved acpi_desc, then we know nfit_mem data
  1454. * is still valid.
  1455. */
  1456. nfit_mem = dev_get_drvdata(dev);
  1457. if (nfit_mem && nfit_mem->flags_attr)
  1458. sysfs_notify_dirent(nfit_mem->flags_attr);
  1459. }
  1460. EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify);
  1461. static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data)
  1462. {
  1463. struct acpi_device *adev = data;
  1464. struct device *dev = &adev->dev;
  1465. device_lock(dev->parent);
  1466. __acpi_nvdimm_notify(dev, event);
  1467. device_unlock(dev->parent);
  1468. }
  1469. static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method)
  1470. {
  1471. acpi_handle handle;
  1472. acpi_status status;
  1473. status = acpi_get_handle(adev->handle, method, &handle);
  1474. if (ACPI_SUCCESS(status))
  1475. return true;
  1476. return false;
  1477. }
  1478. __weak void nfit_intel_shutdown_status(struct nfit_mem *nfit_mem)
  1479. {
  1480. struct nd_intel_smart smart = { 0 };
  1481. union acpi_object in_buf = {
  1482. .type = ACPI_TYPE_BUFFER,
  1483. .buffer.pointer = (char *) &smart,
  1484. .buffer.length = sizeof(smart),
  1485. };
  1486. union acpi_object in_obj = {
  1487. .type = ACPI_TYPE_PACKAGE,
  1488. .package.count = 1,
  1489. .package.elements = &in_buf,
  1490. };
  1491. const u8 func = ND_INTEL_SMART;
  1492. const guid_t *guid = to_nfit_uuid(nfit_mem->family);
  1493. u8 revid = nfit_dsm_revid(nfit_mem->family, func);
  1494. struct acpi_device *adev = nfit_mem->adev;
  1495. acpi_handle handle = adev->handle;
  1496. union acpi_object *out_obj;
  1497. if ((nfit_mem->dsm_mask & (1 << func)) == 0)
  1498. return;
  1499. out_obj = acpi_evaluate_dsm(handle, guid, revid, func, &in_obj);
  1500. if (!out_obj)
  1501. return;
  1502. if (smart.flags & ND_INTEL_SMART_SHUTDOWN_VALID) {
  1503. if (smart.shutdown_state)
  1504. set_bit(NFIT_MEM_DIRTY, &nfit_mem->flags);
  1505. }
  1506. if (smart.flags & ND_INTEL_SMART_SHUTDOWN_COUNT_VALID) {
  1507. set_bit(NFIT_MEM_DIRTY_COUNT, &nfit_mem->flags);
  1508. nfit_mem->dirty_shutdown = smart.shutdown_count;
  1509. }
  1510. ACPI_FREE(out_obj);
  1511. }
  1512. static void populate_shutdown_status(struct nfit_mem *nfit_mem)
  1513. {
  1514. /*
  1515. * For DIMMs that provide a dynamic facility to retrieve a
  1516. * dirty-shutdown status and/or a dirty-shutdown count, cache
  1517. * these values in nfit_mem.
  1518. */
  1519. if (nfit_mem->family == NVDIMM_FAMILY_INTEL)
  1520. nfit_intel_shutdown_status(nfit_mem);
  1521. }
  1522. static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
  1523. struct nfit_mem *nfit_mem, u32 device_handle)
  1524. {
  1525. struct acpi_device *adev, *adev_dimm;
  1526. struct device *dev = acpi_desc->dev;
  1527. unsigned long dsm_mask, label_mask;
  1528. const guid_t *guid;
  1529. int i;
  1530. int family = -1;
  1531. /* nfit test assumes 1:1 relationship between commands and dsms */
  1532. nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en;
  1533. nfit_mem->family = NVDIMM_FAMILY_INTEL;
  1534. adev = to_acpi_dev(acpi_desc);
  1535. if (!adev) {
  1536. /* unit test case */
  1537. populate_shutdown_status(nfit_mem);
  1538. return 0;
  1539. }
  1540. adev_dimm = acpi_find_child_device(adev, device_handle, false);
  1541. nfit_mem->adev = adev_dimm;
  1542. if (!adev_dimm) {
  1543. dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
  1544. device_handle);
  1545. return force_enable_dimms ? 0 : -ENODEV;
  1546. }
  1547. if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle,
  1548. ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) {
  1549. dev_err(dev, "%s: notification registration failed\n",
  1550. dev_name(&adev_dimm->dev));
  1551. return -ENXIO;
  1552. }
  1553. /*
  1554. * Record nfit_mem for the notification path to track back to
  1555. * the nfit sysfs attributes for this dimm device object.
  1556. */
  1557. dev_set_drvdata(&adev_dimm->dev, nfit_mem);
  1558. /*
  1559. * Until standardization materializes we need to consider 4
  1560. * different command sets. Note, that checking for function0 (bit0)
  1561. * tells us if any commands are reachable through this GUID.
  1562. */
  1563. for (i = 0; i <= NVDIMM_FAMILY_MAX; i++)
  1564. if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
  1565. if (family < 0 || i == default_dsm_family)
  1566. family = i;
  1567. /* limit the supported commands to those that are publicly documented */
  1568. nfit_mem->family = family;
  1569. if (override_dsm_mask && !disable_vendor_specific)
  1570. dsm_mask = override_dsm_mask;
  1571. else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
  1572. dsm_mask = NVDIMM_INTEL_CMDMASK;
  1573. if (disable_vendor_specific)
  1574. dsm_mask &= ~(1 << ND_CMD_VENDOR);
  1575. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) {
  1576. dsm_mask = 0x1c3c76;
  1577. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) {
  1578. dsm_mask = 0x1fe;
  1579. if (disable_vendor_specific)
  1580. dsm_mask &= ~(1 << 8);
  1581. } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) {
  1582. dsm_mask = 0xffffffff;
  1583. } else {
  1584. dev_dbg(dev, "unknown dimm command family\n");
  1585. nfit_mem->family = -1;
  1586. /* DSMs are optional, continue loading the driver... */
  1587. return 0;
  1588. }
  1589. guid = to_nfit_uuid(nfit_mem->family);
  1590. for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
  1591. if (acpi_check_dsm(adev_dimm->handle, guid,
  1592. nfit_dsm_revid(nfit_mem->family, i),
  1593. 1ULL << i))
  1594. set_bit(i, &nfit_mem->dsm_mask);
  1595. /*
  1596. * Prefer the NVDIMM_FAMILY_INTEL label read commands if present
  1597. * due to their better semantics handling locked capacity.
  1598. */
  1599. label_mask = 1 << ND_CMD_GET_CONFIG_SIZE | 1 << ND_CMD_GET_CONFIG_DATA
  1600. | 1 << ND_CMD_SET_CONFIG_DATA;
  1601. if (family == NVDIMM_FAMILY_INTEL
  1602. && (dsm_mask & label_mask) == label_mask)
  1603. return 0;
  1604. if (acpi_nvdimm_has_method(adev_dimm, "_LSI")
  1605. && acpi_nvdimm_has_method(adev_dimm, "_LSR")) {
  1606. dev_dbg(dev, "%s: has _LSR\n", dev_name(&adev_dimm->dev));
  1607. set_bit(NFIT_MEM_LSR, &nfit_mem->flags);
  1608. }
  1609. if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)
  1610. && acpi_nvdimm_has_method(adev_dimm, "_LSW")) {
  1611. dev_dbg(dev, "%s: has _LSW\n", dev_name(&adev_dimm->dev));
  1612. set_bit(NFIT_MEM_LSW, &nfit_mem->flags);
  1613. }
  1614. populate_shutdown_status(nfit_mem);
  1615. return 0;
  1616. }
  1617. static void shutdown_dimm_notify(void *data)
  1618. {
  1619. struct acpi_nfit_desc *acpi_desc = data;
  1620. struct nfit_mem *nfit_mem;
  1621. mutex_lock(&acpi_desc->init_mutex);
  1622. /*
  1623. * Clear out the nfit_mem->flags_attr and shut down dimm event
  1624. * notifications.
  1625. */
  1626. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1627. struct acpi_device *adev_dimm = nfit_mem->adev;
  1628. if (nfit_mem->flags_attr) {
  1629. sysfs_put(nfit_mem->flags_attr);
  1630. nfit_mem->flags_attr = NULL;
  1631. }
  1632. if (adev_dimm) {
  1633. acpi_remove_notify_handler(adev_dimm->handle,
  1634. ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify);
  1635. dev_set_drvdata(&adev_dimm->dev, NULL);
  1636. }
  1637. }
  1638. mutex_unlock(&acpi_desc->init_mutex);
  1639. }
  1640. static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
  1641. {
  1642. struct nfit_mem *nfit_mem;
  1643. int dimm_count = 0, rc;
  1644. struct nvdimm *nvdimm;
  1645. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1646. struct acpi_nfit_flush_address *flush;
  1647. unsigned long flags = 0, cmd_mask;
  1648. struct nfit_memdev *nfit_memdev;
  1649. u32 device_handle;
  1650. u16 mem_flags;
  1651. device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  1652. nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
  1653. if (nvdimm) {
  1654. dimm_count++;
  1655. continue;
  1656. }
  1657. if (nfit_mem->bdw && nfit_mem->memdev_pmem)
  1658. set_bit(NDD_ALIASING, &flags);
  1659. /* collate flags across all memdevs for this dimm */
  1660. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1661. struct acpi_nfit_memory_map *dimm_memdev;
  1662. dimm_memdev = __to_nfit_memdev(nfit_mem);
  1663. if (dimm_memdev->device_handle
  1664. != nfit_memdev->memdev->device_handle)
  1665. continue;
  1666. dimm_memdev->flags |= nfit_memdev->memdev->flags;
  1667. }
  1668. mem_flags = __to_nfit_memdev(nfit_mem)->flags;
  1669. if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
  1670. set_bit(NDD_UNARMED, &flags);
  1671. rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
  1672. if (rc)
  1673. continue;
  1674. /*
  1675. * TODO: provide translation for non-NVDIMM_FAMILY_INTEL
  1676. * devices (i.e. from nd_cmd to acpi_dsm) to standardize the
  1677. * userspace interface.
  1678. */
  1679. cmd_mask = 1UL << ND_CMD_CALL;
  1680. if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
  1681. /*
  1682. * These commands have a 1:1 correspondence
  1683. * between DSM payload and libnvdimm ioctl
  1684. * payload format.
  1685. */
  1686. cmd_mask |= nfit_mem->dsm_mask & NVDIMM_STANDARD_CMDMASK;
  1687. }
  1688. if (test_bit(NFIT_MEM_LSR, &nfit_mem->flags)) {
  1689. set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask);
  1690. set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask);
  1691. }
  1692. if (test_bit(NFIT_MEM_LSW, &nfit_mem->flags))
  1693. set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask);
  1694. flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush
  1695. : NULL;
  1696. nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
  1697. acpi_nfit_dimm_attribute_groups,
  1698. flags, cmd_mask, flush ? flush->hint_count : 0,
  1699. nfit_mem->flush_wpq);
  1700. if (!nvdimm)
  1701. return -ENOMEM;
  1702. nfit_mem->nvdimm = nvdimm;
  1703. dimm_count++;
  1704. if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
  1705. continue;
  1706. dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n",
  1707. nvdimm_name(nvdimm),
  1708. mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
  1709. mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
  1710. mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
  1711. mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "",
  1712. mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : "");
  1713. }
  1714. rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
  1715. if (rc)
  1716. return rc;
  1717. /*
  1718. * Now that dimms are successfully registered, and async registration
  1719. * is flushed, attempt to enable event notification.
  1720. */
  1721. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1722. struct kernfs_node *nfit_kernfs;
  1723. nvdimm = nfit_mem->nvdimm;
  1724. if (!nvdimm)
  1725. continue;
  1726. nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit");
  1727. if (nfit_kernfs)
  1728. nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs,
  1729. "flags");
  1730. sysfs_put(nfit_kernfs);
  1731. if (!nfit_mem->flags_attr)
  1732. dev_warn(acpi_desc->dev, "%s: notifications disabled\n",
  1733. nvdimm_name(nvdimm));
  1734. }
  1735. return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify,
  1736. acpi_desc);
  1737. }
  1738. /*
  1739. * These constants are private because there are no kernel consumers of
  1740. * these commands.
  1741. */
  1742. enum nfit_aux_cmds {
  1743. NFIT_CMD_TRANSLATE_SPA = 5,
  1744. NFIT_CMD_ARS_INJECT_SET = 7,
  1745. NFIT_CMD_ARS_INJECT_CLEAR = 8,
  1746. NFIT_CMD_ARS_INJECT_GET = 9,
  1747. };
  1748. static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
  1749. {
  1750. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1751. const guid_t *guid = to_nfit_uuid(NFIT_DEV_BUS);
  1752. struct acpi_device *adev;
  1753. unsigned long dsm_mask;
  1754. int i;
  1755. nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en;
  1756. nd_desc->bus_dsm_mask = acpi_desc->bus_nfit_cmd_force_en;
  1757. adev = to_acpi_dev(acpi_desc);
  1758. if (!adev)
  1759. return;
  1760. for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
  1761. if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i))
  1762. set_bit(i, &nd_desc->cmd_mask);
  1763. set_bit(ND_CMD_CALL, &nd_desc->cmd_mask);
  1764. dsm_mask =
  1765. (1 << ND_CMD_ARS_CAP) |
  1766. (1 << ND_CMD_ARS_START) |
  1767. (1 << ND_CMD_ARS_STATUS) |
  1768. (1 << ND_CMD_CLEAR_ERROR) |
  1769. (1 << NFIT_CMD_TRANSLATE_SPA) |
  1770. (1 << NFIT_CMD_ARS_INJECT_SET) |
  1771. (1 << NFIT_CMD_ARS_INJECT_CLEAR) |
  1772. (1 << NFIT_CMD_ARS_INJECT_GET);
  1773. for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
  1774. if (acpi_check_dsm(adev->handle, guid, 1, 1ULL << i))
  1775. set_bit(i, &nd_desc->bus_dsm_mask);
  1776. }
  1777. static ssize_t range_index_show(struct device *dev,
  1778. struct device_attribute *attr, char *buf)
  1779. {
  1780. struct nd_region *nd_region = to_nd_region(dev);
  1781. struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
  1782. return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
  1783. }
  1784. static DEVICE_ATTR_RO(range_index);
  1785. static struct attribute *acpi_nfit_region_attributes[] = {
  1786. &dev_attr_range_index.attr,
  1787. NULL,
  1788. };
  1789. static const struct attribute_group acpi_nfit_region_attribute_group = {
  1790. .name = "nfit",
  1791. .attrs = acpi_nfit_region_attributes,
  1792. };
  1793. static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
  1794. &nd_region_attribute_group,
  1795. &nd_mapping_attribute_group,
  1796. &nd_device_attribute_group,
  1797. &nd_numa_attribute_group,
  1798. &acpi_nfit_region_attribute_group,
  1799. NULL,
  1800. };
  1801. /* enough info to uniquely specify an interleave set */
  1802. struct nfit_set_info {
  1803. struct nfit_set_info_map {
  1804. u64 region_offset;
  1805. u32 serial_number;
  1806. u32 pad;
  1807. } mapping[0];
  1808. };
  1809. struct nfit_set_info2 {
  1810. struct nfit_set_info_map2 {
  1811. u64 region_offset;
  1812. u32 serial_number;
  1813. u16 vendor_id;
  1814. u16 manufacturing_date;
  1815. u8 manufacturing_location;
  1816. u8 reserved[31];
  1817. } mapping[0];
  1818. };
  1819. static size_t sizeof_nfit_set_info(int num_mappings)
  1820. {
  1821. return sizeof(struct nfit_set_info)
  1822. + num_mappings * sizeof(struct nfit_set_info_map);
  1823. }
  1824. static size_t sizeof_nfit_set_info2(int num_mappings)
  1825. {
  1826. return sizeof(struct nfit_set_info2)
  1827. + num_mappings * sizeof(struct nfit_set_info_map2);
  1828. }
  1829. static int cmp_map_compat(const void *m0, const void *m1)
  1830. {
  1831. const struct nfit_set_info_map *map0 = m0;
  1832. const struct nfit_set_info_map *map1 = m1;
  1833. return memcmp(&map0->region_offset, &map1->region_offset,
  1834. sizeof(u64));
  1835. }
  1836. static int cmp_map(const void *m0, const void *m1)
  1837. {
  1838. const struct nfit_set_info_map *map0 = m0;
  1839. const struct nfit_set_info_map *map1 = m1;
  1840. if (map0->region_offset < map1->region_offset)
  1841. return -1;
  1842. else if (map0->region_offset > map1->region_offset)
  1843. return 1;
  1844. return 0;
  1845. }
  1846. static int cmp_map2(const void *m0, const void *m1)
  1847. {
  1848. const struct nfit_set_info_map2 *map0 = m0;
  1849. const struct nfit_set_info_map2 *map1 = m1;
  1850. if (map0->region_offset < map1->region_offset)
  1851. return -1;
  1852. else if (map0->region_offset > map1->region_offset)
  1853. return 1;
  1854. return 0;
  1855. }
  1856. /* Retrieve the nth entry referencing this spa */
  1857. static struct acpi_nfit_memory_map *memdev_from_spa(
  1858. struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
  1859. {
  1860. struct nfit_memdev *nfit_memdev;
  1861. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
  1862. if (nfit_memdev->memdev->range_index == range_index)
  1863. if (n-- == 0)
  1864. return nfit_memdev->memdev;
  1865. return NULL;
  1866. }
  1867. static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
  1868. struct nd_region_desc *ndr_desc,
  1869. struct acpi_nfit_system_address *spa)
  1870. {
  1871. struct device *dev = acpi_desc->dev;
  1872. struct nd_interleave_set *nd_set;
  1873. u16 nr = ndr_desc->num_mappings;
  1874. struct nfit_set_info2 *info2;
  1875. struct nfit_set_info *info;
  1876. int i;
  1877. nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
  1878. if (!nd_set)
  1879. return -ENOMEM;
  1880. ndr_desc->nd_set = nd_set;
  1881. guid_copy(&nd_set->type_guid, (guid_t *) spa->range_guid);
  1882. info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
  1883. if (!info)
  1884. return -ENOMEM;
  1885. info2 = devm_kzalloc(dev, sizeof_nfit_set_info2(nr), GFP_KERNEL);
  1886. if (!info2)
  1887. return -ENOMEM;
  1888. for (i = 0; i < nr; i++) {
  1889. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  1890. struct nfit_set_info_map *map = &info->mapping[i];
  1891. struct nfit_set_info_map2 *map2 = &info2->mapping[i];
  1892. struct nvdimm *nvdimm = mapping->nvdimm;
  1893. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1894. struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
  1895. spa->range_index, i);
  1896. struct acpi_nfit_control_region *dcr = nfit_mem->dcr;
  1897. if (!memdev || !nfit_mem->dcr) {
  1898. dev_err(dev, "%s: failed to find DCR\n", __func__);
  1899. return -ENODEV;
  1900. }
  1901. map->region_offset = memdev->region_offset;
  1902. map->serial_number = dcr->serial_number;
  1903. map2->region_offset = memdev->region_offset;
  1904. map2->serial_number = dcr->serial_number;
  1905. map2->vendor_id = dcr->vendor_id;
  1906. map2->manufacturing_date = dcr->manufacturing_date;
  1907. map2->manufacturing_location = dcr->manufacturing_location;
  1908. }
  1909. /* v1.1 namespaces */
  1910. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  1911. cmp_map, NULL);
  1912. nd_set->cookie1 = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  1913. /* v1.2 namespaces */
  1914. sort(&info2->mapping[0], nr, sizeof(struct nfit_set_info_map2),
  1915. cmp_map2, NULL);
  1916. nd_set->cookie2 = nd_fletcher64(info2, sizeof_nfit_set_info2(nr), 0);
  1917. /* support v1.1 namespaces created with the wrong sort order */
  1918. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  1919. cmp_map_compat, NULL);
  1920. nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  1921. /* record the result of the sort for the mapping position */
  1922. for (i = 0; i < nr; i++) {
  1923. struct nfit_set_info_map2 *map2 = &info2->mapping[i];
  1924. int j;
  1925. for (j = 0; j < nr; j++) {
  1926. struct nd_mapping_desc *mapping = &ndr_desc->mapping[j];
  1927. struct nvdimm *nvdimm = mapping->nvdimm;
  1928. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1929. struct acpi_nfit_control_region *dcr = nfit_mem->dcr;
  1930. if (map2->serial_number == dcr->serial_number &&
  1931. map2->vendor_id == dcr->vendor_id &&
  1932. map2->manufacturing_date == dcr->manufacturing_date &&
  1933. map2->manufacturing_location
  1934. == dcr->manufacturing_location) {
  1935. mapping->position = i;
  1936. break;
  1937. }
  1938. }
  1939. }
  1940. ndr_desc->nd_set = nd_set;
  1941. devm_kfree(dev, info);
  1942. devm_kfree(dev, info2);
  1943. return 0;
  1944. }
  1945. static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
  1946. {
  1947. struct acpi_nfit_interleave *idt = mmio->idt;
  1948. u32 sub_line_offset, line_index, line_offset;
  1949. u64 line_no, table_skip_count, table_offset;
  1950. line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
  1951. table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
  1952. line_offset = idt->line_offset[line_index]
  1953. * mmio->line_size;
  1954. table_offset = table_skip_count * mmio->table_size;
  1955. return mmio->base_offset + line_offset + table_offset + sub_line_offset;
  1956. }
  1957. static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
  1958. {
  1959. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1960. u64 offset = nfit_blk->stat_offset + mmio->size * bw;
  1961. const u32 STATUS_MASK = 0x80000037;
  1962. if (mmio->num_lines)
  1963. offset = to_interleave_offset(offset, mmio);
  1964. return readl(mmio->addr.base + offset) & STATUS_MASK;
  1965. }
  1966. static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
  1967. resource_size_t dpa, unsigned int len, unsigned int write)
  1968. {
  1969. u64 cmd, offset;
  1970. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1971. enum {
  1972. BCW_OFFSET_MASK = (1ULL << 48)-1,
  1973. BCW_LEN_SHIFT = 48,
  1974. BCW_LEN_MASK = (1ULL << 8) - 1,
  1975. BCW_CMD_SHIFT = 56,
  1976. };
  1977. cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
  1978. len = len >> L1_CACHE_SHIFT;
  1979. cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
  1980. cmd |= ((u64) write) << BCW_CMD_SHIFT;
  1981. offset = nfit_blk->cmd_offset + mmio->size * bw;
  1982. if (mmio->num_lines)
  1983. offset = to_interleave_offset(offset, mmio);
  1984. writeq(cmd, mmio->addr.base + offset);
  1985. nvdimm_flush(nfit_blk->nd_region);
  1986. if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
  1987. readq(mmio->addr.base + offset);
  1988. }
  1989. static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
  1990. resource_size_t dpa, void *iobuf, size_t len, int rw,
  1991. unsigned int lane)
  1992. {
  1993. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  1994. unsigned int copied = 0;
  1995. u64 base_offset;
  1996. int rc;
  1997. base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
  1998. + lane * mmio->size;
  1999. write_blk_ctl(nfit_blk, lane, dpa, len, rw);
  2000. while (len) {
  2001. unsigned int c;
  2002. u64 offset;
  2003. if (mmio->num_lines) {
  2004. u32 line_offset;
  2005. offset = to_interleave_offset(base_offset + copied,
  2006. mmio);
  2007. div_u64_rem(offset, mmio->line_size, &line_offset);
  2008. c = min_t(size_t, len, mmio->line_size - line_offset);
  2009. } else {
  2010. offset = base_offset + nfit_blk->bdw_offset;
  2011. c = len;
  2012. }
  2013. if (rw)
  2014. memcpy_flushcache(mmio->addr.aperture + offset, iobuf + copied, c);
  2015. else {
  2016. if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
  2017. arch_invalidate_pmem((void __force *)
  2018. mmio->addr.aperture + offset, c);
  2019. memcpy(iobuf + copied, mmio->addr.aperture + offset, c);
  2020. }
  2021. copied += c;
  2022. len -= c;
  2023. }
  2024. if (rw)
  2025. nvdimm_flush(nfit_blk->nd_region);
  2026. rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
  2027. return rc;
  2028. }
  2029. static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
  2030. resource_size_t dpa, void *iobuf, u64 len, int rw)
  2031. {
  2032. struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
  2033. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  2034. struct nd_region *nd_region = nfit_blk->nd_region;
  2035. unsigned int lane, copied = 0;
  2036. int rc = 0;
  2037. lane = nd_region_acquire_lane(nd_region);
  2038. while (len) {
  2039. u64 c = min(len, mmio->size);
  2040. rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
  2041. iobuf + copied, c, rw, lane);
  2042. if (rc)
  2043. break;
  2044. copied += c;
  2045. len -= c;
  2046. }
  2047. nd_region_release_lane(nd_region, lane);
  2048. return rc;
  2049. }
  2050. static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
  2051. struct acpi_nfit_interleave *idt, u16 interleave_ways)
  2052. {
  2053. if (idt) {
  2054. mmio->num_lines = idt->line_count;
  2055. mmio->line_size = idt->line_size;
  2056. if (interleave_ways == 0)
  2057. return -ENXIO;
  2058. mmio->table_size = mmio->num_lines * interleave_ways
  2059. * mmio->line_size;
  2060. }
  2061. return 0;
  2062. }
  2063. static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
  2064. struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
  2065. {
  2066. struct nd_cmd_dimm_flags flags;
  2067. int rc;
  2068. memset(&flags, 0, sizeof(flags));
  2069. rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
  2070. sizeof(flags), NULL);
  2071. if (rc >= 0 && flags.status == 0)
  2072. nfit_blk->dimm_flags = flags.flags;
  2073. else if (rc == -ENOTTY) {
  2074. /* fall back to a conservative default */
  2075. nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
  2076. rc = 0;
  2077. } else
  2078. rc = -ENXIO;
  2079. return rc;
  2080. }
  2081. static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
  2082. struct device *dev)
  2083. {
  2084. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  2085. struct nd_blk_region *ndbr = to_nd_blk_region(dev);
  2086. struct nfit_blk_mmio *mmio;
  2087. struct nfit_blk *nfit_blk;
  2088. struct nfit_mem *nfit_mem;
  2089. struct nvdimm *nvdimm;
  2090. int rc;
  2091. nvdimm = nd_blk_region_to_dimm(ndbr);
  2092. nfit_mem = nvdimm_provider_data(nvdimm);
  2093. if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
  2094. dev_dbg(dev, "missing%s%s%s\n",
  2095. nfit_mem ? "" : " nfit_mem",
  2096. (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
  2097. (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
  2098. return -ENXIO;
  2099. }
  2100. nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
  2101. if (!nfit_blk)
  2102. return -ENOMEM;
  2103. nd_blk_region_set_provider_data(ndbr, nfit_blk);
  2104. nfit_blk->nd_region = to_nd_region(dev);
  2105. /* map block aperture memory */
  2106. nfit_blk->bdw_offset = nfit_mem->bdw->offset;
  2107. mmio = &nfit_blk->mmio[BDW];
  2108. mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address,
  2109. nfit_mem->spa_bdw->length, nd_blk_memremap_flags(ndbr));
  2110. if (!mmio->addr.base) {
  2111. dev_dbg(dev, "%s failed to map bdw\n",
  2112. nvdimm_name(nvdimm));
  2113. return -ENOMEM;
  2114. }
  2115. mmio->size = nfit_mem->bdw->size;
  2116. mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
  2117. mmio->idt = nfit_mem->idt_bdw;
  2118. mmio->spa = nfit_mem->spa_bdw;
  2119. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
  2120. nfit_mem->memdev_bdw->interleave_ways);
  2121. if (rc) {
  2122. dev_dbg(dev, "%s failed to init bdw interleave\n",
  2123. nvdimm_name(nvdimm));
  2124. return rc;
  2125. }
  2126. /* map block control memory */
  2127. nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
  2128. nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
  2129. mmio = &nfit_blk->mmio[DCR];
  2130. mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address,
  2131. nfit_mem->spa_dcr->length);
  2132. if (!mmio->addr.base) {
  2133. dev_dbg(dev, "%s failed to map dcr\n",
  2134. nvdimm_name(nvdimm));
  2135. return -ENOMEM;
  2136. }
  2137. mmio->size = nfit_mem->dcr->window_size;
  2138. mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
  2139. mmio->idt = nfit_mem->idt_dcr;
  2140. mmio->spa = nfit_mem->spa_dcr;
  2141. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
  2142. nfit_mem->memdev_dcr->interleave_ways);
  2143. if (rc) {
  2144. dev_dbg(dev, "%s failed to init dcr interleave\n",
  2145. nvdimm_name(nvdimm));
  2146. return rc;
  2147. }
  2148. rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
  2149. if (rc < 0) {
  2150. dev_dbg(dev, "%s failed get DIMM flags\n",
  2151. nvdimm_name(nvdimm));
  2152. return rc;
  2153. }
  2154. if (nvdimm_has_flush(nfit_blk->nd_region) < 0)
  2155. dev_warn(dev, "unable to guarantee persistence of writes\n");
  2156. if (mmio->line_size == 0)
  2157. return 0;
  2158. if ((u32) nfit_blk->cmd_offset % mmio->line_size
  2159. + 8 > mmio->line_size) {
  2160. dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
  2161. return -ENXIO;
  2162. } else if ((u32) nfit_blk->stat_offset % mmio->line_size
  2163. + 8 > mmio->line_size) {
  2164. dev_dbg(dev, "stat_offset crosses interleave boundary\n");
  2165. return -ENXIO;
  2166. }
  2167. return 0;
  2168. }
  2169. static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
  2170. struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
  2171. {
  2172. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2173. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2174. int cmd_rc, rc;
  2175. cmd->address = spa->address;
  2176. cmd->length = spa->length;
  2177. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
  2178. sizeof(*cmd), &cmd_rc);
  2179. if (rc < 0)
  2180. return rc;
  2181. return cmd_rc;
  2182. }
  2183. static int ars_start(struct acpi_nfit_desc *acpi_desc,
  2184. struct nfit_spa *nfit_spa, enum nfit_ars_state req_type)
  2185. {
  2186. int rc;
  2187. int cmd_rc;
  2188. struct nd_cmd_ars_start ars_start;
  2189. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2190. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2191. memset(&ars_start, 0, sizeof(ars_start));
  2192. ars_start.address = spa->address;
  2193. ars_start.length = spa->length;
  2194. if (req_type == ARS_REQ_SHORT)
  2195. ars_start.flags = ND_ARS_RETURN_PREV_DATA;
  2196. if (nfit_spa_type(spa) == NFIT_SPA_PM)
  2197. ars_start.type = ND_ARS_PERSISTENT;
  2198. else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
  2199. ars_start.type = ND_ARS_VOLATILE;
  2200. else
  2201. return -ENOTTY;
  2202. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  2203. sizeof(ars_start), &cmd_rc);
  2204. if (rc < 0)
  2205. return rc;
  2206. return cmd_rc;
  2207. }
  2208. static int ars_continue(struct acpi_nfit_desc *acpi_desc)
  2209. {
  2210. int rc, cmd_rc;
  2211. struct nd_cmd_ars_start ars_start;
  2212. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2213. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2214. memset(&ars_start, 0, sizeof(ars_start));
  2215. ars_start.address = ars_status->restart_address;
  2216. ars_start.length = ars_status->restart_length;
  2217. ars_start.type = ars_status->type;
  2218. ars_start.flags = acpi_desc->ars_start_flags;
  2219. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  2220. sizeof(ars_start), &cmd_rc);
  2221. if (rc < 0)
  2222. return rc;
  2223. return cmd_rc;
  2224. }
  2225. static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
  2226. {
  2227. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  2228. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2229. int rc, cmd_rc;
  2230. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
  2231. acpi_desc->max_ars, &cmd_rc);
  2232. if (rc < 0)
  2233. return rc;
  2234. return cmd_rc;
  2235. }
  2236. static void ars_complete(struct acpi_nfit_desc *acpi_desc,
  2237. struct nfit_spa *nfit_spa)
  2238. {
  2239. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2240. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2241. struct nd_region *nd_region = nfit_spa->nd_region;
  2242. struct device *dev;
  2243. lockdep_assert_held(&acpi_desc->init_mutex);
  2244. /*
  2245. * Only advance the ARS state for ARS runs initiated by the
  2246. * kernel, ignore ARS results from BIOS initiated runs for scrub
  2247. * completion tracking.
  2248. */
  2249. if (acpi_desc->scrub_spa != nfit_spa)
  2250. return;
  2251. if ((ars_status->address >= spa->address && ars_status->address
  2252. < spa->address + spa->length)
  2253. || (ars_status->address < spa->address)) {
  2254. /*
  2255. * Assume that if a scrub starts at an offset from the
  2256. * start of nfit_spa that we are in the continuation
  2257. * case.
  2258. *
  2259. * Otherwise, if the scrub covers the spa range, mark
  2260. * any pending request complete.
  2261. */
  2262. if (ars_status->address + ars_status->length
  2263. >= spa->address + spa->length)
  2264. /* complete */;
  2265. else
  2266. return;
  2267. } else
  2268. return;
  2269. acpi_desc->scrub_spa = NULL;
  2270. if (nd_region) {
  2271. dev = nd_region_dev(nd_region);
  2272. nvdimm_region_notify(nd_region, NVDIMM_REVALIDATE_POISON);
  2273. } else
  2274. dev = acpi_desc->dev;
  2275. dev_dbg(dev, "ARS: range %d complete\n", spa->range_index);
  2276. }
  2277. static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc)
  2278. {
  2279. struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus;
  2280. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  2281. int rc;
  2282. u32 i;
  2283. /*
  2284. * First record starts at 44 byte offset from the start of the
  2285. * payload.
  2286. */
  2287. if (ars_status->out_length < 44)
  2288. return 0;
  2289. for (i = 0; i < ars_status->num_records; i++) {
  2290. /* only process full records */
  2291. if (ars_status->out_length
  2292. < 44 + sizeof(struct nd_ars_record) * (i + 1))
  2293. break;
  2294. rc = nvdimm_bus_add_badrange(nvdimm_bus,
  2295. ars_status->records[i].err_address,
  2296. ars_status->records[i].length);
  2297. if (rc)
  2298. return rc;
  2299. }
  2300. if (i < ars_status->num_records)
  2301. dev_warn(acpi_desc->dev, "detected truncated ars results\n");
  2302. return 0;
  2303. }
  2304. static void acpi_nfit_remove_resource(void *data)
  2305. {
  2306. struct resource *res = data;
  2307. remove_resource(res);
  2308. }
  2309. static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
  2310. struct nd_region_desc *ndr_desc)
  2311. {
  2312. struct resource *res, *nd_res = ndr_desc->res;
  2313. int is_pmem, ret;
  2314. /* No operation if the region is already registered as PMEM */
  2315. is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
  2316. IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
  2317. if (is_pmem == REGION_INTERSECTS)
  2318. return 0;
  2319. res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
  2320. if (!res)
  2321. return -ENOMEM;
  2322. res->name = "Persistent Memory";
  2323. res->start = nd_res->start;
  2324. res->end = nd_res->end;
  2325. res->flags = IORESOURCE_MEM;
  2326. res->desc = IORES_DESC_PERSISTENT_MEMORY;
  2327. ret = insert_resource(&iomem_resource, res);
  2328. if (ret)
  2329. return ret;
  2330. ret = devm_add_action_or_reset(acpi_desc->dev,
  2331. acpi_nfit_remove_resource,
  2332. res);
  2333. if (ret)
  2334. return ret;
  2335. return 0;
  2336. }
  2337. static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
  2338. struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc,
  2339. struct acpi_nfit_memory_map *memdev,
  2340. struct nfit_spa *nfit_spa)
  2341. {
  2342. struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
  2343. memdev->device_handle);
  2344. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2345. struct nd_blk_region_desc *ndbr_desc;
  2346. struct nfit_mem *nfit_mem;
  2347. int rc;
  2348. if (!nvdimm) {
  2349. dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
  2350. spa->range_index, memdev->device_handle);
  2351. return -ENODEV;
  2352. }
  2353. mapping->nvdimm = nvdimm;
  2354. switch (nfit_spa_type(spa)) {
  2355. case NFIT_SPA_PM:
  2356. case NFIT_SPA_VOLATILE:
  2357. mapping->start = memdev->address;
  2358. mapping->size = memdev->region_size;
  2359. break;
  2360. case NFIT_SPA_DCR:
  2361. nfit_mem = nvdimm_provider_data(nvdimm);
  2362. if (!nfit_mem || !nfit_mem->bdw) {
  2363. dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
  2364. spa->range_index, nvdimm_name(nvdimm));
  2365. break;
  2366. }
  2367. mapping->size = nfit_mem->bdw->capacity;
  2368. mapping->start = nfit_mem->bdw->start_address;
  2369. ndr_desc->num_lanes = nfit_mem->bdw->windows;
  2370. ndr_desc->mapping = mapping;
  2371. ndr_desc->num_mappings = 1;
  2372. ndbr_desc = to_blk_region_desc(ndr_desc);
  2373. ndbr_desc->enable = acpi_nfit_blk_region_enable;
  2374. ndbr_desc->do_io = acpi_desc->blk_do_io;
  2375. rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
  2376. if (rc)
  2377. return rc;
  2378. nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
  2379. ndr_desc);
  2380. if (!nfit_spa->nd_region)
  2381. return -ENOMEM;
  2382. break;
  2383. }
  2384. return 0;
  2385. }
  2386. static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa)
  2387. {
  2388. return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
  2389. nfit_spa_type(spa) == NFIT_SPA_VCD ||
  2390. nfit_spa_type(spa) == NFIT_SPA_PDISK ||
  2391. nfit_spa_type(spa) == NFIT_SPA_PCD);
  2392. }
  2393. static bool nfit_spa_is_volatile(struct acpi_nfit_system_address *spa)
  2394. {
  2395. return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
  2396. nfit_spa_type(spa) == NFIT_SPA_VCD ||
  2397. nfit_spa_type(spa) == NFIT_SPA_VOLATILE);
  2398. }
  2399. static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
  2400. struct nfit_spa *nfit_spa)
  2401. {
  2402. static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS];
  2403. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2404. struct nd_blk_region_desc ndbr_desc;
  2405. struct nd_region_desc *ndr_desc;
  2406. struct nfit_memdev *nfit_memdev;
  2407. struct nvdimm_bus *nvdimm_bus;
  2408. struct resource res;
  2409. int count = 0, rc;
  2410. if (nfit_spa->nd_region)
  2411. return 0;
  2412. if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) {
  2413. dev_dbg(acpi_desc->dev, "detected invalid spa index\n");
  2414. return 0;
  2415. }
  2416. memset(&res, 0, sizeof(res));
  2417. memset(&mappings, 0, sizeof(mappings));
  2418. memset(&ndbr_desc, 0, sizeof(ndbr_desc));
  2419. res.start = spa->address;
  2420. res.end = res.start + spa->length - 1;
  2421. ndr_desc = &ndbr_desc.ndr_desc;
  2422. ndr_desc->res = &res;
  2423. ndr_desc->provider_data = nfit_spa;
  2424. ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
  2425. if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
  2426. ndr_desc->numa_node = acpi_map_pxm_to_online_node(
  2427. spa->proximity_domain);
  2428. else
  2429. ndr_desc->numa_node = NUMA_NO_NODE;
  2430. /*
  2431. * Persistence domain bits are hierarchical, if
  2432. * ACPI_NFIT_CAPABILITY_CACHE_FLUSH is set then
  2433. * ACPI_NFIT_CAPABILITY_MEM_FLUSH is implied.
  2434. */
  2435. if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_CACHE_FLUSH)
  2436. set_bit(ND_REGION_PERSIST_CACHE, &ndr_desc->flags);
  2437. else if (acpi_desc->platform_cap & ACPI_NFIT_CAPABILITY_MEM_FLUSH)
  2438. set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc->flags);
  2439. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  2440. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  2441. struct nd_mapping_desc *mapping;
  2442. if (memdev->range_index != spa->range_index)
  2443. continue;
  2444. if (count >= ND_MAX_MAPPINGS) {
  2445. dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
  2446. spa->range_index, ND_MAX_MAPPINGS);
  2447. return -ENXIO;
  2448. }
  2449. mapping = &mappings[count++];
  2450. rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc,
  2451. memdev, nfit_spa);
  2452. if (rc)
  2453. goto out;
  2454. }
  2455. ndr_desc->mapping = mappings;
  2456. ndr_desc->num_mappings = count;
  2457. rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
  2458. if (rc)
  2459. goto out;
  2460. nvdimm_bus = acpi_desc->nvdimm_bus;
  2461. if (nfit_spa_type(spa) == NFIT_SPA_PM) {
  2462. rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
  2463. if (rc) {
  2464. dev_warn(acpi_desc->dev,
  2465. "failed to insert pmem resource to iomem: %d\n",
  2466. rc);
  2467. goto out;
  2468. }
  2469. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  2470. ndr_desc);
  2471. if (!nfit_spa->nd_region)
  2472. rc = -ENOMEM;
  2473. } else if (nfit_spa_is_volatile(spa)) {
  2474. nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
  2475. ndr_desc);
  2476. if (!nfit_spa->nd_region)
  2477. rc = -ENOMEM;
  2478. } else if (nfit_spa_is_virtual(spa)) {
  2479. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  2480. ndr_desc);
  2481. if (!nfit_spa->nd_region)
  2482. rc = -ENOMEM;
  2483. }
  2484. out:
  2485. if (rc)
  2486. dev_err(acpi_desc->dev, "failed to register spa range %d\n",
  2487. nfit_spa->spa->range_index);
  2488. return rc;
  2489. }
  2490. static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc)
  2491. {
  2492. struct device *dev = acpi_desc->dev;
  2493. struct nd_cmd_ars_status *ars_status;
  2494. if (acpi_desc->ars_status) {
  2495. memset(acpi_desc->ars_status, 0, acpi_desc->max_ars);
  2496. return 0;
  2497. }
  2498. ars_status = devm_kzalloc(dev, acpi_desc->max_ars, GFP_KERNEL);
  2499. if (!ars_status)
  2500. return -ENOMEM;
  2501. acpi_desc->ars_status = ars_status;
  2502. return 0;
  2503. }
  2504. static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc)
  2505. {
  2506. int rc;
  2507. if (ars_status_alloc(acpi_desc))
  2508. return -ENOMEM;
  2509. rc = ars_get_status(acpi_desc);
  2510. if (rc < 0 && rc != -ENOSPC)
  2511. return rc;
  2512. if (ars_status_process_records(acpi_desc))
  2513. dev_err(acpi_desc->dev, "Failed to process ARS records\n");
  2514. return rc;
  2515. }
  2516. static int ars_register(struct acpi_nfit_desc *acpi_desc,
  2517. struct nfit_spa *nfit_spa)
  2518. {
  2519. int rc;
  2520. if (no_init_ars || test_bit(ARS_FAILED, &nfit_spa->ars_state))
  2521. return acpi_nfit_register_region(acpi_desc, nfit_spa);
  2522. set_bit(ARS_REQ_SHORT, &nfit_spa->ars_state);
  2523. set_bit(ARS_REQ_LONG, &nfit_spa->ars_state);
  2524. switch (acpi_nfit_query_poison(acpi_desc)) {
  2525. case 0:
  2526. case -EAGAIN:
  2527. rc = ars_start(acpi_desc, nfit_spa, ARS_REQ_SHORT);
  2528. /* shouldn't happen, try again later */
  2529. if (rc == -EBUSY)
  2530. break;
  2531. if (rc) {
  2532. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2533. break;
  2534. }
  2535. clear_bit(ARS_REQ_SHORT, &nfit_spa->ars_state);
  2536. rc = acpi_nfit_query_poison(acpi_desc);
  2537. if (rc)
  2538. break;
  2539. acpi_desc->scrub_spa = nfit_spa;
  2540. ars_complete(acpi_desc, nfit_spa);
  2541. /*
  2542. * If ars_complete() says we didn't complete the
  2543. * short scrub, we'll try again with a long
  2544. * request.
  2545. */
  2546. acpi_desc->scrub_spa = NULL;
  2547. break;
  2548. case -EBUSY:
  2549. case -ENOMEM:
  2550. case -ENOSPC:
  2551. /*
  2552. * BIOS was using ARS, wait for it to complete (or
  2553. * resources to become available) and then perform our
  2554. * own scrubs.
  2555. */
  2556. break;
  2557. default:
  2558. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2559. break;
  2560. }
  2561. return acpi_nfit_register_region(acpi_desc, nfit_spa);
  2562. }
  2563. static void ars_complete_all(struct acpi_nfit_desc *acpi_desc)
  2564. {
  2565. struct nfit_spa *nfit_spa;
  2566. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2567. if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
  2568. continue;
  2569. ars_complete(acpi_desc, nfit_spa);
  2570. }
  2571. }
  2572. static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc,
  2573. int query_rc)
  2574. {
  2575. unsigned int tmo = acpi_desc->scrub_tmo;
  2576. struct device *dev = acpi_desc->dev;
  2577. struct nfit_spa *nfit_spa;
  2578. lockdep_assert_held(&acpi_desc->init_mutex);
  2579. if (acpi_desc->cancel)
  2580. return 0;
  2581. if (query_rc == -EBUSY) {
  2582. dev_dbg(dev, "ARS: ARS busy\n");
  2583. return min(30U * 60U, tmo * 2);
  2584. }
  2585. if (query_rc == -ENOSPC) {
  2586. dev_dbg(dev, "ARS: ARS continue\n");
  2587. ars_continue(acpi_desc);
  2588. return 1;
  2589. }
  2590. if (query_rc && query_rc != -EAGAIN) {
  2591. unsigned long long addr, end;
  2592. addr = acpi_desc->ars_status->address;
  2593. end = addr + acpi_desc->ars_status->length;
  2594. dev_dbg(dev, "ARS: %llx-%llx failed (%d)\n", addr, end,
  2595. query_rc);
  2596. }
  2597. ars_complete_all(acpi_desc);
  2598. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2599. enum nfit_ars_state req_type;
  2600. int rc;
  2601. if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
  2602. continue;
  2603. /* prefer short ARS requests first */
  2604. if (test_bit(ARS_REQ_SHORT, &nfit_spa->ars_state))
  2605. req_type = ARS_REQ_SHORT;
  2606. else if (test_bit(ARS_REQ_LONG, &nfit_spa->ars_state))
  2607. req_type = ARS_REQ_LONG;
  2608. else
  2609. continue;
  2610. rc = ars_start(acpi_desc, nfit_spa, req_type);
  2611. dev = nd_region_dev(nfit_spa->nd_region);
  2612. dev_dbg(dev, "ARS: range %d ARS start %s (%d)\n",
  2613. nfit_spa->spa->range_index,
  2614. req_type == ARS_REQ_SHORT ? "short" : "long",
  2615. rc);
  2616. /*
  2617. * Hmm, we raced someone else starting ARS? Try again in
  2618. * a bit.
  2619. */
  2620. if (rc == -EBUSY)
  2621. return 1;
  2622. if (rc == 0) {
  2623. dev_WARN_ONCE(dev, acpi_desc->scrub_spa,
  2624. "scrub start while range %d active\n",
  2625. acpi_desc->scrub_spa->spa->range_index);
  2626. clear_bit(req_type, &nfit_spa->ars_state);
  2627. acpi_desc->scrub_spa = nfit_spa;
  2628. /*
  2629. * Consider this spa last for future scrub
  2630. * requests
  2631. */
  2632. list_move_tail(&nfit_spa->list, &acpi_desc->spas);
  2633. return 1;
  2634. }
  2635. dev_err(dev, "ARS: range %d ARS failed (%d)\n",
  2636. nfit_spa->spa->range_index, rc);
  2637. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2638. }
  2639. return 0;
  2640. }
  2641. static void __sched_ars(struct acpi_nfit_desc *acpi_desc, unsigned int tmo)
  2642. {
  2643. lockdep_assert_held(&acpi_desc->init_mutex);
  2644. acpi_desc->scrub_busy = 1;
  2645. /* note this should only be set from within the workqueue */
  2646. if (tmo)
  2647. acpi_desc->scrub_tmo = tmo;
  2648. queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ);
  2649. }
  2650. static void sched_ars(struct acpi_nfit_desc *acpi_desc)
  2651. {
  2652. __sched_ars(acpi_desc, 0);
  2653. }
  2654. static void notify_ars_done(struct acpi_nfit_desc *acpi_desc)
  2655. {
  2656. lockdep_assert_held(&acpi_desc->init_mutex);
  2657. acpi_desc->scrub_busy = 0;
  2658. acpi_desc->scrub_count++;
  2659. if (acpi_desc->scrub_count_state)
  2660. sysfs_notify_dirent(acpi_desc->scrub_count_state);
  2661. }
  2662. static void acpi_nfit_scrub(struct work_struct *work)
  2663. {
  2664. struct acpi_nfit_desc *acpi_desc;
  2665. unsigned int tmo;
  2666. int query_rc;
  2667. acpi_desc = container_of(work, typeof(*acpi_desc), dwork.work);
  2668. mutex_lock(&acpi_desc->init_mutex);
  2669. query_rc = acpi_nfit_query_poison(acpi_desc);
  2670. tmo = __acpi_nfit_scrub(acpi_desc, query_rc);
  2671. if (tmo)
  2672. __sched_ars(acpi_desc, tmo);
  2673. else
  2674. notify_ars_done(acpi_desc);
  2675. memset(acpi_desc->ars_status, 0, acpi_desc->max_ars);
  2676. mutex_unlock(&acpi_desc->init_mutex);
  2677. }
  2678. static void acpi_nfit_init_ars(struct acpi_nfit_desc *acpi_desc,
  2679. struct nfit_spa *nfit_spa)
  2680. {
  2681. int type = nfit_spa_type(nfit_spa->spa);
  2682. struct nd_cmd_ars_cap ars_cap;
  2683. int rc;
  2684. set_bit(ARS_FAILED, &nfit_spa->ars_state);
  2685. memset(&ars_cap, 0, sizeof(ars_cap));
  2686. rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
  2687. if (rc < 0)
  2688. return;
  2689. /* check that the supported scrub types match the spa type */
  2690. if (type == NFIT_SPA_VOLATILE && ((ars_cap.status >> 16)
  2691. & ND_ARS_VOLATILE) == 0)
  2692. return;
  2693. if (type == NFIT_SPA_PM && ((ars_cap.status >> 16)
  2694. & ND_ARS_PERSISTENT) == 0)
  2695. return;
  2696. nfit_spa->max_ars = ars_cap.max_ars_out;
  2697. nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
  2698. acpi_desc->max_ars = max(nfit_spa->max_ars, acpi_desc->max_ars);
  2699. clear_bit(ARS_FAILED, &nfit_spa->ars_state);
  2700. }
  2701. static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
  2702. {
  2703. struct nfit_spa *nfit_spa;
  2704. int rc;
  2705. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2706. switch (nfit_spa_type(nfit_spa->spa)) {
  2707. case NFIT_SPA_VOLATILE:
  2708. case NFIT_SPA_PM:
  2709. acpi_nfit_init_ars(acpi_desc, nfit_spa);
  2710. break;
  2711. }
  2712. }
  2713. list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
  2714. switch (nfit_spa_type(nfit_spa->spa)) {
  2715. case NFIT_SPA_VOLATILE:
  2716. case NFIT_SPA_PM:
  2717. /* register regions and kick off initial ARS run */
  2718. rc = ars_register(acpi_desc, nfit_spa);
  2719. if (rc)
  2720. return rc;
  2721. break;
  2722. case NFIT_SPA_BDW:
  2723. /* nothing to register */
  2724. break;
  2725. case NFIT_SPA_DCR:
  2726. case NFIT_SPA_VDISK:
  2727. case NFIT_SPA_VCD:
  2728. case NFIT_SPA_PDISK:
  2729. case NFIT_SPA_PCD:
  2730. /* register known regions that don't support ARS */
  2731. rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
  2732. if (rc)
  2733. return rc;
  2734. break;
  2735. default:
  2736. /* don't register unknown regions */
  2737. break;
  2738. }
  2739. sched_ars(acpi_desc);
  2740. return 0;
  2741. }
  2742. static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
  2743. struct nfit_table_prev *prev)
  2744. {
  2745. struct device *dev = acpi_desc->dev;
  2746. if (!list_empty(&prev->spas) ||
  2747. !list_empty(&prev->memdevs) ||
  2748. !list_empty(&prev->dcrs) ||
  2749. !list_empty(&prev->bdws) ||
  2750. !list_empty(&prev->idts) ||
  2751. !list_empty(&prev->flushes)) {
  2752. dev_err(dev, "new nfit deletes entries (unsupported)\n");
  2753. return -ENXIO;
  2754. }
  2755. return 0;
  2756. }
  2757. static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc)
  2758. {
  2759. struct device *dev = acpi_desc->dev;
  2760. struct kernfs_node *nfit;
  2761. struct device *bus_dev;
  2762. if (!ars_supported(acpi_desc->nvdimm_bus))
  2763. return 0;
  2764. bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2765. nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit");
  2766. if (!nfit) {
  2767. dev_err(dev, "sysfs_get_dirent 'nfit' failed\n");
  2768. return -ENODEV;
  2769. }
  2770. acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub");
  2771. sysfs_put(nfit);
  2772. if (!acpi_desc->scrub_count_state) {
  2773. dev_err(dev, "sysfs_get_dirent 'scrub' failed\n");
  2774. return -ENODEV;
  2775. }
  2776. return 0;
  2777. }
  2778. static void acpi_nfit_unregister(void *data)
  2779. {
  2780. struct acpi_nfit_desc *acpi_desc = data;
  2781. nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
  2782. }
  2783. int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz)
  2784. {
  2785. struct device *dev = acpi_desc->dev;
  2786. struct nfit_table_prev prev;
  2787. const void *end;
  2788. int rc;
  2789. if (!acpi_desc->nvdimm_bus) {
  2790. acpi_nfit_init_dsms(acpi_desc);
  2791. acpi_desc->nvdimm_bus = nvdimm_bus_register(dev,
  2792. &acpi_desc->nd_desc);
  2793. if (!acpi_desc->nvdimm_bus)
  2794. return -ENOMEM;
  2795. rc = devm_add_action_or_reset(dev, acpi_nfit_unregister,
  2796. acpi_desc);
  2797. if (rc)
  2798. return rc;
  2799. rc = acpi_nfit_desc_init_scrub_attr(acpi_desc);
  2800. if (rc)
  2801. return rc;
  2802. /* register this acpi_desc for mce notifications */
  2803. mutex_lock(&acpi_desc_lock);
  2804. list_add_tail(&acpi_desc->list, &acpi_descs);
  2805. mutex_unlock(&acpi_desc_lock);
  2806. }
  2807. mutex_lock(&acpi_desc->init_mutex);
  2808. INIT_LIST_HEAD(&prev.spas);
  2809. INIT_LIST_HEAD(&prev.memdevs);
  2810. INIT_LIST_HEAD(&prev.dcrs);
  2811. INIT_LIST_HEAD(&prev.bdws);
  2812. INIT_LIST_HEAD(&prev.idts);
  2813. INIT_LIST_HEAD(&prev.flushes);
  2814. list_cut_position(&prev.spas, &acpi_desc->spas,
  2815. acpi_desc->spas.prev);
  2816. list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
  2817. acpi_desc->memdevs.prev);
  2818. list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
  2819. acpi_desc->dcrs.prev);
  2820. list_cut_position(&prev.bdws, &acpi_desc->bdws,
  2821. acpi_desc->bdws.prev);
  2822. list_cut_position(&prev.idts, &acpi_desc->idts,
  2823. acpi_desc->idts.prev);
  2824. list_cut_position(&prev.flushes, &acpi_desc->flushes,
  2825. acpi_desc->flushes.prev);
  2826. end = data + sz;
  2827. while (!IS_ERR_OR_NULL(data))
  2828. data = add_table(acpi_desc, &prev, data, end);
  2829. if (IS_ERR(data)) {
  2830. dev_dbg(dev, "nfit table parsing error: %ld\n", PTR_ERR(data));
  2831. rc = PTR_ERR(data);
  2832. goto out_unlock;
  2833. }
  2834. rc = acpi_nfit_check_deletions(acpi_desc, &prev);
  2835. if (rc)
  2836. goto out_unlock;
  2837. rc = nfit_mem_init(acpi_desc);
  2838. if (rc)
  2839. goto out_unlock;
  2840. rc = acpi_nfit_register_dimms(acpi_desc);
  2841. if (rc)
  2842. goto out_unlock;
  2843. rc = acpi_nfit_register_regions(acpi_desc);
  2844. out_unlock:
  2845. mutex_unlock(&acpi_desc->init_mutex);
  2846. return rc;
  2847. }
  2848. EXPORT_SYMBOL_GPL(acpi_nfit_init);
  2849. static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
  2850. {
  2851. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2852. struct device *dev = acpi_desc->dev;
  2853. /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
  2854. device_lock(dev);
  2855. device_unlock(dev);
  2856. /* Bounce the init_mutex to complete initial registration */
  2857. mutex_lock(&acpi_desc->init_mutex);
  2858. mutex_unlock(&acpi_desc->init_mutex);
  2859. return 0;
  2860. }
  2861. static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
  2862. struct nvdimm *nvdimm, unsigned int cmd)
  2863. {
  2864. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2865. if (nvdimm)
  2866. return 0;
  2867. if (cmd != ND_CMD_ARS_START)
  2868. return 0;
  2869. /*
  2870. * The kernel and userspace may race to initiate a scrub, but
  2871. * the scrub thread is prepared to lose that initial race. It
  2872. * just needs guarantees that any ARS it initiates are not
  2873. * interrupted by any intervening start requests from userspace.
  2874. */
  2875. if (work_busy(&acpi_desc->dwork.work))
  2876. return -EBUSY;
  2877. return 0;
  2878. }
  2879. int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc,
  2880. enum nfit_ars_state req_type)
  2881. {
  2882. struct device *dev = acpi_desc->dev;
  2883. int scheduled = 0, busy = 0;
  2884. struct nfit_spa *nfit_spa;
  2885. mutex_lock(&acpi_desc->init_mutex);
  2886. if (acpi_desc->cancel) {
  2887. mutex_unlock(&acpi_desc->init_mutex);
  2888. return 0;
  2889. }
  2890. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2891. int type = nfit_spa_type(nfit_spa->spa);
  2892. if (type != NFIT_SPA_PM && type != NFIT_SPA_VOLATILE)
  2893. continue;
  2894. if (test_bit(ARS_FAILED, &nfit_spa->ars_state))
  2895. continue;
  2896. if (test_and_set_bit(req_type, &nfit_spa->ars_state))
  2897. busy++;
  2898. else
  2899. scheduled++;
  2900. }
  2901. if (scheduled) {
  2902. sched_ars(acpi_desc);
  2903. dev_dbg(dev, "ars_scan triggered\n");
  2904. }
  2905. mutex_unlock(&acpi_desc->init_mutex);
  2906. if (scheduled)
  2907. return 0;
  2908. if (busy)
  2909. return -EBUSY;
  2910. return -ENOTTY;
  2911. }
  2912. void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
  2913. {
  2914. struct nvdimm_bus_descriptor *nd_desc;
  2915. dev_set_drvdata(dev, acpi_desc);
  2916. acpi_desc->dev = dev;
  2917. acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
  2918. nd_desc = &acpi_desc->nd_desc;
  2919. nd_desc->provider_name = "ACPI.NFIT";
  2920. nd_desc->module = THIS_MODULE;
  2921. nd_desc->ndctl = acpi_nfit_ctl;
  2922. nd_desc->flush_probe = acpi_nfit_flush_probe;
  2923. nd_desc->clear_to_send = acpi_nfit_clear_to_send;
  2924. nd_desc->attr_groups = acpi_nfit_attribute_groups;
  2925. INIT_LIST_HEAD(&acpi_desc->spas);
  2926. INIT_LIST_HEAD(&acpi_desc->dcrs);
  2927. INIT_LIST_HEAD(&acpi_desc->bdws);
  2928. INIT_LIST_HEAD(&acpi_desc->idts);
  2929. INIT_LIST_HEAD(&acpi_desc->flushes);
  2930. INIT_LIST_HEAD(&acpi_desc->memdevs);
  2931. INIT_LIST_HEAD(&acpi_desc->dimms);
  2932. INIT_LIST_HEAD(&acpi_desc->list);
  2933. mutex_init(&acpi_desc->init_mutex);
  2934. acpi_desc->scrub_tmo = 1;
  2935. INIT_DELAYED_WORK(&acpi_desc->dwork, acpi_nfit_scrub);
  2936. }
  2937. EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
  2938. static void acpi_nfit_put_table(void *table)
  2939. {
  2940. acpi_put_table(table);
  2941. }
  2942. void acpi_nfit_shutdown(void *data)
  2943. {
  2944. struct acpi_nfit_desc *acpi_desc = data;
  2945. struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2946. /*
  2947. * Destruct under acpi_desc_lock so that nfit_handle_mce does not
  2948. * race teardown
  2949. */
  2950. mutex_lock(&acpi_desc_lock);
  2951. list_del(&acpi_desc->list);
  2952. mutex_unlock(&acpi_desc_lock);
  2953. mutex_lock(&acpi_desc->init_mutex);
  2954. acpi_desc->cancel = 1;
  2955. cancel_delayed_work_sync(&acpi_desc->dwork);
  2956. mutex_unlock(&acpi_desc->init_mutex);
  2957. /*
  2958. * Bounce the nvdimm bus lock to make sure any in-flight
  2959. * acpi_nfit_ars_rescan() submissions have had a chance to
  2960. * either submit or see ->cancel set.
  2961. */
  2962. device_lock(bus_dev);
  2963. device_unlock(bus_dev);
  2964. flush_workqueue(nfit_wq);
  2965. }
  2966. EXPORT_SYMBOL_GPL(acpi_nfit_shutdown);
  2967. static int acpi_nfit_add(struct acpi_device *adev)
  2968. {
  2969. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  2970. struct acpi_nfit_desc *acpi_desc;
  2971. struct device *dev = &adev->dev;
  2972. struct acpi_table_header *tbl;
  2973. acpi_status status = AE_OK;
  2974. acpi_size sz;
  2975. int rc = 0;
  2976. status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl);
  2977. if (ACPI_FAILURE(status)) {
  2978. /* This is ok, we could have an nvdimm hotplugged later */
  2979. dev_dbg(dev, "failed to find NFIT at startup\n");
  2980. return 0;
  2981. }
  2982. rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl);
  2983. if (rc)
  2984. return rc;
  2985. sz = tbl->length;
  2986. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  2987. if (!acpi_desc)
  2988. return -ENOMEM;
  2989. acpi_nfit_desc_init(acpi_desc, &adev->dev);
  2990. /* Save the acpi header for exporting the revision via sysfs */
  2991. acpi_desc->acpi_header = *tbl;
  2992. /* Evaluate _FIT and override with that if present */
  2993. status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
  2994. if (ACPI_SUCCESS(status) && buf.length > 0) {
  2995. union acpi_object *obj = buf.pointer;
  2996. if (obj->type == ACPI_TYPE_BUFFER)
  2997. rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  2998. obj->buffer.length);
  2999. else
  3000. dev_dbg(dev, "invalid type %d, ignoring _FIT\n",
  3001. (int) obj->type);
  3002. kfree(buf.pointer);
  3003. } else
  3004. /* skip over the lead-in header table */
  3005. rc = acpi_nfit_init(acpi_desc, (void *) tbl
  3006. + sizeof(struct acpi_table_nfit),
  3007. sz - sizeof(struct acpi_table_nfit));
  3008. if (rc)
  3009. return rc;
  3010. return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc);
  3011. }
  3012. static int acpi_nfit_remove(struct acpi_device *adev)
  3013. {
  3014. /* see acpi_nfit_unregister */
  3015. return 0;
  3016. }
  3017. static void acpi_nfit_update_notify(struct device *dev, acpi_handle handle)
  3018. {
  3019. struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev);
  3020. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  3021. union acpi_object *obj;
  3022. acpi_status status;
  3023. int ret;
  3024. if (!dev->driver) {
  3025. /* dev->driver may be null if we're being removed */
  3026. dev_dbg(dev, "no driver found for dev\n");
  3027. return;
  3028. }
  3029. if (!acpi_desc) {
  3030. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  3031. if (!acpi_desc)
  3032. return;
  3033. acpi_nfit_desc_init(acpi_desc, dev);
  3034. } else {
  3035. /*
  3036. * Finish previous registration before considering new
  3037. * regions.
  3038. */
  3039. flush_workqueue(nfit_wq);
  3040. }
  3041. /* Evaluate _FIT */
  3042. status = acpi_evaluate_object(handle, "_FIT", NULL, &buf);
  3043. if (ACPI_FAILURE(status)) {
  3044. dev_err(dev, "failed to evaluate _FIT\n");
  3045. return;
  3046. }
  3047. obj = buf.pointer;
  3048. if (obj->type == ACPI_TYPE_BUFFER) {
  3049. ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  3050. obj->buffer.length);
  3051. if (ret)
  3052. dev_err(dev, "failed to merge updated NFIT\n");
  3053. } else
  3054. dev_err(dev, "Invalid _FIT\n");
  3055. kfree(buf.pointer);
  3056. }
  3057. static void acpi_nfit_uc_error_notify(struct device *dev, acpi_handle handle)
  3058. {
  3059. struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev);
  3060. if (acpi_desc->scrub_mode == HW_ERROR_SCRUB_ON)
  3061. acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG);
  3062. else
  3063. acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_SHORT);
  3064. }
  3065. void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event)
  3066. {
  3067. dev_dbg(dev, "event: 0x%x\n", event);
  3068. switch (event) {
  3069. case NFIT_NOTIFY_UPDATE:
  3070. return acpi_nfit_update_notify(dev, handle);
  3071. case NFIT_NOTIFY_UC_MEMORY_ERROR:
  3072. return acpi_nfit_uc_error_notify(dev, handle);
  3073. default:
  3074. return;
  3075. }
  3076. }
  3077. EXPORT_SYMBOL_GPL(__acpi_nfit_notify);
  3078. static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
  3079. {
  3080. device_lock(&adev->dev);
  3081. __acpi_nfit_notify(&adev->dev, adev->handle, event);
  3082. device_unlock(&adev->dev);
  3083. }
  3084. static const struct acpi_device_id acpi_nfit_ids[] = {
  3085. { "ACPI0012", 0 },
  3086. { "", 0 },
  3087. };
  3088. MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
  3089. static struct acpi_driver acpi_nfit_driver = {
  3090. .name = KBUILD_MODNAME,
  3091. .ids = acpi_nfit_ids,
  3092. .ops = {
  3093. .add = acpi_nfit_add,
  3094. .remove = acpi_nfit_remove,
  3095. .notify = acpi_nfit_notify,
  3096. },
  3097. };
  3098. static __init int nfit_init(void)
  3099. {
  3100. int ret;
  3101. BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
  3102. BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
  3103. BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
  3104. BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
  3105. BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
  3106. BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
  3107. BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
  3108. BUILD_BUG_ON(sizeof(struct acpi_nfit_capabilities) != 16);
  3109. guid_parse(UUID_VOLATILE_MEMORY, &nfit_uuid[NFIT_SPA_VOLATILE]);
  3110. guid_parse(UUID_PERSISTENT_MEMORY, &nfit_uuid[NFIT_SPA_PM]);
  3111. guid_parse(UUID_CONTROL_REGION, &nfit_uuid[NFIT_SPA_DCR]);
  3112. guid_parse(UUID_DATA_REGION, &nfit_uuid[NFIT_SPA_BDW]);
  3113. guid_parse(UUID_VOLATILE_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_VDISK]);
  3114. guid_parse(UUID_VOLATILE_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_VCD]);
  3115. guid_parse(UUID_PERSISTENT_VIRTUAL_DISK, &nfit_uuid[NFIT_SPA_PDISK]);
  3116. guid_parse(UUID_PERSISTENT_VIRTUAL_CD, &nfit_uuid[NFIT_SPA_PCD]);
  3117. guid_parse(UUID_NFIT_BUS, &nfit_uuid[NFIT_DEV_BUS]);
  3118. guid_parse(UUID_NFIT_DIMM, &nfit_uuid[NFIT_DEV_DIMM]);
  3119. guid_parse(UUID_NFIT_DIMM_N_HPE1, &nfit_uuid[NFIT_DEV_DIMM_N_HPE1]);
  3120. guid_parse(UUID_NFIT_DIMM_N_HPE2, &nfit_uuid[NFIT_DEV_DIMM_N_HPE2]);
  3121. guid_parse(UUID_NFIT_DIMM_N_MSFT, &nfit_uuid[NFIT_DEV_DIMM_N_MSFT]);
  3122. nfit_wq = create_singlethread_workqueue("nfit");
  3123. if (!nfit_wq)
  3124. return -ENOMEM;
  3125. nfit_mce_register();
  3126. ret = acpi_bus_register_driver(&acpi_nfit_driver);
  3127. if (ret) {
  3128. nfit_mce_unregister();
  3129. destroy_workqueue(nfit_wq);
  3130. }
  3131. return ret;
  3132. }
  3133. static __exit void nfit_exit(void)
  3134. {
  3135. nfit_mce_unregister();
  3136. acpi_bus_unregister_driver(&acpi_nfit_driver);
  3137. destroy_workqueue(nfit_wq);
  3138. WARN_ON(!list_empty(&acpi_descs));
  3139. }
  3140. module_init(nfit_init);
  3141. module_exit(nfit_exit);
  3142. MODULE_LICENSE("GPL v2");
  3143. MODULE_AUTHOR("Intel Corporation");