intel.c 24 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * Intel CPU microcode early update for Linux
  8. *
  9. * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
  10. * H Peter Anvin" <hpa@zytor.com>
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License
  14. * as published by the Free Software Foundation; either version
  15. * 2 of the License, or (at your option) any later version.
  16. */
  17. /*
  18. * This needs to be before all headers so that pr_debug in printk.h doesn't turn
  19. * printk calls into no_printk().
  20. *
  21. *#define DEBUG
  22. */
  23. #define pr_fmt(fmt) "microcode: " fmt
  24. #include <linux/earlycpio.h>
  25. #include <linux/firmware.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vmalloc.h>
  28. #include <linux/initrd.h>
  29. #include <linux/kernel.h>
  30. #include <linux/slab.h>
  31. #include <linux/cpu.h>
  32. #include <linux/mm.h>
  33. #include <asm/microcode_intel.h>
  34. #include <asm/processor.h>
  35. #include <asm/tlbflush.h>
  36. #include <asm/setup.h>
  37. #include <asm/msr.h>
  38. static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
  39. static struct mc_saved_data {
  40. unsigned int mc_saved_count;
  41. struct microcode_intel **mc_saved;
  42. } mc_saved_data;
  43. static enum ucode_state
  44. load_microcode_early(struct microcode_intel **saved,
  45. unsigned int num_saved, struct ucode_cpu_info *uci)
  46. {
  47. struct microcode_intel *ucode_ptr, *new_mc = NULL;
  48. struct microcode_header_intel *mc_hdr;
  49. int new_rev, ret, i;
  50. new_rev = uci->cpu_sig.rev;
  51. for (i = 0; i < num_saved; i++) {
  52. ucode_ptr = saved[i];
  53. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  54. ret = has_newer_microcode(ucode_ptr,
  55. uci->cpu_sig.sig,
  56. uci->cpu_sig.pf,
  57. new_rev);
  58. if (!ret)
  59. continue;
  60. new_rev = mc_hdr->rev;
  61. new_mc = ucode_ptr;
  62. }
  63. if (!new_mc)
  64. return UCODE_NFOUND;
  65. uci->mc = (struct microcode_intel *)new_mc;
  66. return UCODE_OK;
  67. }
  68. static inline void
  69. copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
  70. unsigned long off, int num_saved)
  71. {
  72. int i;
  73. for (i = 0; i < num_saved; i++)
  74. mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
  75. }
  76. #ifdef CONFIG_X86_32
  77. static void
  78. microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
  79. {
  80. int i;
  81. struct microcode_intel ***mc_saved;
  82. mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
  83. for (i = 0; i < mcs->mc_saved_count; i++) {
  84. struct microcode_intel *p;
  85. p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
  86. mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
  87. }
  88. }
  89. #endif
  90. static enum ucode_state
  91. load_microcode(struct mc_saved_data *mcs, unsigned long *initrd,
  92. unsigned long initrd_start, struct ucode_cpu_info *uci)
  93. {
  94. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  95. unsigned int count = mcs->mc_saved_count;
  96. if (!mcs->mc_saved) {
  97. copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
  98. return load_microcode_early(mc_saved_tmp, count, uci);
  99. } else {
  100. #ifdef CONFIG_X86_32
  101. microcode_phys(mc_saved_tmp, mcs);
  102. return load_microcode_early(mc_saved_tmp, count, uci);
  103. #else
  104. return load_microcode_early(mcs->mc_saved, count, uci);
  105. #endif
  106. }
  107. }
  108. /*
  109. * Given CPU signature and a microcode patch, this function finds if the
  110. * microcode patch has matching family and model with the CPU.
  111. */
  112. static enum ucode_state
  113. matching_model_microcode(struct microcode_header_intel *mc_header,
  114. unsigned long sig)
  115. {
  116. unsigned int fam, model;
  117. unsigned int fam_ucode, model_ucode;
  118. struct extended_sigtable *ext_header;
  119. unsigned long total_size = get_totalsize(mc_header);
  120. unsigned long data_size = get_datasize(mc_header);
  121. int ext_sigcount, i;
  122. struct extended_signature *ext_sig;
  123. fam = x86_family(sig);
  124. model = x86_model(sig);
  125. fam_ucode = x86_family(mc_header->sig);
  126. model_ucode = x86_model(mc_header->sig);
  127. if (fam == fam_ucode && model == model_ucode)
  128. return UCODE_OK;
  129. /* Look for ext. headers: */
  130. if (total_size <= data_size + MC_HEADER_SIZE)
  131. return UCODE_NFOUND;
  132. ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
  133. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  134. ext_sigcount = ext_header->count;
  135. for (i = 0; i < ext_sigcount; i++) {
  136. fam_ucode = x86_family(ext_sig->sig);
  137. model_ucode = x86_model(ext_sig->sig);
  138. if (fam == fam_ucode && model == model_ucode)
  139. return UCODE_OK;
  140. ext_sig++;
  141. }
  142. return UCODE_NFOUND;
  143. }
  144. static int
  145. save_microcode(struct mc_saved_data *mcs,
  146. struct microcode_intel **mc_saved_src,
  147. unsigned int mc_saved_count)
  148. {
  149. int i, j;
  150. struct microcode_intel **saved_ptr;
  151. int ret;
  152. if (!mc_saved_count)
  153. return -EINVAL;
  154. /*
  155. * Copy new microcode data.
  156. */
  157. saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL);
  158. if (!saved_ptr)
  159. return -ENOMEM;
  160. for (i = 0; i < mc_saved_count; i++) {
  161. struct microcode_header_intel *mc_hdr;
  162. struct microcode_intel *mc;
  163. unsigned long size;
  164. if (!mc_saved_src[i]) {
  165. ret = -EINVAL;
  166. goto err;
  167. }
  168. mc = mc_saved_src[i];
  169. mc_hdr = &mc->hdr;
  170. size = get_totalsize(mc_hdr);
  171. saved_ptr[i] = kmalloc(size, GFP_KERNEL);
  172. if (!saved_ptr[i]) {
  173. ret = -ENOMEM;
  174. goto err;
  175. }
  176. memcpy(saved_ptr[i], mc, size);
  177. }
  178. /*
  179. * Point to newly saved microcode.
  180. */
  181. mcs->mc_saved = saved_ptr;
  182. mcs->mc_saved_count = mc_saved_count;
  183. return 0;
  184. err:
  185. for (j = 0; j <= i; j++)
  186. kfree(saved_ptr[j]);
  187. kfree(saved_ptr);
  188. return ret;
  189. }
  190. /*
  191. * A microcode patch in ucode_ptr is saved into mc_saved
  192. * - if it has matching signature and newer revision compared to an existing
  193. * patch mc_saved.
  194. * - or if it is a newly discovered microcode patch.
  195. *
  196. * The microcode patch should have matching model with CPU.
  197. *
  198. * Returns: The updated number @num_saved of saved microcode patches.
  199. */
  200. static unsigned int _save_mc(struct microcode_intel **mc_saved,
  201. u8 *ucode_ptr, unsigned int num_saved)
  202. {
  203. struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
  204. unsigned int sig, pf;
  205. int found = 0, i;
  206. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  207. for (i = 0; i < num_saved; i++) {
  208. mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
  209. sig = mc_saved_hdr->sig;
  210. pf = mc_saved_hdr->pf;
  211. if (!find_matching_signature(ucode_ptr, sig, pf))
  212. continue;
  213. found = 1;
  214. if (mc_hdr->rev <= mc_saved_hdr->rev)
  215. continue;
  216. /*
  217. * Found an older ucode saved earlier. Replace it with
  218. * this newer one.
  219. */
  220. mc_saved[i] = (struct microcode_intel *)ucode_ptr;
  221. break;
  222. }
  223. /* Newly detected microcode, save it to memory. */
  224. if (i >= num_saved && !found)
  225. mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
  226. return num_saved;
  227. }
  228. /*
  229. * Get microcode matching with BSP's model. Only CPUs with the same model as
  230. * BSP can stay in the platform.
  231. */
  232. static enum ucode_state __init
  233. get_matching_model_microcode(int cpu, unsigned long start,
  234. void *data, size_t size,
  235. struct mc_saved_data *mcs,
  236. unsigned long *mc_saved_in_initrd,
  237. struct ucode_cpu_info *uci)
  238. {
  239. u8 *ucode_ptr = data;
  240. unsigned int leftover = size;
  241. enum ucode_state state = UCODE_OK;
  242. unsigned int mc_size;
  243. struct microcode_header_intel *mc_header;
  244. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  245. unsigned int mc_saved_count = mcs->mc_saved_count;
  246. int i;
  247. while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
  248. if (leftover < sizeof(mc_header))
  249. break;
  250. mc_header = (struct microcode_header_intel *)ucode_ptr;
  251. mc_size = get_totalsize(mc_header);
  252. if (!mc_size || mc_size > leftover ||
  253. microcode_sanity_check(ucode_ptr, 0) < 0)
  254. break;
  255. leftover -= mc_size;
  256. /*
  257. * Since APs with same family and model as the BSP may boot in
  258. * the platform, we need to find and save microcode patches
  259. * with the same family and model as the BSP.
  260. */
  261. if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
  262. UCODE_OK) {
  263. ucode_ptr += mc_size;
  264. continue;
  265. }
  266. mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count);
  267. ucode_ptr += mc_size;
  268. }
  269. if (leftover) {
  270. state = UCODE_ERROR;
  271. goto out;
  272. }
  273. if (mc_saved_count == 0) {
  274. state = UCODE_NFOUND;
  275. goto out;
  276. }
  277. for (i = 0; i < mc_saved_count; i++)
  278. mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
  279. mcs->mc_saved_count = mc_saved_count;
  280. out:
  281. return state;
  282. }
  283. static int collect_cpu_info_early(struct ucode_cpu_info *uci)
  284. {
  285. unsigned int val[2];
  286. unsigned int family, model;
  287. struct cpu_signature csig;
  288. unsigned int eax, ebx, ecx, edx;
  289. csig.sig = 0;
  290. csig.pf = 0;
  291. csig.rev = 0;
  292. memset(uci, 0, sizeof(*uci));
  293. eax = 0x00000001;
  294. ecx = 0;
  295. native_cpuid(&eax, &ebx, &ecx, &edx);
  296. csig.sig = eax;
  297. family = x86_family(csig.sig);
  298. model = x86_model(csig.sig);
  299. if ((model >= 5) || (family > 6)) {
  300. /* get processor flags from MSR 0x17 */
  301. native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  302. csig.pf = 1 << ((val[1] >> 18) & 7);
  303. }
  304. native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  305. /* As documented in the SDM: Do a CPUID 1 here */
  306. sync_core();
  307. /* get the current revision from MSR 0x8B */
  308. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  309. csig.rev = val[1];
  310. uci->cpu_sig = csig;
  311. uci->valid = 1;
  312. return 0;
  313. }
  314. static void show_saved_mc(void)
  315. {
  316. #ifdef DEBUG
  317. int i, j;
  318. unsigned int sig, pf, rev, total_size, data_size, date;
  319. struct ucode_cpu_info uci;
  320. if (mc_saved_data.mc_saved_count == 0) {
  321. pr_debug("no microcode data saved.\n");
  322. return;
  323. }
  324. pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
  325. collect_cpu_info_early(&uci);
  326. sig = uci.cpu_sig.sig;
  327. pf = uci.cpu_sig.pf;
  328. rev = uci.cpu_sig.rev;
  329. pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
  330. for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
  331. struct microcode_header_intel *mc_saved_header;
  332. struct extended_sigtable *ext_header;
  333. int ext_sigcount;
  334. struct extended_signature *ext_sig;
  335. mc_saved_header = (struct microcode_header_intel *)
  336. mc_saved_data.mc_saved[i];
  337. sig = mc_saved_header->sig;
  338. pf = mc_saved_header->pf;
  339. rev = mc_saved_header->rev;
  340. total_size = get_totalsize(mc_saved_header);
  341. data_size = get_datasize(mc_saved_header);
  342. date = mc_saved_header->date;
  343. pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
  344. i, sig, pf, rev, total_size,
  345. date & 0xffff,
  346. date >> 24,
  347. (date >> 16) & 0xff);
  348. /* Look for ext. headers: */
  349. if (total_size <= data_size + MC_HEADER_SIZE)
  350. continue;
  351. ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
  352. ext_sigcount = ext_header->count;
  353. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  354. for (j = 0; j < ext_sigcount; j++) {
  355. sig = ext_sig->sig;
  356. pf = ext_sig->pf;
  357. pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
  358. j, sig, pf);
  359. ext_sig++;
  360. }
  361. }
  362. #endif
  363. }
  364. #ifdef CONFIG_HOTPLUG_CPU
  365. static DEFINE_MUTEX(x86_cpu_microcode_mutex);
  366. /*
  367. * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
  368. * hot added or resumes.
  369. *
  370. * Please make sure this mc should be a valid microcode patch before calling
  371. * this function.
  372. */
  373. int save_mc_for_early(u8 *mc)
  374. {
  375. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  376. unsigned int mc_saved_count_init;
  377. unsigned int mc_saved_count;
  378. struct microcode_intel **mc_saved;
  379. int ret = 0;
  380. int i;
  381. /*
  382. * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
  383. * hotplug.
  384. */
  385. mutex_lock(&x86_cpu_microcode_mutex);
  386. mc_saved_count_init = mc_saved_data.mc_saved_count;
  387. mc_saved_count = mc_saved_data.mc_saved_count;
  388. mc_saved = mc_saved_data.mc_saved;
  389. if (mc_saved && mc_saved_count)
  390. memcpy(mc_saved_tmp, mc_saved,
  391. mc_saved_count * sizeof(struct microcode_intel *));
  392. /*
  393. * Save the microcode patch mc in mc_save_tmp structure if it's a newer
  394. * version.
  395. */
  396. mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count);
  397. /*
  398. * Save the mc_save_tmp in global mc_saved_data.
  399. */
  400. ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
  401. if (ret) {
  402. pr_err("Cannot save microcode patch.\n");
  403. goto out;
  404. }
  405. show_saved_mc();
  406. /*
  407. * Free old saved microcode data.
  408. */
  409. if (mc_saved) {
  410. for (i = 0; i < mc_saved_count_init; i++)
  411. kfree(mc_saved[i]);
  412. kfree(mc_saved);
  413. }
  414. out:
  415. mutex_unlock(&x86_cpu_microcode_mutex);
  416. return ret;
  417. }
  418. EXPORT_SYMBOL_GPL(save_mc_for_early);
  419. #endif
  420. static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
  421. {
  422. #ifdef CONFIG_X86_64
  423. unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
  424. char name[30];
  425. native_cpuid(&eax, &ebx, &ecx, &edx);
  426. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  427. x86_family(eax), x86_model(eax), x86_stepping(eax));
  428. return get_builtin_firmware(cp, name);
  429. #else
  430. return false;
  431. #endif
  432. }
  433. static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
  434. static __init enum ucode_state
  435. scan_microcode(struct mc_saved_data *mcs, unsigned long *initrd,
  436. unsigned long start, unsigned long size,
  437. struct ucode_cpu_info *uci)
  438. {
  439. struct cpio_data cd;
  440. long offset = 0;
  441. #ifdef CONFIG_X86_32
  442. char *p = (char *)__pa_nodebug(ucode_name);
  443. #else
  444. char *p = ucode_name;
  445. #endif
  446. cd.data = NULL;
  447. cd.size = 0;
  448. /* try built-in microcode if no initrd */
  449. if (!size) {
  450. if (!load_builtin_intel_microcode(&cd))
  451. return UCODE_ERROR;
  452. } else {
  453. cd = find_cpio_data(p, (void *)start, size, &offset);
  454. if (!cd.data)
  455. return UCODE_ERROR;
  456. }
  457. return get_matching_model_microcode(0, start, cd.data, cd.size,
  458. mcs, initrd, uci);
  459. }
  460. /*
  461. * Print ucode update info.
  462. */
  463. static void
  464. print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
  465. {
  466. pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
  467. uci->cpu_sig.rev,
  468. date & 0xffff,
  469. date >> 24,
  470. (date >> 16) & 0xff);
  471. }
  472. #ifdef CONFIG_X86_32
  473. static int delay_ucode_info;
  474. static int current_mc_date;
  475. /*
  476. * Print early updated ucode info after printk works. This is delayed info dump.
  477. */
  478. void show_ucode_info_early(void)
  479. {
  480. struct ucode_cpu_info uci;
  481. if (delay_ucode_info) {
  482. collect_cpu_info_early(&uci);
  483. print_ucode_info(&uci, current_mc_date);
  484. delay_ucode_info = 0;
  485. }
  486. }
  487. /*
  488. * At this point, we can not call printk() yet. Keep microcode patch number in
  489. * mc_saved_data.mc_saved and delay printing microcode info in
  490. * show_ucode_info_early() until printk() works.
  491. */
  492. static void print_ucode(struct ucode_cpu_info *uci)
  493. {
  494. struct microcode_intel *mc_intel;
  495. int *delay_ucode_info_p;
  496. int *current_mc_date_p;
  497. mc_intel = uci->mc;
  498. if (mc_intel == NULL)
  499. return;
  500. delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
  501. current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
  502. *delay_ucode_info_p = 1;
  503. *current_mc_date_p = mc_intel->hdr.date;
  504. }
  505. #else
  506. /*
  507. * Flush global tlb. We only do this in x86_64 where paging has been enabled
  508. * already and PGE should be enabled as well.
  509. */
  510. static inline void flush_tlb_early(void)
  511. {
  512. __native_flush_tlb_global_irq_disabled();
  513. }
  514. static inline void print_ucode(struct ucode_cpu_info *uci)
  515. {
  516. struct microcode_intel *mc_intel;
  517. mc_intel = uci->mc;
  518. if (mc_intel == NULL)
  519. return;
  520. print_ucode_info(uci, mc_intel->hdr.date);
  521. }
  522. #endif
  523. static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
  524. {
  525. struct microcode_intel *mc_intel;
  526. unsigned int val[2];
  527. mc_intel = uci->mc;
  528. if (mc_intel == NULL)
  529. return 0;
  530. /* write microcode via MSR 0x79 */
  531. native_wrmsr(MSR_IA32_UCODE_WRITE,
  532. (unsigned long) mc_intel->bits,
  533. (unsigned long) mc_intel->bits >> 16 >> 16);
  534. native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  535. /* As documented in the SDM: Do a CPUID 1 here */
  536. sync_core();
  537. /* get the current revision from MSR 0x8B */
  538. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  539. if (val[1] != mc_intel->hdr.rev)
  540. return -1;
  541. #ifdef CONFIG_X86_64
  542. /* Flush global tlb. This is precaution. */
  543. flush_tlb_early();
  544. #endif
  545. uci->cpu_sig.rev = val[1];
  546. if (early)
  547. print_ucode(uci);
  548. else
  549. print_ucode_info(uci, mc_intel->hdr.date);
  550. return 0;
  551. }
  552. /*
  553. * This function converts microcode patch offsets previously stored in
  554. * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
  555. */
  556. int __init save_microcode_in_initrd_intel(void)
  557. {
  558. unsigned int count = mc_saved_data.mc_saved_count;
  559. struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
  560. int ret = 0;
  561. if (count == 0)
  562. return ret;
  563. copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, get_initrd_start(), count);
  564. ret = save_microcode(&mc_saved_data, mc_saved, count);
  565. if (ret)
  566. pr_err("Cannot save microcode patches from initrd.\n");
  567. show_saved_mc();
  568. return ret;
  569. }
  570. static void __init
  571. _load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *initrd,
  572. unsigned long start, unsigned long size)
  573. {
  574. struct ucode_cpu_info uci;
  575. enum ucode_state ret;
  576. collect_cpu_info_early(&uci);
  577. ret = scan_microcode(mcs, initrd, start, size, &uci);
  578. if (ret != UCODE_OK)
  579. return;
  580. ret = load_microcode(mcs, initrd, start, &uci);
  581. if (ret != UCODE_OK)
  582. return;
  583. apply_microcode_early(&uci, true);
  584. }
  585. void __init load_ucode_intel_bsp(void)
  586. {
  587. u64 start, size;
  588. #ifdef CONFIG_X86_32
  589. struct boot_params *p;
  590. p = (struct boot_params *)__pa_nodebug(&boot_params);
  591. size = p->hdr.ramdisk_size;
  592. /*
  593. * Set start only if we have an initrd image. We cannot use initrd_start
  594. * because it is not set that early yet.
  595. */
  596. start = (size ? p->hdr.ramdisk_image : 0);
  597. _load_ucode_intel_bsp((struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
  598. (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
  599. start, size);
  600. #else
  601. size = boot_params.hdr.ramdisk_size;
  602. start = (size ? boot_params.hdr.ramdisk_image + PAGE_OFFSET : 0);
  603. _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
  604. #endif
  605. }
  606. void load_ucode_intel_ap(void)
  607. {
  608. unsigned long *mc_saved_in_initrd_p;
  609. struct mc_saved_data *mcs_p;
  610. struct ucode_cpu_info uci;
  611. enum ucode_state ret;
  612. #ifdef CONFIG_X86_32
  613. mc_saved_in_initrd_p = (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
  614. mcs_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
  615. #else
  616. mc_saved_in_initrd_p = mc_saved_in_initrd;
  617. mcs_p = &mc_saved_data;
  618. #endif
  619. /*
  620. * If there is no valid ucode previously saved in memory, no need to
  621. * update ucode on this AP.
  622. */
  623. if (mcs_p->mc_saved_count == 0)
  624. return;
  625. collect_cpu_info_early(&uci);
  626. ret = load_microcode(mcs_p, mc_saved_in_initrd_p,
  627. get_initrd_start_addr(), &uci);
  628. if (ret != UCODE_OK)
  629. return;
  630. apply_microcode_early(&uci, true);
  631. }
  632. void reload_ucode_intel(void)
  633. {
  634. struct ucode_cpu_info uci;
  635. enum ucode_state ret;
  636. if (!mc_saved_data.mc_saved_count)
  637. return;
  638. collect_cpu_info_early(&uci);
  639. ret = load_microcode_early(mc_saved_data.mc_saved,
  640. mc_saved_data.mc_saved_count, &uci);
  641. if (ret != UCODE_OK)
  642. return;
  643. apply_microcode_early(&uci, false);
  644. }
  645. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  646. {
  647. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  648. unsigned int val[2];
  649. memset(csig, 0, sizeof(*csig));
  650. csig->sig = cpuid_eax(0x00000001);
  651. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  652. /* get processor flags from MSR 0x17 */
  653. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  654. csig->pf = 1 << ((val[1] >> 18) & 7);
  655. }
  656. csig->rev = c->microcode;
  657. pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
  658. cpu_num, csig->sig, csig->pf, csig->rev);
  659. return 0;
  660. }
  661. /*
  662. * return 0 - no update found
  663. * return 1 - found update
  664. */
  665. static int get_matching_mc(struct microcode_intel *mc_intel, int cpu)
  666. {
  667. struct cpu_signature cpu_sig;
  668. unsigned int csig, cpf, crev;
  669. collect_cpu_info(cpu, &cpu_sig);
  670. csig = cpu_sig.sig;
  671. cpf = cpu_sig.pf;
  672. crev = cpu_sig.rev;
  673. return has_newer_microcode(mc_intel, csig, cpf, crev);
  674. }
  675. static int apply_microcode_intel(int cpu)
  676. {
  677. struct microcode_intel *mc_intel;
  678. struct ucode_cpu_info *uci;
  679. unsigned int val[2];
  680. int cpu_num = raw_smp_processor_id();
  681. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  682. uci = ucode_cpu_info + cpu;
  683. mc_intel = uci->mc;
  684. /* We should bind the task to the CPU */
  685. BUG_ON(cpu_num != cpu);
  686. if (mc_intel == NULL)
  687. return 0;
  688. /*
  689. * Microcode on this CPU could be updated earlier. Only apply the
  690. * microcode patch in mc_intel when it is newer than the one on this
  691. * CPU.
  692. */
  693. if (get_matching_mc(mc_intel, cpu) == 0)
  694. return 0;
  695. /* write microcode via MSR 0x79 */
  696. wrmsr(MSR_IA32_UCODE_WRITE,
  697. (unsigned long) mc_intel->bits,
  698. (unsigned long) mc_intel->bits >> 16 >> 16);
  699. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  700. /* As documented in the SDM: Do a CPUID 1 here */
  701. sync_core();
  702. /* get the current revision from MSR 0x8B */
  703. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  704. if (val[1] != mc_intel->hdr.rev) {
  705. pr_err("CPU%d update to revision 0x%x failed\n",
  706. cpu_num, mc_intel->hdr.rev);
  707. return -1;
  708. }
  709. pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
  710. cpu_num, val[1],
  711. mc_intel->hdr.date & 0xffff,
  712. mc_intel->hdr.date >> 24,
  713. (mc_intel->hdr.date >> 16) & 0xff);
  714. uci->cpu_sig.rev = val[1];
  715. c->microcode = val[1];
  716. return 0;
  717. }
  718. static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
  719. int (*get_ucode_data)(void *, const void *, size_t))
  720. {
  721. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  722. u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
  723. int new_rev = uci->cpu_sig.rev;
  724. unsigned int leftover = size;
  725. enum ucode_state state = UCODE_OK;
  726. unsigned int curr_mc_size = 0;
  727. unsigned int csig, cpf;
  728. while (leftover) {
  729. struct microcode_header_intel mc_header;
  730. unsigned int mc_size;
  731. if (leftover < sizeof(mc_header)) {
  732. pr_err("error! Truncated header in microcode data file\n");
  733. break;
  734. }
  735. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  736. break;
  737. mc_size = get_totalsize(&mc_header);
  738. if (!mc_size || mc_size > leftover) {
  739. pr_err("error! Bad data in microcode data file\n");
  740. break;
  741. }
  742. /* For performance reasons, reuse mc area when possible */
  743. if (!mc || mc_size > curr_mc_size) {
  744. vfree(mc);
  745. mc = vmalloc(mc_size);
  746. if (!mc)
  747. break;
  748. curr_mc_size = mc_size;
  749. }
  750. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  751. microcode_sanity_check(mc, 1) < 0) {
  752. break;
  753. }
  754. csig = uci->cpu_sig.sig;
  755. cpf = uci->cpu_sig.pf;
  756. if (has_newer_microcode(mc, csig, cpf, new_rev)) {
  757. vfree(new_mc);
  758. new_rev = mc_header.rev;
  759. new_mc = mc;
  760. mc = NULL; /* trigger new vmalloc */
  761. }
  762. ucode_ptr += mc_size;
  763. leftover -= mc_size;
  764. }
  765. vfree(mc);
  766. if (leftover) {
  767. vfree(new_mc);
  768. state = UCODE_ERROR;
  769. goto out;
  770. }
  771. if (!new_mc) {
  772. state = UCODE_NFOUND;
  773. goto out;
  774. }
  775. vfree(uci->mc);
  776. uci->mc = (struct microcode_intel *)new_mc;
  777. /*
  778. * If early loading microcode is supported, save this mc into
  779. * permanent memory. So it will be loaded early when a CPU is hot added
  780. * or resumes.
  781. */
  782. save_mc_for_early(new_mc);
  783. pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
  784. cpu, new_rev, uci->cpu_sig.rev);
  785. out:
  786. return state;
  787. }
  788. static int get_ucode_fw(void *to, const void *from, size_t n)
  789. {
  790. memcpy(to, from, n);
  791. return 0;
  792. }
  793. static enum ucode_state request_microcode_fw(int cpu, struct device *device,
  794. bool refresh_fw)
  795. {
  796. char name[30];
  797. struct cpuinfo_x86 *c = &cpu_data(cpu);
  798. const struct firmware *firmware;
  799. enum ucode_state ret;
  800. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  801. c->x86, c->x86_model, c->x86_mask);
  802. if (request_firmware_direct(&firmware, name, device)) {
  803. pr_debug("data file %s load failed\n", name);
  804. return UCODE_NFOUND;
  805. }
  806. ret = generic_load_microcode(cpu, (void *)firmware->data,
  807. firmware->size, &get_ucode_fw);
  808. release_firmware(firmware);
  809. return ret;
  810. }
  811. static int get_ucode_user(void *to, const void *from, size_t n)
  812. {
  813. return copy_from_user(to, from, n);
  814. }
  815. static enum ucode_state
  816. request_microcode_user(int cpu, const void __user *buf, size_t size)
  817. {
  818. return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
  819. }
  820. static void microcode_fini_cpu(int cpu)
  821. {
  822. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  823. vfree(uci->mc);
  824. uci->mc = NULL;
  825. }
  826. static struct microcode_ops microcode_intel_ops = {
  827. .request_microcode_user = request_microcode_user,
  828. .request_microcode_fw = request_microcode_fw,
  829. .collect_cpu_info = collect_cpu_info,
  830. .apply_microcode = apply_microcode_intel,
  831. .microcode_fini_cpu = microcode_fini_cpu,
  832. };
  833. struct microcode_ops * __init init_intel_microcode(void)
  834. {
  835. struct cpuinfo_x86 *c = &boot_cpu_data;
  836. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  837. cpu_has(c, X86_FEATURE_IA64)) {
  838. pr_err("Intel CPU family 0x%x not supported\n", c->x86);
  839. return NULL;
  840. }
  841. return &microcode_intel_ops;
  842. }