viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/major.h>
  32. #include <linux/module.h>
  33. #include <linux/pm.h>
  34. #include <linux/sched.h>
  35. #include <linux/gpio.h>
  36. #include <linux/jiffies.h>
  37. #include <linux/i2c-gpio.h>
  38. #include <linux/i2c/pxa-i2c.h>
  39. #include <linux/serial_8250.h>
  40. #include <linux/smc91x.h>
  41. #include <linux/pwm_backlight.h>
  42. #include <linux/usb/isp116x.h>
  43. #include <linux/mtd/mtd.h>
  44. #include <linux/mtd/partitions.h>
  45. #include <linux/mtd/physmap.h>
  46. #include <linux/syscore_ops.h>
  47. #include <mach/pxa25x.h>
  48. #include <mach/audio.h>
  49. #include <linux/platform_data/video-pxafb.h>
  50. #include <mach/regs-uart.h>
  51. #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
  52. #include <mach/viper.h>
  53. #include <asm/setup.h>
  54. #include <asm/mach-types.h>
  55. #include <asm/irq.h>
  56. #include <asm/sizes.h>
  57. #include <asm/system_info.h>
  58. #include <asm/mach/arch.h>
  59. #include <asm/mach/map.h>
  60. #include <asm/mach/irq.h>
  61. #include "generic.h"
  62. #include "devices.h"
  63. static unsigned int icr;
  64. static void viper_icr_set_bit(unsigned int bit)
  65. {
  66. icr |= bit;
  67. VIPER_ICR = icr;
  68. }
  69. static void viper_icr_clear_bit(unsigned int bit)
  70. {
  71. icr &= ~bit;
  72. VIPER_ICR = icr;
  73. }
  74. /* This function is used from the pcmcia module to reset the CF */
  75. static void viper_cf_reset(int state)
  76. {
  77. if (state)
  78. viper_icr_set_bit(VIPER_ICR_CF_RST);
  79. else
  80. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  81. }
  82. static struct arcom_pcmcia_pdata viper_pcmcia_info = {
  83. .cd_gpio = VIPER_CF_CD_GPIO,
  84. .rdy_gpio = VIPER_CF_RDY_GPIO,
  85. .pwr_gpio = VIPER_CF_POWER_GPIO,
  86. .reset = viper_cf_reset,
  87. };
  88. static struct platform_device viper_pcmcia_device = {
  89. .name = "viper-pcmcia",
  90. .id = -1,
  91. .dev = {
  92. .platform_data = &viper_pcmcia_info,
  93. },
  94. };
  95. /*
  96. * The CPLD version register was not present on VIPER boards prior to
  97. * v2i1. On v1 boards where the version register is not present we
  98. * will just read back the previous value from the databus.
  99. *
  100. * Therefore we do two reads. The first time we write 0 to the
  101. * (read-only) register before reading and the second time we write
  102. * 0xff first. If the two reads do not match or they read back as 0xff
  103. * or 0x00 then we have version 1 hardware.
  104. */
  105. static u8 viper_hw_version(void)
  106. {
  107. u8 v1, v2;
  108. unsigned long flags;
  109. local_irq_save(flags);
  110. VIPER_VERSION = 0;
  111. v1 = VIPER_VERSION;
  112. VIPER_VERSION = 0xff;
  113. v2 = VIPER_VERSION;
  114. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  115. local_irq_restore(flags);
  116. return v1;
  117. }
  118. /* CPU system core operations. */
  119. static int viper_cpu_suspend(void)
  120. {
  121. viper_icr_set_bit(VIPER_ICR_R_DIS);
  122. return 0;
  123. }
  124. static void viper_cpu_resume(void)
  125. {
  126. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  127. }
  128. static struct syscore_ops viper_cpu_syscore_ops = {
  129. .suspend = viper_cpu_suspend,
  130. .resume = viper_cpu_resume,
  131. };
  132. static unsigned int current_voltage_divisor;
  133. /*
  134. * If force is not true then step from existing to new divisor. If
  135. * force is true then jump straight to the new divisor. Stepping is
  136. * used because if the jump in voltage is too large, the VCC can dip
  137. * too low and the regulator cuts out.
  138. *
  139. * force can be used to initialize the divisor to a know state by
  140. * setting the value for the current clock speed, since we are already
  141. * running at that speed we know the voltage should be pretty close so
  142. * the jump won't be too large
  143. */
  144. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  145. {
  146. int i = 0;
  147. unsigned int divisor = 0;
  148. const char *v;
  149. if (khz < 200000) {
  150. v = "1.0"; divisor = 0xfff;
  151. } else if (khz < 300000) {
  152. v = "1.1"; divisor = 0xde5;
  153. } else {
  154. v = "1.3"; divisor = 0x325;
  155. }
  156. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  157. v, (int)khz / 1000, (int)khz % 1000);
  158. #define STEP 0x100
  159. do {
  160. int step;
  161. if (force)
  162. step = divisor;
  163. else if (current_voltage_divisor < divisor - STEP)
  164. step = current_voltage_divisor + STEP;
  165. else if (current_voltage_divisor > divisor + STEP)
  166. step = current_voltage_divisor - STEP;
  167. else
  168. step = divisor;
  169. force = 0;
  170. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  171. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  172. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  173. udelay(1);
  174. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  175. udelay(1);
  176. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  177. udelay(1);
  178. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  179. }
  180. udelay(1);
  181. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  182. udelay(1);
  183. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  184. current_voltage_divisor = step;
  185. } while (current_voltage_divisor != divisor);
  186. }
  187. /* Interrupt handling */
  188. static unsigned long viper_irq_enabled_mask;
  189. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  190. static const int viper_isa_irq_map[] = {
  191. 0, /* ISA irq #0, invalid */
  192. 0, /* ISA irq #1, invalid */
  193. 0, /* ISA irq #2, invalid */
  194. 1 << 0, /* ISA irq #3 */
  195. 1 << 1, /* ISA irq #4 */
  196. 1 << 2, /* ISA irq #5 */
  197. 1 << 3, /* ISA irq #6 */
  198. 1 << 4, /* ISA irq #7 */
  199. 0, /* ISA irq #8, invalid */
  200. 1 << 8, /* ISA irq #9 */
  201. 1 << 5, /* ISA irq #10 */
  202. 1 << 6, /* ISA irq #11 */
  203. 1 << 7, /* ISA irq #12 */
  204. 0, /* ISA irq #13, invalid */
  205. 1 << 9, /* ISA irq #14 */
  206. 1 << 10, /* ISA irq #15 */
  207. };
  208. static inline int viper_irq_to_bitmask(unsigned int irq)
  209. {
  210. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  211. }
  212. static inline int viper_bit_to_irq(int bit)
  213. {
  214. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  215. }
  216. static void viper_ack_irq(struct irq_data *d)
  217. {
  218. int viper_irq = viper_irq_to_bitmask(d->irq);
  219. if (viper_irq & 0xff)
  220. VIPER_LO_IRQ_STATUS = viper_irq;
  221. else
  222. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  223. }
  224. static void viper_mask_irq(struct irq_data *d)
  225. {
  226. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq));
  227. }
  228. static void viper_unmask_irq(struct irq_data *d)
  229. {
  230. viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq);
  231. }
  232. static inline unsigned long viper_irq_pending(void)
  233. {
  234. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  235. viper_irq_enabled_mask;
  236. }
  237. static void viper_irq_handler(struct irq_desc *desc)
  238. {
  239. unsigned int irq;
  240. unsigned long pending;
  241. pending = viper_irq_pending();
  242. do {
  243. /* we're in a chained irq handler,
  244. * so ack the interrupt by hand */
  245. desc->irq_data.chip->irq_ack(&desc->irq_data);
  246. if (likely(pending)) {
  247. irq = viper_bit_to_irq(__ffs(pending));
  248. generic_handle_irq(irq);
  249. }
  250. pending = viper_irq_pending();
  251. } while (pending);
  252. }
  253. static struct irq_chip viper_irq_chip = {
  254. .name = "ISA",
  255. .irq_ack = viper_ack_irq,
  256. .irq_mask = viper_mask_irq,
  257. .irq_unmask = viper_unmask_irq
  258. };
  259. static void __init viper_init_irq(void)
  260. {
  261. int level;
  262. int isa_irq;
  263. pxa25x_init_irq();
  264. /* setup ISA IRQs */
  265. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  266. isa_irq = viper_bit_to_irq(level);
  267. irq_set_chip_and_handler(isa_irq, &viper_irq_chip,
  268. handle_edge_irq);
  269. irq_clear_status_flags(isa_irq, IRQ_NOREQUEST | IRQ_NOPROBE);
  270. }
  271. irq_set_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  272. viper_irq_handler);
  273. irq_set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  274. }
  275. /* Flat Panel */
  276. static struct pxafb_mode_info fb_mode_info[] = {
  277. {
  278. .pixclock = 157500,
  279. .xres = 320,
  280. .yres = 240,
  281. .bpp = 16,
  282. .hsync_len = 63,
  283. .left_margin = 7,
  284. .right_margin = 13,
  285. .vsync_len = 20,
  286. .upper_margin = 0,
  287. .lower_margin = 0,
  288. .sync = 0,
  289. },
  290. };
  291. static struct pxafb_mach_info fb_info = {
  292. .modes = fb_mode_info,
  293. .num_modes = 1,
  294. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  295. };
  296. static int viper_backlight_init(struct device *dev)
  297. {
  298. int ret;
  299. /* GPIO9 and 10 control FB backlight. Initialise to off */
  300. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  301. if (ret)
  302. goto err_request_bckl;
  303. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  304. if (ret)
  305. goto err_request_lcd;
  306. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  307. if (ret)
  308. goto err_dir;
  309. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  310. if (ret)
  311. goto err_dir;
  312. return 0;
  313. err_dir:
  314. gpio_free(VIPER_LCD_EN_GPIO);
  315. err_request_lcd:
  316. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  317. err_request_bckl:
  318. dev_err(dev, "Failed to setup LCD GPIOs\n");
  319. return ret;
  320. }
  321. static int viper_backlight_notify(struct device *dev, int brightness)
  322. {
  323. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  324. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  325. return brightness;
  326. }
  327. static void viper_backlight_exit(struct device *dev)
  328. {
  329. gpio_free(VIPER_LCD_EN_GPIO);
  330. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  331. }
  332. static struct platform_pwm_backlight_data viper_backlight_data = {
  333. .pwm_id = 0,
  334. .max_brightness = 100,
  335. .dft_brightness = 100,
  336. .pwm_period_ns = 1000000,
  337. .enable_gpio = -1,
  338. .init = viper_backlight_init,
  339. .notify = viper_backlight_notify,
  340. .exit = viper_backlight_exit,
  341. };
  342. static struct platform_device viper_backlight_device = {
  343. .name = "pwm-backlight",
  344. .dev = {
  345. .parent = &pxa25x_device_pwm0.dev,
  346. .platform_data = &viper_backlight_data,
  347. },
  348. };
  349. /* Ethernet */
  350. static struct resource smc91x_resources[] = {
  351. [0] = {
  352. .name = "smc91x-regs",
  353. .start = VIPER_ETH_PHYS + 0x300,
  354. .end = VIPER_ETH_PHYS + 0x30f,
  355. .flags = IORESOURCE_MEM,
  356. },
  357. [1] = {
  358. .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
  359. .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
  360. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  361. },
  362. [2] = {
  363. .name = "smc91x-data32",
  364. .start = VIPER_ETH_DATA_PHYS,
  365. .end = VIPER_ETH_DATA_PHYS + 3,
  366. .flags = IORESOURCE_MEM,
  367. },
  368. };
  369. static struct smc91x_platdata viper_smc91x_info = {
  370. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  371. .leda = RPC_LED_100_10,
  372. .ledb = RPC_LED_TX_RX,
  373. };
  374. static struct platform_device smc91x_device = {
  375. .name = "smc91x",
  376. .id = -1,
  377. .num_resources = ARRAY_SIZE(smc91x_resources),
  378. .resource = smc91x_resources,
  379. .dev = {
  380. .platform_data = &viper_smc91x_info,
  381. },
  382. };
  383. /* i2c */
  384. static struct i2c_gpio_platform_data i2c_bus_data = {
  385. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  386. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  387. .udelay = 10,
  388. .timeout = HZ,
  389. };
  390. static struct platform_device i2c_bus_device = {
  391. .name = "i2c-gpio",
  392. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  393. .dev = {
  394. .platform_data = &i2c_bus_data,
  395. }
  396. };
  397. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  398. {
  399. I2C_BOARD_INFO("ds1338", 0x68),
  400. },
  401. };
  402. /*
  403. * Serial configuration:
  404. * You can either have the standard PXA ports driven by the PXA driver,
  405. * or all the ports (PXA + 16850) driven by the 8250 driver.
  406. * Choose your poison.
  407. */
  408. static struct resource viper_serial_resources[] = {
  409. #ifndef CONFIG_SERIAL_PXA
  410. {
  411. .start = 0x40100000,
  412. .end = 0x4010001f,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = 0x40200000,
  417. .end = 0x4020001f,
  418. .flags = IORESOURCE_MEM,
  419. },
  420. {
  421. .start = 0x40700000,
  422. .end = 0x4070001f,
  423. .flags = IORESOURCE_MEM,
  424. },
  425. {
  426. .start = VIPER_UARTA_PHYS,
  427. .end = VIPER_UARTA_PHYS + 0xf,
  428. .flags = IORESOURCE_MEM,
  429. },
  430. {
  431. .start = VIPER_UARTB_PHYS,
  432. .end = VIPER_UARTB_PHYS + 0xf,
  433. .flags = IORESOURCE_MEM,
  434. },
  435. #else
  436. {
  437. 0,
  438. },
  439. #endif
  440. };
  441. static struct plat_serial8250_port serial_platform_data[] = {
  442. #ifndef CONFIG_SERIAL_PXA
  443. /* Internal UARTs */
  444. {
  445. .membase = (void *)&FFUART,
  446. .mapbase = __PREG(FFUART),
  447. .irq = IRQ_FFUART,
  448. .uartclk = 921600 * 16,
  449. .regshift = 2,
  450. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  451. .iotype = UPIO_MEM,
  452. },
  453. {
  454. .membase = (void *)&BTUART,
  455. .mapbase = __PREG(BTUART),
  456. .irq = IRQ_BTUART,
  457. .uartclk = 921600 * 16,
  458. .regshift = 2,
  459. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  460. .iotype = UPIO_MEM,
  461. },
  462. {
  463. .membase = (void *)&STUART,
  464. .mapbase = __PREG(STUART),
  465. .irq = IRQ_STUART,
  466. .uartclk = 921600 * 16,
  467. .regshift = 2,
  468. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  469. .iotype = UPIO_MEM,
  470. },
  471. /* External UARTs */
  472. {
  473. .mapbase = VIPER_UARTA_PHYS,
  474. .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
  475. .irqflags = IRQF_TRIGGER_RISING,
  476. .uartclk = 1843200,
  477. .regshift = 1,
  478. .iotype = UPIO_MEM,
  479. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  480. UPF_SKIP_TEST,
  481. },
  482. {
  483. .mapbase = VIPER_UARTB_PHYS,
  484. .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
  485. .irqflags = IRQF_TRIGGER_RISING,
  486. .uartclk = 1843200,
  487. .regshift = 1,
  488. .iotype = UPIO_MEM,
  489. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  490. UPF_SKIP_TEST,
  491. },
  492. #endif
  493. { },
  494. };
  495. static struct platform_device serial_device = {
  496. .name = "serial8250",
  497. .id = 0,
  498. .dev = {
  499. .platform_data = serial_platform_data,
  500. },
  501. .num_resources = ARRAY_SIZE(viper_serial_resources),
  502. .resource = viper_serial_resources,
  503. };
  504. /* USB */
  505. static void isp116x_delay(struct device *dev, int delay)
  506. {
  507. ndelay(delay);
  508. }
  509. static struct resource isp116x_resources[] = {
  510. [0] = { /* DATA */
  511. .start = VIPER_USB_PHYS + 0,
  512. .end = VIPER_USB_PHYS + 1,
  513. .flags = IORESOURCE_MEM,
  514. },
  515. [1] = { /* ADDR */
  516. .start = VIPER_USB_PHYS + 2,
  517. .end = VIPER_USB_PHYS + 3,
  518. .flags = IORESOURCE_MEM,
  519. },
  520. [2] = {
  521. .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
  522. .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
  523. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  524. },
  525. };
  526. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  527. static struct isp116x_platform_data isp116x_platform_data = {
  528. /* Enable internal resistors on downstream ports */
  529. .sel15Kres = 1,
  530. /* On-chip overcurrent protection */
  531. .oc_enable = 1,
  532. /* INT output polarity */
  533. .int_act_high = 1,
  534. /* INT edge or level triggered */
  535. .int_edge_triggered = 0,
  536. /* WAKEUP pin connected - NOT SUPPORTED */
  537. /* .remote_wakeup_connected = 0, */
  538. /* Wakeup by devices on usb bus enabled */
  539. .remote_wakeup_enable = 0,
  540. .delay = isp116x_delay,
  541. };
  542. static struct platform_device isp116x_device = {
  543. .name = "isp116x-hcd",
  544. .id = -1,
  545. .num_resources = ARRAY_SIZE(isp116x_resources),
  546. .resource = isp116x_resources,
  547. .dev = {
  548. .platform_data = &isp116x_platform_data,
  549. },
  550. };
  551. /* MTD */
  552. static struct resource mtd_resources[] = {
  553. [0] = { /* RedBoot config + filesystem flash */
  554. .start = VIPER_FLASH_PHYS,
  555. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  556. .flags = IORESOURCE_MEM,
  557. },
  558. [1] = { /* Boot flash */
  559. .start = VIPER_BOOT_PHYS,
  560. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  561. .flags = IORESOURCE_MEM,
  562. },
  563. [2] = { /*
  564. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  565. * (each byte is on a 16bit boundary).
  566. */
  567. .start = _VIPER_SRAM_BASE,
  568. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  569. .flags = IORESOURCE_MEM,
  570. },
  571. };
  572. static struct mtd_partition viper_boot_flash_partition = {
  573. .name = "RedBoot",
  574. .size = SZ_1M,
  575. .offset = 0,
  576. .mask_flags = MTD_WRITEABLE, /* force R/O */
  577. };
  578. static struct physmap_flash_data viper_flash_data[] = {
  579. [0] = {
  580. .width = 2,
  581. .parts = NULL,
  582. .nr_parts = 0,
  583. },
  584. [1] = {
  585. .width = 2,
  586. .parts = &viper_boot_flash_partition,
  587. .nr_parts = 1,
  588. },
  589. };
  590. static struct platform_device viper_mtd_devices[] = {
  591. [0] = {
  592. .name = "physmap-flash",
  593. .id = 0,
  594. .dev = {
  595. .platform_data = &viper_flash_data[0],
  596. },
  597. .resource = &mtd_resources[0],
  598. .num_resources = 1,
  599. },
  600. [1] = {
  601. .name = "physmap-flash",
  602. .id = 1,
  603. .dev = {
  604. .platform_data = &viper_flash_data[1],
  605. },
  606. .resource = &mtd_resources[1],
  607. .num_resources = 1,
  608. },
  609. };
  610. static struct platform_device *viper_devs[] __initdata = {
  611. &smc91x_device,
  612. &i2c_bus_device,
  613. &serial_device,
  614. &isp116x_device,
  615. &viper_mtd_devices[0],
  616. &viper_mtd_devices[1],
  617. &viper_backlight_device,
  618. &viper_pcmcia_device,
  619. };
  620. static mfp_cfg_t viper_pin_config[] __initdata = {
  621. /* Chip selects */
  622. GPIO15_nCS_1,
  623. GPIO78_nCS_2,
  624. GPIO79_nCS_3,
  625. GPIO80_nCS_4,
  626. GPIO33_nCS_5,
  627. /* AC97 */
  628. GPIO28_AC97_BITCLK,
  629. GPIO29_AC97_SDATA_IN_0,
  630. GPIO30_AC97_SDATA_OUT,
  631. GPIO31_AC97_SYNC,
  632. /* FP Backlight */
  633. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  634. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  635. GPIO16_PWM0_OUT,
  636. /* Ethernet PHY Ready */
  637. GPIO18_RDY,
  638. /* Serial shutdown */
  639. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  640. /* Compact-Flash / PC104 */
  641. GPIO48_nPOE,
  642. GPIO49_nPWE,
  643. GPIO50_nPIOR,
  644. GPIO51_nPIOW,
  645. GPIO52_nPCE_1,
  646. GPIO53_nPCE_2,
  647. GPIO54_nPSKTSEL,
  648. GPIO55_nPREG,
  649. GPIO56_nPWAIT,
  650. GPIO57_nIOIS16,
  651. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  652. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  653. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  654. /* Integrated UPS control */
  655. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  656. /* Vcc regulator control */
  657. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  658. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  659. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  660. /* i2c busses */
  661. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  662. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  663. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  664. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  665. /* PC/104 Interrupt */
  666. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  667. };
  668. static unsigned long viper_tpm;
  669. static int __init viper_tpm_setup(char *str)
  670. {
  671. return kstrtoul(str, 10, &viper_tpm) >= 0;
  672. }
  673. __setup("tpm=", viper_tpm_setup);
  674. static void __init viper_tpm_init(void)
  675. {
  676. struct platform_device *tpm_device;
  677. struct i2c_gpio_platform_data i2c_tpm_data = {
  678. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  679. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  680. .udelay = 10,
  681. .timeout = HZ,
  682. };
  683. char *errstr;
  684. /* Allocate TPM i2c bus if requested */
  685. if (!viper_tpm)
  686. return;
  687. tpm_device = platform_device_alloc("i2c-gpio", 2);
  688. if (tpm_device) {
  689. if (!platform_device_add_data(tpm_device,
  690. &i2c_tpm_data,
  691. sizeof(i2c_tpm_data))) {
  692. if (platform_device_add(tpm_device)) {
  693. errstr = "register TPM i2c bus";
  694. goto error_free_tpm;
  695. }
  696. } else {
  697. errstr = "allocate TPM i2c bus data";
  698. goto error_free_tpm;
  699. }
  700. } else {
  701. errstr = "allocate TPM i2c device";
  702. goto error_tpm;
  703. }
  704. return;
  705. error_free_tpm:
  706. kfree(tpm_device);
  707. error_tpm:
  708. pr_err("viper: Couldn't %s, giving up\n", errstr);
  709. }
  710. static void __init viper_init_vcore_gpios(void)
  711. {
  712. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  713. goto err_request_data;
  714. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  715. goto err_request_clk;
  716. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  717. goto err_request_cs;
  718. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  719. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  720. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  721. goto err_dir;
  722. /* c/should assume redboot set the correct level ??? */
  723. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  724. return;
  725. err_dir:
  726. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  727. err_request_cs:
  728. gpio_free(VIPER_PSU_CLK_GPIO);
  729. err_request_clk:
  730. gpio_free(VIPER_PSU_DATA_GPIO);
  731. err_request_data:
  732. pr_err("viper: Failed to setup vcore control GPIOs\n");
  733. }
  734. static void __init viper_init_serial_gpio(void)
  735. {
  736. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  737. goto err_request;
  738. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  739. goto err_dir;
  740. return;
  741. err_dir:
  742. gpio_free(VIPER_UART_SHDN_GPIO);
  743. err_request:
  744. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  745. }
  746. #ifdef CONFIG_CPU_FREQ
  747. static int viper_cpufreq_notifier(struct notifier_block *nb,
  748. unsigned long val, void *data)
  749. {
  750. struct cpufreq_freqs *freq = data;
  751. /* TODO: Adjust timings??? */
  752. switch (val) {
  753. case CPUFREQ_PRECHANGE:
  754. if (freq->old < freq->new) {
  755. /* we are getting faster so raise the voltage
  756. * before we change freq */
  757. viper_set_core_cpu_voltage(freq->new, 0);
  758. }
  759. break;
  760. case CPUFREQ_POSTCHANGE:
  761. if (freq->old > freq->new) {
  762. /* we are slowing down so drop the power
  763. * after we change freq */
  764. viper_set_core_cpu_voltage(freq->new, 0);
  765. }
  766. break;
  767. default:
  768. /* ignore */
  769. break;
  770. }
  771. return 0;
  772. }
  773. static struct notifier_block viper_cpufreq_notifier_block = {
  774. .notifier_call = viper_cpufreq_notifier
  775. };
  776. static void __init viper_init_cpufreq(void)
  777. {
  778. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  779. CPUFREQ_TRANSITION_NOTIFIER))
  780. pr_err("viper: Failed to setup cpufreq notifier\n");
  781. }
  782. #else
  783. static inline void viper_init_cpufreq(void) {}
  784. #endif
  785. static void viper_power_off(void)
  786. {
  787. pr_notice("Shutting off UPS\n");
  788. gpio_set_value(VIPER_UPS_GPIO, 1);
  789. /* Spin to death... */
  790. while (1);
  791. }
  792. static void __init viper_init(void)
  793. {
  794. u8 version;
  795. pm_power_off = viper_power_off;
  796. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  797. pxa_set_ffuart_info(NULL);
  798. pxa_set_btuart_info(NULL);
  799. pxa_set_stuart_info(NULL);
  800. /* Wake-up serial console */
  801. viper_init_serial_gpio();
  802. pxa_set_fb_info(NULL, &fb_info);
  803. /* v1 hardware cannot use the datacs line */
  804. version = viper_hw_version();
  805. if (version == 0)
  806. smc91x_device.num_resources--;
  807. pxa_set_i2c_info(NULL);
  808. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  809. viper_init_vcore_gpios();
  810. viper_init_cpufreq();
  811. register_syscore_ops(&viper_cpu_syscore_ops);
  812. if (version) {
  813. pr_info("viper: hardware v%di%d detected. "
  814. "CPLD revision %d.\n",
  815. VIPER_BOARD_VERSION(version),
  816. VIPER_BOARD_ISSUE(version),
  817. VIPER_CPLD_REVISION(version));
  818. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  819. (VIPER_BOARD_ISSUE(version) << 4) |
  820. VIPER_CPLD_REVISION(version);
  821. } else {
  822. pr_info("viper: No version register.\n");
  823. }
  824. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  825. viper_tpm_init();
  826. pxa_set_ac97_info(NULL);
  827. }
  828. static struct map_desc viper_io_desc[] __initdata = {
  829. {
  830. .virtual = VIPER_CPLD_BASE,
  831. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  832. .length = 0x00300000,
  833. .type = MT_DEVICE,
  834. },
  835. {
  836. .virtual = VIPER_PC104IO_BASE,
  837. .pfn = __phys_to_pfn(0x30000000),
  838. .length = 0x00800000,
  839. .type = MT_DEVICE,
  840. },
  841. };
  842. static void __init viper_map_io(void)
  843. {
  844. pxa25x_map_io();
  845. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  846. PCFR |= PCFR_OPDE;
  847. }
  848. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  849. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  850. .atag_offset = 0x100,
  851. .map_io = viper_map_io,
  852. .nr_irqs = PXA_NR_IRQS,
  853. .init_irq = viper_init_irq,
  854. .handle_irq = pxa25x_handle_irq,
  855. .init_time = pxa_timer_init,
  856. .init_machine = viper_init,
  857. .restart = pxa_restart,
  858. MACHINE_END