amdgpu_vf_error.c 3.0 KB

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  1. /*
  2. * Copyright 2017 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #include "amdgpu.h"
  24. #include "amdgpu_vf_error.h"
  25. #include "mxgpu_ai.h"
  26. void amdgpu_vf_error_put(struct amdgpu_device *adev,
  27. uint16_t sub_error_code,
  28. uint16_t error_flags,
  29. uint64_t error_data)
  30. {
  31. int index;
  32. uint16_t error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code);
  33. mutex_lock(&adev->virt.vf_errors.lock);
  34. index = adev->virt.vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
  35. adev->virt.vf_errors.code [index] = error_code;
  36. adev->virt.vf_errors.flags [index] = error_flags;
  37. adev->virt.vf_errors.data [index] = error_data;
  38. adev->virt.vf_errors.write_count ++;
  39. mutex_unlock(&adev->virt.vf_errors.lock);
  40. }
  41. void amdgpu_vf_error_trans_all(struct amdgpu_device *adev)
  42. {
  43. /* u32 pf2vf_flags = 0; */
  44. u32 data1, data2, data3;
  45. int index;
  46. if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) ||
  47. (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
  48. return;
  49. }
  50. /*
  51. TODO: Enable these code when pv2vf_info is merged
  52. AMDGPU_FW_VRAM_PF2VF_READ (adev, feature_flags, &pf2vf_flags);
  53. if (!(pf2vf_flags & AMDGIM_FEATURE_ERROR_LOG_COLLECT)) {
  54. return;
  55. }
  56. */
  57. mutex_lock(&adev->virt.vf_errors.lock);
  58. /* The errors are overlay of array, correct read_count as full. */
  59. if (adev->virt.vf_errors.write_count - adev->virt.vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) {
  60. adev->virt.vf_errors.read_count = adev->virt.vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE;
  61. }
  62. while (adev->virt.vf_errors.read_count < adev->virt.vf_errors.write_count) {
  63. index =adev->virt.vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
  64. data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX(adev->virt.vf_errors.code[index],
  65. adev->virt.vf_errors.flags[index]);
  66. data2 = adev->virt.vf_errors.data[index] & 0xFFFFFFFF;
  67. data3 = (adev->virt.vf_errors.data[index] >> 32) & 0xFFFFFFFF;
  68. adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);
  69. adev->virt.vf_errors.read_count ++;
  70. }
  71. mutex_unlock(&adev->virt.vf_errors.lock);
  72. }