amdgpu_vram_mgr.c 8.2 KB

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  1. /*
  2. * Copyright 2016 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Christian König
  23. */
  24. #include <drm/drmP.h>
  25. #include "amdgpu.h"
  26. struct amdgpu_vram_mgr {
  27. struct drm_mm mm;
  28. spinlock_t lock;
  29. atomic64_t usage;
  30. atomic64_t vis_usage;
  31. };
  32. /**
  33. * amdgpu_vram_mgr_init - init VRAM manager and DRM MM
  34. *
  35. * @man: TTM memory type manager
  36. * @p_size: maximum size of VRAM
  37. *
  38. * Allocate and initialize the VRAM manager.
  39. */
  40. static int amdgpu_vram_mgr_init(struct ttm_mem_type_manager *man,
  41. unsigned long p_size)
  42. {
  43. struct amdgpu_vram_mgr *mgr;
  44. mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
  45. if (!mgr)
  46. return -ENOMEM;
  47. drm_mm_init(&mgr->mm, 0, p_size);
  48. spin_lock_init(&mgr->lock);
  49. man->priv = mgr;
  50. return 0;
  51. }
  52. /**
  53. * amdgpu_vram_mgr_fini - free and destroy VRAM manager
  54. *
  55. * @man: TTM memory type manager
  56. *
  57. * Destroy and free the VRAM manager, returns -EBUSY if ranges are still
  58. * allocated inside it.
  59. */
  60. static int amdgpu_vram_mgr_fini(struct ttm_mem_type_manager *man)
  61. {
  62. struct amdgpu_vram_mgr *mgr = man->priv;
  63. spin_lock(&mgr->lock);
  64. drm_mm_takedown(&mgr->mm);
  65. spin_unlock(&mgr->lock);
  66. kfree(mgr);
  67. man->priv = NULL;
  68. return 0;
  69. }
  70. /**
  71. * amdgpu_vram_mgr_vis_size - Calculate visible node size
  72. *
  73. * @adev: amdgpu device structure
  74. * @node: MM node structure
  75. *
  76. * Calculate how many bytes of the MM node are inside visible VRAM
  77. */
  78. static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev,
  79. struct drm_mm_node *node)
  80. {
  81. uint64_t start = node->start << PAGE_SHIFT;
  82. uint64_t end = (node->size + node->start) << PAGE_SHIFT;
  83. if (start >= adev->gmc.visible_vram_size)
  84. return 0;
  85. return (end > adev->gmc.visible_vram_size ?
  86. adev->gmc.visible_vram_size : end) - start;
  87. }
  88. /**
  89. * amdgpu_vram_mgr_bo_invisible_size - CPU invisible BO size
  90. *
  91. * @bo: &amdgpu_bo buffer object (must be in VRAM)
  92. *
  93. * Returns:
  94. * How much of the given &amdgpu_bo buffer object lies in CPU invisible VRAM.
  95. */
  96. u64 amdgpu_vram_mgr_bo_invisible_size(struct amdgpu_bo *bo)
  97. {
  98. struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
  99. struct ttm_mem_reg *mem = &bo->tbo.mem;
  100. struct drm_mm_node *nodes = mem->mm_node;
  101. unsigned pages = mem->num_pages;
  102. u64 usage = 0;
  103. if (amdgpu_gmc_vram_full_visible(&adev->gmc))
  104. return 0;
  105. if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT)
  106. return amdgpu_bo_size(bo);
  107. while (nodes && pages) {
  108. usage += nodes->size << PAGE_SHIFT;
  109. usage -= amdgpu_vram_mgr_vis_size(adev, nodes);
  110. pages -= nodes->size;
  111. ++nodes;
  112. }
  113. return usage;
  114. }
  115. /**
  116. * amdgpu_vram_mgr_new - allocate new ranges
  117. *
  118. * @man: TTM memory type manager
  119. * @tbo: TTM BO we need this range for
  120. * @place: placement flags and restrictions
  121. * @mem: the resulting mem object
  122. *
  123. * Allocate VRAM for the given BO.
  124. */
  125. static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
  126. struct ttm_buffer_object *tbo,
  127. const struct ttm_place *place,
  128. struct ttm_mem_reg *mem)
  129. {
  130. struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
  131. struct amdgpu_vram_mgr *mgr = man->priv;
  132. struct drm_mm *mm = &mgr->mm;
  133. struct drm_mm_node *nodes;
  134. enum drm_mm_insert_mode mode;
  135. unsigned long lpfn, num_nodes, pages_per_node, pages_left;
  136. uint64_t usage = 0, vis_usage = 0;
  137. unsigned i;
  138. int r;
  139. lpfn = place->lpfn;
  140. if (!lpfn)
  141. lpfn = man->size;
  142. if (place->flags & TTM_PL_FLAG_CONTIGUOUS ||
  143. amdgpu_vram_page_split == -1) {
  144. pages_per_node = ~0ul;
  145. num_nodes = 1;
  146. } else {
  147. pages_per_node = max((uint32_t)amdgpu_vram_page_split,
  148. mem->page_alignment);
  149. num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node);
  150. }
  151. nodes = kvmalloc_array(num_nodes, sizeof(*nodes),
  152. GFP_KERNEL | __GFP_ZERO);
  153. if (!nodes)
  154. return -ENOMEM;
  155. mode = DRM_MM_INSERT_BEST;
  156. if (place->flags & TTM_PL_FLAG_TOPDOWN)
  157. mode = DRM_MM_INSERT_HIGH;
  158. mem->start = 0;
  159. pages_left = mem->num_pages;
  160. spin_lock(&mgr->lock);
  161. for (i = 0; i < num_nodes; ++i) {
  162. unsigned long pages = min(pages_left, pages_per_node);
  163. uint32_t alignment = mem->page_alignment;
  164. unsigned long start;
  165. if (pages == pages_per_node)
  166. alignment = pages_per_node;
  167. r = drm_mm_insert_node_in_range(mm, &nodes[i],
  168. pages, alignment, 0,
  169. place->fpfn, lpfn,
  170. mode);
  171. if (unlikely(r))
  172. goto error;
  173. usage += nodes[i].size << PAGE_SHIFT;
  174. vis_usage += amdgpu_vram_mgr_vis_size(adev, &nodes[i]);
  175. /* Calculate a virtual BO start address to easily check if
  176. * everything is CPU accessible.
  177. */
  178. start = nodes[i].start + nodes[i].size;
  179. if (start > mem->num_pages)
  180. start -= mem->num_pages;
  181. else
  182. start = 0;
  183. mem->start = max(mem->start, start);
  184. pages_left -= pages;
  185. }
  186. spin_unlock(&mgr->lock);
  187. atomic64_add(usage, &mgr->usage);
  188. atomic64_add(vis_usage, &mgr->vis_usage);
  189. mem->mm_node = nodes;
  190. return 0;
  191. error:
  192. while (i--)
  193. drm_mm_remove_node(&nodes[i]);
  194. spin_unlock(&mgr->lock);
  195. kvfree(nodes);
  196. return r == -ENOSPC ? 0 : r;
  197. }
  198. /**
  199. * amdgpu_vram_mgr_del - free ranges
  200. *
  201. * @man: TTM memory type manager
  202. * @tbo: TTM BO we need this range for
  203. * @place: placement flags and restrictions
  204. * @mem: TTM memory object
  205. *
  206. * Free the allocated VRAM again.
  207. */
  208. static void amdgpu_vram_mgr_del(struct ttm_mem_type_manager *man,
  209. struct ttm_mem_reg *mem)
  210. {
  211. struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
  212. struct amdgpu_vram_mgr *mgr = man->priv;
  213. struct drm_mm_node *nodes = mem->mm_node;
  214. uint64_t usage = 0, vis_usage = 0;
  215. unsigned pages = mem->num_pages;
  216. if (!mem->mm_node)
  217. return;
  218. spin_lock(&mgr->lock);
  219. while (pages) {
  220. pages -= nodes->size;
  221. drm_mm_remove_node(nodes);
  222. usage += nodes->size << PAGE_SHIFT;
  223. vis_usage += amdgpu_vram_mgr_vis_size(adev, nodes);
  224. ++nodes;
  225. }
  226. spin_unlock(&mgr->lock);
  227. atomic64_sub(usage, &mgr->usage);
  228. atomic64_sub(vis_usage, &mgr->vis_usage);
  229. kvfree(mem->mm_node);
  230. mem->mm_node = NULL;
  231. }
  232. /**
  233. * amdgpu_vram_mgr_usage - how many bytes are used in this domain
  234. *
  235. * @man: TTM memory type manager
  236. *
  237. * Returns how many bytes are used in this domain.
  238. */
  239. uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man)
  240. {
  241. struct amdgpu_vram_mgr *mgr = man->priv;
  242. return atomic64_read(&mgr->usage);
  243. }
  244. /**
  245. * amdgpu_vram_mgr_vis_usage - how many bytes are used in the visible part
  246. *
  247. * @man: TTM memory type manager
  248. *
  249. * Returns how many bytes are used in the visible part of VRAM
  250. */
  251. uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man)
  252. {
  253. struct amdgpu_vram_mgr *mgr = man->priv;
  254. return atomic64_read(&mgr->vis_usage);
  255. }
  256. /**
  257. * amdgpu_vram_mgr_debug - dump VRAM table
  258. *
  259. * @man: TTM memory type manager
  260. * @printer: DRM printer to use
  261. *
  262. * Dump the table content using printk.
  263. */
  264. static void amdgpu_vram_mgr_debug(struct ttm_mem_type_manager *man,
  265. struct drm_printer *printer)
  266. {
  267. struct amdgpu_vram_mgr *mgr = man->priv;
  268. spin_lock(&mgr->lock);
  269. drm_mm_print(&mgr->mm, printer);
  270. spin_unlock(&mgr->lock);
  271. drm_printf(printer, "man size:%llu pages, ram usage:%lluMB, vis usage:%lluMB\n",
  272. man->size, amdgpu_vram_mgr_usage(man) >> 20,
  273. amdgpu_vram_mgr_vis_usage(man) >> 20);
  274. }
  275. const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func = {
  276. .init = amdgpu_vram_mgr_init,
  277. .takedown = amdgpu_vram_mgr_fini,
  278. .get_node = amdgpu_vram_mgr_new,
  279. .put_node = amdgpu_vram_mgr_del,
  280. .debug = amdgpu_vram_mgr_debug
  281. };