turbostat.c 79 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118
  1. /*
  2. * turbostat -- show CPU frequency and C-state residency
  3. * on modern Intel turbo-capable processors.
  4. *
  5. * Copyright (c) 2013 Intel Corporation.
  6. * Len Brown <len.brown@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms and conditions of the GNU General Public License,
  10. * version 2, as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  20. */
  21. #define _GNU_SOURCE
  22. #include MSRHEADER
  23. #include <stdarg.h>
  24. #include <stdio.h>
  25. #include <err.h>
  26. #include <unistd.h>
  27. #include <sys/types.h>
  28. #include <sys/wait.h>
  29. #include <sys/stat.h>
  30. #include <sys/resource.h>
  31. #include <fcntl.h>
  32. #include <signal.h>
  33. #include <sys/time.h>
  34. #include <stdlib.h>
  35. #include <getopt.h>
  36. #include <dirent.h>
  37. #include <string.h>
  38. #include <ctype.h>
  39. #include <sched.h>
  40. #include <cpuid.h>
  41. #include <linux/capability.h>
  42. #include <errno.h>
  43. char *proc_stat = "/proc/stat";
  44. unsigned int interval_sec = 5;
  45. unsigned int debug;
  46. unsigned int rapl_joules;
  47. unsigned int summary_only;
  48. unsigned int dump_only;
  49. unsigned int skip_c0;
  50. unsigned int skip_c1;
  51. unsigned int do_nhm_cstates;
  52. unsigned int do_snb_cstates;
  53. unsigned int do_knl_cstates;
  54. unsigned int do_pc2;
  55. unsigned int do_pc3;
  56. unsigned int do_pc6;
  57. unsigned int do_pc7;
  58. unsigned int do_c8_c9_c10;
  59. unsigned int do_skl_residency;
  60. unsigned int do_slm_cstates;
  61. unsigned int use_c1_residency_msr;
  62. unsigned int has_aperf;
  63. unsigned int has_epb;
  64. unsigned int units = 1000000; /* MHz etc */
  65. unsigned int genuine_intel;
  66. unsigned int has_invariant_tsc;
  67. unsigned int do_nhm_platform_info;
  68. unsigned int extra_msr_offset32;
  69. unsigned int extra_msr_offset64;
  70. unsigned int extra_delta_offset32;
  71. unsigned int extra_delta_offset64;
  72. int do_smi;
  73. double bclk;
  74. unsigned int show_pkg;
  75. unsigned int show_core;
  76. unsigned int show_cpu;
  77. unsigned int show_pkg_only;
  78. unsigned int show_core_only;
  79. char *output_buffer, *outp;
  80. unsigned int do_rapl;
  81. unsigned int do_dts;
  82. unsigned int do_ptm;
  83. unsigned int tcc_activation_temp;
  84. unsigned int tcc_activation_temp_override;
  85. double rapl_power_units, rapl_time_units;
  86. double rapl_dram_energy_units, rapl_energy_units;
  87. double rapl_joule_counter_range;
  88. unsigned int do_core_perf_limit_reasons;
  89. unsigned int do_gfx_perf_limit_reasons;
  90. unsigned int do_ring_perf_limit_reasons;
  91. unsigned int crystal_hz;
  92. unsigned long long tsc_hz;
  93. int base_cpu;
  94. #define RAPL_PKG (1 << 0)
  95. /* 0x610 MSR_PKG_POWER_LIMIT */
  96. /* 0x611 MSR_PKG_ENERGY_STATUS */
  97. #define RAPL_PKG_PERF_STATUS (1 << 1)
  98. /* 0x613 MSR_PKG_PERF_STATUS */
  99. #define RAPL_PKG_POWER_INFO (1 << 2)
  100. /* 0x614 MSR_PKG_POWER_INFO */
  101. #define RAPL_DRAM (1 << 3)
  102. /* 0x618 MSR_DRAM_POWER_LIMIT */
  103. /* 0x619 MSR_DRAM_ENERGY_STATUS */
  104. #define RAPL_DRAM_PERF_STATUS (1 << 4)
  105. /* 0x61b MSR_DRAM_PERF_STATUS */
  106. #define RAPL_DRAM_POWER_INFO (1 << 5)
  107. /* 0x61c MSR_DRAM_POWER_INFO */
  108. #define RAPL_CORES (1 << 6)
  109. /* 0x638 MSR_PP0_POWER_LIMIT */
  110. /* 0x639 MSR_PP0_ENERGY_STATUS */
  111. #define RAPL_CORE_POLICY (1 << 7)
  112. /* 0x63a MSR_PP0_POLICY */
  113. #define RAPL_GFX (1 << 8)
  114. /* 0x640 MSR_PP1_POWER_LIMIT */
  115. /* 0x641 MSR_PP1_ENERGY_STATUS */
  116. /* 0x642 MSR_PP1_POLICY */
  117. #define TJMAX_DEFAULT 100
  118. #define MAX(a, b) ((a) > (b) ? (a) : (b))
  119. int aperf_mperf_unstable;
  120. int backwards_count;
  121. char *progname;
  122. cpu_set_t *cpu_present_set, *cpu_affinity_set;
  123. size_t cpu_present_setsize, cpu_affinity_setsize;
  124. struct thread_data {
  125. unsigned long long tsc;
  126. unsigned long long aperf;
  127. unsigned long long mperf;
  128. unsigned long long c1;
  129. unsigned long long extra_msr64;
  130. unsigned long long extra_delta64;
  131. unsigned long long extra_msr32;
  132. unsigned long long extra_delta32;
  133. unsigned int smi_count;
  134. unsigned int cpu_id;
  135. unsigned int flags;
  136. #define CPU_IS_FIRST_THREAD_IN_CORE 0x2
  137. #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
  138. } *thread_even, *thread_odd;
  139. struct core_data {
  140. unsigned long long c3;
  141. unsigned long long c6;
  142. unsigned long long c7;
  143. unsigned int core_temp_c;
  144. unsigned int core_id;
  145. } *core_even, *core_odd;
  146. struct pkg_data {
  147. unsigned long long pc2;
  148. unsigned long long pc3;
  149. unsigned long long pc6;
  150. unsigned long long pc7;
  151. unsigned long long pc8;
  152. unsigned long long pc9;
  153. unsigned long long pc10;
  154. unsigned long long pkg_wtd_core_c0;
  155. unsigned long long pkg_any_core_c0;
  156. unsigned long long pkg_any_gfxe_c0;
  157. unsigned long long pkg_both_core_gfxe_c0;
  158. unsigned int package_id;
  159. unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
  160. unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
  161. unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
  162. unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
  163. unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
  164. unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
  165. unsigned int pkg_temp_c;
  166. } *package_even, *package_odd;
  167. #define ODD_COUNTERS thread_odd, core_odd, package_odd
  168. #define EVEN_COUNTERS thread_even, core_even, package_even
  169. #define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
  170. (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
  171. topo.num_threads_per_core + \
  172. (core_no) * topo.num_threads_per_core + (thread_no))
  173. #define GET_CORE(core_base, core_no, pkg_no) \
  174. (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
  175. #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
  176. struct system_summary {
  177. struct thread_data threads;
  178. struct core_data cores;
  179. struct pkg_data packages;
  180. } sum, average;
  181. struct topo_params {
  182. int num_packages;
  183. int num_cpus;
  184. int num_cores;
  185. int max_cpu_num;
  186. int num_cores_per_pkg;
  187. int num_threads_per_core;
  188. } topo;
  189. struct timeval tv_even, tv_odd, tv_delta;
  190. void setup_all_buffers(void);
  191. int cpu_is_not_present(int cpu)
  192. {
  193. return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
  194. }
  195. /*
  196. * run func(thread, core, package) in topology order
  197. * skip non-present cpus
  198. */
  199. int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
  200. struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
  201. {
  202. int retval, pkg_no, core_no, thread_no;
  203. for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
  204. for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
  205. for (thread_no = 0; thread_no <
  206. topo.num_threads_per_core; ++thread_no) {
  207. struct thread_data *t;
  208. struct core_data *c;
  209. struct pkg_data *p;
  210. t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
  211. if (cpu_is_not_present(t->cpu_id))
  212. continue;
  213. c = GET_CORE(core_base, core_no, pkg_no);
  214. p = GET_PKG(pkg_base, pkg_no);
  215. retval = func(t, c, p);
  216. if (retval)
  217. return retval;
  218. }
  219. }
  220. }
  221. return 0;
  222. }
  223. int cpu_migrate(int cpu)
  224. {
  225. CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
  226. CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
  227. if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
  228. return -1;
  229. else
  230. return 0;
  231. }
  232. int get_msr(int cpu, off_t offset, unsigned long long *msr)
  233. {
  234. ssize_t retval;
  235. char pathname[32];
  236. int fd;
  237. sprintf(pathname, "/dev/cpu/%d/msr", cpu);
  238. fd = open(pathname, O_RDONLY);
  239. if (fd < 0)
  240. err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
  241. retval = pread(fd, msr, sizeof *msr, offset);
  242. close(fd);
  243. if (retval != sizeof *msr)
  244. err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
  245. return 0;
  246. }
  247. /*
  248. * Example Format w/ field column widths:
  249. *
  250. * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
  251. * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
  252. */
  253. void print_header(void)
  254. {
  255. if (show_pkg)
  256. outp += sprintf(outp, " Package");
  257. if (show_core)
  258. outp += sprintf(outp, " Core");
  259. if (show_cpu)
  260. outp += sprintf(outp, " CPU");
  261. if (has_aperf)
  262. outp += sprintf(outp, " Avg_MHz");
  263. if (has_aperf)
  264. outp += sprintf(outp, " %%Busy");
  265. if (has_aperf)
  266. outp += sprintf(outp, " Bzy_MHz");
  267. outp += sprintf(outp, " TSC_MHz");
  268. if (extra_delta_offset32)
  269. outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
  270. if (extra_delta_offset64)
  271. outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
  272. if (extra_msr_offset32)
  273. outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
  274. if (extra_msr_offset64)
  275. outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
  276. if (!debug)
  277. goto done;
  278. if (do_smi)
  279. outp += sprintf(outp, " SMI");
  280. if (do_nhm_cstates)
  281. outp += sprintf(outp, " CPU%%c1");
  282. if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
  283. outp += sprintf(outp, " CPU%%c3");
  284. if (do_nhm_cstates)
  285. outp += sprintf(outp, " CPU%%c6");
  286. if (do_snb_cstates)
  287. outp += sprintf(outp, " CPU%%c7");
  288. if (do_dts)
  289. outp += sprintf(outp, " CoreTmp");
  290. if (do_ptm)
  291. outp += sprintf(outp, " PkgTmp");
  292. if (do_skl_residency) {
  293. outp += sprintf(outp, " Totl%%C0");
  294. outp += sprintf(outp, " Any%%C0");
  295. outp += sprintf(outp, " GFX%%C0");
  296. outp += sprintf(outp, " CPUGFX%%");
  297. }
  298. if (do_pc2)
  299. outp += sprintf(outp, " Pkg%%pc2");
  300. if (do_pc3)
  301. outp += sprintf(outp, " Pkg%%pc3");
  302. if (do_pc6)
  303. outp += sprintf(outp, " Pkg%%pc6");
  304. if (do_pc7)
  305. outp += sprintf(outp, " Pkg%%pc7");
  306. if (do_c8_c9_c10) {
  307. outp += sprintf(outp, " Pkg%%pc8");
  308. outp += sprintf(outp, " Pkg%%pc9");
  309. outp += sprintf(outp, " Pk%%pc10");
  310. }
  311. if (do_rapl && !rapl_joules) {
  312. if (do_rapl & RAPL_PKG)
  313. outp += sprintf(outp, " PkgWatt");
  314. if (do_rapl & RAPL_CORES)
  315. outp += sprintf(outp, " CorWatt");
  316. if (do_rapl & RAPL_GFX)
  317. outp += sprintf(outp, " GFXWatt");
  318. if (do_rapl & RAPL_DRAM)
  319. outp += sprintf(outp, " RAMWatt");
  320. if (do_rapl & RAPL_PKG_PERF_STATUS)
  321. outp += sprintf(outp, " PKG_%%");
  322. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  323. outp += sprintf(outp, " RAM_%%");
  324. } else if (do_rapl && rapl_joules) {
  325. if (do_rapl & RAPL_PKG)
  326. outp += sprintf(outp, " Pkg_J");
  327. if (do_rapl & RAPL_CORES)
  328. outp += sprintf(outp, " Cor_J");
  329. if (do_rapl & RAPL_GFX)
  330. outp += sprintf(outp, " GFX_J");
  331. if (do_rapl & RAPL_DRAM)
  332. outp += sprintf(outp, " RAM_W");
  333. if (do_rapl & RAPL_PKG_PERF_STATUS)
  334. outp += sprintf(outp, " PKG_%%");
  335. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  336. outp += sprintf(outp, " RAM_%%");
  337. outp += sprintf(outp, " time");
  338. }
  339. done:
  340. outp += sprintf(outp, "\n");
  341. }
  342. int dump_counters(struct thread_data *t, struct core_data *c,
  343. struct pkg_data *p)
  344. {
  345. outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
  346. if (t) {
  347. outp += sprintf(outp, "CPU: %d flags 0x%x\n",
  348. t->cpu_id, t->flags);
  349. outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
  350. outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
  351. outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
  352. outp += sprintf(outp, "c1: %016llX\n", t->c1);
  353. outp += sprintf(outp, "msr0x%x: %08llX\n",
  354. extra_delta_offset32, t->extra_delta32);
  355. outp += sprintf(outp, "msr0x%x: %016llX\n",
  356. extra_delta_offset64, t->extra_delta64);
  357. outp += sprintf(outp, "msr0x%x: %08llX\n",
  358. extra_msr_offset32, t->extra_msr32);
  359. outp += sprintf(outp, "msr0x%x: %016llX\n",
  360. extra_msr_offset64, t->extra_msr64);
  361. if (do_smi)
  362. outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
  363. }
  364. if (c) {
  365. outp += sprintf(outp, "core: %d\n", c->core_id);
  366. outp += sprintf(outp, "c3: %016llX\n", c->c3);
  367. outp += sprintf(outp, "c6: %016llX\n", c->c6);
  368. outp += sprintf(outp, "c7: %016llX\n", c->c7);
  369. outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
  370. }
  371. if (p) {
  372. outp += sprintf(outp, "package: %d\n", p->package_id);
  373. outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
  374. outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
  375. outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
  376. outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
  377. outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
  378. if (do_pc3)
  379. outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
  380. if (do_pc6)
  381. outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
  382. if (do_pc7)
  383. outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
  384. outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
  385. outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
  386. outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
  387. outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
  388. outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
  389. outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
  390. outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
  391. outp += sprintf(outp, "Throttle PKG: %0X\n",
  392. p->rapl_pkg_perf_status);
  393. outp += sprintf(outp, "Throttle RAM: %0X\n",
  394. p->rapl_dram_perf_status);
  395. outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
  396. }
  397. outp += sprintf(outp, "\n");
  398. return 0;
  399. }
  400. /*
  401. * column formatting convention & formats
  402. */
  403. int format_counters(struct thread_data *t, struct core_data *c,
  404. struct pkg_data *p)
  405. {
  406. double interval_float;
  407. char *fmt8;
  408. /* if showing only 1st thread in core and this isn't one, bail out */
  409. if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  410. return 0;
  411. /* if showing only 1st thread in pkg and this isn't one, bail out */
  412. if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  413. return 0;
  414. interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
  415. /* topo columns, print blanks on 1st (average) line */
  416. if (t == &average.threads) {
  417. if (show_pkg)
  418. outp += sprintf(outp, " -");
  419. if (show_core)
  420. outp += sprintf(outp, " -");
  421. if (show_cpu)
  422. outp += sprintf(outp, " -");
  423. } else {
  424. if (show_pkg) {
  425. if (p)
  426. outp += sprintf(outp, "%8d", p->package_id);
  427. else
  428. outp += sprintf(outp, " -");
  429. }
  430. if (show_core) {
  431. if (c)
  432. outp += sprintf(outp, "%8d", c->core_id);
  433. else
  434. outp += sprintf(outp, " -");
  435. }
  436. if (show_cpu)
  437. outp += sprintf(outp, "%8d", t->cpu_id);
  438. }
  439. /* Avg_MHz */
  440. if (has_aperf)
  441. outp += sprintf(outp, "%8.0f",
  442. 1.0 / units * t->aperf / interval_float);
  443. /* %Busy */
  444. if (has_aperf) {
  445. if (!skip_c0)
  446. outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc);
  447. else
  448. outp += sprintf(outp, "********");
  449. }
  450. /* Bzy_MHz */
  451. if (has_aperf)
  452. outp += sprintf(outp, "%8.0f",
  453. 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
  454. /* TSC_MHz */
  455. outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
  456. /* delta */
  457. if (extra_delta_offset32)
  458. outp += sprintf(outp, " %11llu", t->extra_delta32);
  459. /* DELTA */
  460. if (extra_delta_offset64)
  461. outp += sprintf(outp, " %11llu", t->extra_delta64);
  462. /* msr */
  463. if (extra_msr_offset32)
  464. outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
  465. /* MSR */
  466. if (extra_msr_offset64)
  467. outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
  468. if (!debug)
  469. goto done;
  470. /* SMI */
  471. if (do_smi)
  472. outp += sprintf(outp, "%8d", t->smi_count);
  473. if (do_nhm_cstates) {
  474. if (!skip_c1)
  475. outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
  476. else
  477. outp += sprintf(outp, "********");
  478. }
  479. /* print per-core data only for 1st thread in core */
  480. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  481. goto done;
  482. if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
  483. outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
  484. if (do_nhm_cstates)
  485. outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
  486. if (do_snb_cstates)
  487. outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
  488. if (do_dts)
  489. outp += sprintf(outp, "%8d", c->core_temp_c);
  490. /* print per-package data only for 1st core in package */
  491. if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  492. goto done;
  493. /* PkgTmp */
  494. if (do_ptm)
  495. outp += sprintf(outp, "%8d", p->pkg_temp_c);
  496. /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
  497. if (do_skl_residency) {
  498. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
  499. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
  500. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
  501. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
  502. }
  503. if (do_pc2)
  504. outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
  505. if (do_pc3)
  506. outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
  507. if (do_pc6)
  508. outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
  509. if (do_pc7)
  510. outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
  511. if (do_c8_c9_c10) {
  512. outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
  513. outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
  514. outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
  515. }
  516. /*
  517. * If measurement interval exceeds minimum RAPL Joule Counter range,
  518. * indicate that results are suspect by printing "**" in fraction place.
  519. */
  520. if (interval_float < rapl_joule_counter_range)
  521. fmt8 = "%8.2f";
  522. else
  523. fmt8 = " %6.0f**";
  524. if (do_rapl && !rapl_joules) {
  525. if (do_rapl & RAPL_PKG)
  526. outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
  527. if (do_rapl & RAPL_CORES)
  528. outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
  529. if (do_rapl & RAPL_GFX)
  530. outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
  531. if (do_rapl & RAPL_DRAM)
  532. outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
  533. if (do_rapl & RAPL_PKG_PERF_STATUS)
  534. outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
  535. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  536. outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
  537. } else if (do_rapl && rapl_joules) {
  538. if (do_rapl & RAPL_PKG)
  539. outp += sprintf(outp, fmt8,
  540. p->energy_pkg * rapl_energy_units);
  541. if (do_rapl & RAPL_CORES)
  542. outp += sprintf(outp, fmt8,
  543. p->energy_cores * rapl_energy_units);
  544. if (do_rapl & RAPL_GFX)
  545. outp += sprintf(outp, fmt8,
  546. p->energy_gfx * rapl_energy_units);
  547. if (do_rapl & RAPL_DRAM)
  548. outp += sprintf(outp, fmt8,
  549. p->energy_dram * rapl_dram_energy_units);
  550. if (do_rapl & RAPL_PKG_PERF_STATUS)
  551. outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
  552. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  553. outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
  554. outp += sprintf(outp, fmt8, interval_float);
  555. }
  556. done:
  557. outp += sprintf(outp, "\n");
  558. return 0;
  559. }
  560. void flush_stdout()
  561. {
  562. fputs(output_buffer, stdout);
  563. fflush(stdout);
  564. outp = output_buffer;
  565. }
  566. void flush_stderr()
  567. {
  568. fputs(output_buffer, stderr);
  569. outp = output_buffer;
  570. }
  571. void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  572. {
  573. static int printed;
  574. if (!printed || !summary_only)
  575. print_header();
  576. if (topo.num_cpus > 1)
  577. format_counters(&average.threads, &average.cores,
  578. &average.packages);
  579. printed = 1;
  580. if (summary_only)
  581. return;
  582. for_all_cpus(format_counters, t, c, p);
  583. }
  584. #define DELTA_WRAP32(new, old) \
  585. if (new > old) { \
  586. old = new - old; \
  587. } else { \
  588. old = 0x100000000 + new - old; \
  589. }
  590. void
  591. delta_package(struct pkg_data *new, struct pkg_data *old)
  592. {
  593. if (do_skl_residency) {
  594. old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
  595. old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
  596. old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
  597. old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
  598. }
  599. old->pc2 = new->pc2 - old->pc2;
  600. if (do_pc3)
  601. old->pc3 = new->pc3 - old->pc3;
  602. if (do_pc6)
  603. old->pc6 = new->pc6 - old->pc6;
  604. if (do_pc7)
  605. old->pc7 = new->pc7 - old->pc7;
  606. old->pc8 = new->pc8 - old->pc8;
  607. old->pc9 = new->pc9 - old->pc9;
  608. old->pc10 = new->pc10 - old->pc10;
  609. old->pkg_temp_c = new->pkg_temp_c;
  610. DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
  611. DELTA_WRAP32(new->energy_cores, old->energy_cores);
  612. DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
  613. DELTA_WRAP32(new->energy_dram, old->energy_dram);
  614. DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
  615. DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
  616. }
  617. void
  618. delta_core(struct core_data *new, struct core_data *old)
  619. {
  620. old->c3 = new->c3 - old->c3;
  621. old->c6 = new->c6 - old->c6;
  622. old->c7 = new->c7 - old->c7;
  623. old->core_temp_c = new->core_temp_c;
  624. }
  625. /*
  626. * old = new - old
  627. */
  628. void
  629. delta_thread(struct thread_data *new, struct thread_data *old,
  630. struct core_data *core_delta)
  631. {
  632. old->tsc = new->tsc - old->tsc;
  633. /* check for TSC < 1 Mcycles over interval */
  634. if (old->tsc < (1000 * 1000))
  635. errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
  636. "You can disable all c-states by booting with \"idle=poll\"\n"
  637. "or just the deep ones with \"processor.max_cstate=1\"");
  638. old->c1 = new->c1 - old->c1;
  639. if (has_aperf) {
  640. if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
  641. old->aperf = new->aperf - old->aperf;
  642. old->mperf = new->mperf - old->mperf;
  643. } else {
  644. if (!aperf_mperf_unstable) {
  645. fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
  646. fprintf(stderr, "* Frequency results do not cover entire interval *\n");
  647. fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
  648. aperf_mperf_unstable = 1;
  649. }
  650. /*
  651. * mperf delta is likely a huge "positive" number
  652. * can not use it for calculating c0 time
  653. */
  654. skip_c0 = 1;
  655. skip_c1 = 1;
  656. }
  657. }
  658. if (use_c1_residency_msr) {
  659. /*
  660. * Some models have a dedicated C1 residency MSR,
  661. * which should be more accurate than the derivation below.
  662. */
  663. } else {
  664. /*
  665. * As counter collection is not atomic,
  666. * it is possible for mperf's non-halted cycles + idle states
  667. * to exceed TSC's all cycles: show c1 = 0% in that case.
  668. */
  669. if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
  670. old->c1 = 0;
  671. else {
  672. /* normal case, derive c1 */
  673. old->c1 = old->tsc - old->mperf - core_delta->c3
  674. - core_delta->c6 - core_delta->c7;
  675. }
  676. }
  677. if (old->mperf == 0) {
  678. if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
  679. old->mperf = 1; /* divide by 0 protection */
  680. }
  681. old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
  682. old->extra_delta32 &= 0xFFFFFFFF;
  683. old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
  684. /*
  685. * Extra MSR is just a snapshot, simply copy latest w/o subtracting
  686. */
  687. old->extra_msr32 = new->extra_msr32;
  688. old->extra_msr64 = new->extra_msr64;
  689. if (do_smi)
  690. old->smi_count = new->smi_count - old->smi_count;
  691. }
  692. int delta_cpu(struct thread_data *t, struct core_data *c,
  693. struct pkg_data *p, struct thread_data *t2,
  694. struct core_data *c2, struct pkg_data *p2)
  695. {
  696. /* calculate core delta only for 1st thread in core */
  697. if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
  698. delta_core(c, c2);
  699. /* always calculate thread delta */
  700. delta_thread(t, t2, c2); /* c2 is core delta */
  701. /* calculate package delta only for 1st core in package */
  702. if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
  703. delta_package(p, p2);
  704. return 0;
  705. }
  706. void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  707. {
  708. t->tsc = 0;
  709. t->aperf = 0;
  710. t->mperf = 0;
  711. t->c1 = 0;
  712. t->smi_count = 0;
  713. t->extra_delta32 = 0;
  714. t->extra_delta64 = 0;
  715. /* tells format_counters to dump all fields from this set */
  716. t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
  717. c->c3 = 0;
  718. c->c6 = 0;
  719. c->c7 = 0;
  720. c->core_temp_c = 0;
  721. p->pkg_wtd_core_c0 = 0;
  722. p->pkg_any_core_c0 = 0;
  723. p->pkg_any_gfxe_c0 = 0;
  724. p->pkg_both_core_gfxe_c0 = 0;
  725. p->pc2 = 0;
  726. if (do_pc3)
  727. p->pc3 = 0;
  728. if (do_pc6)
  729. p->pc6 = 0;
  730. if (do_pc7)
  731. p->pc7 = 0;
  732. p->pc8 = 0;
  733. p->pc9 = 0;
  734. p->pc10 = 0;
  735. p->energy_pkg = 0;
  736. p->energy_dram = 0;
  737. p->energy_cores = 0;
  738. p->energy_gfx = 0;
  739. p->rapl_pkg_perf_status = 0;
  740. p->rapl_dram_perf_status = 0;
  741. p->pkg_temp_c = 0;
  742. }
  743. int sum_counters(struct thread_data *t, struct core_data *c,
  744. struct pkg_data *p)
  745. {
  746. average.threads.tsc += t->tsc;
  747. average.threads.aperf += t->aperf;
  748. average.threads.mperf += t->mperf;
  749. average.threads.c1 += t->c1;
  750. average.threads.extra_delta32 += t->extra_delta32;
  751. average.threads.extra_delta64 += t->extra_delta64;
  752. /* sum per-core values only for 1st thread in core */
  753. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  754. return 0;
  755. average.cores.c3 += c->c3;
  756. average.cores.c6 += c->c6;
  757. average.cores.c7 += c->c7;
  758. average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
  759. /* sum per-pkg values only for 1st core in pkg */
  760. if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  761. return 0;
  762. if (do_skl_residency) {
  763. average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
  764. average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
  765. average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
  766. average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
  767. }
  768. average.packages.pc2 += p->pc2;
  769. if (do_pc3)
  770. average.packages.pc3 += p->pc3;
  771. if (do_pc6)
  772. average.packages.pc6 += p->pc6;
  773. if (do_pc7)
  774. average.packages.pc7 += p->pc7;
  775. average.packages.pc8 += p->pc8;
  776. average.packages.pc9 += p->pc9;
  777. average.packages.pc10 += p->pc10;
  778. average.packages.energy_pkg += p->energy_pkg;
  779. average.packages.energy_dram += p->energy_dram;
  780. average.packages.energy_cores += p->energy_cores;
  781. average.packages.energy_gfx += p->energy_gfx;
  782. average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
  783. average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
  784. average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
  785. return 0;
  786. }
  787. /*
  788. * sum the counters for all cpus in the system
  789. * compute the weighted average
  790. */
  791. void compute_average(struct thread_data *t, struct core_data *c,
  792. struct pkg_data *p)
  793. {
  794. clear_counters(&average.threads, &average.cores, &average.packages);
  795. for_all_cpus(sum_counters, t, c, p);
  796. average.threads.tsc /= topo.num_cpus;
  797. average.threads.aperf /= topo.num_cpus;
  798. average.threads.mperf /= topo.num_cpus;
  799. average.threads.c1 /= topo.num_cpus;
  800. average.threads.extra_delta32 /= topo.num_cpus;
  801. average.threads.extra_delta32 &= 0xFFFFFFFF;
  802. average.threads.extra_delta64 /= topo.num_cpus;
  803. average.cores.c3 /= topo.num_cores;
  804. average.cores.c6 /= topo.num_cores;
  805. average.cores.c7 /= topo.num_cores;
  806. if (do_skl_residency) {
  807. average.packages.pkg_wtd_core_c0 /= topo.num_packages;
  808. average.packages.pkg_any_core_c0 /= topo.num_packages;
  809. average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
  810. average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
  811. }
  812. average.packages.pc2 /= topo.num_packages;
  813. if (do_pc3)
  814. average.packages.pc3 /= topo.num_packages;
  815. if (do_pc6)
  816. average.packages.pc6 /= topo.num_packages;
  817. if (do_pc7)
  818. average.packages.pc7 /= topo.num_packages;
  819. average.packages.pc8 /= topo.num_packages;
  820. average.packages.pc9 /= topo.num_packages;
  821. average.packages.pc10 /= topo.num_packages;
  822. }
  823. static unsigned long long rdtsc(void)
  824. {
  825. unsigned int low, high;
  826. asm volatile("rdtsc" : "=a" (low), "=d" (high));
  827. return low | ((unsigned long long)high) << 32;
  828. }
  829. /*
  830. * get_counters(...)
  831. * migrate to cpu
  832. * acquire and record local counters for that cpu
  833. */
  834. int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  835. {
  836. int cpu = t->cpu_id;
  837. unsigned long long msr;
  838. if (cpu_migrate(cpu)) {
  839. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  840. return -1;
  841. }
  842. t->tsc = rdtsc(); /* we are running on local CPU of interest */
  843. if (has_aperf) {
  844. if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
  845. return -3;
  846. if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
  847. return -4;
  848. }
  849. if (do_smi) {
  850. if (get_msr(cpu, MSR_SMI_COUNT, &msr))
  851. return -5;
  852. t->smi_count = msr & 0xFFFFFFFF;
  853. }
  854. if (extra_delta_offset32) {
  855. if (get_msr(cpu, extra_delta_offset32, &msr))
  856. return -5;
  857. t->extra_delta32 = msr & 0xFFFFFFFF;
  858. }
  859. if (extra_delta_offset64)
  860. if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
  861. return -5;
  862. if (extra_msr_offset32) {
  863. if (get_msr(cpu, extra_msr_offset32, &msr))
  864. return -5;
  865. t->extra_msr32 = msr & 0xFFFFFFFF;
  866. }
  867. if (extra_msr_offset64)
  868. if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
  869. return -5;
  870. if (use_c1_residency_msr) {
  871. if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
  872. return -6;
  873. }
  874. /* collect core counters only for 1st thread in core */
  875. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  876. return 0;
  877. if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
  878. if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
  879. return -6;
  880. }
  881. if (do_nhm_cstates && !do_knl_cstates) {
  882. if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
  883. return -7;
  884. } else if (do_knl_cstates) {
  885. if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
  886. return -7;
  887. }
  888. if (do_snb_cstates)
  889. if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
  890. return -8;
  891. if (do_dts) {
  892. if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
  893. return -9;
  894. c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
  895. }
  896. /* collect package counters only for 1st core in package */
  897. if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  898. return 0;
  899. if (do_skl_residency) {
  900. if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
  901. return -10;
  902. if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
  903. return -11;
  904. if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
  905. return -12;
  906. if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
  907. return -13;
  908. }
  909. if (do_pc3)
  910. if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
  911. return -9;
  912. if (do_pc6)
  913. if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
  914. return -10;
  915. if (do_pc2)
  916. if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
  917. return -11;
  918. if (do_pc7)
  919. if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
  920. return -12;
  921. if (do_c8_c9_c10) {
  922. if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
  923. return -13;
  924. if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
  925. return -13;
  926. if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
  927. return -13;
  928. }
  929. if (do_rapl & RAPL_PKG) {
  930. if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
  931. return -13;
  932. p->energy_pkg = msr & 0xFFFFFFFF;
  933. }
  934. if (do_rapl & RAPL_CORES) {
  935. if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
  936. return -14;
  937. p->energy_cores = msr & 0xFFFFFFFF;
  938. }
  939. if (do_rapl & RAPL_DRAM) {
  940. if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
  941. return -15;
  942. p->energy_dram = msr & 0xFFFFFFFF;
  943. }
  944. if (do_rapl & RAPL_GFX) {
  945. if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
  946. return -16;
  947. p->energy_gfx = msr & 0xFFFFFFFF;
  948. }
  949. if (do_rapl & RAPL_PKG_PERF_STATUS) {
  950. if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
  951. return -16;
  952. p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
  953. }
  954. if (do_rapl & RAPL_DRAM_PERF_STATUS) {
  955. if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
  956. return -16;
  957. p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
  958. }
  959. if (do_ptm) {
  960. if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
  961. return -17;
  962. p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
  963. }
  964. return 0;
  965. }
  966. /*
  967. * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
  968. * If you change the values, note they are used both in comparisons
  969. * (>= PCL__7) and to index pkg_cstate_limit_strings[].
  970. */
  971. #define PCLUKN 0 /* Unknown */
  972. #define PCLRSV 1 /* Reserved */
  973. #define PCL__0 2 /* PC0 */
  974. #define PCL__1 3 /* PC1 */
  975. #define PCL__2 4 /* PC2 */
  976. #define PCL__3 5 /* PC3 */
  977. #define PCL__4 6 /* PC4 */
  978. #define PCL__6 7 /* PC6 */
  979. #define PCL_6N 8 /* PC6 No Retention */
  980. #define PCL_6R 9 /* PC6 Retention */
  981. #define PCL__7 10 /* PC7 */
  982. #define PCL_7S 11 /* PC7 Shrink */
  983. #define PCL__8 12 /* PC8 */
  984. #define PCL__9 13 /* PC9 */
  985. #define PCLUNL 14 /* Unlimited */
  986. int pkg_cstate_limit = PCLUKN;
  987. char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
  988. "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
  989. int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  990. int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  991. int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  992. int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  993. int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  994. int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  995. static void
  996. dump_nhm_platform_info(void)
  997. {
  998. unsigned long long msr;
  999. unsigned int ratio;
  1000. get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
  1001. fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);
  1002. ratio = (msr >> 40) & 0xFF;
  1003. fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
  1004. ratio, bclk, ratio * bclk);
  1005. ratio = (msr >> 8) & 0xFF;
  1006. fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
  1007. ratio, bclk, ratio * bclk);
  1008. get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
  1009. fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
  1010. msr, msr & 0x2 ? "EN" : "DIS");
  1011. return;
  1012. }
  1013. static void
  1014. dump_hsw_turbo_ratio_limits(void)
  1015. {
  1016. unsigned long long msr;
  1017. unsigned int ratio;
  1018. get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
  1019. fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", msr);
  1020. ratio = (msr >> 8) & 0xFF;
  1021. if (ratio)
  1022. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
  1023. ratio, bclk, ratio * bclk);
  1024. ratio = (msr >> 0) & 0xFF;
  1025. if (ratio)
  1026. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
  1027. ratio, bclk, ratio * bclk);
  1028. return;
  1029. }
  1030. static void
  1031. dump_ivt_turbo_ratio_limits(void)
  1032. {
  1033. unsigned long long msr;
  1034. unsigned int ratio;
  1035. get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
  1036. fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", msr);
  1037. ratio = (msr >> 56) & 0xFF;
  1038. if (ratio)
  1039. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
  1040. ratio, bclk, ratio * bclk);
  1041. ratio = (msr >> 48) & 0xFF;
  1042. if (ratio)
  1043. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
  1044. ratio, bclk, ratio * bclk);
  1045. ratio = (msr >> 40) & 0xFF;
  1046. if (ratio)
  1047. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
  1048. ratio, bclk, ratio * bclk);
  1049. ratio = (msr >> 32) & 0xFF;
  1050. if (ratio)
  1051. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
  1052. ratio, bclk, ratio * bclk);
  1053. ratio = (msr >> 24) & 0xFF;
  1054. if (ratio)
  1055. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
  1056. ratio, bclk, ratio * bclk);
  1057. ratio = (msr >> 16) & 0xFF;
  1058. if (ratio)
  1059. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
  1060. ratio, bclk, ratio * bclk);
  1061. ratio = (msr >> 8) & 0xFF;
  1062. if (ratio)
  1063. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
  1064. ratio, bclk, ratio * bclk);
  1065. ratio = (msr >> 0) & 0xFF;
  1066. if (ratio)
  1067. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
  1068. ratio, bclk, ratio * bclk);
  1069. return;
  1070. }
  1071. static void
  1072. dump_nhm_turbo_ratio_limits(void)
  1073. {
  1074. unsigned long long msr;
  1075. unsigned int ratio;
  1076. get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
  1077. fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
  1078. ratio = (msr >> 56) & 0xFF;
  1079. if (ratio)
  1080. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
  1081. ratio, bclk, ratio * bclk);
  1082. ratio = (msr >> 48) & 0xFF;
  1083. if (ratio)
  1084. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
  1085. ratio, bclk, ratio * bclk);
  1086. ratio = (msr >> 40) & 0xFF;
  1087. if (ratio)
  1088. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
  1089. ratio, bclk, ratio * bclk);
  1090. ratio = (msr >> 32) & 0xFF;
  1091. if (ratio)
  1092. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
  1093. ratio, bclk, ratio * bclk);
  1094. ratio = (msr >> 24) & 0xFF;
  1095. if (ratio)
  1096. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
  1097. ratio, bclk, ratio * bclk);
  1098. ratio = (msr >> 16) & 0xFF;
  1099. if (ratio)
  1100. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
  1101. ratio, bclk, ratio * bclk);
  1102. ratio = (msr >> 8) & 0xFF;
  1103. if (ratio)
  1104. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
  1105. ratio, bclk, ratio * bclk);
  1106. ratio = (msr >> 0) & 0xFF;
  1107. if (ratio)
  1108. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
  1109. ratio, bclk, ratio * bclk);
  1110. return;
  1111. }
  1112. static void
  1113. dump_knl_turbo_ratio_limits(void)
  1114. {
  1115. int cores;
  1116. unsigned int ratio;
  1117. unsigned long long msr;
  1118. int delta_cores;
  1119. int delta_ratio;
  1120. int i;
  1121. get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
  1122. fprintf(stderr, "cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n",
  1123. msr);
  1124. /**
  1125. * Turbo encoding in KNL is as follows:
  1126. * [7:0] -- Base value of number of active cores of bucket 1.
  1127. * [15:8] -- Base value of freq ratio of bucket 1.
  1128. * [20:16] -- +ve delta of number of active cores of bucket 2.
  1129. * i.e. active cores of bucket 2 =
  1130. * active cores of bucket 1 + delta
  1131. * [23:21] -- Negative delta of freq ratio of bucket 2.
  1132. * i.e. freq ratio of bucket 2 =
  1133. * freq ratio of bucket 1 - delta
  1134. * [28:24]-- +ve delta of number of active cores of bucket 3.
  1135. * [31:29]-- -ve delta of freq ratio of bucket 3.
  1136. * [36:32]-- +ve delta of number of active cores of bucket 4.
  1137. * [39:37]-- -ve delta of freq ratio of bucket 4.
  1138. * [44:40]-- +ve delta of number of active cores of bucket 5.
  1139. * [47:45]-- -ve delta of freq ratio of bucket 5.
  1140. * [52:48]-- +ve delta of number of active cores of bucket 6.
  1141. * [55:53]-- -ve delta of freq ratio of bucket 6.
  1142. * [60:56]-- +ve delta of number of active cores of bucket 7.
  1143. * [63:61]-- -ve delta of freq ratio of bucket 7.
  1144. */
  1145. cores = msr & 0xFF;
  1146. ratio = (msr >> 8) && 0xFF;
  1147. if (ratio > 0)
  1148. fprintf(stderr,
  1149. "%d * %.0f = %.0f MHz max turbo %d active cores\n",
  1150. ratio, bclk, ratio * bclk, cores);
  1151. for (i = 16; i < 64; i = i + 8) {
  1152. delta_cores = (msr >> i) & 0x1F;
  1153. delta_ratio = (msr >> (i + 5)) && 0x7;
  1154. if (!delta_cores || !delta_ratio)
  1155. return;
  1156. cores = cores + delta_cores;
  1157. ratio = ratio - delta_ratio;
  1158. /** -ve ratios will make successive ratio calculations
  1159. * negative. Hence return instead of carrying on.
  1160. */
  1161. if (ratio > 0)
  1162. fprintf(stderr,
  1163. "%d * %.0f = %.0f MHz max turbo %d active cores\n",
  1164. ratio, bclk, ratio * bclk, cores);
  1165. }
  1166. }
  1167. static void
  1168. dump_nhm_cst_cfg(void)
  1169. {
  1170. unsigned long long msr;
  1171. get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
  1172. #define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
  1173. #define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
  1174. fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
  1175. fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
  1176. (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
  1177. (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
  1178. (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
  1179. (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
  1180. (msr & (1 << 15)) ? "" : "UN",
  1181. (unsigned int)msr & 7,
  1182. pkg_cstate_limit_strings[pkg_cstate_limit]);
  1183. return;
  1184. }
  1185. void free_all_buffers(void)
  1186. {
  1187. CPU_FREE(cpu_present_set);
  1188. cpu_present_set = NULL;
  1189. cpu_present_set = 0;
  1190. CPU_FREE(cpu_affinity_set);
  1191. cpu_affinity_set = NULL;
  1192. cpu_affinity_setsize = 0;
  1193. free(thread_even);
  1194. free(core_even);
  1195. free(package_even);
  1196. thread_even = NULL;
  1197. core_even = NULL;
  1198. package_even = NULL;
  1199. free(thread_odd);
  1200. free(core_odd);
  1201. free(package_odd);
  1202. thread_odd = NULL;
  1203. core_odd = NULL;
  1204. package_odd = NULL;
  1205. free(output_buffer);
  1206. output_buffer = NULL;
  1207. outp = NULL;
  1208. }
  1209. /*
  1210. * Open a file, and exit on failure
  1211. */
  1212. FILE *fopen_or_die(const char *path, const char *mode)
  1213. {
  1214. FILE *filep = fopen(path, "r");
  1215. if (!filep)
  1216. err(1, "%s: open failed", path);
  1217. return filep;
  1218. }
  1219. /*
  1220. * Parse a file containing a single int.
  1221. */
  1222. int parse_int_file(const char *fmt, ...)
  1223. {
  1224. va_list args;
  1225. char path[PATH_MAX];
  1226. FILE *filep;
  1227. int value;
  1228. va_start(args, fmt);
  1229. vsnprintf(path, sizeof(path), fmt, args);
  1230. va_end(args);
  1231. filep = fopen_or_die(path, "r");
  1232. if (fscanf(filep, "%d", &value) != 1)
  1233. err(1, "%s: failed to parse number from file", path);
  1234. fclose(filep);
  1235. return value;
  1236. }
  1237. /*
  1238. * get_cpu_position_in_core(cpu)
  1239. * return the position of the CPU among its HT siblings in the core
  1240. * return -1 if the sibling is not in list
  1241. */
  1242. int get_cpu_position_in_core(int cpu)
  1243. {
  1244. char path[64];
  1245. FILE *filep;
  1246. int this_cpu;
  1247. char character;
  1248. int i;
  1249. sprintf(path,
  1250. "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
  1251. cpu);
  1252. filep = fopen(path, "r");
  1253. if (filep == NULL) {
  1254. perror(path);
  1255. exit(1);
  1256. }
  1257. for (i = 0; i < topo.num_threads_per_core; i++) {
  1258. fscanf(filep, "%d", &this_cpu);
  1259. if (this_cpu == cpu) {
  1260. fclose(filep);
  1261. return i;
  1262. }
  1263. /* Account for no separator after last thread*/
  1264. if (i != (topo.num_threads_per_core - 1))
  1265. fscanf(filep, "%c", &character);
  1266. }
  1267. fclose(filep);
  1268. return -1;
  1269. }
  1270. /*
  1271. * cpu_is_first_core_in_package(cpu)
  1272. * return 1 if given CPU is 1st core in package
  1273. */
  1274. int cpu_is_first_core_in_package(int cpu)
  1275. {
  1276. return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
  1277. }
  1278. int get_physical_package_id(int cpu)
  1279. {
  1280. return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
  1281. }
  1282. int get_core_id(int cpu)
  1283. {
  1284. return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
  1285. }
  1286. int get_num_ht_siblings(int cpu)
  1287. {
  1288. char path[80];
  1289. FILE *filep;
  1290. int sib1;
  1291. int matches = 0;
  1292. char character;
  1293. char str[100];
  1294. char *ch;
  1295. sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
  1296. filep = fopen_or_die(path, "r");
  1297. /*
  1298. * file format:
  1299. * A ',' separated or '-' separated set of numbers
  1300. * (eg 1-2 or 1,3,4,5)
  1301. */
  1302. fscanf(filep, "%d%c\n", &sib1, &character);
  1303. fseek(filep, 0, SEEK_SET);
  1304. fgets(str, 100, filep);
  1305. ch = strchr(str, character);
  1306. while (ch != NULL) {
  1307. matches++;
  1308. ch = strchr(ch+1, character);
  1309. }
  1310. fclose(filep);
  1311. return matches+1;
  1312. }
  1313. /*
  1314. * run func(thread, core, package) in topology order
  1315. * skip non-present cpus
  1316. */
  1317. int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
  1318. struct pkg_data *, struct thread_data *, struct core_data *,
  1319. struct pkg_data *), struct thread_data *thread_base,
  1320. struct core_data *core_base, struct pkg_data *pkg_base,
  1321. struct thread_data *thread_base2, struct core_data *core_base2,
  1322. struct pkg_data *pkg_base2)
  1323. {
  1324. int retval, pkg_no, core_no, thread_no;
  1325. for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
  1326. for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
  1327. for (thread_no = 0; thread_no <
  1328. topo.num_threads_per_core; ++thread_no) {
  1329. struct thread_data *t, *t2;
  1330. struct core_data *c, *c2;
  1331. struct pkg_data *p, *p2;
  1332. t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
  1333. if (cpu_is_not_present(t->cpu_id))
  1334. continue;
  1335. t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
  1336. c = GET_CORE(core_base, core_no, pkg_no);
  1337. c2 = GET_CORE(core_base2, core_no, pkg_no);
  1338. p = GET_PKG(pkg_base, pkg_no);
  1339. p2 = GET_PKG(pkg_base2, pkg_no);
  1340. retval = func(t, c, p, t2, c2, p2);
  1341. if (retval)
  1342. return retval;
  1343. }
  1344. }
  1345. }
  1346. return 0;
  1347. }
  1348. /*
  1349. * run func(cpu) on every cpu in /proc/stat
  1350. * return max_cpu number
  1351. */
  1352. int for_all_proc_cpus(int (func)(int))
  1353. {
  1354. FILE *fp;
  1355. int cpu_num;
  1356. int retval;
  1357. fp = fopen_or_die(proc_stat, "r");
  1358. retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
  1359. if (retval != 0)
  1360. err(1, "%s: failed to parse format", proc_stat);
  1361. while (1) {
  1362. retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
  1363. if (retval != 1)
  1364. break;
  1365. retval = func(cpu_num);
  1366. if (retval) {
  1367. fclose(fp);
  1368. return(retval);
  1369. }
  1370. }
  1371. fclose(fp);
  1372. return 0;
  1373. }
  1374. void re_initialize(void)
  1375. {
  1376. free_all_buffers();
  1377. setup_all_buffers();
  1378. printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
  1379. }
  1380. /*
  1381. * count_cpus()
  1382. * remember the last one seen, it will be the max
  1383. */
  1384. int count_cpus(int cpu)
  1385. {
  1386. if (topo.max_cpu_num < cpu)
  1387. topo.max_cpu_num = cpu;
  1388. topo.num_cpus += 1;
  1389. return 0;
  1390. }
  1391. int mark_cpu_present(int cpu)
  1392. {
  1393. CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
  1394. return 0;
  1395. }
  1396. void turbostat_loop()
  1397. {
  1398. int retval;
  1399. int restarted = 0;
  1400. restart:
  1401. restarted++;
  1402. retval = for_all_cpus(get_counters, EVEN_COUNTERS);
  1403. if (retval < -1) {
  1404. exit(retval);
  1405. } else if (retval == -1) {
  1406. if (restarted > 1) {
  1407. exit(retval);
  1408. }
  1409. re_initialize();
  1410. goto restart;
  1411. }
  1412. restarted = 0;
  1413. gettimeofday(&tv_even, (struct timezone *)NULL);
  1414. while (1) {
  1415. if (for_all_proc_cpus(cpu_is_not_present)) {
  1416. re_initialize();
  1417. goto restart;
  1418. }
  1419. sleep(interval_sec);
  1420. retval = for_all_cpus(get_counters, ODD_COUNTERS);
  1421. if (retval < -1) {
  1422. exit(retval);
  1423. } else if (retval == -1) {
  1424. re_initialize();
  1425. goto restart;
  1426. }
  1427. gettimeofday(&tv_odd, (struct timezone *)NULL);
  1428. timersub(&tv_odd, &tv_even, &tv_delta);
  1429. for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
  1430. compute_average(EVEN_COUNTERS);
  1431. format_all_counters(EVEN_COUNTERS);
  1432. flush_stdout();
  1433. sleep(interval_sec);
  1434. retval = for_all_cpus(get_counters, EVEN_COUNTERS);
  1435. if (retval < -1) {
  1436. exit(retval);
  1437. } else if (retval == -1) {
  1438. re_initialize();
  1439. goto restart;
  1440. }
  1441. gettimeofday(&tv_even, (struct timezone *)NULL);
  1442. timersub(&tv_even, &tv_odd, &tv_delta);
  1443. for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
  1444. compute_average(ODD_COUNTERS);
  1445. format_all_counters(ODD_COUNTERS);
  1446. flush_stdout();
  1447. }
  1448. }
  1449. void check_dev_msr()
  1450. {
  1451. struct stat sb;
  1452. char pathname[32];
  1453. sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
  1454. if (stat(pathname, &sb))
  1455. if (system("/sbin/modprobe msr > /dev/null 2>&1"))
  1456. err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
  1457. }
  1458. void check_permissions()
  1459. {
  1460. struct __user_cap_header_struct cap_header_data;
  1461. cap_user_header_t cap_header = &cap_header_data;
  1462. struct __user_cap_data_struct cap_data_data;
  1463. cap_user_data_t cap_data = &cap_data_data;
  1464. extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
  1465. int do_exit = 0;
  1466. char pathname[32];
  1467. /* check for CAP_SYS_RAWIO */
  1468. cap_header->pid = getpid();
  1469. cap_header->version = _LINUX_CAPABILITY_VERSION;
  1470. if (capget(cap_header, cap_data) < 0)
  1471. err(-6, "capget(2) failed");
  1472. if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
  1473. do_exit++;
  1474. warnx("capget(CAP_SYS_RAWIO) failed,"
  1475. " try \"# setcap cap_sys_rawio=ep %s\"", progname);
  1476. }
  1477. /* test file permissions */
  1478. sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
  1479. if (euidaccess(pathname, R_OK)) {
  1480. do_exit++;
  1481. warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
  1482. }
  1483. /* if all else fails, thell them to be root */
  1484. if (do_exit)
  1485. if (getuid() != 0)
  1486. warnx("... or simply run as root");
  1487. if (do_exit)
  1488. exit(-6);
  1489. }
  1490. /*
  1491. * NHM adds support for additional MSRs:
  1492. *
  1493. * MSR_SMI_COUNT 0x00000034
  1494. *
  1495. * MSR_NHM_PLATFORM_INFO 0x000000ce
  1496. * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
  1497. *
  1498. * MSR_PKG_C3_RESIDENCY 0x000003f8
  1499. * MSR_PKG_C6_RESIDENCY 0x000003f9
  1500. * MSR_CORE_C3_RESIDENCY 0x000003fc
  1501. * MSR_CORE_C6_RESIDENCY 0x000003fd
  1502. *
  1503. * Side effect:
  1504. * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
  1505. */
  1506. int probe_nhm_msrs(unsigned int family, unsigned int model)
  1507. {
  1508. unsigned long long msr;
  1509. int *pkg_cstate_limits;
  1510. if (!genuine_intel)
  1511. return 0;
  1512. if (family != 6)
  1513. return 0;
  1514. switch (model) {
  1515. case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
  1516. case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
  1517. case 0x1F: /* Core i7 and i5 Processor - Nehalem */
  1518. case 0x25: /* Westmere Client - Clarkdale, Arrandale */
  1519. case 0x2C: /* Westmere EP - Gulftown */
  1520. case 0x2E: /* Nehalem-EX Xeon - Beckton */
  1521. case 0x2F: /* Westmere-EX Xeon - Eagleton */
  1522. pkg_cstate_limits = nhm_pkg_cstate_limits;
  1523. break;
  1524. case 0x2A: /* SNB */
  1525. case 0x2D: /* SNB Xeon */
  1526. case 0x3A: /* IVB */
  1527. case 0x3E: /* IVB Xeon */
  1528. pkg_cstate_limits = snb_pkg_cstate_limits;
  1529. break;
  1530. case 0x3C: /* HSW */
  1531. case 0x3F: /* HSX */
  1532. case 0x45: /* HSW */
  1533. case 0x46: /* HSW */
  1534. case 0x3D: /* BDW */
  1535. case 0x47: /* BDW */
  1536. case 0x4F: /* BDX */
  1537. case 0x56: /* BDX-DE */
  1538. case 0x4E: /* SKL */
  1539. case 0x5E: /* SKL */
  1540. pkg_cstate_limits = hsw_pkg_cstate_limits;
  1541. break;
  1542. case 0x37: /* BYT */
  1543. case 0x4D: /* AVN */
  1544. pkg_cstate_limits = slv_pkg_cstate_limits;
  1545. break;
  1546. case 0x4C: /* AMT */
  1547. pkg_cstate_limits = amt_pkg_cstate_limits;
  1548. break;
  1549. case 0x57: /* PHI */
  1550. pkg_cstate_limits = phi_pkg_cstate_limits;
  1551. break;
  1552. default:
  1553. return 0;
  1554. }
  1555. get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
  1556. pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
  1557. return 1;
  1558. }
  1559. int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
  1560. {
  1561. switch (model) {
  1562. /* Nehalem compatible, but do not include turbo-ratio limit support */
  1563. case 0x2E: /* Nehalem-EX Xeon - Beckton */
  1564. case 0x2F: /* Westmere-EX Xeon - Eagleton */
  1565. return 0;
  1566. default:
  1567. return 1;
  1568. }
  1569. }
  1570. int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
  1571. {
  1572. if (!genuine_intel)
  1573. return 0;
  1574. if (family != 6)
  1575. return 0;
  1576. switch (model) {
  1577. case 0x3E: /* IVB Xeon */
  1578. case 0x3F: /* HSW Xeon */
  1579. return 1;
  1580. default:
  1581. return 0;
  1582. }
  1583. }
  1584. int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
  1585. {
  1586. if (!genuine_intel)
  1587. return 0;
  1588. if (family != 6)
  1589. return 0;
  1590. switch (model) {
  1591. case 0x3F: /* HSW Xeon */
  1592. return 1;
  1593. default:
  1594. return 0;
  1595. }
  1596. }
  1597. int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
  1598. {
  1599. if (!genuine_intel)
  1600. return 0;
  1601. if (family != 6)
  1602. return 0;
  1603. switch (model) {
  1604. case 0x57: /* Knights Landing */
  1605. return 1;
  1606. default:
  1607. return 0;
  1608. }
  1609. }
  1610. static void
  1611. dump_cstate_pstate_config_info(family, model)
  1612. {
  1613. if (!do_nhm_platform_info)
  1614. return;
  1615. dump_nhm_platform_info();
  1616. if (has_hsw_turbo_ratio_limit(family, model))
  1617. dump_hsw_turbo_ratio_limits();
  1618. if (has_ivt_turbo_ratio_limit(family, model))
  1619. dump_ivt_turbo_ratio_limits();
  1620. if (has_nhm_turbo_ratio_limit(family, model))
  1621. dump_nhm_turbo_ratio_limits();
  1622. if (has_knl_turbo_ratio_limit(family, model))
  1623. dump_knl_turbo_ratio_limits();
  1624. dump_nhm_cst_cfg();
  1625. }
  1626. /*
  1627. * print_epb()
  1628. * Decode the ENERGY_PERF_BIAS MSR
  1629. */
  1630. int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  1631. {
  1632. unsigned long long msr;
  1633. char *epb_string;
  1634. int cpu;
  1635. if (!has_epb)
  1636. return 0;
  1637. cpu = t->cpu_id;
  1638. /* EPB is per-package */
  1639. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  1640. return 0;
  1641. if (cpu_migrate(cpu)) {
  1642. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  1643. return -1;
  1644. }
  1645. if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
  1646. return 0;
  1647. switch (msr & 0xF) {
  1648. case ENERGY_PERF_BIAS_PERFORMANCE:
  1649. epb_string = "performance";
  1650. break;
  1651. case ENERGY_PERF_BIAS_NORMAL:
  1652. epb_string = "balanced";
  1653. break;
  1654. case ENERGY_PERF_BIAS_POWERSAVE:
  1655. epb_string = "powersave";
  1656. break;
  1657. default:
  1658. epb_string = "custom";
  1659. break;
  1660. }
  1661. fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
  1662. return 0;
  1663. }
  1664. /*
  1665. * print_perf_limit()
  1666. */
  1667. int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  1668. {
  1669. unsigned long long msr;
  1670. int cpu;
  1671. cpu = t->cpu_id;
  1672. /* per-package */
  1673. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  1674. return 0;
  1675. if (cpu_migrate(cpu)) {
  1676. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  1677. return -1;
  1678. }
  1679. if (do_core_perf_limit_reasons) {
  1680. get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
  1681. fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
  1682. fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
  1683. (msr & 1 << 15) ? "bit15, " : "",
  1684. (msr & 1 << 14) ? "bit14, " : "",
  1685. (msr & 1 << 13) ? "Transitions, " : "",
  1686. (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
  1687. (msr & 1 << 11) ? "PkgPwrL2, " : "",
  1688. (msr & 1 << 10) ? "PkgPwrL1, " : "",
  1689. (msr & 1 << 9) ? "CorePwr, " : "",
  1690. (msr & 1 << 8) ? "Amps, " : "",
  1691. (msr & 1 << 6) ? "VR-Therm, " : "",
  1692. (msr & 1 << 5) ? "Auto-HWP, " : "",
  1693. (msr & 1 << 4) ? "Graphics, " : "",
  1694. (msr & 1 << 2) ? "bit2, " : "",
  1695. (msr & 1 << 1) ? "ThermStatus, " : "",
  1696. (msr & 1 << 0) ? "PROCHOT, " : "");
  1697. fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
  1698. (msr & 1 << 31) ? "bit31, " : "",
  1699. (msr & 1 << 30) ? "bit30, " : "",
  1700. (msr & 1 << 29) ? "Transitions, " : "",
  1701. (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
  1702. (msr & 1 << 27) ? "PkgPwrL2, " : "",
  1703. (msr & 1 << 26) ? "PkgPwrL1, " : "",
  1704. (msr & 1 << 25) ? "CorePwr, " : "",
  1705. (msr & 1 << 24) ? "Amps, " : "",
  1706. (msr & 1 << 22) ? "VR-Therm, " : "",
  1707. (msr & 1 << 21) ? "Auto-HWP, " : "",
  1708. (msr & 1 << 20) ? "Graphics, " : "",
  1709. (msr & 1 << 18) ? "bit18, " : "",
  1710. (msr & 1 << 17) ? "ThermStatus, " : "",
  1711. (msr & 1 << 16) ? "PROCHOT, " : "");
  1712. }
  1713. if (do_gfx_perf_limit_reasons) {
  1714. get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
  1715. fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
  1716. fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
  1717. (msr & 1 << 0) ? "PROCHOT, " : "",
  1718. (msr & 1 << 1) ? "ThermStatus, " : "",
  1719. (msr & 1 << 4) ? "Graphics, " : "",
  1720. (msr & 1 << 6) ? "VR-Therm, " : "",
  1721. (msr & 1 << 8) ? "Amps, " : "",
  1722. (msr & 1 << 9) ? "GFXPwr, " : "",
  1723. (msr & 1 << 10) ? "PkgPwrL1, " : "",
  1724. (msr & 1 << 11) ? "PkgPwrL2, " : "");
  1725. fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
  1726. (msr & 1 << 16) ? "PROCHOT, " : "",
  1727. (msr & 1 << 17) ? "ThermStatus, " : "",
  1728. (msr & 1 << 20) ? "Graphics, " : "",
  1729. (msr & 1 << 22) ? "VR-Therm, " : "",
  1730. (msr & 1 << 24) ? "Amps, " : "",
  1731. (msr & 1 << 25) ? "GFXPwr, " : "",
  1732. (msr & 1 << 26) ? "PkgPwrL1, " : "",
  1733. (msr & 1 << 27) ? "PkgPwrL2, " : "");
  1734. }
  1735. if (do_ring_perf_limit_reasons) {
  1736. get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
  1737. fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
  1738. fprintf(stderr, " (Active: %s%s%s%s%s%s)",
  1739. (msr & 1 << 0) ? "PROCHOT, " : "",
  1740. (msr & 1 << 1) ? "ThermStatus, " : "",
  1741. (msr & 1 << 6) ? "VR-Therm, " : "",
  1742. (msr & 1 << 8) ? "Amps, " : "",
  1743. (msr & 1 << 10) ? "PkgPwrL1, " : "",
  1744. (msr & 1 << 11) ? "PkgPwrL2, " : "");
  1745. fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
  1746. (msr & 1 << 16) ? "PROCHOT, " : "",
  1747. (msr & 1 << 17) ? "ThermStatus, " : "",
  1748. (msr & 1 << 22) ? "VR-Therm, " : "",
  1749. (msr & 1 << 24) ? "Amps, " : "",
  1750. (msr & 1 << 26) ? "PkgPwrL1, " : "",
  1751. (msr & 1 << 27) ? "PkgPwrL2, " : "");
  1752. }
  1753. return 0;
  1754. }
  1755. #define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
  1756. #define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
  1757. double get_tdp(model)
  1758. {
  1759. unsigned long long msr;
  1760. if (do_rapl & RAPL_PKG_POWER_INFO)
  1761. if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
  1762. return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
  1763. switch (model) {
  1764. case 0x37:
  1765. case 0x4D:
  1766. return 30.0;
  1767. default:
  1768. return 135.0;
  1769. }
  1770. }
  1771. /*
  1772. * rapl_dram_energy_units_probe()
  1773. * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
  1774. */
  1775. static double
  1776. rapl_dram_energy_units_probe(int model, double rapl_energy_units)
  1777. {
  1778. /* only called for genuine_intel, family 6 */
  1779. switch (model) {
  1780. case 0x3F: /* HSX */
  1781. case 0x4F: /* BDX */
  1782. case 0x56: /* BDX-DE */
  1783. case 0x57: /* KNL */
  1784. return (rapl_dram_energy_units = 15.3 / 1000000);
  1785. default:
  1786. return (rapl_energy_units);
  1787. }
  1788. }
  1789. /*
  1790. * rapl_probe()
  1791. *
  1792. * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
  1793. */
  1794. void rapl_probe(unsigned int family, unsigned int model)
  1795. {
  1796. unsigned long long msr;
  1797. unsigned int time_unit;
  1798. double tdp;
  1799. if (!genuine_intel)
  1800. return;
  1801. if (family != 6)
  1802. return;
  1803. switch (model) {
  1804. case 0x2A:
  1805. case 0x3A:
  1806. case 0x3C: /* HSW */
  1807. case 0x45: /* HSW */
  1808. case 0x46: /* HSW */
  1809. case 0x3D: /* BDW */
  1810. case 0x47: /* BDW */
  1811. do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
  1812. break;
  1813. case 0x4E: /* SKL */
  1814. case 0x5E: /* SKL */
  1815. do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
  1816. break;
  1817. case 0x3F: /* HSX */
  1818. case 0x4F: /* BDX */
  1819. case 0x56: /* BDX-DE */
  1820. case 0x57: /* KNL */
  1821. do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
  1822. break;
  1823. case 0x2D:
  1824. case 0x3E:
  1825. do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
  1826. break;
  1827. case 0x37: /* BYT */
  1828. case 0x4D: /* AVN */
  1829. do_rapl = RAPL_PKG | RAPL_CORES ;
  1830. break;
  1831. default:
  1832. return;
  1833. }
  1834. /* units on package 0, verify later other packages match */
  1835. if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
  1836. return;
  1837. rapl_power_units = 1.0 / (1 << (msr & 0xF));
  1838. if (model == 0x37)
  1839. rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
  1840. else
  1841. rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
  1842. rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
  1843. time_unit = msr >> 16 & 0xF;
  1844. if (time_unit == 0)
  1845. time_unit = 0xA;
  1846. rapl_time_units = 1.0 / (1 << (time_unit));
  1847. tdp = get_tdp(model);
  1848. rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
  1849. if (debug)
  1850. fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
  1851. return;
  1852. }
  1853. void perf_limit_reasons_probe(family, model)
  1854. {
  1855. if (!genuine_intel)
  1856. return;
  1857. if (family != 6)
  1858. return;
  1859. switch (model) {
  1860. case 0x3C: /* HSW */
  1861. case 0x45: /* HSW */
  1862. case 0x46: /* HSW */
  1863. do_gfx_perf_limit_reasons = 1;
  1864. case 0x3F: /* HSX */
  1865. do_core_perf_limit_reasons = 1;
  1866. do_ring_perf_limit_reasons = 1;
  1867. default:
  1868. return;
  1869. }
  1870. }
  1871. int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  1872. {
  1873. unsigned long long msr;
  1874. unsigned int dts;
  1875. int cpu;
  1876. if (!(do_dts || do_ptm))
  1877. return 0;
  1878. cpu = t->cpu_id;
  1879. /* DTS is per-core, no need to print for each thread */
  1880. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  1881. return 0;
  1882. if (cpu_migrate(cpu)) {
  1883. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  1884. return -1;
  1885. }
  1886. if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
  1887. if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
  1888. return 0;
  1889. dts = (msr >> 16) & 0x7F;
  1890. fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
  1891. cpu, msr, tcc_activation_temp - dts);
  1892. #ifdef THERM_DEBUG
  1893. if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
  1894. return 0;
  1895. dts = (msr >> 16) & 0x7F;
  1896. dts2 = (msr >> 8) & 0x7F;
  1897. fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
  1898. cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
  1899. #endif
  1900. }
  1901. if (do_dts) {
  1902. unsigned int resolution;
  1903. if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
  1904. return 0;
  1905. dts = (msr >> 16) & 0x7F;
  1906. resolution = (msr >> 27) & 0xF;
  1907. fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
  1908. cpu, msr, tcc_activation_temp - dts, resolution);
  1909. #ifdef THERM_DEBUG
  1910. if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
  1911. return 0;
  1912. dts = (msr >> 16) & 0x7F;
  1913. dts2 = (msr >> 8) & 0x7F;
  1914. fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
  1915. cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
  1916. #endif
  1917. }
  1918. return 0;
  1919. }
  1920. void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
  1921. {
  1922. fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
  1923. cpu, label,
  1924. ((msr >> 15) & 1) ? "EN" : "DIS",
  1925. ((msr >> 0) & 0x7FFF) * rapl_power_units,
  1926. (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
  1927. (((msr >> 16) & 1) ? "EN" : "DIS"));
  1928. return;
  1929. }
  1930. int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  1931. {
  1932. unsigned long long msr;
  1933. int cpu;
  1934. if (!do_rapl)
  1935. return 0;
  1936. /* RAPL counters are per package, so print only for 1st thread/package */
  1937. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  1938. return 0;
  1939. cpu = t->cpu_id;
  1940. if (cpu_migrate(cpu)) {
  1941. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  1942. return -1;
  1943. }
  1944. if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
  1945. return -1;
  1946. if (debug) {
  1947. fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
  1948. "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
  1949. rapl_power_units, rapl_energy_units, rapl_time_units);
  1950. }
  1951. if (do_rapl & RAPL_PKG_POWER_INFO) {
  1952. if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
  1953. return -5;
  1954. fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
  1955. cpu, msr,
  1956. ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  1957. ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  1958. ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  1959. ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
  1960. }
  1961. if (do_rapl & RAPL_PKG) {
  1962. if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
  1963. return -9;
  1964. fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
  1965. cpu, msr, (msr >> 63) & 1 ? "": "UN");
  1966. print_power_limit_msr(cpu, msr, "PKG Limit #1");
  1967. fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
  1968. cpu,
  1969. ((msr >> 47) & 1) ? "EN" : "DIS",
  1970. ((msr >> 32) & 0x7FFF) * rapl_power_units,
  1971. (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
  1972. ((msr >> 48) & 1) ? "EN" : "DIS");
  1973. }
  1974. if (do_rapl & RAPL_DRAM_POWER_INFO) {
  1975. if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
  1976. return -6;
  1977. fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
  1978. cpu, msr,
  1979. ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  1980. ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  1981. ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  1982. ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
  1983. }
  1984. if (do_rapl & RAPL_DRAM) {
  1985. if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
  1986. return -9;
  1987. fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
  1988. cpu, msr, (msr >> 31) & 1 ? "": "UN");
  1989. print_power_limit_msr(cpu, msr, "DRAM Limit");
  1990. }
  1991. if (do_rapl & RAPL_CORE_POLICY) {
  1992. if (debug) {
  1993. if (get_msr(cpu, MSR_PP0_POLICY, &msr))
  1994. return -7;
  1995. fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
  1996. }
  1997. }
  1998. if (do_rapl & RAPL_CORES) {
  1999. if (debug) {
  2000. if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
  2001. return -9;
  2002. fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
  2003. cpu, msr, (msr >> 31) & 1 ? "": "UN");
  2004. print_power_limit_msr(cpu, msr, "Cores Limit");
  2005. }
  2006. }
  2007. if (do_rapl & RAPL_GFX) {
  2008. if (debug) {
  2009. if (get_msr(cpu, MSR_PP1_POLICY, &msr))
  2010. return -8;
  2011. fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
  2012. if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
  2013. return -9;
  2014. fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
  2015. cpu, msr, (msr >> 31) & 1 ? "": "UN");
  2016. print_power_limit_msr(cpu, msr, "GFX Limit");
  2017. }
  2018. }
  2019. return 0;
  2020. }
  2021. /*
  2022. * SNB adds support for additional MSRs:
  2023. *
  2024. * MSR_PKG_C7_RESIDENCY 0x000003fa
  2025. * MSR_CORE_C7_RESIDENCY 0x000003fe
  2026. * MSR_PKG_C2_RESIDENCY 0x0000060d
  2027. */
  2028. int has_snb_msrs(unsigned int family, unsigned int model)
  2029. {
  2030. if (!genuine_intel)
  2031. return 0;
  2032. switch (model) {
  2033. case 0x2A:
  2034. case 0x2D:
  2035. case 0x3A: /* IVB */
  2036. case 0x3E: /* IVB Xeon */
  2037. case 0x3C: /* HSW */
  2038. case 0x3F: /* HSW */
  2039. case 0x45: /* HSW */
  2040. case 0x46: /* HSW */
  2041. case 0x3D: /* BDW */
  2042. case 0x47: /* BDW */
  2043. case 0x4F: /* BDX */
  2044. case 0x56: /* BDX-DE */
  2045. case 0x4E: /* SKL */
  2046. case 0x5E: /* SKL */
  2047. return 1;
  2048. }
  2049. return 0;
  2050. }
  2051. /*
  2052. * HSW adds support for additional MSRs:
  2053. *
  2054. * MSR_PKG_C8_RESIDENCY 0x00000630
  2055. * MSR_PKG_C9_RESIDENCY 0x00000631
  2056. * MSR_PKG_C10_RESIDENCY 0x00000632
  2057. */
  2058. int has_hsw_msrs(unsigned int family, unsigned int model)
  2059. {
  2060. if (!genuine_intel)
  2061. return 0;
  2062. switch (model) {
  2063. case 0x45: /* HSW */
  2064. case 0x3D: /* BDW */
  2065. case 0x4E: /* SKL */
  2066. case 0x5E: /* SKL */
  2067. return 1;
  2068. }
  2069. return 0;
  2070. }
  2071. /*
  2072. * SKL adds support for additional MSRS:
  2073. *
  2074. * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
  2075. * MSR_PKG_ANY_CORE_C0_RES 0x00000659
  2076. * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
  2077. * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
  2078. */
  2079. int has_skl_msrs(unsigned int family, unsigned int model)
  2080. {
  2081. if (!genuine_intel)
  2082. return 0;
  2083. switch (model) {
  2084. case 0x4E: /* SKL */
  2085. case 0x5E: /* SKL */
  2086. return 1;
  2087. }
  2088. return 0;
  2089. }
  2090. int is_slm(unsigned int family, unsigned int model)
  2091. {
  2092. if (!genuine_intel)
  2093. return 0;
  2094. switch (model) {
  2095. case 0x37: /* BYT */
  2096. case 0x4D: /* AVN */
  2097. return 1;
  2098. }
  2099. return 0;
  2100. }
  2101. int is_knl(unsigned int family, unsigned int model)
  2102. {
  2103. if (!genuine_intel)
  2104. return 0;
  2105. switch (model) {
  2106. case 0x57: /* KNL */
  2107. return 1;
  2108. }
  2109. return 0;
  2110. }
  2111. #define SLM_BCLK_FREQS 5
  2112. double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
  2113. double slm_bclk(void)
  2114. {
  2115. unsigned long long msr = 3;
  2116. unsigned int i;
  2117. double freq;
  2118. if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
  2119. fprintf(stderr, "SLM BCLK: unknown\n");
  2120. i = msr & 0xf;
  2121. if (i >= SLM_BCLK_FREQS) {
  2122. fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
  2123. msr = 3;
  2124. }
  2125. freq = slm_freq_table[i];
  2126. fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
  2127. return freq;
  2128. }
  2129. double discover_bclk(unsigned int family, unsigned int model)
  2130. {
  2131. if (has_snb_msrs(family, model))
  2132. return 100.00;
  2133. else if (is_slm(family, model))
  2134. return slm_bclk();
  2135. else
  2136. return 133.33;
  2137. }
  2138. /*
  2139. * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
  2140. * the Thermal Control Circuit (TCC) activates.
  2141. * This is usually equal to tjMax.
  2142. *
  2143. * Older processors do not have this MSR, so there we guess,
  2144. * but also allow cmdline over-ride with -T.
  2145. *
  2146. * Several MSR temperature values are in units of degrees-C
  2147. * below this value, including the Digital Thermal Sensor (DTS),
  2148. * Package Thermal Management Sensor (PTM), and thermal event thresholds.
  2149. */
  2150. int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  2151. {
  2152. unsigned long long msr;
  2153. unsigned int target_c_local;
  2154. int cpu;
  2155. /* tcc_activation_temp is used only for dts or ptm */
  2156. if (!(do_dts || do_ptm))
  2157. return 0;
  2158. /* this is a per-package concept */
  2159. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  2160. return 0;
  2161. cpu = t->cpu_id;
  2162. if (cpu_migrate(cpu)) {
  2163. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  2164. return -1;
  2165. }
  2166. if (tcc_activation_temp_override != 0) {
  2167. tcc_activation_temp = tcc_activation_temp_override;
  2168. fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
  2169. cpu, tcc_activation_temp);
  2170. return 0;
  2171. }
  2172. /* Temperature Target MSR is Nehalem and newer only */
  2173. if (!do_nhm_platform_info)
  2174. goto guess;
  2175. if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
  2176. goto guess;
  2177. target_c_local = (msr >> 16) & 0xFF;
  2178. if (debug)
  2179. fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
  2180. cpu, msr, target_c_local);
  2181. if (!target_c_local)
  2182. goto guess;
  2183. tcc_activation_temp = target_c_local;
  2184. return 0;
  2185. guess:
  2186. tcc_activation_temp = TJMAX_DEFAULT;
  2187. fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
  2188. cpu, tcc_activation_temp);
  2189. return 0;
  2190. }
  2191. void process_cpuid()
  2192. {
  2193. unsigned int eax, ebx, ecx, edx, max_level;
  2194. unsigned int fms, family, model, stepping;
  2195. eax = ebx = ecx = edx = 0;
  2196. __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
  2197. if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
  2198. genuine_intel = 1;
  2199. if (debug)
  2200. fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
  2201. (char *)&ebx, (char *)&edx, (char *)&ecx);
  2202. __get_cpuid(1, &fms, &ebx, &ecx, &edx);
  2203. family = (fms >> 8) & 0xf;
  2204. model = (fms >> 4) & 0xf;
  2205. stepping = fms & 0xf;
  2206. if (family == 6 || family == 0xf)
  2207. model += ((fms >> 16) & 0xf) << 4;
  2208. if (debug)
  2209. fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
  2210. max_level, family, model, stepping, family, model, stepping);
  2211. if (!(edx & (1 << 5)))
  2212. errx(1, "CPUID: no MSR");
  2213. /*
  2214. * check max extended function levels of CPUID.
  2215. * This is needed to check for invariant TSC.
  2216. * This check is valid for both Intel and AMD.
  2217. */
  2218. ebx = ecx = edx = 0;
  2219. __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
  2220. if (max_level >= 0x80000007) {
  2221. /*
  2222. * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
  2223. * this check is valid for both Intel and AMD
  2224. */
  2225. __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
  2226. has_invariant_tsc = edx & (1 << 8);
  2227. }
  2228. /*
  2229. * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
  2230. * this check is valid for both Intel and AMD
  2231. */
  2232. __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
  2233. has_aperf = ecx & (1 << 0);
  2234. do_dts = eax & (1 << 0);
  2235. do_ptm = eax & (1 << 6);
  2236. has_epb = ecx & (1 << 3);
  2237. if (debug)
  2238. fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sEPB\n",
  2239. has_aperf ? "" : "No ",
  2240. do_dts ? "" : "No ",
  2241. do_ptm ? "" : "No ",
  2242. has_epb ? "" : "No ");
  2243. if (max_level > 0x15) {
  2244. unsigned int eax_crystal;
  2245. unsigned int ebx_tsc;
  2246. /*
  2247. * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
  2248. */
  2249. eax_crystal = ebx_tsc = crystal_hz = edx = 0;
  2250. __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
  2251. if (ebx_tsc != 0) {
  2252. if (debug && (ebx != 0))
  2253. fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
  2254. eax_crystal, ebx_tsc, crystal_hz);
  2255. if (crystal_hz == 0)
  2256. switch(model) {
  2257. case 0x4E: /* SKL */
  2258. case 0x5E: /* SKL */
  2259. crystal_hz = 24000000; /* 24 MHz */
  2260. break;
  2261. default:
  2262. crystal_hz = 0;
  2263. }
  2264. if (crystal_hz) {
  2265. tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
  2266. if (debug)
  2267. fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
  2268. tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
  2269. }
  2270. }
  2271. }
  2272. do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
  2273. do_snb_cstates = has_snb_msrs(family, model);
  2274. do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
  2275. do_pc3 = (pkg_cstate_limit >= PCL__3);
  2276. do_pc6 = (pkg_cstate_limit >= PCL__6);
  2277. do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
  2278. do_c8_c9_c10 = has_hsw_msrs(family, model);
  2279. do_skl_residency = has_skl_msrs(family, model);
  2280. do_slm_cstates = is_slm(family, model);
  2281. do_knl_cstates = is_knl(family, model);
  2282. bclk = discover_bclk(family, model);
  2283. rapl_probe(family, model);
  2284. perf_limit_reasons_probe(family, model);
  2285. if (debug)
  2286. dump_cstate_pstate_config_info();
  2287. return;
  2288. }
  2289. void help()
  2290. {
  2291. fprintf(stderr,
  2292. "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
  2293. "\n"
  2294. "Turbostat forks the specified COMMAND and prints statistics\n"
  2295. "when COMMAND completes.\n"
  2296. "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
  2297. "to print statistics, until interrupted.\n"
  2298. "--debug run in \"debug\" mode\n"
  2299. "--interval sec Override default 5-second measurement interval\n"
  2300. "--help print this help message\n"
  2301. "--counter msr print 32-bit counter at address \"msr\"\n"
  2302. "--Counter msr print 64-bit Counter at address \"msr\"\n"
  2303. "--msr msr print 32-bit value at address \"msr\"\n"
  2304. "--MSR msr print 64-bit Value at address \"msr\"\n"
  2305. "--version print version information\n"
  2306. "\n"
  2307. "For more help, run \"man turbostat\"\n");
  2308. }
  2309. /*
  2310. * in /dev/cpu/ return success for names that are numbers
  2311. * ie. filter out ".", "..", "microcode".
  2312. */
  2313. int dir_filter(const struct dirent *dirp)
  2314. {
  2315. if (isdigit(dirp->d_name[0]))
  2316. return 1;
  2317. else
  2318. return 0;
  2319. }
  2320. int open_dev_cpu_msr(int dummy1)
  2321. {
  2322. return 0;
  2323. }
  2324. void topology_probe()
  2325. {
  2326. int i;
  2327. int max_core_id = 0;
  2328. int max_package_id = 0;
  2329. int max_siblings = 0;
  2330. struct cpu_topology {
  2331. int core_id;
  2332. int physical_package_id;
  2333. } *cpus;
  2334. /* Initialize num_cpus, max_cpu_num */
  2335. topo.num_cpus = 0;
  2336. topo.max_cpu_num = 0;
  2337. for_all_proc_cpus(count_cpus);
  2338. if (!summary_only && topo.num_cpus > 1)
  2339. show_cpu = 1;
  2340. if (debug > 1)
  2341. fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
  2342. cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
  2343. if (cpus == NULL)
  2344. err(1, "calloc cpus");
  2345. /*
  2346. * Allocate and initialize cpu_present_set
  2347. */
  2348. cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
  2349. if (cpu_present_set == NULL)
  2350. err(3, "CPU_ALLOC");
  2351. cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
  2352. CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
  2353. for_all_proc_cpus(mark_cpu_present);
  2354. /*
  2355. * Allocate and initialize cpu_affinity_set
  2356. */
  2357. cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
  2358. if (cpu_affinity_set == NULL)
  2359. err(3, "CPU_ALLOC");
  2360. cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
  2361. CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
  2362. /*
  2363. * For online cpus
  2364. * find max_core_id, max_package_id
  2365. */
  2366. for (i = 0; i <= topo.max_cpu_num; ++i) {
  2367. int siblings;
  2368. if (cpu_is_not_present(i)) {
  2369. if (debug > 1)
  2370. fprintf(stderr, "cpu%d NOT PRESENT\n", i);
  2371. continue;
  2372. }
  2373. cpus[i].core_id = get_core_id(i);
  2374. if (cpus[i].core_id > max_core_id)
  2375. max_core_id = cpus[i].core_id;
  2376. cpus[i].physical_package_id = get_physical_package_id(i);
  2377. if (cpus[i].physical_package_id > max_package_id)
  2378. max_package_id = cpus[i].physical_package_id;
  2379. siblings = get_num_ht_siblings(i);
  2380. if (siblings > max_siblings)
  2381. max_siblings = siblings;
  2382. if (debug > 1)
  2383. fprintf(stderr, "cpu %d pkg %d core %d\n",
  2384. i, cpus[i].physical_package_id, cpus[i].core_id);
  2385. }
  2386. topo.num_cores_per_pkg = max_core_id + 1;
  2387. if (debug > 1)
  2388. fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
  2389. max_core_id, topo.num_cores_per_pkg);
  2390. if (debug && !summary_only && topo.num_cores_per_pkg > 1)
  2391. show_core = 1;
  2392. topo.num_packages = max_package_id + 1;
  2393. if (debug > 1)
  2394. fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
  2395. max_package_id, topo.num_packages);
  2396. if (debug && !summary_only && topo.num_packages > 1)
  2397. show_pkg = 1;
  2398. topo.num_threads_per_core = max_siblings;
  2399. if (debug > 1)
  2400. fprintf(stderr, "max_siblings %d\n", max_siblings);
  2401. free(cpus);
  2402. }
  2403. void
  2404. allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
  2405. {
  2406. int i;
  2407. *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
  2408. topo.num_packages, sizeof(struct thread_data));
  2409. if (*t == NULL)
  2410. goto error;
  2411. for (i = 0; i < topo.num_threads_per_core *
  2412. topo.num_cores_per_pkg * topo.num_packages; i++)
  2413. (*t)[i].cpu_id = -1;
  2414. *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
  2415. sizeof(struct core_data));
  2416. if (*c == NULL)
  2417. goto error;
  2418. for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
  2419. (*c)[i].core_id = -1;
  2420. *p = calloc(topo.num_packages, sizeof(struct pkg_data));
  2421. if (*p == NULL)
  2422. goto error;
  2423. for (i = 0; i < topo.num_packages; i++)
  2424. (*p)[i].package_id = i;
  2425. return;
  2426. error:
  2427. err(1, "calloc counters");
  2428. }
  2429. /*
  2430. * init_counter()
  2431. *
  2432. * set cpu_id, core_num, pkg_num
  2433. * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
  2434. *
  2435. * increment topo.num_cores when 1st core in pkg seen
  2436. */
  2437. void init_counter(struct thread_data *thread_base, struct core_data *core_base,
  2438. struct pkg_data *pkg_base, int thread_num, int core_num,
  2439. int pkg_num, int cpu_id)
  2440. {
  2441. struct thread_data *t;
  2442. struct core_data *c;
  2443. struct pkg_data *p;
  2444. t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
  2445. c = GET_CORE(core_base, core_num, pkg_num);
  2446. p = GET_PKG(pkg_base, pkg_num);
  2447. t->cpu_id = cpu_id;
  2448. if (thread_num == 0) {
  2449. t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
  2450. if (cpu_is_first_core_in_package(cpu_id))
  2451. t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
  2452. }
  2453. c->core_id = core_num;
  2454. p->package_id = pkg_num;
  2455. }
  2456. int initialize_counters(int cpu_id)
  2457. {
  2458. int my_thread_id, my_core_id, my_package_id;
  2459. my_package_id = get_physical_package_id(cpu_id);
  2460. my_core_id = get_core_id(cpu_id);
  2461. my_thread_id = get_cpu_position_in_core(cpu_id);
  2462. if (!my_thread_id)
  2463. topo.num_cores++;
  2464. init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
  2465. init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
  2466. return 0;
  2467. }
  2468. void allocate_output_buffer()
  2469. {
  2470. output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
  2471. outp = output_buffer;
  2472. if (outp == NULL)
  2473. err(-1, "calloc output buffer");
  2474. }
  2475. void setup_all_buffers(void)
  2476. {
  2477. topology_probe();
  2478. allocate_counters(&thread_even, &core_even, &package_even);
  2479. allocate_counters(&thread_odd, &core_odd, &package_odd);
  2480. allocate_output_buffer();
  2481. for_all_proc_cpus(initialize_counters);
  2482. }
  2483. void set_base_cpu(void)
  2484. {
  2485. base_cpu = sched_getcpu();
  2486. if (base_cpu < 0)
  2487. err(-ENODEV, "No valid cpus found");
  2488. if (debug > 1)
  2489. fprintf(stderr, "base_cpu = %d\n", base_cpu);
  2490. }
  2491. void turbostat_init()
  2492. {
  2493. setup_all_buffers();
  2494. set_base_cpu();
  2495. check_dev_msr();
  2496. check_permissions();
  2497. process_cpuid();
  2498. if (debug)
  2499. for_all_cpus(print_epb, ODD_COUNTERS);
  2500. if (debug)
  2501. for_all_cpus(print_perf_limit, ODD_COUNTERS);
  2502. if (debug)
  2503. for_all_cpus(print_rapl, ODD_COUNTERS);
  2504. for_all_cpus(set_temperature_target, ODD_COUNTERS);
  2505. if (debug)
  2506. for_all_cpus(print_thermal, ODD_COUNTERS);
  2507. }
  2508. int fork_it(char **argv)
  2509. {
  2510. pid_t child_pid;
  2511. int status;
  2512. status = for_all_cpus(get_counters, EVEN_COUNTERS);
  2513. if (status)
  2514. exit(status);
  2515. /* clear affinity side-effect of get_counters() */
  2516. sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
  2517. gettimeofday(&tv_even, (struct timezone *)NULL);
  2518. child_pid = fork();
  2519. if (!child_pid) {
  2520. /* child */
  2521. execvp(argv[0], argv);
  2522. } else {
  2523. /* parent */
  2524. if (child_pid == -1)
  2525. err(1, "fork");
  2526. signal(SIGINT, SIG_IGN);
  2527. signal(SIGQUIT, SIG_IGN);
  2528. if (waitpid(child_pid, &status, 0) == -1)
  2529. err(status, "waitpid");
  2530. }
  2531. /*
  2532. * n.b. fork_it() does not check for errors from for_all_cpus()
  2533. * because re-starting is problematic when forking
  2534. */
  2535. for_all_cpus(get_counters, ODD_COUNTERS);
  2536. gettimeofday(&tv_odd, (struct timezone *)NULL);
  2537. timersub(&tv_odd, &tv_even, &tv_delta);
  2538. for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
  2539. compute_average(EVEN_COUNTERS);
  2540. format_all_counters(EVEN_COUNTERS);
  2541. flush_stderr();
  2542. fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
  2543. return status;
  2544. }
  2545. int get_and_dump_counters(void)
  2546. {
  2547. int status;
  2548. status = for_all_cpus(get_counters, ODD_COUNTERS);
  2549. if (status)
  2550. return status;
  2551. status = for_all_cpus(dump_counters, ODD_COUNTERS);
  2552. if (status)
  2553. return status;
  2554. flush_stdout();
  2555. return status;
  2556. }
  2557. void print_version() {
  2558. fprintf(stderr, "turbostat version 4.7 27-May, 2015"
  2559. " - Len Brown <lenb@kernel.org>\n");
  2560. }
  2561. void cmdline(int argc, char **argv)
  2562. {
  2563. int opt;
  2564. int option_index = 0;
  2565. static struct option long_options[] = {
  2566. {"Counter", required_argument, 0, 'C'},
  2567. {"counter", required_argument, 0, 'c'},
  2568. {"Dump", no_argument, 0, 'D'},
  2569. {"debug", no_argument, 0, 'd'},
  2570. {"interval", required_argument, 0, 'i'},
  2571. {"help", no_argument, 0, 'h'},
  2572. {"Joules", no_argument, 0, 'J'},
  2573. {"MSR", required_argument, 0, 'M'},
  2574. {"msr", required_argument, 0, 'm'},
  2575. {"Package", no_argument, 0, 'p'},
  2576. {"processor", no_argument, 0, 'p'},
  2577. {"Summary", no_argument, 0, 'S'},
  2578. {"TCC", required_argument, 0, 'T'},
  2579. {"version", no_argument, 0, 'v' },
  2580. {0, 0, 0, 0 }
  2581. };
  2582. progname = argv[0];
  2583. while ((opt = getopt_long_only(argc, argv, "C:c:Ddhi:JM:m:PpST:v",
  2584. long_options, &option_index)) != -1) {
  2585. switch (opt) {
  2586. case 'C':
  2587. sscanf(optarg, "%x", &extra_delta_offset64);
  2588. break;
  2589. case 'c':
  2590. sscanf(optarg, "%x", &extra_delta_offset32);
  2591. break;
  2592. case 'D':
  2593. dump_only++;
  2594. break;
  2595. case 'd':
  2596. debug++;
  2597. break;
  2598. case 'h':
  2599. default:
  2600. help();
  2601. exit(1);
  2602. case 'i':
  2603. interval_sec = atoi(optarg);
  2604. break;
  2605. case 'J':
  2606. rapl_joules++;
  2607. break;
  2608. case 'M':
  2609. sscanf(optarg, "%x", &extra_msr_offset64);
  2610. break;
  2611. case 'm':
  2612. sscanf(optarg, "%x", &extra_msr_offset32);
  2613. break;
  2614. case 'P':
  2615. show_pkg_only++;
  2616. break;
  2617. case 'p':
  2618. show_core_only++;
  2619. break;
  2620. case 'S':
  2621. summary_only++;
  2622. break;
  2623. case 'T':
  2624. tcc_activation_temp_override = atoi(optarg);
  2625. break;
  2626. case 'v':
  2627. print_version();
  2628. exit(0);
  2629. break;
  2630. }
  2631. }
  2632. }
  2633. int main(int argc, char **argv)
  2634. {
  2635. cmdline(argc, argv);
  2636. if (debug)
  2637. print_version();
  2638. turbostat_init();
  2639. /* dump counters and exit */
  2640. if (dump_only)
  2641. return get_and_dump_counters();
  2642. /*
  2643. * if any params left, it must be a command to fork
  2644. */
  2645. if (argc - optind)
  2646. return fork_it(argv + optind);
  2647. else
  2648. turbostat_loop();
  2649. return 0;
  2650. }