ohci-dbg.c 20 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * This file is licenced under the GPL.
  8. */
  9. /*-------------------------------------------------------------------------*/
  10. #define edstring(ed_type) ({ char *temp; \
  11. switch (ed_type) { \
  12. case PIPE_CONTROL: temp = "ctrl"; break; \
  13. case PIPE_BULK: temp = "bulk"; break; \
  14. case PIPE_INTERRUPT: temp = "intr"; break; \
  15. default: temp = "isoc"; break; \
  16. } temp;})
  17. #define pipestring(pipe) edstring(usb_pipetype(pipe))
  18. #define ohci_dbg_sw(ohci, next, size, format, arg...) \
  19. do { \
  20. if (next != NULL) { \
  21. unsigned s_len; \
  22. s_len = scnprintf (*next, *size, format, ## arg ); \
  23. *size -= s_len; *next += s_len; \
  24. } else \
  25. ohci_dbg(ohci,format, ## arg ); \
  26. } while (0);
  27. /* Version for use where "next" is the address of a local variable */
  28. #define ohci_dbg_nosw(ohci, next, size, format, arg...) \
  29. do { \
  30. unsigned s_len; \
  31. s_len = scnprintf(*next, *size, format, ## arg); \
  32. *size -= s_len; *next += s_len; \
  33. } while (0);
  34. static void ohci_dump_intr_mask (
  35. struct ohci_hcd *ohci,
  36. char *label,
  37. u32 mask,
  38. char **next,
  39. unsigned *size)
  40. {
  41. ohci_dbg_sw (ohci, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s\n",
  42. label,
  43. mask,
  44. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  45. (mask & OHCI_INTR_OC) ? " OC" : "",
  46. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  47. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  48. (mask & OHCI_INTR_UE) ? " UE" : "",
  49. (mask & OHCI_INTR_RD) ? " RD" : "",
  50. (mask & OHCI_INTR_SF) ? " SF" : "",
  51. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  52. (mask & OHCI_INTR_SO) ? " SO" : ""
  53. );
  54. }
  55. static void maybe_print_eds (
  56. struct ohci_hcd *ohci,
  57. char *label,
  58. u32 value,
  59. char **next,
  60. unsigned *size)
  61. {
  62. if (value)
  63. ohci_dbg_sw (ohci, next, size, "%s %08x\n", label, value);
  64. }
  65. static char *hcfs2string (int state)
  66. {
  67. switch (state) {
  68. case OHCI_USB_RESET: return "reset";
  69. case OHCI_USB_RESUME: return "resume";
  70. case OHCI_USB_OPER: return "operational";
  71. case OHCI_USB_SUSPEND: return "suspend";
  72. }
  73. return "?";
  74. }
  75. static const char *rh_state_string(struct ohci_hcd *ohci)
  76. {
  77. switch (ohci->rh_state) {
  78. case OHCI_RH_HALTED:
  79. return "halted";
  80. case OHCI_RH_SUSPENDED:
  81. return "suspended";
  82. case OHCI_RH_RUNNING:
  83. return "running";
  84. }
  85. return "?";
  86. }
  87. // dump control and status registers
  88. static void
  89. ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
  90. {
  91. struct ohci_regs __iomem *regs = controller->regs;
  92. u32 temp;
  93. temp = ohci_readl (controller, &regs->revision) & 0xff;
  94. ohci_dbg_sw (controller, next, size,
  95. "OHCI %d.%d, %s legacy support registers, rh state %s\n",
  96. 0x03 & (temp >> 4), (temp & 0x0f),
  97. (temp & 0x0100) ? "with" : "NO",
  98. rh_state_string(controller));
  99. temp = ohci_readl (controller, &regs->control);
  100. ohci_dbg_sw (controller, next, size,
  101. "control 0x%03x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\n",
  102. temp,
  103. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  104. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  105. (temp & OHCI_CTRL_IR) ? " IR" : "",
  106. hcfs2string (temp & OHCI_CTRL_HCFS),
  107. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  108. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  109. (temp & OHCI_CTRL_IE) ? " IE" : "",
  110. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  111. temp & OHCI_CTRL_CBSR
  112. );
  113. temp = ohci_readl (controller, &regs->cmdstatus);
  114. ohci_dbg_sw (controller, next, size,
  115. "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp,
  116. (temp & OHCI_SOC) >> 16,
  117. (temp & OHCI_OCR) ? " OCR" : "",
  118. (temp & OHCI_BLF) ? " BLF" : "",
  119. (temp & OHCI_CLF) ? " CLF" : "",
  120. (temp & OHCI_HCR) ? " HCR" : ""
  121. );
  122. ohci_dump_intr_mask (controller, "intrstatus",
  123. ohci_readl (controller, &regs->intrstatus),
  124. next, size);
  125. ohci_dump_intr_mask (controller, "intrenable",
  126. ohci_readl (controller, &regs->intrenable),
  127. next, size);
  128. // intrdisable always same as intrenable
  129. maybe_print_eds (controller, "ed_periodcurrent",
  130. ohci_readl (controller, &regs->ed_periodcurrent),
  131. next, size);
  132. maybe_print_eds (controller, "ed_controlhead",
  133. ohci_readl (controller, &regs->ed_controlhead),
  134. next, size);
  135. maybe_print_eds (controller, "ed_controlcurrent",
  136. ohci_readl (controller, &regs->ed_controlcurrent),
  137. next, size);
  138. maybe_print_eds (controller, "ed_bulkhead",
  139. ohci_readl (controller, &regs->ed_bulkhead),
  140. next, size);
  141. maybe_print_eds (controller, "ed_bulkcurrent",
  142. ohci_readl (controller, &regs->ed_bulkcurrent),
  143. next, size);
  144. maybe_print_eds (controller, "donehead",
  145. ohci_readl (controller, &regs->donehead), next, size);
  146. }
  147. #define dbg_port_sw(hc,num,value,next,size) \
  148. ohci_dbg_sw (hc, next, size, \
  149. "roothub.portstatus [%d] " \
  150. "0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
  151. num, temp, \
  152. (temp & RH_PS_PRSC) ? " PRSC" : "", \
  153. (temp & RH_PS_OCIC) ? " OCIC" : "", \
  154. (temp & RH_PS_PSSC) ? " PSSC" : "", \
  155. (temp & RH_PS_PESC) ? " PESC" : "", \
  156. (temp & RH_PS_CSC) ? " CSC" : "", \
  157. \
  158. (temp & RH_PS_LSDA) ? " LSDA" : "", \
  159. (temp & RH_PS_PPS) ? " PPS" : "", \
  160. (temp & RH_PS_PRS) ? " PRS" : "", \
  161. (temp & RH_PS_POCI) ? " POCI" : "", \
  162. (temp & RH_PS_PSS) ? " PSS" : "", \
  163. \
  164. (temp & RH_PS_PES) ? " PES" : "", \
  165. (temp & RH_PS_CCS) ? " CCS" : "" \
  166. );
  167. static void
  168. ohci_dump_roothub (
  169. struct ohci_hcd *controller,
  170. int verbose,
  171. char **next,
  172. unsigned *size)
  173. {
  174. u32 temp, i;
  175. temp = roothub_a (controller);
  176. if (temp == ~(u32)0)
  177. return;
  178. if (verbose) {
  179. ohci_dbg_sw (controller, next, size,
  180. "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d(%d)\n", temp,
  181. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  182. (temp & RH_A_NOCP) ? " NOCP" : "",
  183. (temp & RH_A_OCPM) ? " OCPM" : "",
  184. (temp & RH_A_DT) ? " DT" : "",
  185. (temp & RH_A_NPS) ? " NPS" : "",
  186. (temp & RH_A_PSM) ? " PSM" : "",
  187. (temp & RH_A_NDP), controller->num_ports
  188. );
  189. temp = roothub_b (controller);
  190. ohci_dbg_sw (controller, next, size,
  191. "roothub.b %08x PPCM=%04x DR=%04x\n",
  192. temp,
  193. (temp & RH_B_PPCM) >> 16,
  194. (temp & RH_B_DR)
  195. );
  196. temp = roothub_status (controller);
  197. ohci_dbg_sw (controller, next, size,
  198. "roothub.status %08x%s%s%s%s%s%s\n",
  199. temp,
  200. (temp & RH_HS_CRWE) ? " CRWE" : "",
  201. (temp & RH_HS_OCIC) ? " OCIC" : "",
  202. (temp & RH_HS_LPSC) ? " LPSC" : "",
  203. (temp & RH_HS_DRWE) ? " DRWE" : "",
  204. (temp & RH_HS_OCI) ? " OCI" : "",
  205. (temp & RH_HS_LPS) ? " LPS" : ""
  206. );
  207. }
  208. for (i = 0; i < controller->num_ports; i++) {
  209. temp = roothub_portstatus (controller, i);
  210. dbg_port_sw (controller, i, temp, next, size);
  211. }
  212. }
  213. static void ohci_dump(struct ohci_hcd *controller)
  214. {
  215. ohci_dbg (controller, "OHCI controller state\n");
  216. // dumps some of the state we know about
  217. ohci_dump_status (controller, NULL, NULL);
  218. if (controller->hcca)
  219. ohci_dbg (controller,
  220. "hcca frame #%04x\n", ohci_frame_no(controller));
  221. ohci_dump_roothub (controller, 1, NULL, NULL);
  222. }
  223. static const char data0 [] = "DATA0";
  224. static const char data1 [] = "DATA1";
  225. static void ohci_dump_td (const struct ohci_hcd *ohci, const char *label,
  226. const struct td *td)
  227. {
  228. u32 tmp = hc32_to_cpup (ohci, &td->hwINFO);
  229. ohci_dbg (ohci, "%s td %p%s; urb %p index %d; hw next td %08x\n",
  230. label, td,
  231. (tmp & TD_DONE) ? " (DONE)" : "",
  232. td->urb, td->index,
  233. hc32_to_cpup (ohci, &td->hwNextTD));
  234. if ((tmp & TD_ISO) == 0) {
  235. const char *toggle, *pid;
  236. u32 cbp, be;
  237. switch (tmp & TD_T) {
  238. case TD_T_DATA0: toggle = data0; break;
  239. case TD_T_DATA1: toggle = data1; break;
  240. case TD_T_TOGGLE: toggle = "(CARRY)"; break;
  241. default: toggle = "(?)"; break;
  242. }
  243. switch (tmp & TD_DP) {
  244. case TD_DP_SETUP: pid = "SETUP"; break;
  245. case TD_DP_IN: pid = "IN"; break;
  246. case TD_DP_OUT: pid = "OUT"; break;
  247. default: pid = "(bad pid)"; break;
  248. }
  249. ohci_dbg (ohci, " info %08x CC=%x %s DI=%d %s %s\n", tmp,
  250. TD_CC_GET(tmp), /* EC, */ toggle,
  251. (tmp & TD_DI) >> 21, pid,
  252. (tmp & TD_R) ? "R" : "");
  253. cbp = hc32_to_cpup (ohci, &td->hwCBP);
  254. be = hc32_to_cpup (ohci, &td->hwBE);
  255. ohci_dbg (ohci, " cbp %08x be %08x (len %d)\n", cbp, be,
  256. cbp ? (be + 1 - cbp) : 0);
  257. } else {
  258. unsigned i;
  259. ohci_dbg (ohci, " info %08x CC=%x FC=%d DI=%d SF=%04x\n", tmp,
  260. TD_CC_GET(tmp),
  261. (tmp >> 24) & 0x07,
  262. (tmp & TD_DI) >> 21,
  263. tmp & 0x0000ffff);
  264. ohci_dbg (ohci, " bp0 %08x be %08x\n",
  265. hc32_to_cpup (ohci, &td->hwCBP) & ~0x0fff,
  266. hc32_to_cpup (ohci, &td->hwBE));
  267. for (i = 0; i < MAXPSW; i++) {
  268. u16 psw = ohci_hwPSW (ohci, td, i);
  269. int cc = (psw >> 12) & 0x0f;
  270. ohci_dbg (ohci, " psw [%d] = %2x, CC=%x %s=%d\n", i,
  271. psw, cc,
  272. (cc >= 0x0e) ? "OFFSET" : "SIZE",
  273. psw & 0x0fff);
  274. }
  275. }
  276. }
  277. /* caller MUST own hcd spinlock if verbose is set! */
  278. static void __maybe_unused
  279. ohci_dump_ed (const struct ohci_hcd *ohci, const char *label,
  280. const struct ed *ed, int verbose)
  281. {
  282. u32 tmp = hc32_to_cpu (ohci, ed->hwINFO);
  283. char *type = "";
  284. ohci_dbg (ohci, "%s, ed %p state 0x%x type %s; next ed %08x\n",
  285. label,
  286. ed, ed->state, edstring (ed->type),
  287. hc32_to_cpup (ohci, &ed->hwNextED));
  288. switch (tmp & (ED_IN|ED_OUT)) {
  289. case ED_OUT: type = "-OUT"; break;
  290. case ED_IN: type = "-IN"; break;
  291. /* else from TDs ... control */
  292. }
  293. ohci_dbg (ohci,
  294. " info %08x MAX=%d%s%s%s%s EP=%d%s DEV=%d\n", tmp,
  295. 0x03ff & (tmp >> 16),
  296. (tmp & ED_DEQUEUE) ? " DQ" : "",
  297. (tmp & ED_ISO) ? " ISO" : "",
  298. (tmp & ED_SKIP) ? " SKIP" : "",
  299. (tmp & ED_LOWSPEED) ? " LOW" : "",
  300. 0x000f & (tmp >> 7),
  301. type,
  302. 0x007f & tmp);
  303. tmp = hc32_to_cpup (ohci, &ed->hwHeadP);
  304. ohci_dbg (ohci, " tds: head %08x %s%s tail %08x%s\n",
  305. tmp,
  306. (tmp & ED_C) ? data1 : data0,
  307. (tmp & ED_H) ? " HALT" : "",
  308. hc32_to_cpup (ohci, &ed->hwTailP),
  309. verbose ? "" : " (not listing)");
  310. if (verbose) {
  311. struct list_head *tmp;
  312. /* use ed->td_list because HC concurrently modifies
  313. * hwNextTD as it accumulates ed_donelist.
  314. */
  315. list_for_each (tmp, &ed->td_list) {
  316. struct td *td;
  317. td = list_entry (tmp, struct td, td_list);
  318. ohci_dump_td (ohci, " ->", td);
  319. }
  320. }
  321. }
  322. /*-------------------------------------------------------------------------*/
  323. static int debug_async_open(struct inode *, struct file *);
  324. static int debug_periodic_open(struct inode *, struct file *);
  325. static int debug_registers_open(struct inode *, struct file *);
  326. static int debug_async_open(struct inode *, struct file *);
  327. static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*);
  328. static int debug_close(struct inode *, struct file *);
  329. static const struct file_operations debug_async_fops = {
  330. .owner = THIS_MODULE,
  331. .open = debug_async_open,
  332. .read = debug_output,
  333. .release = debug_close,
  334. .llseek = default_llseek,
  335. };
  336. static const struct file_operations debug_periodic_fops = {
  337. .owner = THIS_MODULE,
  338. .open = debug_periodic_open,
  339. .read = debug_output,
  340. .release = debug_close,
  341. .llseek = default_llseek,
  342. };
  343. static const struct file_operations debug_registers_fops = {
  344. .owner = THIS_MODULE,
  345. .open = debug_registers_open,
  346. .read = debug_output,
  347. .release = debug_close,
  348. .llseek = default_llseek,
  349. };
  350. static struct dentry *ohci_debug_root;
  351. struct debug_buffer {
  352. ssize_t (*fill_func)(struct debug_buffer *); /* fill method */
  353. struct ohci_hcd *ohci;
  354. struct mutex mutex; /* protect filling of buffer */
  355. size_t count; /* number of characters filled into buffer */
  356. char *page;
  357. };
  358. static ssize_t
  359. show_list (struct ohci_hcd *ohci, char *buf, size_t count, struct ed *ed)
  360. {
  361. unsigned temp, size = count;
  362. if (!ed)
  363. return 0;
  364. /* print first --> last */
  365. while (ed->ed_prev)
  366. ed = ed->ed_prev;
  367. /* dump a snapshot of the bulk or control schedule */
  368. while (ed) {
  369. u32 info = hc32_to_cpu (ohci, ed->hwINFO);
  370. u32 headp = hc32_to_cpu (ohci, ed->hwHeadP);
  371. struct list_head *entry;
  372. struct td *td;
  373. temp = scnprintf (buf, size,
  374. "ed/%p %cs dev%d ep%d%s max %d %08x%s%s %s",
  375. ed,
  376. (info & ED_LOWSPEED) ? 'l' : 'f',
  377. info & 0x7f,
  378. (info >> 7) & 0xf,
  379. (info & ED_IN) ? "in" : "out",
  380. 0x03ff & (info >> 16),
  381. info,
  382. (info & ED_SKIP) ? " s" : "",
  383. (headp & ED_H) ? " H" : "",
  384. (headp & ED_C) ? data1 : data0);
  385. size -= temp;
  386. buf += temp;
  387. list_for_each (entry, &ed->td_list) {
  388. u32 cbp, be;
  389. td = list_entry (entry, struct td, td_list);
  390. info = hc32_to_cpup (ohci, &td->hwINFO);
  391. cbp = hc32_to_cpup (ohci, &td->hwCBP);
  392. be = hc32_to_cpup (ohci, &td->hwBE);
  393. temp = scnprintf (buf, size,
  394. "\n\ttd %p %s %d cc=%x urb %p (%08x)",
  395. td,
  396. ({ char *pid;
  397. switch (info & TD_DP) {
  398. case TD_DP_SETUP: pid = "setup"; break;
  399. case TD_DP_IN: pid = "in"; break;
  400. case TD_DP_OUT: pid = "out"; break;
  401. default: pid = "(?)"; break;
  402. } pid;}),
  403. cbp ? (be + 1 - cbp) : 0,
  404. TD_CC_GET (info), td->urb, info);
  405. size -= temp;
  406. buf += temp;
  407. }
  408. temp = scnprintf (buf, size, "\n");
  409. size -= temp;
  410. buf += temp;
  411. ed = ed->ed_next;
  412. }
  413. return count - size;
  414. }
  415. static ssize_t fill_async_buffer(struct debug_buffer *buf)
  416. {
  417. struct ohci_hcd *ohci;
  418. size_t temp, size;
  419. unsigned long flags;
  420. ohci = buf->ohci;
  421. size = PAGE_SIZE;
  422. /* display control and bulk lists together, for simplicity */
  423. spin_lock_irqsave (&ohci->lock, flags);
  424. temp = show_list(ohci, buf->page, size, ohci->ed_controltail);
  425. temp += show_list(ohci, buf->page + temp, size - temp,
  426. ohci->ed_bulktail);
  427. spin_unlock_irqrestore (&ohci->lock, flags);
  428. return temp;
  429. }
  430. #define DBG_SCHED_LIMIT 64
  431. static ssize_t fill_periodic_buffer(struct debug_buffer *buf)
  432. {
  433. struct ohci_hcd *ohci;
  434. struct ed **seen, *ed;
  435. unsigned long flags;
  436. unsigned temp, size, seen_count;
  437. char *next;
  438. unsigned i;
  439. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
  440. return 0;
  441. seen_count = 0;
  442. ohci = buf->ohci;
  443. next = buf->page;
  444. size = PAGE_SIZE;
  445. temp = scnprintf (next, size, "size = %d\n", NUM_INTS);
  446. size -= temp;
  447. next += temp;
  448. /* dump a snapshot of the periodic schedule (and load) */
  449. spin_lock_irqsave (&ohci->lock, flags);
  450. for (i = 0; i < NUM_INTS; i++) {
  451. if (!(ed = ohci->periodic [i]))
  452. continue;
  453. temp = scnprintf (next, size, "%2d [%3d]:", i, ohci->load [i]);
  454. size -= temp;
  455. next += temp;
  456. do {
  457. temp = scnprintf (next, size, " ed%d/%p",
  458. ed->interval, ed);
  459. size -= temp;
  460. next += temp;
  461. for (temp = 0; temp < seen_count; temp++) {
  462. if (seen [temp] == ed)
  463. break;
  464. }
  465. /* show more info the first time around */
  466. if (temp == seen_count) {
  467. u32 info = hc32_to_cpu (ohci, ed->hwINFO);
  468. struct list_head *entry;
  469. unsigned qlen = 0;
  470. /* qlen measured here in TDs, not urbs */
  471. list_for_each (entry, &ed->td_list)
  472. qlen++;
  473. temp = scnprintf (next, size,
  474. " (%cs dev%d ep%d%s-%s qlen %u"
  475. " max %d %08x%s%s)",
  476. (info & ED_LOWSPEED) ? 'l' : 'f',
  477. info & 0x7f,
  478. (info >> 7) & 0xf,
  479. (info & ED_IN) ? "in" : "out",
  480. (info & ED_ISO) ? "iso" : "int",
  481. qlen,
  482. 0x03ff & (info >> 16),
  483. info,
  484. (info & ED_SKIP) ? " K" : "",
  485. (ed->hwHeadP &
  486. cpu_to_hc32(ohci, ED_H)) ?
  487. " H" : "");
  488. size -= temp;
  489. next += temp;
  490. if (seen_count < DBG_SCHED_LIMIT)
  491. seen [seen_count++] = ed;
  492. ed = ed->ed_next;
  493. } else {
  494. /* we've seen it and what's after */
  495. temp = 0;
  496. ed = NULL;
  497. }
  498. } while (ed);
  499. temp = scnprintf (next, size, "\n");
  500. size -= temp;
  501. next += temp;
  502. }
  503. spin_unlock_irqrestore (&ohci->lock, flags);
  504. kfree (seen);
  505. return PAGE_SIZE - size;
  506. }
  507. #undef DBG_SCHED_LIMIT
  508. static ssize_t fill_registers_buffer(struct debug_buffer *buf)
  509. {
  510. struct usb_hcd *hcd;
  511. struct ohci_hcd *ohci;
  512. struct ohci_regs __iomem *regs;
  513. unsigned long flags;
  514. unsigned temp, size;
  515. char *next;
  516. u32 rdata;
  517. ohci = buf->ohci;
  518. hcd = ohci_to_hcd(ohci);
  519. regs = ohci->regs;
  520. next = buf->page;
  521. size = PAGE_SIZE;
  522. spin_lock_irqsave (&ohci->lock, flags);
  523. /* dump driver info, then registers in spec order */
  524. ohci_dbg_nosw(ohci, &next, &size,
  525. "bus %s, device %s\n"
  526. "%s\n"
  527. "%s\n",
  528. hcd->self.controller->bus->name,
  529. dev_name(hcd->self.controller),
  530. hcd->product_desc,
  531. hcd_name);
  532. if (!HCD_HW_ACCESSIBLE(hcd)) {
  533. size -= scnprintf (next, size,
  534. "SUSPENDED (no register access)\n");
  535. goto done;
  536. }
  537. ohci_dump_status(ohci, &next, &size);
  538. /* hcca */
  539. if (ohci->hcca)
  540. ohci_dbg_nosw(ohci, &next, &size,
  541. "hcca frame 0x%04x\n", ohci_frame_no(ohci));
  542. /* other registers mostly affect frame timings */
  543. rdata = ohci_readl (ohci, &regs->fminterval);
  544. temp = scnprintf (next, size,
  545. "fmintvl 0x%08x %sFSMPS=0x%04x FI=0x%04x\n",
  546. rdata, (rdata >> 31) ? "FIT " : "",
  547. (rdata >> 16) & 0xefff, rdata & 0xffff);
  548. size -= temp;
  549. next += temp;
  550. rdata = ohci_readl (ohci, &regs->fmremaining);
  551. temp = scnprintf (next, size, "fmremaining 0x%08x %sFR=0x%04x\n",
  552. rdata, (rdata >> 31) ? "FRT " : "",
  553. rdata & 0x3fff);
  554. size -= temp;
  555. next += temp;
  556. rdata = ohci_readl (ohci, &regs->periodicstart);
  557. temp = scnprintf (next, size, "periodicstart 0x%04x\n",
  558. rdata & 0x3fff);
  559. size -= temp;
  560. next += temp;
  561. rdata = ohci_readl (ohci, &regs->lsthresh);
  562. temp = scnprintf (next, size, "lsthresh 0x%04x\n",
  563. rdata & 0x3fff);
  564. size -= temp;
  565. next += temp;
  566. temp = scnprintf (next, size, "hub poll timer %s\n",
  567. HCD_POLL_RH(ohci_to_hcd(ohci)) ? "ON" : "off");
  568. size -= temp;
  569. next += temp;
  570. /* roothub */
  571. ohci_dump_roothub (ohci, 1, &next, &size);
  572. done:
  573. spin_unlock_irqrestore (&ohci->lock, flags);
  574. return PAGE_SIZE - size;
  575. }
  576. static struct debug_buffer *alloc_buffer(struct ohci_hcd *ohci,
  577. ssize_t (*fill_func)(struct debug_buffer *))
  578. {
  579. struct debug_buffer *buf;
  580. buf = kzalloc(sizeof(struct debug_buffer), GFP_KERNEL);
  581. if (buf) {
  582. buf->ohci = ohci;
  583. buf->fill_func = fill_func;
  584. mutex_init(&buf->mutex);
  585. }
  586. return buf;
  587. }
  588. static int fill_buffer(struct debug_buffer *buf)
  589. {
  590. int ret = 0;
  591. if (!buf->page)
  592. buf->page = (char *)get_zeroed_page(GFP_KERNEL);
  593. if (!buf->page) {
  594. ret = -ENOMEM;
  595. goto out;
  596. }
  597. ret = buf->fill_func(buf);
  598. if (ret >= 0) {
  599. buf->count = ret;
  600. ret = 0;
  601. }
  602. out:
  603. return ret;
  604. }
  605. static ssize_t debug_output(struct file *file, char __user *user_buf,
  606. size_t len, loff_t *offset)
  607. {
  608. struct debug_buffer *buf = file->private_data;
  609. int ret = 0;
  610. mutex_lock(&buf->mutex);
  611. if (buf->count == 0) {
  612. ret = fill_buffer(buf);
  613. if (ret != 0) {
  614. mutex_unlock(&buf->mutex);
  615. goto out;
  616. }
  617. }
  618. mutex_unlock(&buf->mutex);
  619. ret = simple_read_from_buffer(user_buf, len, offset,
  620. buf->page, buf->count);
  621. out:
  622. return ret;
  623. }
  624. static int debug_close(struct inode *inode, struct file *file)
  625. {
  626. struct debug_buffer *buf = file->private_data;
  627. if (buf) {
  628. if (buf->page)
  629. free_page((unsigned long)buf->page);
  630. kfree(buf);
  631. }
  632. return 0;
  633. }
  634. static int debug_async_open(struct inode *inode, struct file *file)
  635. {
  636. file->private_data = alloc_buffer(inode->i_private, fill_async_buffer);
  637. return file->private_data ? 0 : -ENOMEM;
  638. }
  639. static int debug_periodic_open(struct inode *inode, struct file *file)
  640. {
  641. file->private_data = alloc_buffer(inode->i_private,
  642. fill_periodic_buffer);
  643. return file->private_data ? 0 : -ENOMEM;
  644. }
  645. static int debug_registers_open(struct inode *inode, struct file *file)
  646. {
  647. file->private_data = alloc_buffer(inode->i_private,
  648. fill_registers_buffer);
  649. return file->private_data ? 0 : -ENOMEM;
  650. }
  651. static inline void create_debug_files (struct ohci_hcd *ohci)
  652. {
  653. struct usb_bus *bus = &ohci_to_hcd(ohci)->self;
  654. ohci->debug_dir = debugfs_create_dir(bus->bus_name, ohci_debug_root);
  655. if (!ohci->debug_dir)
  656. goto dir_error;
  657. ohci->debug_async = debugfs_create_file("async", S_IRUGO,
  658. ohci->debug_dir, ohci,
  659. &debug_async_fops);
  660. if (!ohci->debug_async)
  661. goto async_error;
  662. ohci->debug_periodic = debugfs_create_file("periodic", S_IRUGO,
  663. ohci->debug_dir, ohci,
  664. &debug_periodic_fops);
  665. if (!ohci->debug_periodic)
  666. goto periodic_error;
  667. ohci->debug_registers = debugfs_create_file("registers", S_IRUGO,
  668. ohci->debug_dir, ohci,
  669. &debug_registers_fops);
  670. if (!ohci->debug_registers)
  671. goto registers_error;
  672. ohci_dbg (ohci, "created debug files\n");
  673. return;
  674. registers_error:
  675. debugfs_remove(ohci->debug_periodic);
  676. periodic_error:
  677. debugfs_remove(ohci->debug_async);
  678. async_error:
  679. debugfs_remove(ohci->debug_dir);
  680. dir_error:
  681. ohci->debug_periodic = NULL;
  682. ohci->debug_async = NULL;
  683. ohci->debug_dir = NULL;
  684. }
  685. static inline void remove_debug_files (struct ohci_hcd *ohci)
  686. {
  687. debugfs_remove(ohci->debug_registers);
  688. debugfs_remove(ohci->debug_periodic);
  689. debugfs_remove(ohci->debug_async);
  690. debugfs_remove(ohci->debug_dir);
  691. }
  692. /*-------------------------------------------------------------------------*/