of_serial.c 8.7 KB

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  1. /*
  2. * Serial Port driver for Open Firmware platform devices
  3. *
  4. * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. */
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/serial_reg.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_irq.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/nwpserial.h>
  22. #include <linux/clk.h>
  23. #include "8250/8250.h"
  24. struct of_serial_info {
  25. struct clk *clk;
  26. int type;
  27. int line;
  28. };
  29. #ifdef CONFIG_ARCH_TEGRA
  30. void tegra_serial_handle_break(struct uart_port *p)
  31. {
  32. unsigned int status, tmout = 10000;
  33. do {
  34. status = p->serial_in(p, UART_LSR);
  35. if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  36. status = p->serial_in(p, UART_RX);
  37. else
  38. break;
  39. if (--tmout == 0)
  40. break;
  41. udelay(1);
  42. } while (1);
  43. }
  44. #else
  45. static inline void tegra_serial_handle_break(struct uart_port *port)
  46. {
  47. }
  48. #endif
  49. /*
  50. * Fill a struct uart_port for a given device node
  51. */
  52. static int of_platform_serial_setup(struct platform_device *ofdev,
  53. int type, struct uart_port *port,
  54. struct of_serial_info *info)
  55. {
  56. struct resource resource;
  57. struct device_node *np = ofdev->dev.of_node;
  58. u32 clk, spd, prop;
  59. int ret;
  60. memset(port, 0, sizeof *port);
  61. if (of_property_read_u32(np, "clock-frequency", &clk)) {
  62. /* Get clk rate through clk driver if present */
  63. info->clk = clk_get(&ofdev->dev, NULL);
  64. if (IS_ERR(info->clk)) {
  65. dev_warn(&ofdev->dev,
  66. "clk or clock-frequency not defined\n");
  67. return PTR_ERR(info->clk);
  68. }
  69. clk_prepare_enable(info->clk);
  70. clk = clk_get_rate(info->clk);
  71. }
  72. /* If current-speed was set, then try not to change it. */
  73. if (of_property_read_u32(np, "current-speed", &spd) == 0)
  74. port->custom_divisor = clk / (16 * spd);
  75. ret = of_address_to_resource(np, 0, &resource);
  76. if (ret) {
  77. dev_warn(&ofdev->dev, "invalid address\n");
  78. goto out;
  79. }
  80. spin_lock_init(&port->lock);
  81. port->mapbase = resource.start;
  82. port->mapsize = resource_size(&resource);
  83. /* Check for shifted address mapping */
  84. if (of_property_read_u32(np, "reg-offset", &prop) == 0)
  85. port->mapbase += prop;
  86. /* Check for registers offset within the devices address range */
  87. if (of_property_read_u32(np, "reg-shift", &prop) == 0)
  88. port->regshift = prop;
  89. /* Check for fifo size */
  90. if (of_property_read_u32(np, "fifo-size", &prop) == 0)
  91. port->fifosize = prop;
  92. /* Check for a fixed line number */
  93. ret = of_alias_get_id(np, "serial");
  94. if (ret >= 0)
  95. port->line = ret;
  96. port->irq = irq_of_parse_and_map(np, 0);
  97. port->iotype = UPIO_MEM;
  98. if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
  99. switch (prop) {
  100. case 1:
  101. port->iotype = UPIO_MEM;
  102. break;
  103. case 4:
  104. port->iotype = of_device_is_big_endian(np) ?
  105. UPIO_MEM32BE : UPIO_MEM32;
  106. break;
  107. default:
  108. dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
  109. prop);
  110. ret = -EINVAL;
  111. goto out;
  112. }
  113. }
  114. port->type = type;
  115. port->uartclk = clk;
  116. port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
  117. | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  118. if (of_find_property(np, "no-loopback-test", NULL))
  119. port->flags |= UPF_SKIP_TEST;
  120. port->dev = &ofdev->dev;
  121. switch (type) {
  122. case PORT_TEGRA:
  123. port->handle_break = tegra_serial_handle_break;
  124. break;
  125. case PORT_RT2880:
  126. port->iotype = UPIO_AU;
  127. break;
  128. }
  129. return 0;
  130. out:
  131. if (info->clk)
  132. clk_disable_unprepare(info->clk);
  133. return ret;
  134. }
  135. /*
  136. * Try to register a serial port
  137. */
  138. static const struct of_device_id of_platform_serial_table[];
  139. static int of_platform_serial_probe(struct platform_device *ofdev)
  140. {
  141. const struct of_device_id *match;
  142. struct of_serial_info *info;
  143. struct uart_port port;
  144. int port_type;
  145. int ret;
  146. match = of_match_device(of_platform_serial_table, &ofdev->dev);
  147. if (!match)
  148. return -EINVAL;
  149. if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
  150. return -EBUSY;
  151. info = kzalloc(sizeof(*info), GFP_KERNEL);
  152. if (info == NULL)
  153. return -ENOMEM;
  154. port_type = (unsigned long)match->data;
  155. ret = of_platform_serial_setup(ofdev, port_type, &port, info);
  156. if (ret)
  157. goto out;
  158. switch (port_type) {
  159. #ifdef CONFIG_SERIAL_8250
  160. case PORT_8250 ... PORT_MAX_8250:
  161. {
  162. struct uart_8250_port port8250;
  163. memset(&port8250, 0, sizeof(port8250));
  164. port.type = port_type;
  165. port8250.port = port;
  166. if (port.fifosize)
  167. port8250.capabilities = UART_CAP_FIFO;
  168. if (of_property_read_bool(ofdev->dev.of_node,
  169. "auto-flow-control"))
  170. port8250.capabilities |= UART_CAP_AFE;
  171. ret = serial8250_register_8250_port(&port8250);
  172. break;
  173. }
  174. #endif
  175. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  176. case PORT_NWPSERIAL:
  177. ret = nwpserial_register_port(&port);
  178. break;
  179. #endif
  180. default:
  181. /* need to add code for these */
  182. case PORT_UNKNOWN:
  183. dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
  184. ret = -ENODEV;
  185. break;
  186. }
  187. if (ret < 0)
  188. goto out;
  189. info->type = port_type;
  190. info->line = ret;
  191. platform_set_drvdata(ofdev, info);
  192. return 0;
  193. out:
  194. kfree(info);
  195. irq_dispose_mapping(port.irq);
  196. return ret;
  197. }
  198. /*
  199. * Release a line
  200. */
  201. static int of_platform_serial_remove(struct platform_device *ofdev)
  202. {
  203. struct of_serial_info *info = platform_get_drvdata(ofdev);
  204. switch (info->type) {
  205. #ifdef CONFIG_SERIAL_8250
  206. case PORT_8250 ... PORT_MAX_8250:
  207. serial8250_unregister_port(info->line);
  208. break;
  209. #endif
  210. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  211. case PORT_NWPSERIAL:
  212. nwpserial_unregister_port(info->line);
  213. break;
  214. #endif
  215. default:
  216. /* need to add code for these */
  217. break;
  218. }
  219. if (info->clk)
  220. clk_disable_unprepare(info->clk);
  221. kfree(info);
  222. return 0;
  223. }
  224. #ifdef CONFIG_PM_SLEEP
  225. #ifdef CONFIG_SERIAL_8250
  226. static void of_serial_suspend_8250(struct of_serial_info *info)
  227. {
  228. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  229. struct uart_port *port = &port8250->port;
  230. serial8250_suspend_port(info->line);
  231. if (info->clk && (!uart_console(port) || console_suspend_enabled))
  232. clk_disable_unprepare(info->clk);
  233. }
  234. static void of_serial_resume_8250(struct of_serial_info *info)
  235. {
  236. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  237. struct uart_port *port = &port8250->port;
  238. if (info->clk && (!uart_console(port) || console_suspend_enabled))
  239. clk_prepare_enable(info->clk);
  240. serial8250_resume_port(info->line);
  241. }
  242. #else
  243. static inline void of_serial_suspend_8250(struct of_serial_info *info)
  244. {
  245. }
  246. static inline void of_serial_resume_8250(struct of_serial_info *info)
  247. {
  248. }
  249. #endif
  250. static int of_serial_suspend(struct device *dev)
  251. {
  252. struct of_serial_info *info = dev_get_drvdata(dev);
  253. switch (info->type) {
  254. case PORT_8250 ... PORT_MAX_8250:
  255. of_serial_suspend_8250(info);
  256. break;
  257. default:
  258. break;
  259. }
  260. return 0;
  261. }
  262. static int of_serial_resume(struct device *dev)
  263. {
  264. struct of_serial_info *info = dev_get_drvdata(dev);
  265. switch (info->type) {
  266. case PORT_8250 ... PORT_MAX_8250:
  267. of_serial_resume_8250(info);
  268. break;
  269. default:
  270. break;
  271. }
  272. return 0;
  273. }
  274. #endif
  275. static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
  276. /*
  277. * A few common types, add more as needed.
  278. */
  279. static const struct of_device_id of_platform_serial_table[] = {
  280. { .compatible = "ns8250", .data = (void *)PORT_8250, },
  281. { .compatible = "ns16450", .data = (void *)PORT_16450, },
  282. { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
  283. { .compatible = "ns16550", .data = (void *)PORT_16550, },
  284. { .compatible = "ns16750", .data = (void *)PORT_16750, },
  285. { .compatible = "ns16850", .data = (void *)PORT_16850, },
  286. { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
  287. { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
  288. { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
  289. { .compatible = "altr,16550-FIFO32",
  290. .data = (void *)PORT_ALTR_16550_F32, },
  291. { .compatible = "altr,16550-FIFO64",
  292. .data = (void *)PORT_ALTR_16550_F64, },
  293. { .compatible = "altr,16550-FIFO128",
  294. .data = (void *)PORT_ALTR_16550_F128, },
  295. { .compatible = "mrvl,mmp-uart",
  296. .data = (void *)PORT_XSCALE, },
  297. { .compatible = "mrvl,pxa-uart",
  298. .data = (void *)PORT_XSCALE, },
  299. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  300. { .compatible = "ibm,qpace-nwp-serial",
  301. .data = (void *)PORT_NWPSERIAL, },
  302. #endif
  303. { /* end of list */ },
  304. };
  305. static struct platform_driver of_platform_serial_driver = {
  306. .driver = {
  307. .name = "of_serial",
  308. .of_match_table = of_platform_serial_table,
  309. },
  310. .probe = of_platform_serial_probe,
  311. .remove = of_platform_serial_remove,
  312. };
  313. module_platform_driver(of_platform_serial_driver);
  314. MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
  315. MODULE_LICENSE("GPL");
  316. MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");