knav_qmss_acc.c 16 KB

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  1. /*
  2. * Keystone accumulator queue manager
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
  5. * Author: Sandeep Nair <sandeep_n@ti.com>
  6. * Cyril Chemparathy <cyril@ti.com>
  7. * Santosh Shilimkar <santosh.shilimkar@ti.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/device.h>
  21. #include <linux/io.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/bitops.h>
  24. #include <linux/slab.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/soc/ti/knav_qmss.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/of.h>
  30. #include <linux/of_device.h>
  31. #include <linux/of_address.h>
  32. #include <linux/firmware.h>
  33. #include "knav_qmss.h"
  34. #define knav_range_offset_to_inst(kdev, range, q) \
  35. (range->queue_base_inst + (q << kdev->inst_shift))
  36. static void __knav_acc_notify(struct knav_range_info *range,
  37. struct knav_acc_channel *acc)
  38. {
  39. struct knav_device *kdev = range->kdev;
  40. struct knav_queue_inst *inst;
  41. int range_base, queue;
  42. range_base = kdev->base_id + range->queue_base;
  43. if (range->flags & RANGE_MULTI_QUEUE) {
  44. for (queue = 0; queue < range->num_queues; queue++) {
  45. inst = knav_range_offset_to_inst(kdev, range,
  46. queue);
  47. if (inst->notify_needed) {
  48. inst->notify_needed = 0;
  49. dev_dbg(kdev->dev, "acc-irq: notifying %d\n",
  50. range_base + queue);
  51. knav_queue_notify(inst);
  52. }
  53. }
  54. } else {
  55. queue = acc->channel - range->acc_info.start_channel;
  56. inst = knav_range_offset_to_inst(kdev, range, queue);
  57. dev_dbg(kdev->dev, "acc-irq: notifying %d\n",
  58. range_base + queue);
  59. knav_queue_notify(inst);
  60. }
  61. }
  62. static int knav_acc_set_notify(struct knav_range_info *range,
  63. struct knav_queue_inst *kq,
  64. bool enabled)
  65. {
  66. struct knav_pdsp_info *pdsp = range->acc_info.pdsp;
  67. struct knav_device *kdev = range->kdev;
  68. u32 mask, offset;
  69. /*
  70. * when enabling, we need to re-trigger an interrupt if we
  71. * have descriptors pending
  72. */
  73. if (!enabled || atomic_read(&kq->desc_count) <= 0)
  74. return 0;
  75. kq->notify_needed = 1;
  76. atomic_inc(&kq->acc->retrigger_count);
  77. mask = BIT(kq->acc->channel % 32);
  78. offset = ACC_INTD_OFFSET_STATUS(kq->acc->channel);
  79. dev_dbg(kdev->dev, "setup-notify: re-triggering irq for %s\n",
  80. kq->acc->name);
  81. writel_relaxed(mask, pdsp->intd + offset);
  82. return 0;
  83. }
  84. static irqreturn_t knav_acc_int_handler(int irq, void *_instdata)
  85. {
  86. struct knav_acc_channel *acc;
  87. struct knav_queue_inst *kq = NULL;
  88. struct knav_range_info *range;
  89. struct knav_pdsp_info *pdsp;
  90. struct knav_acc_info *info;
  91. struct knav_device *kdev;
  92. u32 *list, *list_cpu, val, idx, notifies;
  93. int range_base, channel, queue = 0;
  94. dma_addr_t list_dma;
  95. range = _instdata;
  96. info = &range->acc_info;
  97. kdev = range->kdev;
  98. pdsp = range->acc_info.pdsp;
  99. acc = range->acc;
  100. range_base = kdev->base_id + range->queue_base;
  101. if ((range->flags & RANGE_MULTI_QUEUE) == 0) {
  102. for (queue = 0; queue < range->num_irqs; queue++)
  103. if (range->irqs[queue].irq == irq)
  104. break;
  105. kq = knav_range_offset_to_inst(kdev, range, queue);
  106. acc += queue;
  107. }
  108. channel = acc->channel;
  109. list_dma = acc->list_dma[acc->list_index];
  110. list_cpu = acc->list_cpu[acc->list_index];
  111. dev_dbg(kdev->dev, "acc-irq: channel %d, list %d, virt %p, phys %x\n",
  112. channel, acc->list_index, list_cpu, list_dma);
  113. if (atomic_read(&acc->retrigger_count)) {
  114. atomic_dec(&acc->retrigger_count);
  115. __knav_acc_notify(range, acc);
  116. writel_relaxed(1, pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
  117. /* ack the interrupt */
  118. writel_relaxed(ACC_CHANNEL_INT_BASE + channel,
  119. pdsp->intd + ACC_INTD_OFFSET_EOI);
  120. return IRQ_HANDLED;
  121. }
  122. notifies = readl_relaxed(pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
  123. WARN_ON(!notifies);
  124. dma_sync_single_for_cpu(kdev->dev, list_dma, info->list_size,
  125. DMA_FROM_DEVICE);
  126. for (list = list_cpu; list < list_cpu + (info->list_size / sizeof(u32));
  127. list += ACC_LIST_ENTRY_WORDS) {
  128. if (ACC_LIST_ENTRY_WORDS == 1) {
  129. dev_dbg(kdev->dev,
  130. "acc-irq: list %d, entry @%p, %08x\n",
  131. acc->list_index, list, list[0]);
  132. } else if (ACC_LIST_ENTRY_WORDS == 2) {
  133. dev_dbg(kdev->dev,
  134. "acc-irq: list %d, entry @%p, %08x %08x\n",
  135. acc->list_index, list, list[0], list[1]);
  136. } else if (ACC_LIST_ENTRY_WORDS == 4) {
  137. dev_dbg(kdev->dev,
  138. "acc-irq: list %d, entry @%p, %08x %08x %08x %08x\n",
  139. acc->list_index, list, list[0], list[1],
  140. list[2], list[3]);
  141. }
  142. val = list[ACC_LIST_ENTRY_DESC_IDX];
  143. if (!val)
  144. break;
  145. if (range->flags & RANGE_MULTI_QUEUE) {
  146. queue = list[ACC_LIST_ENTRY_QUEUE_IDX] >> 16;
  147. if (queue < range_base ||
  148. queue >= range_base + range->num_queues) {
  149. dev_err(kdev->dev,
  150. "bad queue %d, expecting %d-%d\n",
  151. queue, range_base,
  152. range_base + range->num_queues);
  153. break;
  154. }
  155. queue -= range_base;
  156. kq = knav_range_offset_to_inst(kdev, range,
  157. queue);
  158. }
  159. if (atomic_inc_return(&kq->desc_count) >= ACC_DESCS_MAX) {
  160. atomic_dec(&kq->desc_count);
  161. dev_err(kdev->dev,
  162. "acc-irq: queue %d full, entry dropped\n",
  163. queue + range_base);
  164. continue;
  165. }
  166. idx = atomic_inc_return(&kq->desc_tail) & ACC_DESCS_MASK;
  167. kq->descs[idx] = val;
  168. kq->notify_needed = 1;
  169. dev_dbg(kdev->dev, "acc-irq: enqueue %08x at %d, queue %d\n",
  170. val, idx, queue + range_base);
  171. }
  172. __knav_acc_notify(range, acc);
  173. memset(list_cpu, 0, info->list_size);
  174. dma_sync_single_for_device(kdev->dev, list_dma, info->list_size,
  175. DMA_TO_DEVICE);
  176. /* flip to the other list */
  177. acc->list_index ^= 1;
  178. /* reset the interrupt counter */
  179. writel_relaxed(1, pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
  180. /* ack the interrupt */
  181. writel_relaxed(ACC_CHANNEL_INT_BASE + channel,
  182. pdsp->intd + ACC_INTD_OFFSET_EOI);
  183. return IRQ_HANDLED;
  184. }
  185. static int knav_range_setup_acc_irq(struct knav_range_info *range,
  186. int queue, bool enabled)
  187. {
  188. struct knav_device *kdev = range->kdev;
  189. struct knav_acc_channel *acc;
  190. unsigned long cpu_map;
  191. int ret = 0, irq;
  192. u32 old, new;
  193. if (range->flags & RANGE_MULTI_QUEUE) {
  194. acc = range->acc;
  195. irq = range->irqs[0].irq;
  196. cpu_map = range->irqs[0].cpu_map;
  197. } else {
  198. acc = range->acc + queue;
  199. irq = range->irqs[queue].irq;
  200. cpu_map = range->irqs[queue].cpu_map;
  201. }
  202. old = acc->open_mask;
  203. if (enabled)
  204. new = old | BIT(queue);
  205. else
  206. new = old & ~BIT(queue);
  207. acc->open_mask = new;
  208. dev_dbg(kdev->dev,
  209. "setup-acc-irq: open mask old %08x, new %08x, channel %s\n",
  210. old, new, acc->name);
  211. if (likely(new == old))
  212. return 0;
  213. if (new && !old) {
  214. dev_dbg(kdev->dev,
  215. "setup-acc-irq: requesting %s for channel %s\n",
  216. acc->name, acc->name);
  217. ret = request_irq(irq, knav_acc_int_handler, 0, acc->name,
  218. range);
  219. if (!ret && cpu_map) {
  220. ret = irq_set_affinity_hint(irq, to_cpumask(&cpu_map));
  221. if (ret) {
  222. dev_warn(range->kdev->dev,
  223. "Failed to set IRQ affinity\n");
  224. return ret;
  225. }
  226. }
  227. }
  228. if (old && !new) {
  229. dev_dbg(kdev->dev, "setup-acc-irq: freeing %s for channel %s\n",
  230. acc->name, acc->name);
  231. free_irq(irq, range);
  232. }
  233. return ret;
  234. }
  235. static const char *knav_acc_result_str(enum knav_acc_result result)
  236. {
  237. static const char * const result_str[] = {
  238. [ACC_RET_IDLE] = "idle",
  239. [ACC_RET_SUCCESS] = "success",
  240. [ACC_RET_INVALID_COMMAND] = "invalid command",
  241. [ACC_RET_INVALID_CHANNEL] = "invalid channel",
  242. [ACC_RET_INACTIVE_CHANNEL] = "inactive channel",
  243. [ACC_RET_ACTIVE_CHANNEL] = "active channel",
  244. [ACC_RET_INVALID_QUEUE] = "invalid queue",
  245. [ACC_RET_INVALID_RET] = "invalid return code",
  246. };
  247. if (result >= ARRAY_SIZE(result_str))
  248. return result_str[ACC_RET_INVALID_RET];
  249. else
  250. return result_str[result];
  251. }
  252. static enum knav_acc_result
  253. knav_acc_write(struct knav_device *kdev, struct knav_pdsp_info *pdsp,
  254. struct knav_reg_acc_command *cmd)
  255. {
  256. u32 result;
  257. dev_dbg(kdev->dev, "acc command %08x %08x %08x %08x %08x\n",
  258. cmd->command, cmd->queue_mask, cmd->list_phys,
  259. cmd->queue_num, cmd->timer_config);
  260. writel_relaxed(cmd->timer_config, &pdsp->acc_command->timer_config);
  261. writel_relaxed(cmd->queue_num, &pdsp->acc_command->queue_num);
  262. writel_relaxed(cmd->list_phys, &pdsp->acc_command->list_phys);
  263. writel_relaxed(cmd->queue_mask, &pdsp->acc_command->queue_mask);
  264. writel_relaxed(cmd->command, &pdsp->acc_command->command);
  265. /* wait for the command to clear */
  266. do {
  267. result = readl_relaxed(&pdsp->acc_command->command);
  268. } while ((result >> 8) & 0xff);
  269. return (result >> 24) & 0xff;
  270. }
  271. static void knav_acc_setup_cmd(struct knav_device *kdev,
  272. struct knav_range_info *range,
  273. struct knav_reg_acc_command *cmd,
  274. int queue)
  275. {
  276. struct knav_acc_info *info = &range->acc_info;
  277. struct knav_acc_channel *acc;
  278. int queue_base;
  279. u32 queue_mask;
  280. if (range->flags & RANGE_MULTI_QUEUE) {
  281. acc = range->acc;
  282. queue_base = range->queue_base;
  283. queue_mask = BIT(range->num_queues) - 1;
  284. } else {
  285. acc = range->acc + queue;
  286. queue_base = range->queue_base + queue;
  287. queue_mask = 0;
  288. }
  289. memset(cmd, 0, sizeof(*cmd));
  290. cmd->command = acc->channel;
  291. cmd->queue_mask = queue_mask;
  292. cmd->list_phys = acc->list_dma[0];
  293. cmd->queue_num = info->list_entries << 16;
  294. cmd->queue_num |= queue_base;
  295. cmd->timer_config = ACC_LIST_ENTRY_TYPE << 18;
  296. if (range->flags & RANGE_MULTI_QUEUE)
  297. cmd->timer_config |= ACC_CFG_MULTI_QUEUE;
  298. cmd->timer_config |= info->pacing_mode << 16;
  299. cmd->timer_config |= info->timer_count;
  300. }
  301. static void knav_acc_stop(struct knav_device *kdev,
  302. struct knav_range_info *range,
  303. int queue)
  304. {
  305. struct knav_reg_acc_command cmd;
  306. struct knav_acc_channel *acc;
  307. enum knav_acc_result result;
  308. acc = range->acc + queue;
  309. knav_acc_setup_cmd(kdev, range, &cmd, queue);
  310. cmd.command |= ACC_CMD_DISABLE_CHANNEL << 8;
  311. result = knav_acc_write(kdev, range->acc_info.pdsp, &cmd);
  312. dev_dbg(kdev->dev, "stopped acc channel %s, result %s\n",
  313. acc->name, knav_acc_result_str(result));
  314. }
  315. static enum knav_acc_result knav_acc_start(struct knav_device *kdev,
  316. struct knav_range_info *range,
  317. int queue)
  318. {
  319. struct knav_reg_acc_command cmd;
  320. struct knav_acc_channel *acc;
  321. enum knav_acc_result result;
  322. acc = range->acc + queue;
  323. knav_acc_setup_cmd(kdev, range, &cmd, queue);
  324. cmd.command |= ACC_CMD_ENABLE_CHANNEL << 8;
  325. result = knav_acc_write(kdev, range->acc_info.pdsp, &cmd);
  326. dev_dbg(kdev->dev, "started acc channel %s, result %s\n",
  327. acc->name, knav_acc_result_str(result));
  328. return result;
  329. }
  330. static int knav_acc_init_range(struct knav_range_info *range)
  331. {
  332. struct knav_device *kdev = range->kdev;
  333. struct knav_acc_channel *acc;
  334. enum knav_acc_result result;
  335. int queue;
  336. for (queue = 0; queue < range->num_queues; queue++) {
  337. acc = range->acc + queue;
  338. knav_acc_stop(kdev, range, queue);
  339. acc->list_index = 0;
  340. result = knav_acc_start(kdev, range, queue);
  341. if (result != ACC_RET_SUCCESS)
  342. return -EIO;
  343. if (range->flags & RANGE_MULTI_QUEUE)
  344. return 0;
  345. }
  346. return 0;
  347. }
  348. static int knav_acc_init_queue(struct knav_range_info *range,
  349. struct knav_queue_inst *kq)
  350. {
  351. unsigned id = kq->id - range->queue_base;
  352. kq->descs = devm_kzalloc(range->kdev->dev,
  353. ACC_DESCS_MAX * sizeof(u32), GFP_KERNEL);
  354. if (!kq->descs)
  355. return -ENOMEM;
  356. kq->acc = range->acc;
  357. if ((range->flags & RANGE_MULTI_QUEUE) == 0)
  358. kq->acc += id;
  359. return 0;
  360. }
  361. static int knav_acc_open_queue(struct knav_range_info *range,
  362. struct knav_queue_inst *inst, unsigned flags)
  363. {
  364. unsigned id = inst->id - range->queue_base;
  365. return knav_range_setup_acc_irq(range, id, true);
  366. }
  367. static int knav_acc_close_queue(struct knav_range_info *range,
  368. struct knav_queue_inst *inst)
  369. {
  370. unsigned id = inst->id - range->queue_base;
  371. return knav_range_setup_acc_irq(range, id, false);
  372. }
  373. static int knav_acc_free_range(struct knav_range_info *range)
  374. {
  375. struct knav_device *kdev = range->kdev;
  376. struct knav_acc_channel *acc;
  377. struct knav_acc_info *info;
  378. int channel, channels;
  379. info = &range->acc_info;
  380. if (range->flags & RANGE_MULTI_QUEUE)
  381. channels = 1;
  382. else
  383. channels = range->num_queues;
  384. for (channel = 0; channel < channels; channel++) {
  385. acc = range->acc + channel;
  386. if (!acc->list_cpu[0])
  387. continue;
  388. dma_unmap_single(kdev->dev, acc->list_dma[0],
  389. info->mem_size, DMA_BIDIRECTIONAL);
  390. free_pages_exact(acc->list_cpu[0], info->mem_size);
  391. }
  392. devm_kfree(range->kdev->dev, range->acc);
  393. return 0;
  394. }
  395. struct knav_range_ops knav_acc_range_ops = {
  396. .set_notify = knav_acc_set_notify,
  397. .init_queue = knav_acc_init_queue,
  398. .open_queue = knav_acc_open_queue,
  399. .close_queue = knav_acc_close_queue,
  400. .init_range = knav_acc_init_range,
  401. .free_range = knav_acc_free_range,
  402. };
  403. /**
  404. * knav_init_acc_range: Initialise accumulator ranges
  405. *
  406. * @kdev: qmss device
  407. * @node: device node
  408. * @range: qmms range information
  409. *
  410. * Return 0 on success or error
  411. */
  412. int knav_init_acc_range(struct knav_device *kdev,
  413. struct device_node *node,
  414. struct knav_range_info *range)
  415. {
  416. struct knav_acc_channel *acc;
  417. struct knav_pdsp_info *pdsp;
  418. struct knav_acc_info *info;
  419. int ret, channel, channels;
  420. int list_size, mem_size;
  421. dma_addr_t list_dma;
  422. void *list_mem;
  423. u32 config[5];
  424. range->flags |= RANGE_HAS_ACCUMULATOR;
  425. info = &range->acc_info;
  426. ret = of_property_read_u32_array(node, "accumulator", config, 5);
  427. if (ret)
  428. return ret;
  429. info->pdsp_id = config[0];
  430. info->start_channel = config[1];
  431. info->list_entries = config[2];
  432. info->pacing_mode = config[3];
  433. info->timer_count = config[4] / ACC_DEFAULT_PERIOD;
  434. if (info->start_channel > ACC_MAX_CHANNEL) {
  435. dev_err(kdev->dev, "channel %d invalid for range %s\n",
  436. info->start_channel, range->name);
  437. return -EINVAL;
  438. }
  439. if (info->pacing_mode > 3) {
  440. dev_err(kdev->dev, "pacing mode %d invalid for range %s\n",
  441. info->pacing_mode, range->name);
  442. return -EINVAL;
  443. }
  444. pdsp = knav_find_pdsp(kdev, info->pdsp_id);
  445. if (!pdsp) {
  446. dev_err(kdev->dev, "pdsp id %d not found for range %s\n",
  447. info->pdsp_id, range->name);
  448. return -EINVAL;
  449. }
  450. info->pdsp = pdsp;
  451. channels = range->num_queues;
  452. if (of_get_property(node, "multi-queue", NULL)) {
  453. range->flags |= RANGE_MULTI_QUEUE;
  454. channels = 1;
  455. if (range->queue_base & (32 - 1)) {
  456. dev_err(kdev->dev,
  457. "misaligned multi-queue accumulator range %s\n",
  458. range->name);
  459. return -EINVAL;
  460. }
  461. if (range->num_queues > 32) {
  462. dev_err(kdev->dev,
  463. "too many queues in accumulator range %s\n",
  464. range->name);
  465. return -EINVAL;
  466. }
  467. }
  468. /* figure out list size */
  469. list_size = info->list_entries;
  470. list_size *= ACC_LIST_ENTRY_WORDS * sizeof(u32);
  471. info->list_size = list_size;
  472. mem_size = PAGE_ALIGN(list_size * 2);
  473. info->mem_size = mem_size;
  474. range->acc = devm_kzalloc(kdev->dev, channels * sizeof(*range->acc),
  475. GFP_KERNEL);
  476. if (!range->acc)
  477. return -ENOMEM;
  478. for (channel = 0; channel < channels; channel++) {
  479. acc = range->acc + channel;
  480. acc->channel = info->start_channel + channel;
  481. /* allocate memory for the two lists */
  482. list_mem = alloc_pages_exact(mem_size, GFP_KERNEL | GFP_DMA);
  483. if (!list_mem)
  484. return -ENOMEM;
  485. list_dma = dma_map_single(kdev->dev, list_mem, mem_size,
  486. DMA_BIDIRECTIONAL);
  487. if (dma_mapping_error(kdev->dev, list_dma)) {
  488. free_pages_exact(list_mem, mem_size);
  489. return -ENOMEM;
  490. }
  491. memset(list_mem, 0, mem_size);
  492. dma_sync_single_for_device(kdev->dev, list_dma, mem_size,
  493. DMA_TO_DEVICE);
  494. scnprintf(acc->name, sizeof(acc->name), "hwqueue-acc-%d",
  495. acc->channel);
  496. acc->list_cpu[0] = list_mem;
  497. acc->list_cpu[1] = list_mem + list_size;
  498. acc->list_dma[0] = list_dma;
  499. acc->list_dma[1] = list_dma + list_size;
  500. dev_dbg(kdev->dev, "%s: channel %d, phys %08x, virt %8p\n",
  501. acc->name, acc->channel, list_dma, list_mem);
  502. }
  503. range->ops = &knav_acc_range_ops;
  504. return 0;
  505. }
  506. EXPORT_SYMBOL_GPL(knav_init_acc_range);