qeth_core_main.c 165 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <net/dsfield.h>
  22. #include <asm/ebcdic.h>
  23. #include <asm/chpid.h>
  24. #include <asm/io.h>
  25. #include <asm/sysinfo.h>
  26. #include <asm/compat.h>
  27. #include "qeth_core.h"
  28. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  29. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  30. /* N P A M L V H */
  31. [QETH_DBF_SETUP] = {"qeth_setup",
  32. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  33. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  34. &debug_sprintf_view, NULL},
  35. [QETH_DBF_CTRL] = {"qeth_control",
  36. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  37. };
  38. EXPORT_SYMBOL_GPL(qeth_dbf);
  39. struct qeth_card_list_struct qeth_core_card_list;
  40. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  41. struct kmem_cache *qeth_core_header_cache;
  42. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  43. static struct kmem_cache *qeth_qdio_outbuf_cache;
  44. static struct device *qeth_core_root_dev;
  45. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  46. static struct lock_class_key qdio_out_skb_queue_key;
  47. static struct mutex qeth_mod_mutex;
  48. static void qeth_send_control_data_cb(struct qeth_channel *,
  49. struct qeth_cmd_buffer *);
  50. static int qeth_issue_next_read(struct qeth_card *);
  51. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  52. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  53. static void qeth_free_buffer_pool(struct qeth_card *);
  54. static int qeth_qdio_establish(struct qeth_card *);
  55. static void qeth_free_qdio_buffers(struct qeth_card *);
  56. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  57. struct qeth_qdio_out_buffer *buf,
  58. enum iucv_tx_notify notification);
  59. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  60. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  61. struct qeth_qdio_out_buffer *buf,
  62. enum qeth_qdio_buffer_states newbufstate);
  63. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  64. struct workqueue_struct *qeth_wq;
  65. EXPORT_SYMBOL_GPL(qeth_wq);
  66. int qeth_card_hw_is_reachable(struct qeth_card *card)
  67. {
  68. return (card->state == CARD_STATE_SOFTSETUP) ||
  69. (card->state == CARD_STATE_UP);
  70. }
  71. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  72. static void qeth_close_dev_handler(struct work_struct *work)
  73. {
  74. struct qeth_card *card;
  75. card = container_of(work, struct qeth_card, close_dev_work);
  76. QETH_CARD_TEXT(card, 2, "cldevhdl");
  77. rtnl_lock();
  78. dev_close(card->dev);
  79. rtnl_unlock();
  80. ccwgroup_set_offline(card->gdev);
  81. }
  82. void qeth_close_dev(struct qeth_card *card)
  83. {
  84. QETH_CARD_TEXT(card, 2, "cldevsubm");
  85. queue_work(qeth_wq, &card->close_dev_work);
  86. }
  87. EXPORT_SYMBOL_GPL(qeth_close_dev);
  88. static inline const char *qeth_get_cardname(struct qeth_card *card)
  89. {
  90. if (card->info.guestlan) {
  91. switch (card->info.type) {
  92. case QETH_CARD_TYPE_OSD:
  93. return " Virtual NIC QDIO";
  94. case QETH_CARD_TYPE_IQD:
  95. return " Virtual NIC Hiper";
  96. case QETH_CARD_TYPE_OSM:
  97. return " Virtual NIC QDIO - OSM";
  98. case QETH_CARD_TYPE_OSX:
  99. return " Virtual NIC QDIO - OSX";
  100. default:
  101. return " unknown";
  102. }
  103. } else {
  104. switch (card->info.type) {
  105. case QETH_CARD_TYPE_OSD:
  106. return " OSD Express";
  107. case QETH_CARD_TYPE_IQD:
  108. return " HiperSockets";
  109. case QETH_CARD_TYPE_OSN:
  110. return " OSN QDIO";
  111. case QETH_CARD_TYPE_OSM:
  112. return " OSM QDIO";
  113. case QETH_CARD_TYPE_OSX:
  114. return " OSX QDIO";
  115. default:
  116. return " unknown";
  117. }
  118. }
  119. return " n/a";
  120. }
  121. /* max length to be returned: 14 */
  122. const char *qeth_get_cardname_short(struct qeth_card *card)
  123. {
  124. if (card->info.guestlan) {
  125. switch (card->info.type) {
  126. case QETH_CARD_TYPE_OSD:
  127. return "Virt.NIC QDIO";
  128. case QETH_CARD_TYPE_IQD:
  129. return "Virt.NIC Hiper";
  130. case QETH_CARD_TYPE_OSM:
  131. return "Virt.NIC OSM";
  132. case QETH_CARD_TYPE_OSX:
  133. return "Virt.NIC OSX";
  134. default:
  135. return "unknown";
  136. }
  137. } else {
  138. switch (card->info.type) {
  139. case QETH_CARD_TYPE_OSD:
  140. switch (card->info.link_type) {
  141. case QETH_LINK_TYPE_FAST_ETH:
  142. return "OSD_100";
  143. case QETH_LINK_TYPE_HSTR:
  144. return "HSTR";
  145. case QETH_LINK_TYPE_GBIT_ETH:
  146. return "OSD_1000";
  147. case QETH_LINK_TYPE_10GBIT_ETH:
  148. return "OSD_10GIG";
  149. case QETH_LINK_TYPE_LANE_ETH100:
  150. return "OSD_FE_LANE";
  151. case QETH_LINK_TYPE_LANE_TR:
  152. return "OSD_TR_LANE";
  153. case QETH_LINK_TYPE_LANE_ETH1000:
  154. return "OSD_GbE_LANE";
  155. case QETH_LINK_TYPE_LANE:
  156. return "OSD_ATM_LANE";
  157. default:
  158. return "OSD_Express";
  159. }
  160. case QETH_CARD_TYPE_IQD:
  161. return "HiperSockets";
  162. case QETH_CARD_TYPE_OSN:
  163. return "OSN";
  164. case QETH_CARD_TYPE_OSM:
  165. return "OSM_1000";
  166. case QETH_CARD_TYPE_OSX:
  167. return "OSX_10GIG";
  168. default:
  169. return "unknown";
  170. }
  171. }
  172. return "n/a";
  173. }
  174. void qeth_set_recovery_task(struct qeth_card *card)
  175. {
  176. card->recovery_task = current;
  177. }
  178. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  179. void qeth_clear_recovery_task(struct qeth_card *card)
  180. {
  181. card->recovery_task = NULL;
  182. }
  183. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  184. static bool qeth_is_recovery_task(const struct qeth_card *card)
  185. {
  186. return card->recovery_task == current;
  187. }
  188. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  189. int clear_start_mask)
  190. {
  191. unsigned long flags;
  192. spin_lock_irqsave(&card->thread_mask_lock, flags);
  193. card->thread_allowed_mask = threads;
  194. if (clear_start_mask)
  195. card->thread_start_mask &= threads;
  196. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  197. wake_up(&card->wait_q);
  198. }
  199. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  200. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  201. {
  202. unsigned long flags;
  203. int rc = 0;
  204. spin_lock_irqsave(&card->thread_mask_lock, flags);
  205. rc = (card->thread_running_mask & threads);
  206. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  207. return rc;
  208. }
  209. EXPORT_SYMBOL_GPL(qeth_threads_running);
  210. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  211. {
  212. if (qeth_is_recovery_task(card))
  213. return 0;
  214. return wait_event_interruptible(card->wait_q,
  215. qeth_threads_running(card, threads) == 0);
  216. }
  217. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  218. void qeth_clear_working_pool_list(struct qeth_card *card)
  219. {
  220. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  221. QETH_CARD_TEXT(card, 5, "clwrklst");
  222. list_for_each_entry_safe(pool_entry, tmp,
  223. &card->qdio.in_buf_pool.entry_list, list){
  224. list_del(&pool_entry->list);
  225. }
  226. }
  227. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  228. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  229. {
  230. struct qeth_buffer_pool_entry *pool_entry;
  231. void *ptr;
  232. int i, j;
  233. QETH_CARD_TEXT(card, 5, "alocpool");
  234. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  235. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  236. if (!pool_entry) {
  237. qeth_free_buffer_pool(card);
  238. return -ENOMEM;
  239. }
  240. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  241. ptr = (void *) __get_free_page(GFP_KERNEL);
  242. if (!ptr) {
  243. while (j > 0)
  244. free_page((unsigned long)
  245. pool_entry->elements[--j]);
  246. kfree(pool_entry);
  247. qeth_free_buffer_pool(card);
  248. return -ENOMEM;
  249. }
  250. pool_entry->elements[j] = ptr;
  251. }
  252. list_add(&pool_entry->init_list,
  253. &card->qdio.init_pool.entry_list);
  254. }
  255. return 0;
  256. }
  257. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  258. {
  259. QETH_CARD_TEXT(card, 2, "realcbp");
  260. if ((card->state != CARD_STATE_DOWN) &&
  261. (card->state != CARD_STATE_RECOVER))
  262. return -EPERM;
  263. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  264. qeth_clear_working_pool_list(card);
  265. qeth_free_buffer_pool(card);
  266. card->qdio.in_buf_pool.buf_count = bufcnt;
  267. card->qdio.init_pool.buf_count = bufcnt;
  268. return qeth_alloc_buffer_pool(card);
  269. }
  270. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  271. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  272. {
  273. if (!q)
  274. return;
  275. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  276. kfree(q);
  277. }
  278. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  279. {
  280. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  281. int i;
  282. if (!q)
  283. return NULL;
  284. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  285. kfree(q);
  286. return NULL;
  287. }
  288. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  289. q->bufs[i].buffer = q->qdio_bufs[i];
  290. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  291. return q;
  292. }
  293. static inline int qeth_cq_init(struct qeth_card *card)
  294. {
  295. int rc;
  296. if (card->options.cq == QETH_CQ_ENABLED) {
  297. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  298. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  299. QDIO_MAX_BUFFERS_PER_Q);
  300. card->qdio.c_q->next_buf_to_init = 127;
  301. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  302. card->qdio.no_in_queues - 1, 0,
  303. 127);
  304. if (rc) {
  305. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  306. goto out;
  307. }
  308. }
  309. rc = 0;
  310. out:
  311. return rc;
  312. }
  313. static inline int qeth_alloc_cq(struct qeth_card *card)
  314. {
  315. int rc;
  316. if (card->options.cq == QETH_CQ_ENABLED) {
  317. int i;
  318. struct qdio_outbuf_state *outbuf_states;
  319. QETH_DBF_TEXT(SETUP, 2, "cqon");
  320. card->qdio.c_q = qeth_alloc_qdio_queue();
  321. if (!card->qdio.c_q) {
  322. rc = -1;
  323. goto kmsg_out;
  324. }
  325. card->qdio.no_in_queues = 2;
  326. card->qdio.out_bufstates =
  327. kzalloc(card->qdio.no_out_queues *
  328. QDIO_MAX_BUFFERS_PER_Q *
  329. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  330. outbuf_states = card->qdio.out_bufstates;
  331. if (outbuf_states == NULL) {
  332. rc = -1;
  333. goto free_cq_out;
  334. }
  335. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  336. card->qdio.out_qs[i]->bufstates = outbuf_states;
  337. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  338. }
  339. } else {
  340. QETH_DBF_TEXT(SETUP, 2, "nocq");
  341. card->qdio.c_q = NULL;
  342. card->qdio.no_in_queues = 1;
  343. }
  344. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  345. rc = 0;
  346. out:
  347. return rc;
  348. free_cq_out:
  349. qeth_free_qdio_queue(card->qdio.c_q);
  350. card->qdio.c_q = NULL;
  351. kmsg_out:
  352. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  353. goto out;
  354. }
  355. static inline void qeth_free_cq(struct qeth_card *card)
  356. {
  357. if (card->qdio.c_q) {
  358. --card->qdio.no_in_queues;
  359. qeth_free_qdio_queue(card->qdio.c_q);
  360. card->qdio.c_q = NULL;
  361. }
  362. kfree(card->qdio.out_bufstates);
  363. card->qdio.out_bufstates = NULL;
  364. }
  365. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  366. int delayed) {
  367. enum iucv_tx_notify n;
  368. switch (sbalf15) {
  369. case 0:
  370. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  371. break;
  372. case 4:
  373. case 16:
  374. case 17:
  375. case 18:
  376. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  377. TX_NOTIFY_UNREACHABLE;
  378. break;
  379. default:
  380. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  381. TX_NOTIFY_GENERALERROR;
  382. break;
  383. }
  384. return n;
  385. }
  386. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  387. int bidx, int forced_cleanup)
  388. {
  389. if (q->card->options.cq != QETH_CQ_ENABLED)
  390. return;
  391. if (q->bufs[bidx]->next_pending != NULL) {
  392. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  393. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  394. while (c) {
  395. if (forced_cleanup ||
  396. atomic_read(&c->state) ==
  397. QETH_QDIO_BUF_HANDLED_DELAYED) {
  398. struct qeth_qdio_out_buffer *f = c;
  399. QETH_CARD_TEXT(f->q->card, 5, "fp");
  400. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  401. /* release here to avoid interleaving between
  402. outbound tasklet and inbound tasklet
  403. regarding notifications and lifecycle */
  404. qeth_release_skbs(c);
  405. c = f->next_pending;
  406. WARN_ON_ONCE(head->next_pending != f);
  407. head->next_pending = c;
  408. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  409. } else {
  410. head = c;
  411. c = c->next_pending;
  412. }
  413. }
  414. }
  415. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  416. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  417. /* for recovery situations */
  418. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  419. qeth_init_qdio_out_buf(q, bidx);
  420. QETH_CARD_TEXT(q->card, 2, "clprecov");
  421. }
  422. }
  423. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  424. unsigned long phys_aob_addr) {
  425. struct qaob *aob;
  426. struct qeth_qdio_out_buffer *buffer;
  427. enum iucv_tx_notify notification;
  428. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  429. QETH_CARD_TEXT(card, 5, "haob");
  430. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  431. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  432. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  433. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  434. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  435. notification = TX_NOTIFY_OK;
  436. } else {
  437. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  438. QETH_QDIO_BUF_PENDING);
  439. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  440. notification = TX_NOTIFY_DELAYED_OK;
  441. }
  442. if (aob->aorc != 0) {
  443. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  444. notification = qeth_compute_cq_notification(aob->aorc, 1);
  445. }
  446. qeth_notify_skbs(buffer->q, buffer, notification);
  447. buffer->aob = NULL;
  448. qeth_clear_output_buffer(buffer->q, buffer,
  449. QETH_QDIO_BUF_HANDLED_DELAYED);
  450. /* from here on: do not touch buffer anymore */
  451. qdio_release_aob(aob);
  452. }
  453. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  454. {
  455. return card->options.cq == QETH_CQ_ENABLED &&
  456. card->qdio.c_q != NULL &&
  457. queue != 0 &&
  458. queue == card->qdio.no_in_queues - 1;
  459. }
  460. static int qeth_issue_next_read(struct qeth_card *card)
  461. {
  462. int rc;
  463. struct qeth_cmd_buffer *iob;
  464. QETH_CARD_TEXT(card, 5, "issnxrd");
  465. if (card->read.state != CH_STATE_UP)
  466. return -EIO;
  467. iob = qeth_get_buffer(&card->read);
  468. if (!iob) {
  469. dev_warn(&card->gdev->dev, "The qeth device driver "
  470. "failed to recover an error on the device\n");
  471. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  472. "available\n", dev_name(&card->gdev->dev));
  473. return -ENOMEM;
  474. }
  475. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  476. QETH_CARD_TEXT(card, 6, "noirqpnd");
  477. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  478. (addr_t) iob, 0, 0);
  479. if (rc) {
  480. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  481. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  482. atomic_set(&card->read.irq_pending, 0);
  483. card->read_or_write_problem = 1;
  484. qeth_schedule_recovery(card);
  485. wake_up(&card->wait_q);
  486. }
  487. return rc;
  488. }
  489. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  490. {
  491. struct qeth_reply *reply;
  492. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  493. if (reply) {
  494. atomic_set(&reply->refcnt, 1);
  495. atomic_set(&reply->received, 0);
  496. reply->card = card;
  497. }
  498. return reply;
  499. }
  500. static void qeth_get_reply(struct qeth_reply *reply)
  501. {
  502. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  503. atomic_inc(&reply->refcnt);
  504. }
  505. static void qeth_put_reply(struct qeth_reply *reply)
  506. {
  507. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  508. if (atomic_dec_and_test(&reply->refcnt))
  509. kfree(reply);
  510. }
  511. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  512. struct qeth_card *card)
  513. {
  514. char *ipa_name;
  515. int com = cmd->hdr.command;
  516. ipa_name = qeth_get_ipa_cmd_name(com);
  517. if (rc)
  518. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  519. "x%X \"%s\"\n",
  520. ipa_name, com, dev_name(&card->gdev->dev),
  521. QETH_CARD_IFNAME(card), rc,
  522. qeth_get_ipa_msg(rc));
  523. else
  524. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  525. ipa_name, com, dev_name(&card->gdev->dev),
  526. QETH_CARD_IFNAME(card));
  527. }
  528. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  529. struct qeth_cmd_buffer *iob)
  530. {
  531. struct qeth_ipa_cmd *cmd = NULL;
  532. QETH_CARD_TEXT(card, 5, "chkipad");
  533. if (IS_IPA(iob->data)) {
  534. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  535. if (IS_IPA_REPLY(cmd)) {
  536. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  537. cmd->hdr.command != IPA_CMD_DELCCID &&
  538. cmd->hdr.command != IPA_CMD_MODCCID &&
  539. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  540. qeth_issue_ipa_msg(cmd,
  541. cmd->hdr.return_code, card);
  542. return cmd;
  543. } else {
  544. switch (cmd->hdr.command) {
  545. case IPA_CMD_STOPLAN:
  546. if (cmd->hdr.return_code ==
  547. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  548. dev_err(&card->gdev->dev,
  549. "Interface %s is down because the "
  550. "adjacent port is no longer in "
  551. "reflective relay mode\n",
  552. QETH_CARD_IFNAME(card));
  553. qeth_close_dev(card);
  554. } else {
  555. dev_warn(&card->gdev->dev,
  556. "The link for interface %s on CHPID"
  557. " 0x%X failed\n",
  558. QETH_CARD_IFNAME(card),
  559. card->info.chpid);
  560. qeth_issue_ipa_msg(cmd,
  561. cmd->hdr.return_code, card);
  562. }
  563. card->lan_online = 0;
  564. if (card->dev && netif_carrier_ok(card->dev))
  565. netif_carrier_off(card->dev);
  566. return NULL;
  567. case IPA_CMD_STARTLAN:
  568. dev_info(&card->gdev->dev,
  569. "The link for %s on CHPID 0x%X has"
  570. " been restored\n",
  571. QETH_CARD_IFNAME(card),
  572. card->info.chpid);
  573. netif_carrier_on(card->dev);
  574. card->lan_online = 1;
  575. if (card->info.hwtrap)
  576. card->info.hwtrap = 2;
  577. qeth_schedule_recovery(card);
  578. return NULL;
  579. case IPA_CMD_SETBRIDGEPORT:
  580. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  581. if (card->discipline->control_event_handler
  582. (card, cmd))
  583. return cmd;
  584. else
  585. return NULL;
  586. case IPA_CMD_MODCCID:
  587. return cmd;
  588. case IPA_CMD_REGISTER_LOCAL_ADDR:
  589. QETH_CARD_TEXT(card, 3, "irla");
  590. break;
  591. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  592. QETH_CARD_TEXT(card, 3, "urla");
  593. break;
  594. default:
  595. QETH_DBF_MESSAGE(2, "Received data is IPA "
  596. "but not a reply!\n");
  597. break;
  598. }
  599. }
  600. }
  601. return cmd;
  602. }
  603. void qeth_clear_ipacmd_list(struct qeth_card *card)
  604. {
  605. struct qeth_reply *reply, *r;
  606. unsigned long flags;
  607. QETH_CARD_TEXT(card, 4, "clipalst");
  608. spin_lock_irqsave(&card->lock, flags);
  609. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  610. qeth_get_reply(reply);
  611. reply->rc = -EIO;
  612. atomic_inc(&reply->received);
  613. list_del_init(&reply->list);
  614. wake_up(&reply->wait_q);
  615. qeth_put_reply(reply);
  616. }
  617. spin_unlock_irqrestore(&card->lock, flags);
  618. atomic_set(&card->write.irq_pending, 0);
  619. }
  620. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  621. static int qeth_check_idx_response(struct qeth_card *card,
  622. unsigned char *buffer)
  623. {
  624. if (!buffer)
  625. return 0;
  626. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  627. if ((buffer[2] & 0xc0) == 0xc0) {
  628. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  629. "with cause code 0x%02x%s\n",
  630. buffer[4],
  631. ((buffer[4] == 0x22) ?
  632. " -- try another portname" : ""));
  633. QETH_CARD_TEXT(card, 2, "ckidxres");
  634. QETH_CARD_TEXT(card, 2, " idxterm");
  635. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  636. if (buffer[4] == 0xf6) {
  637. dev_err(&card->gdev->dev,
  638. "The qeth device is not configured "
  639. "for the OSI layer required by z/VM\n");
  640. return -EPERM;
  641. }
  642. return -EIO;
  643. }
  644. return 0;
  645. }
  646. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  647. {
  648. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  649. dev_get_drvdata(&cdev->dev))->dev);
  650. return card;
  651. }
  652. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  653. __u32 len)
  654. {
  655. struct qeth_card *card;
  656. card = CARD_FROM_CDEV(channel->ccwdev);
  657. QETH_CARD_TEXT(card, 4, "setupccw");
  658. if (channel == &card->read)
  659. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  660. else
  661. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  662. channel->ccw.count = len;
  663. channel->ccw.cda = (__u32) __pa(iob);
  664. }
  665. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  666. {
  667. __u8 index;
  668. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  669. index = channel->io_buf_no;
  670. do {
  671. if (channel->iob[index].state == BUF_STATE_FREE) {
  672. channel->iob[index].state = BUF_STATE_LOCKED;
  673. channel->io_buf_no = (channel->io_buf_no + 1) %
  674. QETH_CMD_BUFFER_NO;
  675. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  676. return channel->iob + index;
  677. }
  678. index = (index + 1) % QETH_CMD_BUFFER_NO;
  679. } while (index != channel->io_buf_no);
  680. return NULL;
  681. }
  682. void qeth_release_buffer(struct qeth_channel *channel,
  683. struct qeth_cmd_buffer *iob)
  684. {
  685. unsigned long flags;
  686. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  687. spin_lock_irqsave(&channel->iob_lock, flags);
  688. memset(iob->data, 0, QETH_BUFSIZE);
  689. iob->state = BUF_STATE_FREE;
  690. iob->callback = qeth_send_control_data_cb;
  691. iob->rc = 0;
  692. spin_unlock_irqrestore(&channel->iob_lock, flags);
  693. wake_up(&channel->wait_q);
  694. }
  695. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  696. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  697. {
  698. struct qeth_cmd_buffer *buffer = NULL;
  699. unsigned long flags;
  700. spin_lock_irqsave(&channel->iob_lock, flags);
  701. buffer = __qeth_get_buffer(channel);
  702. spin_unlock_irqrestore(&channel->iob_lock, flags);
  703. return buffer;
  704. }
  705. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  706. {
  707. struct qeth_cmd_buffer *buffer;
  708. wait_event(channel->wait_q,
  709. ((buffer = qeth_get_buffer(channel)) != NULL));
  710. return buffer;
  711. }
  712. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  713. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  714. {
  715. int cnt;
  716. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  717. qeth_release_buffer(channel, &channel->iob[cnt]);
  718. channel->buf_no = 0;
  719. channel->io_buf_no = 0;
  720. }
  721. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  722. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  723. struct qeth_cmd_buffer *iob)
  724. {
  725. struct qeth_card *card;
  726. struct qeth_reply *reply, *r;
  727. struct qeth_ipa_cmd *cmd;
  728. unsigned long flags;
  729. int keep_reply;
  730. int rc = 0;
  731. card = CARD_FROM_CDEV(channel->ccwdev);
  732. QETH_CARD_TEXT(card, 4, "sndctlcb");
  733. rc = qeth_check_idx_response(card, iob->data);
  734. switch (rc) {
  735. case 0:
  736. break;
  737. case -EIO:
  738. qeth_clear_ipacmd_list(card);
  739. qeth_schedule_recovery(card);
  740. /* fall through */
  741. default:
  742. goto out;
  743. }
  744. cmd = qeth_check_ipa_data(card, iob);
  745. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  746. goto out;
  747. /*in case of OSN : check if cmd is set */
  748. if (card->info.type == QETH_CARD_TYPE_OSN &&
  749. cmd &&
  750. cmd->hdr.command != IPA_CMD_STARTLAN &&
  751. card->osn_info.assist_cb != NULL) {
  752. card->osn_info.assist_cb(card->dev, cmd);
  753. goto out;
  754. }
  755. spin_lock_irqsave(&card->lock, flags);
  756. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  757. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  758. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  759. qeth_get_reply(reply);
  760. list_del_init(&reply->list);
  761. spin_unlock_irqrestore(&card->lock, flags);
  762. keep_reply = 0;
  763. if (reply->callback != NULL) {
  764. if (cmd) {
  765. reply->offset = (__u16)((char *)cmd -
  766. (char *)iob->data);
  767. keep_reply = reply->callback(card,
  768. reply,
  769. (unsigned long)cmd);
  770. } else
  771. keep_reply = reply->callback(card,
  772. reply,
  773. (unsigned long)iob);
  774. }
  775. if (cmd)
  776. reply->rc = (u16) cmd->hdr.return_code;
  777. else if (iob->rc)
  778. reply->rc = iob->rc;
  779. if (keep_reply) {
  780. spin_lock_irqsave(&card->lock, flags);
  781. list_add_tail(&reply->list,
  782. &card->cmd_waiter_list);
  783. spin_unlock_irqrestore(&card->lock, flags);
  784. } else {
  785. atomic_inc(&reply->received);
  786. wake_up(&reply->wait_q);
  787. }
  788. qeth_put_reply(reply);
  789. goto out;
  790. }
  791. }
  792. spin_unlock_irqrestore(&card->lock, flags);
  793. out:
  794. memcpy(&card->seqno.pdu_hdr_ack,
  795. QETH_PDU_HEADER_SEQ_NO(iob->data),
  796. QETH_SEQ_NO_LENGTH);
  797. qeth_release_buffer(channel, iob);
  798. }
  799. static int qeth_setup_channel(struct qeth_channel *channel)
  800. {
  801. int cnt;
  802. QETH_DBF_TEXT(SETUP, 2, "setupch");
  803. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  804. channel->iob[cnt].data =
  805. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  806. if (channel->iob[cnt].data == NULL)
  807. break;
  808. channel->iob[cnt].state = BUF_STATE_FREE;
  809. channel->iob[cnt].channel = channel;
  810. channel->iob[cnt].callback = qeth_send_control_data_cb;
  811. channel->iob[cnt].rc = 0;
  812. }
  813. if (cnt < QETH_CMD_BUFFER_NO) {
  814. while (cnt-- > 0)
  815. kfree(channel->iob[cnt].data);
  816. return -ENOMEM;
  817. }
  818. channel->buf_no = 0;
  819. channel->io_buf_no = 0;
  820. atomic_set(&channel->irq_pending, 0);
  821. spin_lock_init(&channel->iob_lock);
  822. init_waitqueue_head(&channel->wait_q);
  823. return 0;
  824. }
  825. static int qeth_set_thread_start_bit(struct qeth_card *card,
  826. unsigned long thread)
  827. {
  828. unsigned long flags;
  829. spin_lock_irqsave(&card->thread_mask_lock, flags);
  830. if (!(card->thread_allowed_mask & thread) ||
  831. (card->thread_start_mask & thread)) {
  832. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  833. return -EPERM;
  834. }
  835. card->thread_start_mask |= thread;
  836. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  837. return 0;
  838. }
  839. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  840. {
  841. unsigned long flags;
  842. spin_lock_irqsave(&card->thread_mask_lock, flags);
  843. card->thread_start_mask &= ~thread;
  844. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  845. wake_up(&card->wait_q);
  846. }
  847. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  848. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  849. {
  850. unsigned long flags;
  851. spin_lock_irqsave(&card->thread_mask_lock, flags);
  852. card->thread_running_mask &= ~thread;
  853. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  854. wake_up(&card->wait_q);
  855. }
  856. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  857. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  858. {
  859. unsigned long flags;
  860. int rc = 0;
  861. spin_lock_irqsave(&card->thread_mask_lock, flags);
  862. if (card->thread_start_mask & thread) {
  863. if ((card->thread_allowed_mask & thread) &&
  864. !(card->thread_running_mask & thread)) {
  865. rc = 1;
  866. card->thread_start_mask &= ~thread;
  867. card->thread_running_mask |= thread;
  868. } else
  869. rc = -EPERM;
  870. }
  871. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  872. return rc;
  873. }
  874. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  875. {
  876. int rc = 0;
  877. wait_event(card->wait_q,
  878. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  879. return rc;
  880. }
  881. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  882. void qeth_schedule_recovery(struct qeth_card *card)
  883. {
  884. QETH_CARD_TEXT(card, 2, "startrec");
  885. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  886. schedule_work(&card->kernel_thread_starter);
  887. }
  888. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  889. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  890. {
  891. int dstat, cstat;
  892. char *sense;
  893. struct qeth_card *card;
  894. sense = (char *) irb->ecw;
  895. cstat = irb->scsw.cmd.cstat;
  896. dstat = irb->scsw.cmd.dstat;
  897. card = CARD_FROM_CDEV(cdev);
  898. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  899. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  900. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  901. QETH_CARD_TEXT(card, 2, "CGENCHK");
  902. dev_warn(&cdev->dev, "The qeth device driver "
  903. "failed to recover an error on the device\n");
  904. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  905. dev_name(&cdev->dev), dstat, cstat);
  906. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  907. 16, 1, irb, 64, 1);
  908. return 1;
  909. }
  910. if (dstat & DEV_STAT_UNIT_CHECK) {
  911. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  912. SENSE_RESETTING_EVENT_FLAG) {
  913. QETH_CARD_TEXT(card, 2, "REVIND");
  914. return 1;
  915. }
  916. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  917. SENSE_COMMAND_REJECT_FLAG) {
  918. QETH_CARD_TEXT(card, 2, "CMDREJi");
  919. return 1;
  920. }
  921. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  922. QETH_CARD_TEXT(card, 2, "AFFE");
  923. return 1;
  924. }
  925. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  926. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  927. return 0;
  928. }
  929. QETH_CARD_TEXT(card, 2, "DGENCHK");
  930. return 1;
  931. }
  932. return 0;
  933. }
  934. static long __qeth_check_irb_error(struct ccw_device *cdev,
  935. unsigned long intparm, struct irb *irb)
  936. {
  937. struct qeth_card *card;
  938. card = CARD_FROM_CDEV(cdev);
  939. if (!card || !IS_ERR(irb))
  940. return 0;
  941. switch (PTR_ERR(irb)) {
  942. case -EIO:
  943. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  944. dev_name(&cdev->dev));
  945. QETH_CARD_TEXT(card, 2, "ckirberr");
  946. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  947. break;
  948. case -ETIMEDOUT:
  949. dev_warn(&cdev->dev, "A hardware operation timed out"
  950. " on the device\n");
  951. QETH_CARD_TEXT(card, 2, "ckirberr");
  952. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  953. if (intparm == QETH_RCD_PARM) {
  954. if (card->data.ccwdev == cdev) {
  955. card->data.state = CH_STATE_DOWN;
  956. wake_up(&card->wait_q);
  957. }
  958. }
  959. break;
  960. default:
  961. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  962. dev_name(&cdev->dev), PTR_ERR(irb));
  963. QETH_CARD_TEXT(card, 2, "ckirberr");
  964. QETH_CARD_TEXT(card, 2, " rc???");
  965. }
  966. return PTR_ERR(irb);
  967. }
  968. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  969. struct irb *irb)
  970. {
  971. int rc;
  972. int cstat, dstat;
  973. struct qeth_cmd_buffer *buffer;
  974. struct qeth_channel *channel;
  975. struct qeth_card *card;
  976. struct qeth_cmd_buffer *iob;
  977. __u8 index;
  978. if (__qeth_check_irb_error(cdev, intparm, irb))
  979. return;
  980. cstat = irb->scsw.cmd.cstat;
  981. dstat = irb->scsw.cmd.dstat;
  982. card = CARD_FROM_CDEV(cdev);
  983. if (!card)
  984. return;
  985. QETH_CARD_TEXT(card, 5, "irq");
  986. if (card->read.ccwdev == cdev) {
  987. channel = &card->read;
  988. QETH_CARD_TEXT(card, 5, "read");
  989. } else if (card->write.ccwdev == cdev) {
  990. channel = &card->write;
  991. QETH_CARD_TEXT(card, 5, "write");
  992. } else {
  993. channel = &card->data;
  994. QETH_CARD_TEXT(card, 5, "data");
  995. }
  996. atomic_set(&channel->irq_pending, 0);
  997. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  998. channel->state = CH_STATE_STOPPED;
  999. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1000. channel->state = CH_STATE_HALTED;
  1001. /*let's wake up immediately on data channel*/
  1002. if ((channel == &card->data) && (intparm != 0) &&
  1003. (intparm != QETH_RCD_PARM))
  1004. goto out;
  1005. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1006. QETH_CARD_TEXT(card, 6, "clrchpar");
  1007. /* we don't have to handle this further */
  1008. intparm = 0;
  1009. }
  1010. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1011. QETH_CARD_TEXT(card, 6, "hltchpar");
  1012. /* we don't have to handle this further */
  1013. intparm = 0;
  1014. }
  1015. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1016. (dstat & DEV_STAT_UNIT_CHECK) ||
  1017. (cstat)) {
  1018. if (irb->esw.esw0.erw.cons) {
  1019. dev_warn(&channel->ccwdev->dev,
  1020. "The qeth device driver failed to recover "
  1021. "an error on the device\n");
  1022. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1023. "0x%X dstat 0x%X\n",
  1024. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1025. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1026. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1027. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1028. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1029. }
  1030. if (intparm == QETH_RCD_PARM) {
  1031. channel->state = CH_STATE_DOWN;
  1032. goto out;
  1033. }
  1034. rc = qeth_get_problem(cdev, irb);
  1035. if (rc) {
  1036. qeth_clear_ipacmd_list(card);
  1037. qeth_schedule_recovery(card);
  1038. goto out;
  1039. }
  1040. }
  1041. if (intparm == QETH_RCD_PARM) {
  1042. channel->state = CH_STATE_RCD_DONE;
  1043. goto out;
  1044. }
  1045. if (intparm) {
  1046. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1047. buffer->state = BUF_STATE_PROCESSED;
  1048. }
  1049. if (channel == &card->data)
  1050. return;
  1051. if (channel == &card->read &&
  1052. channel->state == CH_STATE_UP)
  1053. qeth_issue_next_read(card);
  1054. iob = channel->iob;
  1055. index = channel->buf_no;
  1056. while (iob[index].state == BUF_STATE_PROCESSED) {
  1057. if (iob[index].callback != NULL)
  1058. iob[index].callback(channel, iob + index);
  1059. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1060. }
  1061. channel->buf_no = index;
  1062. out:
  1063. wake_up(&card->wait_q);
  1064. return;
  1065. }
  1066. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1067. struct qeth_qdio_out_buffer *buf,
  1068. enum iucv_tx_notify notification)
  1069. {
  1070. struct sk_buff *skb;
  1071. if (skb_queue_empty(&buf->skb_list))
  1072. goto out;
  1073. skb = skb_peek(&buf->skb_list);
  1074. while (skb) {
  1075. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1076. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1077. if (skb->protocol == ETH_P_AF_IUCV) {
  1078. if (skb->sk) {
  1079. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1080. iucv->sk_txnotify(skb, notification);
  1081. }
  1082. }
  1083. if (skb_queue_is_last(&buf->skb_list, skb))
  1084. skb = NULL;
  1085. else
  1086. skb = skb_queue_next(&buf->skb_list, skb);
  1087. }
  1088. out:
  1089. return;
  1090. }
  1091. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1092. {
  1093. struct sk_buff *skb;
  1094. struct iucv_sock *iucv;
  1095. int notify_general_error = 0;
  1096. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1097. notify_general_error = 1;
  1098. /* release may never happen from within CQ tasklet scope */
  1099. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1100. skb = skb_dequeue(&buf->skb_list);
  1101. while (skb) {
  1102. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1103. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1104. if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
  1105. if (skb->sk) {
  1106. iucv = iucv_sk(skb->sk);
  1107. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1108. }
  1109. }
  1110. atomic_dec(&skb->users);
  1111. dev_kfree_skb_any(skb);
  1112. skb = skb_dequeue(&buf->skb_list);
  1113. }
  1114. }
  1115. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1116. struct qeth_qdio_out_buffer *buf,
  1117. enum qeth_qdio_buffer_states newbufstate)
  1118. {
  1119. int i;
  1120. /* is PCI flag set on buffer? */
  1121. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1122. atomic_dec(&queue->set_pci_flags_count);
  1123. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1124. qeth_release_skbs(buf);
  1125. }
  1126. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1127. if (buf->buffer->element[i].addr && buf->is_header[i])
  1128. kmem_cache_free(qeth_core_header_cache,
  1129. buf->buffer->element[i].addr);
  1130. buf->is_header[i] = 0;
  1131. buf->buffer->element[i].length = 0;
  1132. buf->buffer->element[i].addr = NULL;
  1133. buf->buffer->element[i].eflags = 0;
  1134. buf->buffer->element[i].sflags = 0;
  1135. }
  1136. buf->buffer->element[15].eflags = 0;
  1137. buf->buffer->element[15].sflags = 0;
  1138. buf->next_element_to_fill = 0;
  1139. atomic_set(&buf->state, newbufstate);
  1140. }
  1141. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1142. {
  1143. int j;
  1144. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1145. if (!q->bufs[j])
  1146. continue;
  1147. qeth_cleanup_handled_pending(q, j, 1);
  1148. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1149. if (free) {
  1150. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1151. q->bufs[j] = NULL;
  1152. }
  1153. }
  1154. }
  1155. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1156. {
  1157. int i;
  1158. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1159. /* clear outbound buffers to free skbs */
  1160. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1161. if (card->qdio.out_qs[i]) {
  1162. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1163. }
  1164. }
  1165. }
  1166. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1167. static void qeth_free_buffer_pool(struct qeth_card *card)
  1168. {
  1169. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1170. int i = 0;
  1171. list_for_each_entry_safe(pool_entry, tmp,
  1172. &card->qdio.init_pool.entry_list, init_list){
  1173. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1174. free_page((unsigned long)pool_entry->elements[i]);
  1175. list_del(&pool_entry->init_list);
  1176. kfree(pool_entry);
  1177. }
  1178. }
  1179. static void qeth_clean_channel(struct qeth_channel *channel)
  1180. {
  1181. int cnt;
  1182. QETH_DBF_TEXT(SETUP, 2, "freech");
  1183. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1184. kfree(channel->iob[cnt].data);
  1185. }
  1186. static void qeth_set_single_write_queues(struct qeth_card *card)
  1187. {
  1188. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1189. (card->qdio.no_out_queues == 4))
  1190. qeth_free_qdio_buffers(card);
  1191. card->qdio.no_out_queues = 1;
  1192. if (card->qdio.default_out_queue != 0)
  1193. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1194. card->qdio.default_out_queue = 0;
  1195. }
  1196. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1197. {
  1198. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1199. (card->qdio.no_out_queues == 1)) {
  1200. qeth_free_qdio_buffers(card);
  1201. card->qdio.default_out_queue = 2;
  1202. }
  1203. card->qdio.no_out_queues = 4;
  1204. }
  1205. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1206. {
  1207. struct ccw_device *ccwdev;
  1208. struct channel_path_desc *chp_dsc;
  1209. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1210. ccwdev = card->data.ccwdev;
  1211. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1212. if (!chp_dsc)
  1213. goto out;
  1214. card->info.func_level = 0x4100 + chp_dsc->desc;
  1215. if (card->info.type == QETH_CARD_TYPE_IQD)
  1216. goto out;
  1217. /* CHPP field bit 6 == 1 -> single queue */
  1218. if ((chp_dsc->chpp & 0x02) == 0x02)
  1219. qeth_set_single_write_queues(card);
  1220. else
  1221. qeth_set_multiple_write_queues(card);
  1222. out:
  1223. kfree(chp_dsc);
  1224. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1225. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1226. }
  1227. static void qeth_init_qdio_info(struct qeth_card *card)
  1228. {
  1229. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1230. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1231. /* inbound */
  1232. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1233. if (card->info.type == QETH_CARD_TYPE_IQD)
  1234. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1235. else
  1236. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1237. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1238. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1239. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1240. }
  1241. static void qeth_set_intial_options(struct qeth_card *card)
  1242. {
  1243. card->options.route4.type = NO_ROUTER;
  1244. card->options.route6.type = NO_ROUTER;
  1245. card->options.fake_broadcast = 0;
  1246. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  1247. card->options.performance_stats = 0;
  1248. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1249. card->options.isolation = ISOLATION_MODE_NONE;
  1250. card->options.cq = QETH_CQ_DISABLED;
  1251. }
  1252. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1253. {
  1254. unsigned long flags;
  1255. int rc = 0;
  1256. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1257. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1258. (u8) card->thread_start_mask,
  1259. (u8) card->thread_allowed_mask,
  1260. (u8) card->thread_running_mask);
  1261. rc = (card->thread_start_mask & thread);
  1262. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1263. return rc;
  1264. }
  1265. static void qeth_start_kernel_thread(struct work_struct *work)
  1266. {
  1267. struct task_struct *ts;
  1268. struct qeth_card *card = container_of(work, struct qeth_card,
  1269. kernel_thread_starter);
  1270. QETH_CARD_TEXT(card , 2, "strthrd");
  1271. if (card->read.state != CH_STATE_UP &&
  1272. card->write.state != CH_STATE_UP)
  1273. return;
  1274. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1275. ts = kthread_run(card->discipline->recover, (void *)card,
  1276. "qeth_recover");
  1277. if (IS_ERR(ts)) {
  1278. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1279. qeth_clear_thread_running_bit(card,
  1280. QETH_RECOVER_THREAD);
  1281. }
  1282. }
  1283. }
  1284. static void qeth_buffer_reclaim_work(struct work_struct *);
  1285. static int qeth_setup_card(struct qeth_card *card)
  1286. {
  1287. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1288. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1289. card->read.state = CH_STATE_DOWN;
  1290. card->write.state = CH_STATE_DOWN;
  1291. card->data.state = CH_STATE_DOWN;
  1292. card->state = CARD_STATE_DOWN;
  1293. card->lan_online = 0;
  1294. card->read_or_write_problem = 0;
  1295. card->dev = NULL;
  1296. spin_lock_init(&card->vlanlock);
  1297. spin_lock_init(&card->mclock);
  1298. spin_lock_init(&card->lock);
  1299. spin_lock_init(&card->ip_lock);
  1300. spin_lock_init(&card->thread_mask_lock);
  1301. mutex_init(&card->conf_mutex);
  1302. mutex_init(&card->discipline_mutex);
  1303. card->thread_start_mask = 0;
  1304. card->thread_allowed_mask = 0;
  1305. card->thread_running_mask = 0;
  1306. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1307. INIT_LIST_HEAD(&card->ip_list);
  1308. INIT_LIST_HEAD(card->ip_tbd_list);
  1309. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1310. init_waitqueue_head(&card->wait_q);
  1311. /* initial options */
  1312. qeth_set_intial_options(card);
  1313. /* IP address takeover */
  1314. INIT_LIST_HEAD(&card->ipato.entries);
  1315. card->ipato.enabled = 0;
  1316. card->ipato.invert4 = 0;
  1317. card->ipato.invert6 = 0;
  1318. /* init QDIO stuff */
  1319. qeth_init_qdio_info(card);
  1320. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1321. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1322. return 0;
  1323. }
  1324. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1325. {
  1326. struct qeth_card *card = container_of(slr, struct qeth_card,
  1327. qeth_service_level);
  1328. if (card->info.mcl_level[0])
  1329. seq_printf(m, "qeth: %s firmware level %s\n",
  1330. CARD_BUS_ID(card), card->info.mcl_level);
  1331. }
  1332. static struct qeth_card *qeth_alloc_card(void)
  1333. {
  1334. struct qeth_card *card;
  1335. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1336. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1337. if (!card)
  1338. goto out;
  1339. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1340. card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
  1341. if (!card->ip_tbd_list) {
  1342. QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
  1343. goto out_card;
  1344. }
  1345. if (qeth_setup_channel(&card->read))
  1346. goto out_ip;
  1347. if (qeth_setup_channel(&card->write))
  1348. goto out_channel;
  1349. card->options.layer2 = -1;
  1350. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1351. register_service_level(&card->qeth_service_level);
  1352. return card;
  1353. out_channel:
  1354. qeth_clean_channel(&card->read);
  1355. out_ip:
  1356. kfree(card->ip_tbd_list);
  1357. out_card:
  1358. kfree(card);
  1359. out:
  1360. return NULL;
  1361. }
  1362. static int qeth_determine_card_type(struct qeth_card *card)
  1363. {
  1364. int i = 0;
  1365. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1366. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1367. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1368. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1369. if ((CARD_RDEV(card)->id.dev_type ==
  1370. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1371. (CARD_RDEV(card)->id.dev_model ==
  1372. known_devices[i][QETH_DEV_MODEL_IND])) {
  1373. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1374. card->qdio.no_out_queues =
  1375. known_devices[i][QETH_QUEUE_NO_IND];
  1376. card->qdio.no_in_queues = 1;
  1377. card->info.is_multicast_different =
  1378. known_devices[i][QETH_MULTICAST_IND];
  1379. qeth_update_from_chp_desc(card);
  1380. return 0;
  1381. }
  1382. i++;
  1383. }
  1384. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1385. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1386. "unknown type\n");
  1387. return -ENOENT;
  1388. }
  1389. static int qeth_clear_channel(struct qeth_channel *channel)
  1390. {
  1391. unsigned long flags;
  1392. struct qeth_card *card;
  1393. int rc;
  1394. card = CARD_FROM_CDEV(channel->ccwdev);
  1395. QETH_CARD_TEXT(card, 3, "clearch");
  1396. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1397. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1398. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1399. if (rc)
  1400. return rc;
  1401. rc = wait_event_interruptible_timeout(card->wait_q,
  1402. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1403. if (rc == -ERESTARTSYS)
  1404. return rc;
  1405. if (channel->state != CH_STATE_STOPPED)
  1406. return -ETIME;
  1407. channel->state = CH_STATE_DOWN;
  1408. return 0;
  1409. }
  1410. static int qeth_halt_channel(struct qeth_channel *channel)
  1411. {
  1412. unsigned long flags;
  1413. struct qeth_card *card;
  1414. int rc;
  1415. card = CARD_FROM_CDEV(channel->ccwdev);
  1416. QETH_CARD_TEXT(card, 3, "haltch");
  1417. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1418. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1419. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1420. if (rc)
  1421. return rc;
  1422. rc = wait_event_interruptible_timeout(card->wait_q,
  1423. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1424. if (rc == -ERESTARTSYS)
  1425. return rc;
  1426. if (channel->state != CH_STATE_HALTED)
  1427. return -ETIME;
  1428. return 0;
  1429. }
  1430. static int qeth_halt_channels(struct qeth_card *card)
  1431. {
  1432. int rc1 = 0, rc2 = 0, rc3 = 0;
  1433. QETH_CARD_TEXT(card, 3, "haltchs");
  1434. rc1 = qeth_halt_channel(&card->read);
  1435. rc2 = qeth_halt_channel(&card->write);
  1436. rc3 = qeth_halt_channel(&card->data);
  1437. if (rc1)
  1438. return rc1;
  1439. if (rc2)
  1440. return rc2;
  1441. return rc3;
  1442. }
  1443. static int qeth_clear_channels(struct qeth_card *card)
  1444. {
  1445. int rc1 = 0, rc2 = 0, rc3 = 0;
  1446. QETH_CARD_TEXT(card, 3, "clearchs");
  1447. rc1 = qeth_clear_channel(&card->read);
  1448. rc2 = qeth_clear_channel(&card->write);
  1449. rc3 = qeth_clear_channel(&card->data);
  1450. if (rc1)
  1451. return rc1;
  1452. if (rc2)
  1453. return rc2;
  1454. return rc3;
  1455. }
  1456. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1457. {
  1458. int rc = 0;
  1459. QETH_CARD_TEXT(card, 3, "clhacrd");
  1460. if (halt)
  1461. rc = qeth_halt_channels(card);
  1462. if (rc)
  1463. return rc;
  1464. return qeth_clear_channels(card);
  1465. }
  1466. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1467. {
  1468. int rc = 0;
  1469. QETH_CARD_TEXT(card, 3, "qdioclr");
  1470. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1471. QETH_QDIO_CLEANING)) {
  1472. case QETH_QDIO_ESTABLISHED:
  1473. if (card->info.type == QETH_CARD_TYPE_IQD)
  1474. rc = qdio_shutdown(CARD_DDEV(card),
  1475. QDIO_FLAG_CLEANUP_USING_HALT);
  1476. else
  1477. rc = qdio_shutdown(CARD_DDEV(card),
  1478. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1479. if (rc)
  1480. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1481. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1482. break;
  1483. case QETH_QDIO_CLEANING:
  1484. return rc;
  1485. default:
  1486. break;
  1487. }
  1488. rc = qeth_clear_halt_card(card, use_halt);
  1489. if (rc)
  1490. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1491. card->state = CARD_STATE_DOWN;
  1492. return rc;
  1493. }
  1494. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1495. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1496. int *length)
  1497. {
  1498. struct ciw *ciw;
  1499. char *rcd_buf;
  1500. int ret;
  1501. struct qeth_channel *channel = &card->data;
  1502. unsigned long flags;
  1503. /*
  1504. * scan for RCD command in extended SenseID data
  1505. */
  1506. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1507. if (!ciw || ciw->cmd == 0)
  1508. return -EOPNOTSUPP;
  1509. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1510. if (!rcd_buf)
  1511. return -ENOMEM;
  1512. channel->ccw.cmd_code = ciw->cmd;
  1513. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1514. channel->ccw.count = ciw->count;
  1515. channel->ccw.flags = CCW_FLAG_SLI;
  1516. channel->state = CH_STATE_RCD;
  1517. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1518. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1519. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1520. QETH_RCD_TIMEOUT);
  1521. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1522. if (!ret)
  1523. wait_event(card->wait_q,
  1524. (channel->state == CH_STATE_RCD_DONE ||
  1525. channel->state == CH_STATE_DOWN));
  1526. if (channel->state == CH_STATE_DOWN)
  1527. ret = -EIO;
  1528. else
  1529. channel->state = CH_STATE_DOWN;
  1530. if (ret) {
  1531. kfree(rcd_buf);
  1532. *buffer = NULL;
  1533. *length = 0;
  1534. } else {
  1535. *length = ciw->count;
  1536. *buffer = rcd_buf;
  1537. }
  1538. return ret;
  1539. }
  1540. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1541. {
  1542. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1543. card->info.chpid = prcd[30];
  1544. card->info.unit_addr2 = prcd[31];
  1545. card->info.cula = prcd[63];
  1546. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1547. (prcd[0x11] == _ascebc['M']));
  1548. }
  1549. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1550. {
  1551. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1552. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1553. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1554. card->info.blkt.time_total = 0;
  1555. card->info.blkt.inter_packet = 0;
  1556. card->info.blkt.inter_packet_jumbo = 0;
  1557. } else {
  1558. card->info.blkt.time_total = 250;
  1559. card->info.blkt.inter_packet = 5;
  1560. card->info.blkt.inter_packet_jumbo = 15;
  1561. }
  1562. }
  1563. static void qeth_init_tokens(struct qeth_card *card)
  1564. {
  1565. card->token.issuer_rm_w = 0x00010103UL;
  1566. card->token.cm_filter_w = 0x00010108UL;
  1567. card->token.cm_connection_w = 0x0001010aUL;
  1568. card->token.ulp_filter_w = 0x0001010bUL;
  1569. card->token.ulp_connection_w = 0x0001010dUL;
  1570. }
  1571. static void qeth_init_func_level(struct qeth_card *card)
  1572. {
  1573. switch (card->info.type) {
  1574. case QETH_CARD_TYPE_IQD:
  1575. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1576. break;
  1577. case QETH_CARD_TYPE_OSD:
  1578. case QETH_CARD_TYPE_OSN:
  1579. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1580. break;
  1581. default:
  1582. break;
  1583. }
  1584. }
  1585. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1586. void (*idx_reply_cb)(struct qeth_channel *,
  1587. struct qeth_cmd_buffer *))
  1588. {
  1589. struct qeth_cmd_buffer *iob;
  1590. unsigned long flags;
  1591. int rc;
  1592. struct qeth_card *card;
  1593. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1594. card = CARD_FROM_CDEV(channel->ccwdev);
  1595. iob = qeth_get_buffer(channel);
  1596. if (!iob)
  1597. return -ENOMEM;
  1598. iob->callback = idx_reply_cb;
  1599. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1600. channel->ccw.count = QETH_BUFSIZE;
  1601. channel->ccw.cda = (__u32) __pa(iob->data);
  1602. wait_event(card->wait_q,
  1603. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1604. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1605. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1606. rc = ccw_device_start(channel->ccwdev,
  1607. &channel->ccw, (addr_t) iob, 0, 0);
  1608. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1609. if (rc) {
  1610. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1611. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1612. atomic_set(&channel->irq_pending, 0);
  1613. wake_up(&card->wait_q);
  1614. return rc;
  1615. }
  1616. rc = wait_event_interruptible_timeout(card->wait_q,
  1617. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1618. if (rc == -ERESTARTSYS)
  1619. return rc;
  1620. if (channel->state != CH_STATE_UP) {
  1621. rc = -ETIME;
  1622. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1623. qeth_clear_cmd_buffers(channel);
  1624. } else
  1625. rc = 0;
  1626. return rc;
  1627. }
  1628. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1629. void (*idx_reply_cb)(struct qeth_channel *,
  1630. struct qeth_cmd_buffer *))
  1631. {
  1632. struct qeth_card *card;
  1633. struct qeth_cmd_buffer *iob;
  1634. unsigned long flags;
  1635. __u16 temp;
  1636. __u8 tmp;
  1637. int rc;
  1638. struct ccw_dev_id temp_devid;
  1639. card = CARD_FROM_CDEV(channel->ccwdev);
  1640. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1641. iob = qeth_get_buffer(channel);
  1642. if (!iob)
  1643. return -ENOMEM;
  1644. iob->callback = idx_reply_cb;
  1645. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1646. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1647. channel->ccw.cda = (__u32) __pa(iob->data);
  1648. if (channel == &card->write) {
  1649. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1650. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1651. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1652. card->seqno.trans_hdr++;
  1653. } else {
  1654. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1655. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1656. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1657. }
  1658. tmp = ((__u8)card->info.portno) | 0x80;
  1659. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1660. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1661. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1662. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1663. &card->info.func_level, sizeof(__u16));
  1664. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1665. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1666. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1667. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1668. wait_event(card->wait_q,
  1669. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1670. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1671. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1672. rc = ccw_device_start(channel->ccwdev,
  1673. &channel->ccw, (addr_t) iob, 0, 0);
  1674. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1675. if (rc) {
  1676. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1677. rc);
  1678. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1679. atomic_set(&channel->irq_pending, 0);
  1680. wake_up(&card->wait_q);
  1681. return rc;
  1682. }
  1683. rc = wait_event_interruptible_timeout(card->wait_q,
  1684. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1685. if (rc == -ERESTARTSYS)
  1686. return rc;
  1687. if (channel->state != CH_STATE_ACTIVATING) {
  1688. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1689. " failed to recover an error on the device\n");
  1690. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1691. dev_name(&channel->ccwdev->dev));
  1692. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1693. qeth_clear_cmd_buffers(channel);
  1694. return -ETIME;
  1695. }
  1696. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1697. }
  1698. static int qeth_peer_func_level(int level)
  1699. {
  1700. if ((level & 0xff) == 8)
  1701. return (level & 0xff) + 0x400;
  1702. if (((level >> 8) & 3) == 1)
  1703. return (level & 0xff) + 0x200;
  1704. return level;
  1705. }
  1706. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1707. struct qeth_cmd_buffer *iob)
  1708. {
  1709. struct qeth_card *card;
  1710. __u16 temp;
  1711. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1712. if (channel->state == CH_STATE_DOWN) {
  1713. channel->state = CH_STATE_ACTIVATING;
  1714. goto out;
  1715. }
  1716. card = CARD_FROM_CDEV(channel->ccwdev);
  1717. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1718. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1719. dev_err(&card->write.ccwdev->dev,
  1720. "The adapter is used exclusively by another "
  1721. "host\n");
  1722. else
  1723. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1724. " negative reply\n",
  1725. dev_name(&card->write.ccwdev->dev));
  1726. goto out;
  1727. }
  1728. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1729. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1730. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1731. "function level mismatch (sent: 0x%x, received: "
  1732. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1733. card->info.func_level, temp);
  1734. goto out;
  1735. }
  1736. channel->state = CH_STATE_UP;
  1737. out:
  1738. qeth_release_buffer(channel, iob);
  1739. }
  1740. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1741. struct qeth_cmd_buffer *iob)
  1742. {
  1743. struct qeth_card *card;
  1744. __u16 temp;
  1745. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1746. if (channel->state == CH_STATE_DOWN) {
  1747. channel->state = CH_STATE_ACTIVATING;
  1748. goto out;
  1749. }
  1750. card = CARD_FROM_CDEV(channel->ccwdev);
  1751. if (qeth_check_idx_response(card, iob->data))
  1752. goto out;
  1753. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1754. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1755. case QETH_IDX_ACT_ERR_EXCL:
  1756. dev_err(&card->write.ccwdev->dev,
  1757. "The adapter is used exclusively by another "
  1758. "host\n");
  1759. break;
  1760. case QETH_IDX_ACT_ERR_AUTH:
  1761. case QETH_IDX_ACT_ERR_AUTH_USER:
  1762. dev_err(&card->read.ccwdev->dev,
  1763. "Setting the device online failed because of "
  1764. "insufficient authorization\n");
  1765. break;
  1766. default:
  1767. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1768. " negative reply\n",
  1769. dev_name(&card->read.ccwdev->dev));
  1770. }
  1771. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1772. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1773. goto out;
  1774. }
  1775. /**
  1776. * * temporary fix for microcode bug
  1777. * * to revert it,replace OR by AND
  1778. * */
  1779. if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
  1780. (card->info.type == QETH_CARD_TYPE_OSD))
  1781. card->info.portname_required = 1;
  1782. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1783. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1784. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1785. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1786. dev_name(&card->read.ccwdev->dev),
  1787. card->info.func_level, temp);
  1788. goto out;
  1789. }
  1790. memcpy(&card->token.issuer_rm_r,
  1791. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1792. QETH_MPC_TOKEN_LENGTH);
  1793. memcpy(&card->info.mcl_level[0],
  1794. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1795. channel->state = CH_STATE_UP;
  1796. out:
  1797. qeth_release_buffer(channel, iob);
  1798. }
  1799. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1800. struct qeth_cmd_buffer *iob)
  1801. {
  1802. qeth_setup_ccw(&card->write, iob->data, len);
  1803. iob->callback = qeth_release_buffer;
  1804. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1805. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1806. card->seqno.trans_hdr++;
  1807. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1808. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1809. card->seqno.pdu_hdr++;
  1810. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1811. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1812. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1813. }
  1814. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1815. /**
  1816. * qeth_send_control_data() - send control command to the card
  1817. * @card: qeth_card structure pointer
  1818. * @len: size of the command buffer
  1819. * @iob: qeth_cmd_buffer pointer
  1820. * @reply_cb: callback function pointer
  1821. * @cb_card: pointer to the qeth_card structure
  1822. * @cb_reply: pointer to the qeth_reply structure
  1823. * @cb_cmd: pointer to the original iob for non-IPA
  1824. * commands, or to the qeth_ipa_cmd structure
  1825. * for the IPA commands.
  1826. * @reply_param: private pointer passed to the callback
  1827. *
  1828. * Returns the value of the `return_code' field of the response
  1829. * block returned from the hardware, or other error indication.
  1830. * Value of zero indicates successful execution of the command.
  1831. *
  1832. * Callback function gets called one or more times, with cb_cmd
  1833. * pointing to the response returned by the hardware. Callback
  1834. * function must return non-zero if more reply blocks are expected,
  1835. * and zero if the last or only reply block is received. Callback
  1836. * function can get the value of the reply_param pointer from the
  1837. * field 'param' of the structure qeth_reply.
  1838. */
  1839. int qeth_send_control_data(struct qeth_card *card, int len,
  1840. struct qeth_cmd_buffer *iob,
  1841. int (*reply_cb)(struct qeth_card *cb_card,
  1842. struct qeth_reply *cb_reply,
  1843. unsigned long cb_cmd),
  1844. void *reply_param)
  1845. {
  1846. int rc;
  1847. unsigned long flags;
  1848. struct qeth_reply *reply = NULL;
  1849. unsigned long timeout, event_timeout;
  1850. struct qeth_ipa_cmd *cmd;
  1851. QETH_CARD_TEXT(card, 2, "sendctl");
  1852. if (card->read_or_write_problem) {
  1853. qeth_release_buffer(iob->channel, iob);
  1854. return -EIO;
  1855. }
  1856. reply = qeth_alloc_reply(card);
  1857. if (!reply) {
  1858. return -ENOMEM;
  1859. }
  1860. reply->callback = reply_cb;
  1861. reply->param = reply_param;
  1862. if (card->state == CARD_STATE_DOWN)
  1863. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1864. else
  1865. reply->seqno = card->seqno.ipa++;
  1866. init_waitqueue_head(&reply->wait_q);
  1867. spin_lock_irqsave(&card->lock, flags);
  1868. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1869. spin_unlock_irqrestore(&card->lock, flags);
  1870. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1871. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1872. qeth_prepare_control_data(card, len, iob);
  1873. if (IS_IPA(iob->data))
  1874. event_timeout = QETH_IPA_TIMEOUT;
  1875. else
  1876. event_timeout = QETH_TIMEOUT;
  1877. timeout = jiffies + event_timeout;
  1878. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1879. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1880. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1881. (addr_t) iob, 0, 0);
  1882. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1883. if (rc) {
  1884. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1885. "ccw_device_start rc = %i\n",
  1886. dev_name(&card->write.ccwdev->dev), rc);
  1887. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1888. spin_lock_irqsave(&card->lock, flags);
  1889. list_del_init(&reply->list);
  1890. qeth_put_reply(reply);
  1891. spin_unlock_irqrestore(&card->lock, flags);
  1892. qeth_release_buffer(iob->channel, iob);
  1893. atomic_set(&card->write.irq_pending, 0);
  1894. wake_up(&card->wait_q);
  1895. return rc;
  1896. }
  1897. /* we have only one long running ipassist, since we can ensure
  1898. process context of this command we can sleep */
  1899. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1900. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1901. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1902. if (!wait_event_timeout(reply->wait_q,
  1903. atomic_read(&reply->received), event_timeout))
  1904. goto time_err;
  1905. } else {
  1906. while (!atomic_read(&reply->received)) {
  1907. if (time_after(jiffies, timeout))
  1908. goto time_err;
  1909. cpu_relax();
  1910. }
  1911. }
  1912. if (reply->rc == -EIO)
  1913. goto error;
  1914. rc = reply->rc;
  1915. qeth_put_reply(reply);
  1916. return rc;
  1917. time_err:
  1918. reply->rc = -ETIME;
  1919. spin_lock_irqsave(&reply->card->lock, flags);
  1920. list_del_init(&reply->list);
  1921. spin_unlock_irqrestore(&reply->card->lock, flags);
  1922. atomic_inc(&reply->received);
  1923. error:
  1924. atomic_set(&card->write.irq_pending, 0);
  1925. qeth_release_buffer(iob->channel, iob);
  1926. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1927. rc = reply->rc;
  1928. qeth_put_reply(reply);
  1929. return rc;
  1930. }
  1931. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1932. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1933. unsigned long data)
  1934. {
  1935. struct qeth_cmd_buffer *iob;
  1936. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1937. iob = (struct qeth_cmd_buffer *) data;
  1938. memcpy(&card->token.cm_filter_r,
  1939. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1940. QETH_MPC_TOKEN_LENGTH);
  1941. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1942. return 0;
  1943. }
  1944. static int qeth_cm_enable(struct qeth_card *card)
  1945. {
  1946. int rc;
  1947. struct qeth_cmd_buffer *iob;
  1948. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1949. iob = qeth_wait_for_buffer(&card->write);
  1950. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1951. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1952. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1953. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1954. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1955. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1956. qeth_cm_enable_cb, NULL);
  1957. return rc;
  1958. }
  1959. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1960. unsigned long data)
  1961. {
  1962. struct qeth_cmd_buffer *iob;
  1963. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1964. iob = (struct qeth_cmd_buffer *) data;
  1965. memcpy(&card->token.cm_connection_r,
  1966. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1967. QETH_MPC_TOKEN_LENGTH);
  1968. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1969. return 0;
  1970. }
  1971. static int qeth_cm_setup(struct qeth_card *card)
  1972. {
  1973. int rc;
  1974. struct qeth_cmd_buffer *iob;
  1975. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1976. iob = qeth_wait_for_buffer(&card->write);
  1977. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1978. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1979. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1980. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1981. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1982. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1983. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1984. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1985. qeth_cm_setup_cb, NULL);
  1986. return rc;
  1987. }
  1988. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1989. {
  1990. switch (card->info.type) {
  1991. case QETH_CARD_TYPE_UNKNOWN:
  1992. return 1500;
  1993. case QETH_CARD_TYPE_IQD:
  1994. return card->info.max_mtu;
  1995. case QETH_CARD_TYPE_OSD:
  1996. switch (card->info.link_type) {
  1997. case QETH_LINK_TYPE_HSTR:
  1998. case QETH_LINK_TYPE_LANE_TR:
  1999. return 2000;
  2000. default:
  2001. return card->options.layer2 ? 1500 : 1492;
  2002. }
  2003. case QETH_CARD_TYPE_OSM:
  2004. case QETH_CARD_TYPE_OSX:
  2005. return card->options.layer2 ? 1500 : 1492;
  2006. default:
  2007. return 1500;
  2008. }
  2009. }
  2010. static inline int qeth_get_mtu_outof_framesize(int framesize)
  2011. {
  2012. switch (framesize) {
  2013. case 0x4000:
  2014. return 8192;
  2015. case 0x6000:
  2016. return 16384;
  2017. case 0xa000:
  2018. return 32768;
  2019. case 0xffff:
  2020. return 57344;
  2021. default:
  2022. return 0;
  2023. }
  2024. }
  2025. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2026. {
  2027. switch (card->info.type) {
  2028. case QETH_CARD_TYPE_OSD:
  2029. case QETH_CARD_TYPE_OSM:
  2030. case QETH_CARD_TYPE_OSX:
  2031. case QETH_CARD_TYPE_IQD:
  2032. return ((mtu >= 576) &&
  2033. (mtu <= card->info.max_mtu));
  2034. case QETH_CARD_TYPE_OSN:
  2035. case QETH_CARD_TYPE_UNKNOWN:
  2036. default:
  2037. return 1;
  2038. }
  2039. }
  2040. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2041. unsigned long data)
  2042. {
  2043. __u16 mtu, framesize;
  2044. __u16 len;
  2045. __u8 link_type;
  2046. struct qeth_cmd_buffer *iob;
  2047. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2048. iob = (struct qeth_cmd_buffer *) data;
  2049. memcpy(&card->token.ulp_filter_r,
  2050. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2051. QETH_MPC_TOKEN_LENGTH);
  2052. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2053. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2054. mtu = qeth_get_mtu_outof_framesize(framesize);
  2055. if (!mtu) {
  2056. iob->rc = -EINVAL;
  2057. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2058. return 0;
  2059. }
  2060. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2061. /* frame size has changed */
  2062. if (card->dev &&
  2063. ((card->dev->mtu == card->info.initial_mtu) ||
  2064. (card->dev->mtu > mtu)))
  2065. card->dev->mtu = mtu;
  2066. qeth_free_qdio_buffers(card);
  2067. }
  2068. card->info.initial_mtu = mtu;
  2069. card->info.max_mtu = mtu;
  2070. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2071. } else {
  2072. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2073. iob->data);
  2074. card->info.initial_mtu = min(card->info.max_mtu,
  2075. qeth_get_initial_mtu_for_card(card));
  2076. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2077. }
  2078. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2079. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2080. memcpy(&link_type,
  2081. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2082. card->info.link_type = link_type;
  2083. } else
  2084. card->info.link_type = 0;
  2085. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2086. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2087. return 0;
  2088. }
  2089. static int qeth_ulp_enable(struct qeth_card *card)
  2090. {
  2091. int rc;
  2092. char prot_type;
  2093. struct qeth_cmd_buffer *iob;
  2094. /*FIXME: trace view callbacks*/
  2095. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2096. iob = qeth_wait_for_buffer(&card->write);
  2097. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2098. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2099. (__u8) card->info.portno;
  2100. if (card->options.layer2)
  2101. if (card->info.type == QETH_CARD_TYPE_OSN)
  2102. prot_type = QETH_PROT_OSN2;
  2103. else
  2104. prot_type = QETH_PROT_LAYER2;
  2105. else
  2106. prot_type = QETH_PROT_TCPIP;
  2107. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2108. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2109. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2110. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2111. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2112. memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
  2113. card->info.portname, 9);
  2114. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2115. qeth_ulp_enable_cb, NULL);
  2116. return rc;
  2117. }
  2118. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2119. unsigned long data)
  2120. {
  2121. struct qeth_cmd_buffer *iob;
  2122. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2123. iob = (struct qeth_cmd_buffer *) data;
  2124. memcpy(&card->token.ulp_connection_r,
  2125. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2126. QETH_MPC_TOKEN_LENGTH);
  2127. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2128. 3)) {
  2129. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2130. dev_err(&card->gdev->dev, "A connection could not be "
  2131. "established because of an OLM limit\n");
  2132. iob->rc = -EMLINK;
  2133. }
  2134. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2135. return 0;
  2136. }
  2137. static int qeth_ulp_setup(struct qeth_card *card)
  2138. {
  2139. int rc;
  2140. __u16 temp;
  2141. struct qeth_cmd_buffer *iob;
  2142. struct ccw_dev_id dev_id;
  2143. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2144. iob = qeth_wait_for_buffer(&card->write);
  2145. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2146. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2147. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2148. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2149. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2150. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2151. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2152. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2153. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2154. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2155. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2156. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2157. qeth_ulp_setup_cb, NULL);
  2158. return rc;
  2159. }
  2160. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2161. {
  2162. int rc;
  2163. struct qeth_qdio_out_buffer *newbuf;
  2164. rc = 0;
  2165. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2166. if (!newbuf) {
  2167. rc = -ENOMEM;
  2168. goto out;
  2169. }
  2170. newbuf->buffer = q->qdio_bufs[bidx];
  2171. skb_queue_head_init(&newbuf->skb_list);
  2172. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2173. newbuf->q = q;
  2174. newbuf->aob = NULL;
  2175. newbuf->next_pending = q->bufs[bidx];
  2176. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2177. q->bufs[bidx] = newbuf;
  2178. if (q->bufstates) {
  2179. q->bufstates[bidx].user = newbuf;
  2180. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2181. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2182. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2183. (long) newbuf->next_pending);
  2184. }
  2185. out:
  2186. return rc;
  2187. }
  2188. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2189. {
  2190. if (!q)
  2191. return;
  2192. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2193. kfree(q);
  2194. }
  2195. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2196. {
  2197. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2198. if (!q)
  2199. return NULL;
  2200. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2201. kfree(q);
  2202. return NULL;
  2203. }
  2204. return q;
  2205. }
  2206. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2207. {
  2208. int i, j;
  2209. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2210. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2211. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2212. return 0;
  2213. QETH_DBF_TEXT(SETUP, 2, "inq");
  2214. card->qdio.in_q = qeth_alloc_qdio_queue();
  2215. if (!card->qdio.in_q)
  2216. goto out_nomem;
  2217. /* inbound buffer pool */
  2218. if (qeth_alloc_buffer_pool(card))
  2219. goto out_freeinq;
  2220. /* outbound */
  2221. card->qdio.out_qs =
  2222. kzalloc(card->qdio.no_out_queues *
  2223. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2224. if (!card->qdio.out_qs)
  2225. goto out_freepool;
  2226. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2227. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2228. if (!card->qdio.out_qs[i])
  2229. goto out_freeoutq;
  2230. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2231. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2232. card->qdio.out_qs[i]->queue_no = i;
  2233. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2234. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2235. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2236. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2237. goto out_freeoutqbufs;
  2238. }
  2239. }
  2240. /* completion */
  2241. if (qeth_alloc_cq(card))
  2242. goto out_freeoutq;
  2243. return 0;
  2244. out_freeoutqbufs:
  2245. while (j > 0) {
  2246. --j;
  2247. kmem_cache_free(qeth_qdio_outbuf_cache,
  2248. card->qdio.out_qs[i]->bufs[j]);
  2249. card->qdio.out_qs[i]->bufs[j] = NULL;
  2250. }
  2251. out_freeoutq:
  2252. while (i > 0) {
  2253. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2254. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2255. }
  2256. kfree(card->qdio.out_qs);
  2257. card->qdio.out_qs = NULL;
  2258. out_freepool:
  2259. qeth_free_buffer_pool(card);
  2260. out_freeinq:
  2261. qeth_free_qdio_queue(card->qdio.in_q);
  2262. card->qdio.in_q = NULL;
  2263. out_nomem:
  2264. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2265. return -ENOMEM;
  2266. }
  2267. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2268. {
  2269. int i, j;
  2270. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2271. QETH_QDIO_UNINITIALIZED)
  2272. return;
  2273. qeth_free_cq(card);
  2274. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2275. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2276. if (card->qdio.in_q->bufs[j].rx_skb)
  2277. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2278. }
  2279. qeth_free_qdio_queue(card->qdio.in_q);
  2280. card->qdio.in_q = NULL;
  2281. /* inbound buffer pool */
  2282. qeth_free_buffer_pool(card);
  2283. /* free outbound qdio_qs */
  2284. if (card->qdio.out_qs) {
  2285. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2286. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2287. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2288. }
  2289. kfree(card->qdio.out_qs);
  2290. card->qdio.out_qs = NULL;
  2291. }
  2292. }
  2293. static void qeth_create_qib_param_field(struct qeth_card *card,
  2294. char *param_field)
  2295. {
  2296. param_field[0] = _ascebc['P'];
  2297. param_field[1] = _ascebc['C'];
  2298. param_field[2] = _ascebc['I'];
  2299. param_field[3] = _ascebc['T'];
  2300. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2301. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2302. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2303. }
  2304. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2305. char *param_field)
  2306. {
  2307. param_field[16] = _ascebc['B'];
  2308. param_field[17] = _ascebc['L'];
  2309. param_field[18] = _ascebc['K'];
  2310. param_field[19] = _ascebc['T'];
  2311. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2312. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2313. *((unsigned int *) (&param_field[28])) =
  2314. card->info.blkt.inter_packet_jumbo;
  2315. }
  2316. static int qeth_qdio_activate(struct qeth_card *card)
  2317. {
  2318. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2319. return qdio_activate(CARD_DDEV(card));
  2320. }
  2321. static int qeth_dm_act(struct qeth_card *card)
  2322. {
  2323. int rc;
  2324. struct qeth_cmd_buffer *iob;
  2325. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2326. iob = qeth_wait_for_buffer(&card->write);
  2327. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2328. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2329. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2330. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2331. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2332. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2333. return rc;
  2334. }
  2335. static int qeth_mpc_initialize(struct qeth_card *card)
  2336. {
  2337. int rc;
  2338. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2339. rc = qeth_issue_next_read(card);
  2340. if (rc) {
  2341. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2342. return rc;
  2343. }
  2344. rc = qeth_cm_enable(card);
  2345. if (rc) {
  2346. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2347. goto out_qdio;
  2348. }
  2349. rc = qeth_cm_setup(card);
  2350. if (rc) {
  2351. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2352. goto out_qdio;
  2353. }
  2354. rc = qeth_ulp_enable(card);
  2355. if (rc) {
  2356. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2357. goto out_qdio;
  2358. }
  2359. rc = qeth_ulp_setup(card);
  2360. if (rc) {
  2361. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2362. goto out_qdio;
  2363. }
  2364. rc = qeth_alloc_qdio_buffers(card);
  2365. if (rc) {
  2366. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2367. goto out_qdio;
  2368. }
  2369. rc = qeth_qdio_establish(card);
  2370. if (rc) {
  2371. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2372. qeth_free_qdio_buffers(card);
  2373. goto out_qdio;
  2374. }
  2375. rc = qeth_qdio_activate(card);
  2376. if (rc) {
  2377. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2378. goto out_qdio;
  2379. }
  2380. rc = qeth_dm_act(card);
  2381. if (rc) {
  2382. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2383. goto out_qdio;
  2384. }
  2385. return 0;
  2386. out_qdio:
  2387. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2388. qdio_free(CARD_DDEV(card));
  2389. return rc;
  2390. }
  2391. static void qeth_print_status_with_portname(struct qeth_card *card)
  2392. {
  2393. char dbf_text[15];
  2394. int i;
  2395. sprintf(dbf_text, "%s", card->info.portname + 1);
  2396. for (i = 0; i < 8; i++)
  2397. dbf_text[i] =
  2398. (char) _ebcasc[(__u8) dbf_text[i]];
  2399. dbf_text[8] = 0;
  2400. dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
  2401. "with link type %s (portname: %s)\n",
  2402. qeth_get_cardname(card),
  2403. (card->info.mcl_level[0]) ? " (level: " : "",
  2404. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2405. (card->info.mcl_level[0]) ? ")" : "",
  2406. qeth_get_cardname_short(card),
  2407. dbf_text);
  2408. }
  2409. static void qeth_print_status_no_portname(struct qeth_card *card)
  2410. {
  2411. if (card->info.portname[0])
  2412. dev_info(&card->gdev->dev, "Device is a%s "
  2413. "card%s%s%s\nwith link type %s "
  2414. "(no portname needed by interface).\n",
  2415. qeth_get_cardname(card),
  2416. (card->info.mcl_level[0]) ? " (level: " : "",
  2417. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2418. (card->info.mcl_level[0]) ? ")" : "",
  2419. qeth_get_cardname_short(card));
  2420. else
  2421. dev_info(&card->gdev->dev, "Device is a%s "
  2422. "card%s%s%s\nwith link type %s.\n",
  2423. qeth_get_cardname(card),
  2424. (card->info.mcl_level[0]) ? " (level: " : "",
  2425. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2426. (card->info.mcl_level[0]) ? ")" : "",
  2427. qeth_get_cardname_short(card));
  2428. }
  2429. void qeth_print_status_message(struct qeth_card *card)
  2430. {
  2431. switch (card->info.type) {
  2432. case QETH_CARD_TYPE_OSD:
  2433. case QETH_CARD_TYPE_OSM:
  2434. case QETH_CARD_TYPE_OSX:
  2435. /* VM will use a non-zero first character
  2436. * to indicate a HiperSockets like reporting
  2437. * of the level OSA sets the first character to zero
  2438. * */
  2439. if (!card->info.mcl_level[0]) {
  2440. sprintf(card->info.mcl_level, "%02x%02x",
  2441. card->info.mcl_level[2],
  2442. card->info.mcl_level[3]);
  2443. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2444. break;
  2445. }
  2446. /* fallthrough */
  2447. case QETH_CARD_TYPE_IQD:
  2448. if ((card->info.guestlan) ||
  2449. (card->info.mcl_level[0] & 0x80)) {
  2450. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2451. card->info.mcl_level[0]];
  2452. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2453. card->info.mcl_level[1]];
  2454. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2455. card->info.mcl_level[2]];
  2456. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2457. card->info.mcl_level[3]];
  2458. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2459. }
  2460. break;
  2461. default:
  2462. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2463. }
  2464. if (card->info.portname_required)
  2465. qeth_print_status_with_portname(card);
  2466. else
  2467. qeth_print_status_no_portname(card);
  2468. }
  2469. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2470. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2471. {
  2472. struct qeth_buffer_pool_entry *entry;
  2473. QETH_CARD_TEXT(card, 5, "inwrklst");
  2474. list_for_each_entry(entry,
  2475. &card->qdio.init_pool.entry_list, init_list) {
  2476. qeth_put_buffer_pool_entry(card, entry);
  2477. }
  2478. }
  2479. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2480. struct qeth_card *card)
  2481. {
  2482. struct list_head *plh;
  2483. struct qeth_buffer_pool_entry *entry;
  2484. int i, free;
  2485. struct page *page;
  2486. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2487. return NULL;
  2488. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2489. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2490. free = 1;
  2491. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2492. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2493. free = 0;
  2494. break;
  2495. }
  2496. }
  2497. if (free) {
  2498. list_del_init(&entry->list);
  2499. return entry;
  2500. }
  2501. }
  2502. /* no free buffer in pool so take first one and swap pages */
  2503. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2504. struct qeth_buffer_pool_entry, list);
  2505. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2506. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2507. page = alloc_page(GFP_ATOMIC);
  2508. if (!page) {
  2509. return NULL;
  2510. } else {
  2511. free_page((unsigned long)entry->elements[i]);
  2512. entry->elements[i] = page_address(page);
  2513. if (card->options.performance_stats)
  2514. card->perf_stats.sg_alloc_page_rx++;
  2515. }
  2516. }
  2517. }
  2518. list_del_init(&entry->list);
  2519. return entry;
  2520. }
  2521. static int qeth_init_input_buffer(struct qeth_card *card,
  2522. struct qeth_qdio_buffer *buf)
  2523. {
  2524. struct qeth_buffer_pool_entry *pool_entry;
  2525. int i;
  2526. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2527. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2528. if (!buf->rx_skb)
  2529. return 1;
  2530. }
  2531. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2532. if (!pool_entry)
  2533. return 1;
  2534. /*
  2535. * since the buffer is accessed only from the input_tasklet
  2536. * there shouldn't be a need to synchronize; also, since we use
  2537. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2538. * buffers
  2539. */
  2540. buf->pool_entry = pool_entry;
  2541. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2542. buf->buffer->element[i].length = PAGE_SIZE;
  2543. buf->buffer->element[i].addr = pool_entry->elements[i];
  2544. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2545. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2546. else
  2547. buf->buffer->element[i].eflags = 0;
  2548. buf->buffer->element[i].sflags = 0;
  2549. }
  2550. return 0;
  2551. }
  2552. int qeth_init_qdio_queues(struct qeth_card *card)
  2553. {
  2554. int i, j;
  2555. int rc;
  2556. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2557. /* inbound queue */
  2558. qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
  2559. QDIO_MAX_BUFFERS_PER_Q);
  2560. qeth_initialize_working_pool_list(card);
  2561. /*give only as many buffers to hardware as we have buffer pool entries*/
  2562. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2563. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2564. card->qdio.in_q->next_buf_to_init =
  2565. card->qdio.in_buf_pool.buf_count - 1;
  2566. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2567. card->qdio.in_buf_pool.buf_count - 1);
  2568. if (rc) {
  2569. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2570. return rc;
  2571. }
  2572. /* completion */
  2573. rc = qeth_cq_init(card);
  2574. if (rc) {
  2575. return rc;
  2576. }
  2577. /* outbound queue */
  2578. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2579. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2580. QDIO_MAX_BUFFERS_PER_Q);
  2581. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2582. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2583. card->qdio.out_qs[i]->bufs[j],
  2584. QETH_QDIO_BUF_EMPTY);
  2585. }
  2586. card->qdio.out_qs[i]->card = card;
  2587. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2588. card->qdio.out_qs[i]->do_pack = 0;
  2589. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2590. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2591. atomic_set(&card->qdio.out_qs[i]->state,
  2592. QETH_OUT_Q_UNLOCKED);
  2593. }
  2594. return 0;
  2595. }
  2596. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2597. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2598. {
  2599. switch (link_type) {
  2600. case QETH_LINK_TYPE_HSTR:
  2601. return 2;
  2602. default:
  2603. return 1;
  2604. }
  2605. }
  2606. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2607. struct qeth_ipa_cmd *cmd, __u8 command,
  2608. enum qeth_prot_versions prot)
  2609. {
  2610. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2611. cmd->hdr.command = command;
  2612. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2613. cmd->hdr.seqno = card->seqno.ipa;
  2614. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2615. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2616. if (card->options.layer2)
  2617. cmd->hdr.prim_version_no = 2;
  2618. else
  2619. cmd->hdr.prim_version_no = 1;
  2620. cmd->hdr.param_count = 1;
  2621. cmd->hdr.prot_version = prot;
  2622. cmd->hdr.ipa_supported = 0;
  2623. cmd->hdr.ipa_enabled = 0;
  2624. }
  2625. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2626. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2627. {
  2628. struct qeth_cmd_buffer *iob;
  2629. struct qeth_ipa_cmd *cmd;
  2630. iob = qeth_get_buffer(&card->write);
  2631. if (iob) {
  2632. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2633. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2634. } else {
  2635. dev_warn(&card->gdev->dev,
  2636. "The qeth driver ran out of channel command buffers\n");
  2637. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2638. dev_name(&card->gdev->dev));
  2639. }
  2640. return iob;
  2641. }
  2642. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2643. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2644. char prot_type)
  2645. {
  2646. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2647. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2648. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2649. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2650. }
  2651. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2652. /**
  2653. * qeth_send_ipa_cmd() - send an IPA command
  2654. *
  2655. * See qeth_send_control_data() for explanation of the arguments.
  2656. */
  2657. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2658. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2659. unsigned long),
  2660. void *reply_param)
  2661. {
  2662. int rc;
  2663. char prot_type;
  2664. QETH_CARD_TEXT(card, 4, "sendipa");
  2665. if (card->options.layer2)
  2666. if (card->info.type == QETH_CARD_TYPE_OSN)
  2667. prot_type = QETH_PROT_OSN2;
  2668. else
  2669. prot_type = QETH_PROT_LAYER2;
  2670. else
  2671. prot_type = QETH_PROT_TCPIP;
  2672. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2673. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2674. iob, reply_cb, reply_param);
  2675. if (rc == -ETIME) {
  2676. qeth_clear_ipacmd_list(card);
  2677. qeth_schedule_recovery(card);
  2678. }
  2679. return rc;
  2680. }
  2681. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2682. int qeth_send_startlan(struct qeth_card *card)
  2683. {
  2684. int rc;
  2685. struct qeth_cmd_buffer *iob;
  2686. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2687. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2688. if (!iob)
  2689. return -ENOMEM;
  2690. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2691. return rc;
  2692. }
  2693. EXPORT_SYMBOL_GPL(qeth_send_startlan);
  2694. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2695. struct qeth_reply *reply, unsigned long data)
  2696. {
  2697. struct qeth_ipa_cmd *cmd;
  2698. QETH_CARD_TEXT(card, 4, "defadpcb");
  2699. cmd = (struct qeth_ipa_cmd *) data;
  2700. if (cmd->hdr.return_code == 0)
  2701. cmd->hdr.return_code =
  2702. cmd->data.setadapterparms.hdr.return_code;
  2703. return 0;
  2704. }
  2705. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2706. struct qeth_reply *reply, unsigned long data)
  2707. {
  2708. struct qeth_ipa_cmd *cmd;
  2709. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2710. cmd = (struct qeth_ipa_cmd *) data;
  2711. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2712. card->info.link_type =
  2713. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2714. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2715. }
  2716. card->options.adp.supported_funcs =
  2717. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2718. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2719. }
  2720. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2721. __u32 command, __u32 cmdlen)
  2722. {
  2723. struct qeth_cmd_buffer *iob;
  2724. struct qeth_ipa_cmd *cmd;
  2725. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2726. QETH_PROT_IPV4);
  2727. if (iob) {
  2728. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2729. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2730. cmd->data.setadapterparms.hdr.command_code = command;
  2731. cmd->data.setadapterparms.hdr.used_total = 1;
  2732. cmd->data.setadapterparms.hdr.seq_no = 1;
  2733. }
  2734. return iob;
  2735. }
  2736. int qeth_query_setadapterparms(struct qeth_card *card)
  2737. {
  2738. int rc;
  2739. struct qeth_cmd_buffer *iob;
  2740. QETH_CARD_TEXT(card, 3, "queryadp");
  2741. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2742. sizeof(struct qeth_ipacmd_setadpparms));
  2743. if (!iob)
  2744. return -ENOMEM;
  2745. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2746. return rc;
  2747. }
  2748. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2749. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2750. struct qeth_reply *reply, unsigned long data)
  2751. {
  2752. struct qeth_ipa_cmd *cmd;
  2753. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2754. cmd = (struct qeth_ipa_cmd *) data;
  2755. switch (cmd->hdr.return_code) {
  2756. case IPA_RC_NOTSUPP:
  2757. case IPA_RC_L2_UNSUPPORTED_CMD:
  2758. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2759. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2760. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2761. return -0;
  2762. default:
  2763. if (cmd->hdr.return_code) {
  2764. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2765. "rc=%d\n",
  2766. dev_name(&card->gdev->dev),
  2767. cmd->hdr.return_code);
  2768. return 0;
  2769. }
  2770. }
  2771. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2772. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2773. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2774. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2775. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2776. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2777. } else
  2778. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2779. "\n", dev_name(&card->gdev->dev));
  2780. return 0;
  2781. }
  2782. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2783. {
  2784. int rc;
  2785. struct qeth_cmd_buffer *iob;
  2786. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2787. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2788. if (!iob)
  2789. return -ENOMEM;
  2790. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2791. return rc;
  2792. }
  2793. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2794. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2795. struct qeth_reply *reply, unsigned long data)
  2796. {
  2797. struct qeth_ipa_cmd *cmd;
  2798. struct qeth_switch_info *sw_info;
  2799. struct qeth_query_switch_attributes *attrs;
  2800. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2801. cmd = (struct qeth_ipa_cmd *) data;
  2802. sw_info = (struct qeth_switch_info *)reply->param;
  2803. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2804. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2805. sw_info->capabilities = attrs->capabilities;
  2806. sw_info->settings = attrs->settings;
  2807. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2808. sw_info->settings);
  2809. }
  2810. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2811. return 0;
  2812. }
  2813. int qeth_query_switch_attributes(struct qeth_card *card,
  2814. struct qeth_switch_info *sw_info)
  2815. {
  2816. struct qeth_cmd_buffer *iob;
  2817. QETH_CARD_TEXT(card, 2, "qswiattr");
  2818. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2819. return -EOPNOTSUPP;
  2820. if (!netif_carrier_ok(card->dev))
  2821. return -ENOMEDIUM;
  2822. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2823. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2824. if (!iob)
  2825. return -ENOMEM;
  2826. return qeth_send_ipa_cmd(card, iob,
  2827. qeth_query_switch_attributes_cb, sw_info);
  2828. }
  2829. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2830. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2831. struct qeth_reply *reply, unsigned long data)
  2832. {
  2833. struct qeth_ipa_cmd *cmd;
  2834. __u16 rc;
  2835. cmd = (struct qeth_ipa_cmd *)data;
  2836. rc = cmd->hdr.return_code;
  2837. if (rc)
  2838. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2839. else
  2840. card->info.diagass_support = cmd->data.diagass.ext;
  2841. return 0;
  2842. }
  2843. static int qeth_query_setdiagass(struct qeth_card *card)
  2844. {
  2845. struct qeth_cmd_buffer *iob;
  2846. struct qeth_ipa_cmd *cmd;
  2847. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2848. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2849. if (!iob)
  2850. return -ENOMEM;
  2851. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2852. cmd->data.diagass.subcmd_len = 16;
  2853. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2854. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2855. }
  2856. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2857. {
  2858. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2859. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2860. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2861. struct ccw_dev_id ccwid;
  2862. int level;
  2863. tid->chpid = card->info.chpid;
  2864. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2865. tid->ssid = ccwid.ssid;
  2866. tid->devno = ccwid.devno;
  2867. if (!info)
  2868. return;
  2869. level = stsi(NULL, 0, 0, 0);
  2870. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2871. tid->lparnr = info222->lpar_number;
  2872. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2873. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2874. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2875. }
  2876. free_page(info);
  2877. return;
  2878. }
  2879. static int qeth_hw_trap_cb(struct qeth_card *card,
  2880. struct qeth_reply *reply, unsigned long data)
  2881. {
  2882. struct qeth_ipa_cmd *cmd;
  2883. __u16 rc;
  2884. cmd = (struct qeth_ipa_cmd *)data;
  2885. rc = cmd->hdr.return_code;
  2886. if (rc)
  2887. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2888. return 0;
  2889. }
  2890. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2891. {
  2892. struct qeth_cmd_buffer *iob;
  2893. struct qeth_ipa_cmd *cmd;
  2894. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2895. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2896. if (!iob)
  2897. return -ENOMEM;
  2898. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2899. cmd->data.diagass.subcmd_len = 80;
  2900. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2901. cmd->data.diagass.type = 1;
  2902. cmd->data.diagass.action = action;
  2903. switch (action) {
  2904. case QETH_DIAGS_TRAP_ARM:
  2905. cmd->data.diagass.options = 0x0003;
  2906. cmd->data.diagass.ext = 0x00010000 +
  2907. sizeof(struct qeth_trap_id);
  2908. qeth_get_trap_id(card,
  2909. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2910. break;
  2911. case QETH_DIAGS_TRAP_DISARM:
  2912. cmd->data.diagass.options = 0x0001;
  2913. break;
  2914. case QETH_DIAGS_TRAP_CAPTURE:
  2915. break;
  2916. }
  2917. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2918. }
  2919. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2920. int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
  2921. unsigned int qdio_error, const char *dbftext)
  2922. {
  2923. if (qdio_error) {
  2924. QETH_CARD_TEXT(card, 2, dbftext);
  2925. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2926. buf->element[15].sflags);
  2927. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2928. buf->element[14].sflags);
  2929. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2930. if ((buf->element[15].sflags) == 0x12) {
  2931. card->stats.rx_dropped++;
  2932. return 0;
  2933. } else
  2934. return 1;
  2935. }
  2936. return 0;
  2937. }
  2938. EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
  2939. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2940. {
  2941. struct qeth_card *card = container_of(work, struct qeth_card,
  2942. buffer_reclaim_work.work);
  2943. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2944. qeth_queue_input_buffer(card, card->reclaim_index);
  2945. }
  2946. void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2947. {
  2948. struct qeth_qdio_q *queue = card->qdio.in_q;
  2949. struct list_head *lh;
  2950. int count;
  2951. int i;
  2952. int rc;
  2953. int newcount = 0;
  2954. count = (index < queue->next_buf_to_init)?
  2955. card->qdio.in_buf_pool.buf_count -
  2956. (queue->next_buf_to_init - index) :
  2957. card->qdio.in_buf_pool.buf_count -
  2958. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2959. /* only requeue at a certain threshold to avoid SIGAs */
  2960. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2961. for (i = queue->next_buf_to_init;
  2962. i < queue->next_buf_to_init + count; ++i) {
  2963. if (qeth_init_input_buffer(card,
  2964. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2965. break;
  2966. } else {
  2967. newcount++;
  2968. }
  2969. }
  2970. if (newcount < count) {
  2971. /* we are in memory shortage so we switch back to
  2972. traditional skb allocation and drop packages */
  2973. atomic_set(&card->force_alloc_skb, 3);
  2974. count = newcount;
  2975. } else {
  2976. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2977. }
  2978. if (!count) {
  2979. i = 0;
  2980. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2981. i++;
  2982. if (i == card->qdio.in_buf_pool.buf_count) {
  2983. QETH_CARD_TEXT(card, 2, "qsarbw");
  2984. card->reclaim_index = index;
  2985. schedule_delayed_work(
  2986. &card->buffer_reclaim_work,
  2987. QETH_RECLAIM_WORK_TIME);
  2988. }
  2989. return;
  2990. }
  2991. /*
  2992. * according to old code it should be avoided to requeue all
  2993. * 128 buffers in order to benefit from PCI avoidance.
  2994. * this function keeps at least one buffer (the buffer at
  2995. * 'index') un-requeued -> this buffer is the first buffer that
  2996. * will be requeued the next time
  2997. */
  2998. if (card->options.performance_stats) {
  2999. card->perf_stats.inbound_do_qdio_cnt++;
  3000. card->perf_stats.inbound_do_qdio_start_time =
  3001. qeth_get_micros();
  3002. }
  3003. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  3004. queue->next_buf_to_init, count);
  3005. if (card->options.performance_stats)
  3006. card->perf_stats.inbound_do_qdio_time +=
  3007. qeth_get_micros() -
  3008. card->perf_stats.inbound_do_qdio_start_time;
  3009. if (rc) {
  3010. QETH_CARD_TEXT(card, 2, "qinberr");
  3011. }
  3012. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  3013. QDIO_MAX_BUFFERS_PER_Q;
  3014. }
  3015. }
  3016. EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
  3017. static int qeth_handle_send_error(struct qeth_card *card,
  3018. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  3019. {
  3020. int sbalf15 = buffer->buffer->element[15].sflags;
  3021. QETH_CARD_TEXT(card, 6, "hdsnderr");
  3022. if (card->info.type == QETH_CARD_TYPE_IQD) {
  3023. if (sbalf15 == 0) {
  3024. qdio_err = 0;
  3025. } else {
  3026. qdio_err = 1;
  3027. }
  3028. }
  3029. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  3030. if (!qdio_err)
  3031. return QETH_SEND_ERROR_NONE;
  3032. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  3033. return QETH_SEND_ERROR_RETRY;
  3034. QETH_CARD_TEXT(card, 1, "lnkfail");
  3035. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  3036. (u16)qdio_err, (u8)sbalf15);
  3037. return QETH_SEND_ERROR_LINK_FAILURE;
  3038. }
  3039. /*
  3040. * Switched to packing state if the number of used buffers on a queue
  3041. * reaches a certain limit.
  3042. */
  3043. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  3044. {
  3045. if (!queue->do_pack) {
  3046. if (atomic_read(&queue->used_buffers)
  3047. >= QETH_HIGH_WATERMARK_PACK){
  3048. /* switch non-PACKING -> PACKING */
  3049. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3050. if (queue->card->options.performance_stats)
  3051. queue->card->perf_stats.sc_dp_p++;
  3052. queue->do_pack = 1;
  3053. }
  3054. }
  3055. }
  3056. /*
  3057. * Switches from packing to non-packing mode. If there is a packing
  3058. * buffer on the queue this buffer will be prepared to be flushed.
  3059. * In that case 1 is returned to inform the caller. If no buffer
  3060. * has to be flushed, zero is returned.
  3061. */
  3062. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3063. {
  3064. struct qeth_qdio_out_buffer *buffer;
  3065. int flush_count = 0;
  3066. if (queue->do_pack) {
  3067. if (atomic_read(&queue->used_buffers)
  3068. <= QETH_LOW_WATERMARK_PACK) {
  3069. /* switch PACKING -> non-PACKING */
  3070. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3071. if (queue->card->options.performance_stats)
  3072. queue->card->perf_stats.sc_p_dp++;
  3073. queue->do_pack = 0;
  3074. /* flush packing buffers */
  3075. buffer = queue->bufs[queue->next_buf_to_fill];
  3076. if ((atomic_read(&buffer->state) ==
  3077. QETH_QDIO_BUF_EMPTY) &&
  3078. (buffer->next_element_to_fill > 0)) {
  3079. atomic_set(&buffer->state,
  3080. QETH_QDIO_BUF_PRIMED);
  3081. flush_count++;
  3082. queue->next_buf_to_fill =
  3083. (queue->next_buf_to_fill + 1) %
  3084. QDIO_MAX_BUFFERS_PER_Q;
  3085. }
  3086. }
  3087. }
  3088. return flush_count;
  3089. }
  3090. /*
  3091. * Called to flush a packing buffer if no more pci flags are on the queue.
  3092. * Checks if there is a packing buffer and prepares it to be flushed.
  3093. * In that case returns 1, otherwise zero.
  3094. */
  3095. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  3096. {
  3097. struct qeth_qdio_out_buffer *buffer;
  3098. buffer = queue->bufs[queue->next_buf_to_fill];
  3099. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3100. (buffer->next_element_to_fill > 0)) {
  3101. /* it's a packing buffer */
  3102. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3103. queue->next_buf_to_fill =
  3104. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3105. return 1;
  3106. }
  3107. return 0;
  3108. }
  3109. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3110. int count)
  3111. {
  3112. struct qeth_qdio_out_buffer *buf;
  3113. int rc;
  3114. int i;
  3115. unsigned int qdio_flags;
  3116. for (i = index; i < index + count; ++i) {
  3117. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3118. buf = queue->bufs[bidx];
  3119. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3120. SBAL_EFLAGS_LAST_ENTRY;
  3121. if (queue->bufstates)
  3122. queue->bufstates[bidx].user = buf;
  3123. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3124. continue;
  3125. if (!queue->do_pack) {
  3126. if ((atomic_read(&queue->used_buffers) >=
  3127. (QETH_HIGH_WATERMARK_PACK -
  3128. QETH_WATERMARK_PACK_FUZZ)) &&
  3129. !atomic_read(&queue->set_pci_flags_count)) {
  3130. /* it's likely that we'll go to packing
  3131. * mode soon */
  3132. atomic_inc(&queue->set_pci_flags_count);
  3133. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3134. }
  3135. } else {
  3136. if (!atomic_read(&queue->set_pci_flags_count)) {
  3137. /*
  3138. * there's no outstanding PCI any more, so we
  3139. * have to request a PCI to be sure the the PCI
  3140. * will wake at some time in the future then we
  3141. * can flush packed buffers that might still be
  3142. * hanging around, which can happen if no
  3143. * further send was requested by the stack
  3144. */
  3145. atomic_inc(&queue->set_pci_flags_count);
  3146. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3147. }
  3148. }
  3149. }
  3150. queue->card->dev->trans_start = jiffies;
  3151. if (queue->card->options.performance_stats) {
  3152. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3153. queue->card->perf_stats.outbound_do_qdio_start_time =
  3154. qeth_get_micros();
  3155. }
  3156. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3157. if (atomic_read(&queue->set_pci_flags_count))
  3158. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3159. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3160. queue->queue_no, index, count);
  3161. if (queue->card->options.performance_stats)
  3162. queue->card->perf_stats.outbound_do_qdio_time +=
  3163. qeth_get_micros() -
  3164. queue->card->perf_stats.outbound_do_qdio_start_time;
  3165. atomic_add(count, &queue->used_buffers);
  3166. if (rc) {
  3167. queue->card->stats.tx_errors += count;
  3168. /* ignore temporary SIGA errors without busy condition */
  3169. if (rc == -ENOBUFS)
  3170. return;
  3171. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3172. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3173. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3174. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3175. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3176. /* this must not happen under normal circumstances. if it
  3177. * happens something is really wrong -> recover */
  3178. qeth_schedule_recovery(queue->card);
  3179. return;
  3180. }
  3181. if (queue->card->options.performance_stats)
  3182. queue->card->perf_stats.bufs_sent += count;
  3183. }
  3184. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3185. {
  3186. int index;
  3187. int flush_cnt = 0;
  3188. int q_was_packing = 0;
  3189. /*
  3190. * check if weed have to switch to non-packing mode or if
  3191. * we have to get a pci flag out on the queue
  3192. */
  3193. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3194. !atomic_read(&queue->set_pci_flags_count)) {
  3195. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3196. QETH_OUT_Q_UNLOCKED) {
  3197. /*
  3198. * If we get in here, there was no action in
  3199. * do_send_packet. So, we check if there is a
  3200. * packing buffer to be flushed here.
  3201. */
  3202. netif_stop_queue(queue->card->dev);
  3203. index = queue->next_buf_to_fill;
  3204. q_was_packing = queue->do_pack;
  3205. /* queue->do_pack may change */
  3206. barrier();
  3207. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3208. if (!flush_cnt &&
  3209. !atomic_read(&queue->set_pci_flags_count))
  3210. flush_cnt +=
  3211. qeth_flush_buffers_on_no_pci(queue);
  3212. if (queue->card->options.performance_stats &&
  3213. q_was_packing)
  3214. queue->card->perf_stats.bufs_sent_pack +=
  3215. flush_cnt;
  3216. if (flush_cnt)
  3217. qeth_flush_buffers(queue, index, flush_cnt);
  3218. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3219. }
  3220. }
  3221. }
  3222. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3223. unsigned long card_ptr)
  3224. {
  3225. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3226. if (card->dev && (card->dev->flags & IFF_UP))
  3227. napi_schedule(&card->napi);
  3228. }
  3229. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3230. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3231. {
  3232. int rc;
  3233. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3234. rc = -1;
  3235. goto out;
  3236. } else {
  3237. if (card->options.cq == cq) {
  3238. rc = 0;
  3239. goto out;
  3240. }
  3241. if (card->state != CARD_STATE_DOWN &&
  3242. card->state != CARD_STATE_RECOVER) {
  3243. rc = -1;
  3244. goto out;
  3245. }
  3246. qeth_free_qdio_buffers(card);
  3247. card->options.cq = cq;
  3248. rc = 0;
  3249. }
  3250. out:
  3251. return rc;
  3252. }
  3253. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3254. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3255. unsigned int qdio_err,
  3256. unsigned int queue, int first_element, int count) {
  3257. struct qeth_qdio_q *cq = card->qdio.c_q;
  3258. int i;
  3259. int rc;
  3260. if (!qeth_is_cq(card, queue))
  3261. goto out;
  3262. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3263. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3264. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3265. if (qdio_err) {
  3266. netif_stop_queue(card->dev);
  3267. qeth_schedule_recovery(card);
  3268. goto out;
  3269. }
  3270. if (card->options.performance_stats) {
  3271. card->perf_stats.cq_cnt++;
  3272. card->perf_stats.cq_start_time = qeth_get_micros();
  3273. }
  3274. for (i = first_element; i < first_element + count; ++i) {
  3275. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3276. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3277. int e;
  3278. e = 0;
  3279. while (buffer->element[e].addr) {
  3280. unsigned long phys_aob_addr;
  3281. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3282. qeth_qdio_handle_aob(card, phys_aob_addr);
  3283. buffer->element[e].addr = NULL;
  3284. buffer->element[e].eflags = 0;
  3285. buffer->element[e].sflags = 0;
  3286. buffer->element[e].length = 0;
  3287. ++e;
  3288. }
  3289. buffer->element[15].eflags = 0;
  3290. buffer->element[15].sflags = 0;
  3291. }
  3292. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3293. card->qdio.c_q->next_buf_to_init,
  3294. count);
  3295. if (rc) {
  3296. dev_warn(&card->gdev->dev,
  3297. "QDIO reported an error, rc=%i\n", rc);
  3298. QETH_CARD_TEXT(card, 2, "qcqherr");
  3299. }
  3300. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3301. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3302. netif_wake_queue(card->dev);
  3303. if (card->options.performance_stats) {
  3304. int delta_t = qeth_get_micros();
  3305. delta_t -= card->perf_stats.cq_start_time;
  3306. card->perf_stats.cq_time += delta_t;
  3307. }
  3308. out:
  3309. return;
  3310. }
  3311. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3312. unsigned int queue, int first_elem, int count,
  3313. unsigned long card_ptr)
  3314. {
  3315. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3316. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3317. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3318. if (qeth_is_cq(card, queue))
  3319. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3320. else if (qdio_err)
  3321. qeth_schedule_recovery(card);
  3322. }
  3323. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3324. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3325. unsigned int qdio_error, int __queue, int first_element,
  3326. int count, unsigned long card_ptr)
  3327. {
  3328. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3329. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3330. struct qeth_qdio_out_buffer *buffer;
  3331. int i;
  3332. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3333. if (qdio_error & QDIO_ERROR_FATAL) {
  3334. QETH_CARD_TEXT(card, 2, "achkcond");
  3335. netif_stop_queue(card->dev);
  3336. qeth_schedule_recovery(card);
  3337. return;
  3338. }
  3339. if (card->options.performance_stats) {
  3340. card->perf_stats.outbound_handler_cnt++;
  3341. card->perf_stats.outbound_handler_start_time =
  3342. qeth_get_micros();
  3343. }
  3344. for (i = first_element; i < (first_element + count); ++i) {
  3345. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3346. buffer = queue->bufs[bidx];
  3347. qeth_handle_send_error(card, buffer, qdio_error);
  3348. if (queue->bufstates &&
  3349. (queue->bufstates[bidx].flags &
  3350. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3351. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3352. if (atomic_cmpxchg(&buffer->state,
  3353. QETH_QDIO_BUF_PRIMED,
  3354. QETH_QDIO_BUF_PENDING) ==
  3355. QETH_QDIO_BUF_PRIMED) {
  3356. qeth_notify_skbs(queue, buffer,
  3357. TX_NOTIFY_PENDING);
  3358. }
  3359. buffer->aob = queue->bufstates[bidx].aob;
  3360. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3361. QETH_CARD_TEXT(queue->card, 5, "aob");
  3362. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3363. virt_to_phys(buffer->aob));
  3364. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3365. QETH_CARD_TEXT(card, 2, "outofbuf");
  3366. qeth_schedule_recovery(card);
  3367. }
  3368. } else {
  3369. if (card->options.cq == QETH_CQ_ENABLED) {
  3370. enum iucv_tx_notify n;
  3371. n = qeth_compute_cq_notification(
  3372. buffer->buffer->element[15].sflags, 0);
  3373. qeth_notify_skbs(queue, buffer, n);
  3374. }
  3375. qeth_clear_output_buffer(queue, buffer,
  3376. QETH_QDIO_BUF_EMPTY);
  3377. }
  3378. qeth_cleanup_handled_pending(queue, bidx, 0);
  3379. }
  3380. atomic_sub(count, &queue->used_buffers);
  3381. /* check if we need to do something on this outbound queue */
  3382. if (card->info.type != QETH_CARD_TYPE_IQD)
  3383. qeth_check_outbound_queue(queue);
  3384. netif_wake_queue(queue->card->dev);
  3385. if (card->options.performance_stats)
  3386. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3387. card->perf_stats.outbound_handler_start_time;
  3388. }
  3389. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3390. /**
  3391. * Note: Function assumes that we have 4 outbound queues.
  3392. */
  3393. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3394. int ipv, int cast_type)
  3395. {
  3396. __be16 *tci;
  3397. u8 tos;
  3398. if (cast_type && card->info.is_multicast_different)
  3399. return card->info.is_multicast_different &
  3400. (card->qdio.no_out_queues - 1);
  3401. switch (card->qdio.do_prio_queueing) {
  3402. case QETH_PRIO_Q_ING_TOS:
  3403. case QETH_PRIO_Q_ING_PREC:
  3404. switch (ipv) {
  3405. case 4:
  3406. tos = ipv4_get_dsfield(ip_hdr(skb));
  3407. break;
  3408. case 6:
  3409. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3410. break;
  3411. default:
  3412. return card->qdio.default_out_queue;
  3413. }
  3414. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3415. return ~tos >> 6 & 3;
  3416. if (tos & IPTOS_MINCOST)
  3417. return 3;
  3418. if (tos & IPTOS_RELIABILITY)
  3419. return 2;
  3420. if (tos & IPTOS_THROUGHPUT)
  3421. return 1;
  3422. if (tos & IPTOS_LOWDELAY)
  3423. return 0;
  3424. break;
  3425. case QETH_PRIO_Q_ING_SKB:
  3426. if (skb->priority > 5)
  3427. return 0;
  3428. return ~skb->priority >> 1 & 3;
  3429. case QETH_PRIO_Q_ING_VLAN:
  3430. tci = &((struct ethhdr *)skb->data)->h_proto;
  3431. if (*tci == ETH_P_8021Q)
  3432. return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
  3433. break;
  3434. default:
  3435. break;
  3436. }
  3437. return card->qdio.default_out_queue;
  3438. }
  3439. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3440. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3441. {
  3442. int cnt, length, e, elements = 0;
  3443. struct skb_frag_struct *frag;
  3444. char *data;
  3445. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3446. frag = &skb_shinfo(skb)->frags[cnt];
  3447. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3448. frag->page_offset;
  3449. length = frag->size;
  3450. e = PFN_UP((unsigned long)data + length - 1) -
  3451. PFN_DOWN((unsigned long)data);
  3452. elements += e;
  3453. }
  3454. return elements;
  3455. }
  3456. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3457. int qeth_get_elements_no(struct qeth_card *card,
  3458. struct sk_buff *skb, int elems)
  3459. {
  3460. int dlen = skb->len - skb->data_len;
  3461. int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
  3462. PFN_DOWN((unsigned long)skb->data);
  3463. elements_needed += qeth_get_elements_for_frags(skb);
  3464. if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3465. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3466. "(Number=%d / Length=%d). Discarded.\n",
  3467. (elements_needed+elems), skb->len);
  3468. return 0;
  3469. }
  3470. return elements_needed;
  3471. }
  3472. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3473. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3474. {
  3475. int hroom, inpage, rest;
  3476. if (((unsigned long)skb->data & PAGE_MASK) !=
  3477. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3478. hroom = skb_headroom(skb);
  3479. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3480. rest = len - inpage;
  3481. if (rest > hroom)
  3482. return 1;
  3483. memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
  3484. skb->data -= rest;
  3485. skb->tail -= rest;
  3486. *hdr = (struct qeth_hdr *)skb->data;
  3487. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3488. }
  3489. return 0;
  3490. }
  3491. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3492. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3493. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3494. int offset)
  3495. {
  3496. int length = skb->len - skb->data_len;
  3497. int length_here;
  3498. int element;
  3499. char *data;
  3500. int first_lap, cnt;
  3501. struct skb_frag_struct *frag;
  3502. element = *next_element_to_fill;
  3503. data = skb->data;
  3504. first_lap = (is_tso == 0 ? 1 : 0);
  3505. if (offset >= 0) {
  3506. data = skb->data + offset;
  3507. length -= offset;
  3508. first_lap = 0;
  3509. }
  3510. while (length > 0) {
  3511. /* length_here is the remaining amount of data in this page */
  3512. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3513. if (length < length_here)
  3514. length_here = length;
  3515. buffer->element[element].addr = data;
  3516. buffer->element[element].length = length_here;
  3517. length -= length_here;
  3518. if (!length) {
  3519. if (first_lap)
  3520. if (skb_shinfo(skb)->nr_frags)
  3521. buffer->element[element].eflags =
  3522. SBAL_EFLAGS_FIRST_FRAG;
  3523. else
  3524. buffer->element[element].eflags = 0;
  3525. else
  3526. buffer->element[element].eflags =
  3527. SBAL_EFLAGS_MIDDLE_FRAG;
  3528. } else {
  3529. if (first_lap)
  3530. buffer->element[element].eflags =
  3531. SBAL_EFLAGS_FIRST_FRAG;
  3532. else
  3533. buffer->element[element].eflags =
  3534. SBAL_EFLAGS_MIDDLE_FRAG;
  3535. }
  3536. data += length_here;
  3537. element++;
  3538. first_lap = 0;
  3539. }
  3540. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3541. frag = &skb_shinfo(skb)->frags[cnt];
  3542. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3543. frag->page_offset;
  3544. length = frag->size;
  3545. while (length > 0) {
  3546. length_here = PAGE_SIZE -
  3547. ((unsigned long) data % PAGE_SIZE);
  3548. if (length < length_here)
  3549. length_here = length;
  3550. buffer->element[element].addr = data;
  3551. buffer->element[element].length = length_here;
  3552. buffer->element[element].eflags =
  3553. SBAL_EFLAGS_MIDDLE_FRAG;
  3554. length -= length_here;
  3555. data += length_here;
  3556. element++;
  3557. }
  3558. }
  3559. if (buffer->element[element - 1].eflags)
  3560. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3561. *next_element_to_fill = element;
  3562. }
  3563. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3564. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3565. struct qeth_hdr *hdr, int offset, int hd_len)
  3566. {
  3567. struct qdio_buffer *buffer;
  3568. int flush_cnt = 0, hdr_len, large_send = 0;
  3569. buffer = buf->buffer;
  3570. atomic_inc(&skb->users);
  3571. skb_queue_tail(&buf->skb_list, skb);
  3572. /*check first on TSO ....*/
  3573. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3574. int element = buf->next_element_to_fill;
  3575. hdr_len = sizeof(struct qeth_hdr_tso) +
  3576. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3577. /*fill first buffer entry only with header information */
  3578. buffer->element[element].addr = skb->data;
  3579. buffer->element[element].length = hdr_len;
  3580. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3581. buf->next_element_to_fill++;
  3582. skb->data += hdr_len;
  3583. skb->len -= hdr_len;
  3584. large_send = 1;
  3585. }
  3586. if (offset >= 0) {
  3587. int element = buf->next_element_to_fill;
  3588. buffer->element[element].addr = hdr;
  3589. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3590. hd_len;
  3591. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3592. buf->is_header[element] = 1;
  3593. buf->next_element_to_fill++;
  3594. }
  3595. __qeth_fill_buffer(skb, buffer, large_send,
  3596. (int *)&buf->next_element_to_fill, offset);
  3597. if (!queue->do_pack) {
  3598. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3599. /* set state to PRIMED -> will be flushed */
  3600. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3601. flush_cnt = 1;
  3602. } else {
  3603. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3604. if (queue->card->options.performance_stats)
  3605. queue->card->perf_stats.skbs_sent_pack++;
  3606. if (buf->next_element_to_fill >=
  3607. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3608. /*
  3609. * packed buffer if full -> set state PRIMED
  3610. * -> will be flushed
  3611. */
  3612. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3613. flush_cnt = 1;
  3614. }
  3615. }
  3616. return flush_cnt;
  3617. }
  3618. int qeth_do_send_packet_fast(struct qeth_card *card,
  3619. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3620. struct qeth_hdr *hdr, int elements_needed,
  3621. int offset, int hd_len)
  3622. {
  3623. struct qeth_qdio_out_buffer *buffer;
  3624. int index;
  3625. /* spin until we get the queue ... */
  3626. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3627. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3628. /* ... now we've got the queue */
  3629. index = queue->next_buf_to_fill;
  3630. buffer = queue->bufs[queue->next_buf_to_fill];
  3631. /*
  3632. * check if buffer is empty to make sure that we do not 'overtake'
  3633. * ourselves and try to fill a buffer that is already primed
  3634. */
  3635. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3636. goto out;
  3637. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3638. QDIO_MAX_BUFFERS_PER_Q;
  3639. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3640. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3641. qeth_flush_buffers(queue, index, 1);
  3642. return 0;
  3643. out:
  3644. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3645. return -EBUSY;
  3646. }
  3647. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3648. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3649. struct sk_buff *skb, struct qeth_hdr *hdr,
  3650. int elements_needed)
  3651. {
  3652. struct qeth_qdio_out_buffer *buffer;
  3653. int start_index;
  3654. int flush_count = 0;
  3655. int do_pack = 0;
  3656. int tmp;
  3657. int rc = 0;
  3658. /* spin until we get the queue ... */
  3659. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3660. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3661. start_index = queue->next_buf_to_fill;
  3662. buffer = queue->bufs[queue->next_buf_to_fill];
  3663. /*
  3664. * check if buffer is empty to make sure that we do not 'overtake'
  3665. * ourselves and try to fill a buffer that is already primed
  3666. */
  3667. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3668. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3669. return -EBUSY;
  3670. }
  3671. /* check if we need to switch packing state of this queue */
  3672. qeth_switch_to_packing_if_needed(queue);
  3673. if (queue->do_pack) {
  3674. do_pack = 1;
  3675. /* does packet fit in current buffer? */
  3676. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3677. buffer->next_element_to_fill) < elements_needed) {
  3678. /* ... no -> set state PRIMED */
  3679. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3680. flush_count++;
  3681. queue->next_buf_to_fill =
  3682. (queue->next_buf_to_fill + 1) %
  3683. QDIO_MAX_BUFFERS_PER_Q;
  3684. buffer = queue->bufs[queue->next_buf_to_fill];
  3685. /* we did a step forward, so check buffer state
  3686. * again */
  3687. if (atomic_read(&buffer->state) !=
  3688. QETH_QDIO_BUF_EMPTY) {
  3689. qeth_flush_buffers(queue, start_index,
  3690. flush_count);
  3691. atomic_set(&queue->state,
  3692. QETH_OUT_Q_UNLOCKED);
  3693. return -EBUSY;
  3694. }
  3695. }
  3696. }
  3697. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3698. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3699. QDIO_MAX_BUFFERS_PER_Q;
  3700. flush_count += tmp;
  3701. if (flush_count)
  3702. qeth_flush_buffers(queue, start_index, flush_count);
  3703. else if (!atomic_read(&queue->set_pci_flags_count))
  3704. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3705. /*
  3706. * queue->state will go from LOCKED -> UNLOCKED or from
  3707. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3708. * (switch packing state or flush buffer to get another pci flag out).
  3709. * In that case we will enter this loop
  3710. */
  3711. while (atomic_dec_return(&queue->state)) {
  3712. flush_count = 0;
  3713. start_index = queue->next_buf_to_fill;
  3714. /* check if we can go back to non-packing state */
  3715. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3716. /*
  3717. * check if we need to flush a packing buffer to get a pci
  3718. * flag out on the queue
  3719. */
  3720. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3721. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3722. if (flush_count)
  3723. qeth_flush_buffers(queue, start_index, flush_count);
  3724. }
  3725. /* at this point the queue is UNLOCKED again */
  3726. if (queue->card->options.performance_stats && do_pack)
  3727. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3728. return rc;
  3729. }
  3730. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3731. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3732. struct qeth_reply *reply, unsigned long data)
  3733. {
  3734. struct qeth_ipa_cmd *cmd;
  3735. struct qeth_ipacmd_setadpparms *setparms;
  3736. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3737. cmd = (struct qeth_ipa_cmd *) data;
  3738. setparms = &(cmd->data.setadapterparms);
  3739. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3740. if (cmd->hdr.return_code) {
  3741. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3742. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3743. }
  3744. card->info.promisc_mode = setparms->data.mode;
  3745. return 0;
  3746. }
  3747. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3748. {
  3749. enum qeth_ipa_promisc_modes mode;
  3750. struct net_device *dev = card->dev;
  3751. struct qeth_cmd_buffer *iob;
  3752. struct qeth_ipa_cmd *cmd;
  3753. QETH_CARD_TEXT(card, 4, "setprom");
  3754. if (((dev->flags & IFF_PROMISC) &&
  3755. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3756. (!(dev->flags & IFF_PROMISC) &&
  3757. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3758. return;
  3759. mode = SET_PROMISC_MODE_OFF;
  3760. if (dev->flags & IFF_PROMISC)
  3761. mode = SET_PROMISC_MODE_ON;
  3762. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3763. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3764. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3765. if (!iob)
  3766. return;
  3767. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3768. cmd->data.setadapterparms.data.mode = mode;
  3769. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3770. }
  3771. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3772. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3773. {
  3774. struct qeth_card *card;
  3775. char dbf_text[15];
  3776. card = dev->ml_priv;
  3777. QETH_CARD_TEXT(card, 4, "chgmtu");
  3778. sprintf(dbf_text, "%8x", new_mtu);
  3779. QETH_CARD_TEXT(card, 4, dbf_text);
  3780. if (new_mtu < 64)
  3781. return -EINVAL;
  3782. if (new_mtu > 65535)
  3783. return -EINVAL;
  3784. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3785. (!qeth_mtu_is_valid(card, new_mtu)))
  3786. return -EINVAL;
  3787. dev->mtu = new_mtu;
  3788. return 0;
  3789. }
  3790. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3791. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3792. {
  3793. struct qeth_card *card;
  3794. card = dev->ml_priv;
  3795. QETH_CARD_TEXT(card, 5, "getstat");
  3796. return &card->stats;
  3797. }
  3798. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3799. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3800. struct qeth_reply *reply, unsigned long data)
  3801. {
  3802. struct qeth_ipa_cmd *cmd;
  3803. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3804. cmd = (struct qeth_ipa_cmd *) data;
  3805. if (!card->options.layer2 ||
  3806. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3807. memcpy(card->dev->dev_addr,
  3808. &cmd->data.setadapterparms.data.change_addr.addr,
  3809. OSA_ADDR_LEN);
  3810. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3811. }
  3812. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3813. return 0;
  3814. }
  3815. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3816. {
  3817. int rc;
  3818. struct qeth_cmd_buffer *iob;
  3819. struct qeth_ipa_cmd *cmd;
  3820. QETH_CARD_TEXT(card, 4, "chgmac");
  3821. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3822. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3823. sizeof(struct qeth_change_addr));
  3824. if (!iob)
  3825. return -ENOMEM;
  3826. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3827. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3828. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3829. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3830. card->dev->dev_addr, OSA_ADDR_LEN);
  3831. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3832. NULL);
  3833. return rc;
  3834. }
  3835. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3836. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3837. struct qeth_reply *reply, unsigned long data)
  3838. {
  3839. struct qeth_ipa_cmd *cmd;
  3840. struct qeth_set_access_ctrl *access_ctrl_req;
  3841. int fallback = *(int *)reply->param;
  3842. QETH_CARD_TEXT(card, 4, "setaccb");
  3843. cmd = (struct qeth_ipa_cmd *) data;
  3844. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3845. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3846. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3847. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3848. cmd->data.setadapterparms.hdr.return_code);
  3849. if (cmd->data.setadapterparms.hdr.return_code !=
  3850. SET_ACCESS_CTRL_RC_SUCCESS)
  3851. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3852. card->gdev->dev.kobj.name,
  3853. access_ctrl_req->subcmd_code,
  3854. cmd->data.setadapterparms.hdr.return_code);
  3855. switch (cmd->data.setadapterparms.hdr.return_code) {
  3856. case SET_ACCESS_CTRL_RC_SUCCESS:
  3857. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3858. dev_info(&card->gdev->dev,
  3859. "QDIO data connection isolation is deactivated\n");
  3860. } else {
  3861. dev_info(&card->gdev->dev,
  3862. "QDIO data connection isolation is activated\n");
  3863. }
  3864. break;
  3865. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3866. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3867. "deactivated\n", dev_name(&card->gdev->dev));
  3868. if (fallback)
  3869. card->options.isolation = card->options.prev_isolation;
  3870. break;
  3871. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3872. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3873. " activated\n", dev_name(&card->gdev->dev));
  3874. if (fallback)
  3875. card->options.isolation = card->options.prev_isolation;
  3876. break;
  3877. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3878. dev_err(&card->gdev->dev, "Adapter does not "
  3879. "support QDIO data connection isolation\n");
  3880. break;
  3881. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3882. dev_err(&card->gdev->dev,
  3883. "Adapter is dedicated. "
  3884. "QDIO data connection isolation not supported\n");
  3885. if (fallback)
  3886. card->options.isolation = card->options.prev_isolation;
  3887. break;
  3888. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3889. dev_err(&card->gdev->dev,
  3890. "TSO does not permit QDIO data connection isolation\n");
  3891. if (fallback)
  3892. card->options.isolation = card->options.prev_isolation;
  3893. break;
  3894. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3895. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3896. "support reflective relay mode\n");
  3897. if (fallback)
  3898. card->options.isolation = card->options.prev_isolation;
  3899. break;
  3900. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3901. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3902. "enabled at the adjacent switch port");
  3903. if (fallback)
  3904. card->options.isolation = card->options.prev_isolation;
  3905. break;
  3906. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3907. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3908. "at the adjacent switch failed\n");
  3909. break;
  3910. default:
  3911. /* this should never happen */
  3912. if (fallback)
  3913. card->options.isolation = card->options.prev_isolation;
  3914. break;
  3915. }
  3916. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3917. return 0;
  3918. }
  3919. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3920. enum qeth_ipa_isolation_modes isolation, int fallback)
  3921. {
  3922. int rc;
  3923. struct qeth_cmd_buffer *iob;
  3924. struct qeth_ipa_cmd *cmd;
  3925. struct qeth_set_access_ctrl *access_ctrl_req;
  3926. QETH_CARD_TEXT(card, 4, "setacctl");
  3927. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3928. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3929. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3930. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3931. sizeof(struct qeth_set_access_ctrl));
  3932. if (!iob)
  3933. return -ENOMEM;
  3934. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3935. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3936. access_ctrl_req->subcmd_code = isolation;
  3937. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3938. &fallback);
  3939. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3940. return rc;
  3941. }
  3942. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3943. {
  3944. int rc = 0;
  3945. QETH_CARD_TEXT(card, 4, "setactlo");
  3946. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3947. card->info.type == QETH_CARD_TYPE_OSX) &&
  3948. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3949. rc = qeth_setadpparms_set_access_ctrl(card,
  3950. card->options.isolation, fallback);
  3951. if (rc) {
  3952. QETH_DBF_MESSAGE(3,
  3953. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3954. card->gdev->dev.kobj.name,
  3955. rc);
  3956. rc = -EOPNOTSUPP;
  3957. }
  3958. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3959. card->options.isolation = ISOLATION_MODE_NONE;
  3960. dev_err(&card->gdev->dev, "Adapter does not "
  3961. "support QDIO data connection isolation\n");
  3962. rc = -EOPNOTSUPP;
  3963. }
  3964. return rc;
  3965. }
  3966. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3967. void qeth_tx_timeout(struct net_device *dev)
  3968. {
  3969. struct qeth_card *card;
  3970. card = dev->ml_priv;
  3971. QETH_CARD_TEXT(card, 4, "txtimeo");
  3972. card->stats.tx_errors++;
  3973. qeth_schedule_recovery(card);
  3974. }
  3975. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3976. int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3977. {
  3978. struct qeth_card *card = dev->ml_priv;
  3979. int rc = 0;
  3980. switch (regnum) {
  3981. case MII_BMCR: /* Basic mode control register */
  3982. rc = BMCR_FULLDPLX;
  3983. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3984. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3985. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3986. rc |= BMCR_SPEED100;
  3987. break;
  3988. case MII_BMSR: /* Basic mode status register */
  3989. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3990. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3991. BMSR_100BASE4;
  3992. break;
  3993. case MII_PHYSID1: /* PHYS ID 1 */
  3994. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3995. dev->dev_addr[2];
  3996. rc = (rc >> 5) & 0xFFFF;
  3997. break;
  3998. case MII_PHYSID2: /* PHYS ID 2 */
  3999. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  4000. break;
  4001. case MII_ADVERTISE: /* Advertisement control reg */
  4002. rc = ADVERTISE_ALL;
  4003. break;
  4004. case MII_LPA: /* Link partner ability reg */
  4005. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  4006. LPA_100BASE4 | LPA_LPACK;
  4007. break;
  4008. case MII_EXPANSION: /* Expansion register */
  4009. break;
  4010. case MII_DCOUNTER: /* disconnect counter */
  4011. break;
  4012. case MII_FCSCOUNTER: /* false carrier counter */
  4013. break;
  4014. case MII_NWAYTEST: /* N-way auto-neg test register */
  4015. break;
  4016. case MII_RERRCOUNTER: /* rx error counter */
  4017. rc = card->stats.rx_errors;
  4018. break;
  4019. case MII_SREVISION: /* silicon revision */
  4020. break;
  4021. case MII_RESV1: /* reserved 1 */
  4022. break;
  4023. case MII_LBRERROR: /* loopback, rx, bypass error */
  4024. break;
  4025. case MII_PHYADDR: /* physical address */
  4026. break;
  4027. case MII_RESV2: /* reserved 2 */
  4028. break;
  4029. case MII_TPISTATUS: /* TPI status for 10mbps */
  4030. break;
  4031. case MII_NCONFIG: /* network interface config */
  4032. break;
  4033. default:
  4034. break;
  4035. }
  4036. return rc;
  4037. }
  4038. EXPORT_SYMBOL_GPL(qeth_mdio_read);
  4039. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4040. struct qeth_cmd_buffer *iob, int len,
  4041. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4042. unsigned long),
  4043. void *reply_param)
  4044. {
  4045. u16 s1, s2;
  4046. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4047. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4048. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4049. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4050. /* adjust PDU length fields in IPA_PDU_HEADER */
  4051. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4052. s2 = (u32) len;
  4053. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4054. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4055. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4056. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4057. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4058. reply_cb, reply_param);
  4059. }
  4060. static int qeth_snmp_command_cb(struct qeth_card *card,
  4061. struct qeth_reply *reply, unsigned long sdata)
  4062. {
  4063. struct qeth_ipa_cmd *cmd;
  4064. struct qeth_arp_query_info *qinfo;
  4065. struct qeth_snmp_cmd *snmp;
  4066. unsigned char *data;
  4067. __u16 data_len;
  4068. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4069. cmd = (struct qeth_ipa_cmd *) sdata;
  4070. data = (unsigned char *)((char *)cmd - reply->offset);
  4071. qinfo = (struct qeth_arp_query_info *) reply->param;
  4072. snmp = &cmd->data.setadapterparms.data.snmp;
  4073. if (cmd->hdr.return_code) {
  4074. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4075. return 0;
  4076. }
  4077. if (cmd->data.setadapterparms.hdr.return_code) {
  4078. cmd->hdr.return_code =
  4079. cmd->data.setadapterparms.hdr.return_code;
  4080. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4081. return 0;
  4082. }
  4083. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4084. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4085. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4086. else
  4087. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4088. /* check if there is enough room in userspace */
  4089. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4090. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4091. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4092. return 0;
  4093. }
  4094. QETH_CARD_TEXT_(card, 4, "snore%i",
  4095. cmd->data.setadapterparms.hdr.used_total);
  4096. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4097. cmd->data.setadapterparms.hdr.seq_no);
  4098. /*copy entries to user buffer*/
  4099. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4100. memcpy(qinfo->udata + qinfo->udata_offset,
  4101. (char *)snmp,
  4102. data_len + offsetof(struct qeth_snmp_cmd, data));
  4103. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4104. } else {
  4105. memcpy(qinfo->udata + qinfo->udata_offset,
  4106. (char *)&snmp->request, data_len);
  4107. }
  4108. qinfo->udata_offset += data_len;
  4109. /* check if all replies received ... */
  4110. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4111. cmd->data.setadapterparms.hdr.used_total);
  4112. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4113. cmd->data.setadapterparms.hdr.seq_no);
  4114. if (cmd->data.setadapterparms.hdr.seq_no <
  4115. cmd->data.setadapterparms.hdr.used_total)
  4116. return 1;
  4117. return 0;
  4118. }
  4119. int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4120. {
  4121. struct qeth_cmd_buffer *iob;
  4122. struct qeth_ipa_cmd *cmd;
  4123. struct qeth_snmp_ureq *ureq;
  4124. unsigned int req_len;
  4125. struct qeth_arp_query_info qinfo = {0, };
  4126. int rc = 0;
  4127. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4128. if (card->info.guestlan)
  4129. return -EOPNOTSUPP;
  4130. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4131. (!card->options.layer2)) {
  4132. return -EOPNOTSUPP;
  4133. }
  4134. /* skip 4 bytes (data_len struct member) to get req_len */
  4135. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4136. return -EFAULT;
  4137. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4138. sizeof(struct qeth_ipacmd_hdr) -
  4139. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4140. return -EINVAL;
  4141. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4142. if (IS_ERR(ureq)) {
  4143. QETH_CARD_TEXT(card, 2, "snmpnome");
  4144. return PTR_ERR(ureq);
  4145. }
  4146. qinfo.udata_len = ureq->hdr.data_len;
  4147. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4148. if (!qinfo.udata) {
  4149. kfree(ureq);
  4150. return -ENOMEM;
  4151. }
  4152. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4153. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4154. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4155. if (!iob) {
  4156. rc = -ENOMEM;
  4157. goto out;
  4158. }
  4159. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4160. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4161. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4162. qeth_snmp_command_cb, (void *)&qinfo);
  4163. if (rc)
  4164. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4165. QETH_CARD_IFNAME(card), rc);
  4166. else {
  4167. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4168. rc = -EFAULT;
  4169. }
  4170. out:
  4171. kfree(ureq);
  4172. kfree(qinfo.udata);
  4173. return rc;
  4174. }
  4175. EXPORT_SYMBOL_GPL(qeth_snmp_command);
  4176. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4177. struct qeth_reply *reply, unsigned long data)
  4178. {
  4179. struct qeth_ipa_cmd *cmd;
  4180. struct qeth_qoat_priv *priv;
  4181. char *resdata;
  4182. int resdatalen;
  4183. QETH_CARD_TEXT(card, 3, "qoatcb");
  4184. cmd = (struct qeth_ipa_cmd *)data;
  4185. priv = (struct qeth_qoat_priv *)reply->param;
  4186. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4187. resdata = (char *)data + 28;
  4188. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4189. cmd->hdr.return_code = IPA_RC_FFFF;
  4190. return 0;
  4191. }
  4192. memcpy((priv->buffer + priv->response_len), resdata,
  4193. resdatalen);
  4194. priv->response_len += resdatalen;
  4195. if (cmd->data.setadapterparms.hdr.seq_no <
  4196. cmd->data.setadapterparms.hdr.used_total)
  4197. return 1;
  4198. return 0;
  4199. }
  4200. int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4201. {
  4202. int rc = 0;
  4203. struct qeth_cmd_buffer *iob;
  4204. struct qeth_ipa_cmd *cmd;
  4205. struct qeth_query_oat *oat_req;
  4206. struct qeth_query_oat_data oat_data;
  4207. struct qeth_qoat_priv priv;
  4208. void __user *tmp;
  4209. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4210. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4211. rc = -EOPNOTSUPP;
  4212. goto out;
  4213. }
  4214. if (copy_from_user(&oat_data, udata,
  4215. sizeof(struct qeth_query_oat_data))) {
  4216. rc = -EFAULT;
  4217. goto out;
  4218. }
  4219. priv.buffer_len = oat_data.buffer_len;
  4220. priv.response_len = 0;
  4221. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4222. if (!priv.buffer) {
  4223. rc = -ENOMEM;
  4224. goto out;
  4225. }
  4226. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4227. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4228. sizeof(struct qeth_query_oat));
  4229. if (!iob) {
  4230. rc = -ENOMEM;
  4231. goto out_free;
  4232. }
  4233. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4234. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4235. oat_req->subcmd_code = oat_data.command;
  4236. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4237. &priv);
  4238. if (!rc) {
  4239. if (is_compat_task())
  4240. tmp = compat_ptr(oat_data.ptr);
  4241. else
  4242. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4243. if (copy_to_user(tmp, priv.buffer,
  4244. priv.response_len)) {
  4245. rc = -EFAULT;
  4246. goto out_free;
  4247. }
  4248. oat_data.response_len = priv.response_len;
  4249. if (copy_to_user(udata, &oat_data,
  4250. sizeof(struct qeth_query_oat_data)))
  4251. rc = -EFAULT;
  4252. } else
  4253. if (rc == IPA_RC_FFFF)
  4254. rc = -EFAULT;
  4255. out_free:
  4256. kfree(priv.buffer);
  4257. out:
  4258. return rc;
  4259. }
  4260. EXPORT_SYMBOL_GPL(qeth_query_oat_command);
  4261. static int qeth_query_card_info_cb(struct qeth_card *card,
  4262. struct qeth_reply *reply, unsigned long data)
  4263. {
  4264. struct qeth_ipa_cmd *cmd;
  4265. struct qeth_query_card_info *card_info;
  4266. struct carrier_info *carrier_info;
  4267. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4268. carrier_info = (struct carrier_info *)reply->param;
  4269. cmd = (struct qeth_ipa_cmd *)data;
  4270. card_info = &cmd->data.setadapterparms.data.card_info;
  4271. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4272. carrier_info->card_type = card_info->card_type;
  4273. carrier_info->port_mode = card_info->port_mode;
  4274. carrier_info->port_speed = card_info->port_speed;
  4275. }
  4276. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4277. return 0;
  4278. }
  4279. static int qeth_query_card_info(struct qeth_card *card,
  4280. struct carrier_info *carrier_info)
  4281. {
  4282. struct qeth_cmd_buffer *iob;
  4283. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4284. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4285. return -EOPNOTSUPP;
  4286. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4287. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4288. if (!iob)
  4289. return -ENOMEM;
  4290. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4291. (void *)carrier_info);
  4292. }
  4293. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4294. {
  4295. switch (card->info.type) {
  4296. case QETH_CARD_TYPE_IQD:
  4297. return 2;
  4298. default:
  4299. return 0;
  4300. }
  4301. }
  4302. static void qeth_determine_capabilities(struct qeth_card *card)
  4303. {
  4304. int rc;
  4305. int length;
  4306. char *prcd;
  4307. struct ccw_device *ddev;
  4308. int ddev_offline = 0;
  4309. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4310. ddev = CARD_DDEV(card);
  4311. if (!ddev->online) {
  4312. ddev_offline = 1;
  4313. rc = ccw_device_set_online(ddev);
  4314. if (rc) {
  4315. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4316. goto out;
  4317. }
  4318. }
  4319. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4320. if (rc) {
  4321. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4322. dev_name(&card->gdev->dev), rc);
  4323. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4324. goto out_offline;
  4325. }
  4326. qeth_configure_unitaddr(card, prcd);
  4327. if (ddev_offline)
  4328. qeth_configure_blkt_default(card, prcd);
  4329. kfree(prcd);
  4330. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4331. if (rc)
  4332. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4333. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4334. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
  4335. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
  4336. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4337. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4338. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4339. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4340. dev_info(&card->gdev->dev,
  4341. "Completion Queueing supported\n");
  4342. } else {
  4343. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4344. }
  4345. out_offline:
  4346. if (ddev_offline == 1)
  4347. ccw_device_set_offline(ddev);
  4348. out:
  4349. return;
  4350. }
  4351. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4352. struct qdio_buffer **in_sbal_ptrs,
  4353. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4354. int i;
  4355. if (card->options.cq == QETH_CQ_ENABLED) {
  4356. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4357. (card->qdio.no_in_queues - 1);
  4358. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4359. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4360. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4361. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4362. }
  4363. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4364. }
  4365. }
  4366. static int qeth_qdio_establish(struct qeth_card *card)
  4367. {
  4368. struct qdio_initialize init_data;
  4369. char *qib_param_field;
  4370. struct qdio_buffer **in_sbal_ptrs;
  4371. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4372. struct qdio_buffer **out_sbal_ptrs;
  4373. int i, j, k;
  4374. int rc = 0;
  4375. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4376. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4377. GFP_KERNEL);
  4378. if (!qib_param_field) {
  4379. rc = -ENOMEM;
  4380. goto out_free_nothing;
  4381. }
  4382. qeth_create_qib_param_field(card, qib_param_field);
  4383. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4384. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4385. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4386. GFP_KERNEL);
  4387. if (!in_sbal_ptrs) {
  4388. rc = -ENOMEM;
  4389. goto out_free_qib_param;
  4390. }
  4391. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4392. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4393. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4394. }
  4395. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4396. GFP_KERNEL);
  4397. if (!queue_start_poll) {
  4398. rc = -ENOMEM;
  4399. goto out_free_in_sbals;
  4400. }
  4401. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4402. queue_start_poll[i] = card->discipline->start_poll;
  4403. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4404. out_sbal_ptrs =
  4405. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4406. sizeof(void *), GFP_KERNEL);
  4407. if (!out_sbal_ptrs) {
  4408. rc = -ENOMEM;
  4409. goto out_free_queue_start_poll;
  4410. }
  4411. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4412. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4413. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4414. card->qdio.out_qs[i]->bufs[j]->buffer);
  4415. }
  4416. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4417. init_data.cdev = CARD_DDEV(card);
  4418. init_data.q_format = qeth_get_qdio_q_format(card);
  4419. init_data.qib_param_field_format = 0;
  4420. init_data.qib_param_field = qib_param_field;
  4421. init_data.no_input_qs = card->qdio.no_in_queues;
  4422. init_data.no_output_qs = card->qdio.no_out_queues;
  4423. init_data.input_handler = card->discipline->input_handler;
  4424. init_data.output_handler = card->discipline->output_handler;
  4425. init_data.queue_start_poll_array = queue_start_poll;
  4426. init_data.int_parm = (unsigned long) card;
  4427. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4428. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4429. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4430. init_data.scan_threshold =
  4431. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4432. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4433. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4434. rc = qdio_allocate(&init_data);
  4435. if (rc) {
  4436. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4437. goto out;
  4438. }
  4439. rc = qdio_establish(&init_data);
  4440. if (rc) {
  4441. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4442. qdio_free(CARD_DDEV(card));
  4443. }
  4444. }
  4445. switch (card->options.cq) {
  4446. case QETH_CQ_ENABLED:
  4447. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4448. break;
  4449. case QETH_CQ_DISABLED:
  4450. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4451. break;
  4452. default:
  4453. break;
  4454. }
  4455. out:
  4456. kfree(out_sbal_ptrs);
  4457. out_free_queue_start_poll:
  4458. kfree(queue_start_poll);
  4459. out_free_in_sbals:
  4460. kfree(in_sbal_ptrs);
  4461. out_free_qib_param:
  4462. kfree(qib_param_field);
  4463. out_free_nothing:
  4464. return rc;
  4465. }
  4466. static void qeth_core_free_card(struct qeth_card *card)
  4467. {
  4468. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4469. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4470. qeth_clean_channel(&card->read);
  4471. qeth_clean_channel(&card->write);
  4472. if (card->dev)
  4473. free_netdev(card->dev);
  4474. kfree(card->ip_tbd_list);
  4475. qeth_free_qdio_buffers(card);
  4476. unregister_service_level(&card->qeth_service_level);
  4477. kfree(card);
  4478. }
  4479. void qeth_trace_features(struct qeth_card *card)
  4480. {
  4481. QETH_CARD_TEXT(card, 2, "features");
  4482. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
  4483. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
  4484. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
  4485. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
  4486. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
  4487. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
  4488. QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
  4489. }
  4490. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4491. static struct ccw_device_id qeth_ids[] = {
  4492. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4493. .driver_info = QETH_CARD_TYPE_OSD},
  4494. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4495. .driver_info = QETH_CARD_TYPE_IQD},
  4496. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4497. .driver_info = QETH_CARD_TYPE_OSN},
  4498. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4499. .driver_info = QETH_CARD_TYPE_OSM},
  4500. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4501. .driver_info = QETH_CARD_TYPE_OSX},
  4502. {},
  4503. };
  4504. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4505. static struct ccw_driver qeth_ccw_driver = {
  4506. .driver = {
  4507. .owner = THIS_MODULE,
  4508. .name = "qeth",
  4509. },
  4510. .ids = qeth_ids,
  4511. .probe = ccwgroup_probe_ccwdev,
  4512. .remove = ccwgroup_remove_ccwdev,
  4513. };
  4514. int qeth_core_hardsetup_card(struct qeth_card *card)
  4515. {
  4516. int retries = 3;
  4517. int rc;
  4518. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4519. atomic_set(&card->force_alloc_skb, 0);
  4520. qeth_update_from_chp_desc(card);
  4521. retry:
  4522. if (retries < 3)
  4523. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4524. dev_name(&card->gdev->dev));
  4525. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4526. ccw_device_set_offline(CARD_DDEV(card));
  4527. ccw_device_set_offline(CARD_WDEV(card));
  4528. ccw_device_set_offline(CARD_RDEV(card));
  4529. qdio_free(CARD_DDEV(card));
  4530. rc = ccw_device_set_online(CARD_RDEV(card));
  4531. if (rc)
  4532. goto retriable;
  4533. rc = ccw_device_set_online(CARD_WDEV(card));
  4534. if (rc)
  4535. goto retriable;
  4536. rc = ccw_device_set_online(CARD_DDEV(card));
  4537. if (rc)
  4538. goto retriable;
  4539. retriable:
  4540. if (rc == -ERESTARTSYS) {
  4541. QETH_DBF_TEXT(SETUP, 2, "break1");
  4542. return rc;
  4543. } else if (rc) {
  4544. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4545. if (--retries < 0)
  4546. goto out;
  4547. else
  4548. goto retry;
  4549. }
  4550. qeth_determine_capabilities(card);
  4551. qeth_init_tokens(card);
  4552. qeth_init_func_level(card);
  4553. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4554. if (rc == -ERESTARTSYS) {
  4555. QETH_DBF_TEXT(SETUP, 2, "break2");
  4556. return rc;
  4557. } else if (rc) {
  4558. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4559. if (--retries < 0)
  4560. goto out;
  4561. else
  4562. goto retry;
  4563. }
  4564. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4565. if (rc == -ERESTARTSYS) {
  4566. QETH_DBF_TEXT(SETUP, 2, "break3");
  4567. return rc;
  4568. } else if (rc) {
  4569. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4570. if (--retries < 0)
  4571. goto out;
  4572. else
  4573. goto retry;
  4574. }
  4575. card->read_or_write_problem = 0;
  4576. rc = qeth_mpc_initialize(card);
  4577. if (rc) {
  4578. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4579. goto out;
  4580. }
  4581. card->options.ipa4.supported_funcs = 0;
  4582. card->options.adp.supported_funcs = 0;
  4583. card->options.sbp.supported_funcs = 0;
  4584. card->info.diagass_support = 0;
  4585. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4586. if (rc == -ENOMEM)
  4587. goto out;
  4588. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4589. rc = qeth_query_setadapterparms(card);
  4590. if (rc < 0) {
  4591. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4592. goto out;
  4593. }
  4594. }
  4595. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4596. rc = qeth_query_setdiagass(card);
  4597. if (rc < 0) {
  4598. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4599. goto out;
  4600. }
  4601. }
  4602. return 0;
  4603. out:
  4604. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4605. "an error on the device\n");
  4606. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4607. dev_name(&card->gdev->dev), rc);
  4608. return rc;
  4609. }
  4610. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4611. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4612. struct qdio_buffer_element *element,
  4613. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4614. {
  4615. struct page *page = virt_to_page(element->addr);
  4616. if (*pskb == NULL) {
  4617. if (qethbuffer->rx_skb) {
  4618. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4619. *pskb = qethbuffer->rx_skb;
  4620. qethbuffer->rx_skb = NULL;
  4621. } else {
  4622. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4623. if (!(*pskb))
  4624. return -ENOMEM;
  4625. }
  4626. skb_reserve(*pskb, ETH_HLEN);
  4627. if (data_len <= QETH_RX_PULL_LEN) {
  4628. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4629. data_len);
  4630. } else {
  4631. get_page(page);
  4632. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4633. element->addr + offset, QETH_RX_PULL_LEN);
  4634. skb_fill_page_desc(*pskb, *pfrag, page,
  4635. offset + QETH_RX_PULL_LEN,
  4636. data_len - QETH_RX_PULL_LEN);
  4637. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4638. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4639. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4640. (*pfrag)++;
  4641. }
  4642. } else {
  4643. get_page(page);
  4644. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4645. (*pskb)->data_len += data_len;
  4646. (*pskb)->len += data_len;
  4647. (*pskb)->truesize += data_len;
  4648. (*pfrag)++;
  4649. }
  4650. return 0;
  4651. }
  4652. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4653. {
  4654. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4655. }
  4656. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4657. struct qeth_qdio_buffer *qethbuffer,
  4658. struct qdio_buffer_element **__element, int *__offset,
  4659. struct qeth_hdr **hdr)
  4660. {
  4661. struct qdio_buffer_element *element = *__element;
  4662. struct qdio_buffer *buffer = qethbuffer->buffer;
  4663. int offset = *__offset;
  4664. struct sk_buff *skb = NULL;
  4665. int skb_len = 0;
  4666. void *data_ptr;
  4667. int data_len;
  4668. int headroom = 0;
  4669. int use_rx_sg = 0;
  4670. int frag = 0;
  4671. /* qeth_hdr must not cross element boundaries */
  4672. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4673. if (qeth_is_last_sbale(element))
  4674. return NULL;
  4675. element++;
  4676. offset = 0;
  4677. if (element->length < sizeof(struct qeth_hdr))
  4678. return NULL;
  4679. }
  4680. *hdr = element->addr + offset;
  4681. offset += sizeof(struct qeth_hdr);
  4682. switch ((*hdr)->hdr.l2.id) {
  4683. case QETH_HEADER_TYPE_LAYER2:
  4684. skb_len = (*hdr)->hdr.l2.pkt_length;
  4685. break;
  4686. case QETH_HEADER_TYPE_LAYER3:
  4687. skb_len = (*hdr)->hdr.l3.length;
  4688. headroom = ETH_HLEN;
  4689. break;
  4690. case QETH_HEADER_TYPE_OSN:
  4691. skb_len = (*hdr)->hdr.osn.pdu_length;
  4692. headroom = sizeof(struct qeth_hdr);
  4693. break;
  4694. default:
  4695. break;
  4696. }
  4697. if (!skb_len)
  4698. return NULL;
  4699. if (((skb_len >= card->options.rx_sg_cb) &&
  4700. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4701. (!atomic_read(&card->force_alloc_skb))) ||
  4702. (card->options.cq == QETH_CQ_ENABLED)) {
  4703. use_rx_sg = 1;
  4704. } else {
  4705. skb = dev_alloc_skb(skb_len + headroom);
  4706. if (!skb)
  4707. goto no_mem;
  4708. if (headroom)
  4709. skb_reserve(skb, headroom);
  4710. }
  4711. data_ptr = element->addr + offset;
  4712. while (skb_len) {
  4713. data_len = min(skb_len, (int)(element->length - offset));
  4714. if (data_len) {
  4715. if (use_rx_sg) {
  4716. if (qeth_create_skb_frag(qethbuffer, element,
  4717. &skb, offset, &frag, data_len))
  4718. goto no_mem;
  4719. } else {
  4720. memcpy(skb_put(skb, data_len), data_ptr,
  4721. data_len);
  4722. }
  4723. }
  4724. skb_len -= data_len;
  4725. if (skb_len) {
  4726. if (qeth_is_last_sbale(element)) {
  4727. QETH_CARD_TEXT(card, 4, "unexeob");
  4728. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4729. dev_kfree_skb_any(skb);
  4730. card->stats.rx_errors++;
  4731. return NULL;
  4732. }
  4733. element++;
  4734. offset = 0;
  4735. data_ptr = element->addr;
  4736. } else {
  4737. offset += data_len;
  4738. }
  4739. }
  4740. *__element = element;
  4741. *__offset = offset;
  4742. if (use_rx_sg && card->options.performance_stats) {
  4743. card->perf_stats.sg_skbs_rx++;
  4744. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4745. }
  4746. return skb;
  4747. no_mem:
  4748. if (net_ratelimit()) {
  4749. QETH_CARD_TEXT(card, 2, "noskbmem");
  4750. }
  4751. card->stats.rx_dropped++;
  4752. return NULL;
  4753. }
  4754. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4755. static void qeth_unregister_dbf_views(void)
  4756. {
  4757. int x;
  4758. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4759. debug_unregister(qeth_dbf[x].id);
  4760. qeth_dbf[x].id = NULL;
  4761. }
  4762. }
  4763. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4764. {
  4765. char dbf_txt_buf[32];
  4766. va_list args;
  4767. if (!debug_level_enabled(id, level))
  4768. return;
  4769. va_start(args, fmt);
  4770. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4771. va_end(args);
  4772. debug_text_event(id, level, dbf_txt_buf);
  4773. }
  4774. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4775. static int qeth_register_dbf_views(void)
  4776. {
  4777. int ret;
  4778. int x;
  4779. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4780. /* register the areas */
  4781. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4782. qeth_dbf[x].pages,
  4783. qeth_dbf[x].areas,
  4784. qeth_dbf[x].len);
  4785. if (qeth_dbf[x].id == NULL) {
  4786. qeth_unregister_dbf_views();
  4787. return -ENOMEM;
  4788. }
  4789. /* register a view */
  4790. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4791. if (ret) {
  4792. qeth_unregister_dbf_views();
  4793. return ret;
  4794. }
  4795. /* set a passing level */
  4796. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4797. }
  4798. return 0;
  4799. }
  4800. int qeth_core_load_discipline(struct qeth_card *card,
  4801. enum qeth_discipline_id discipline)
  4802. {
  4803. int rc = 0;
  4804. mutex_lock(&qeth_mod_mutex);
  4805. switch (discipline) {
  4806. case QETH_DISCIPLINE_LAYER3:
  4807. card->discipline = try_then_request_module(
  4808. symbol_get(qeth_l3_discipline), "qeth_l3");
  4809. break;
  4810. case QETH_DISCIPLINE_LAYER2:
  4811. card->discipline = try_then_request_module(
  4812. symbol_get(qeth_l2_discipline), "qeth_l2");
  4813. break;
  4814. }
  4815. if (!card->discipline) {
  4816. dev_err(&card->gdev->dev, "There is no kernel module to "
  4817. "support discipline %d\n", discipline);
  4818. rc = -EINVAL;
  4819. }
  4820. mutex_unlock(&qeth_mod_mutex);
  4821. return rc;
  4822. }
  4823. void qeth_core_free_discipline(struct qeth_card *card)
  4824. {
  4825. if (card->options.layer2)
  4826. symbol_put(qeth_l2_discipline);
  4827. else
  4828. symbol_put(qeth_l3_discipline);
  4829. card->discipline = NULL;
  4830. }
  4831. static const struct device_type qeth_generic_devtype = {
  4832. .name = "qeth_generic",
  4833. .groups = qeth_generic_attr_groups,
  4834. };
  4835. static const struct device_type qeth_osn_devtype = {
  4836. .name = "qeth_osn",
  4837. .groups = qeth_osn_attr_groups,
  4838. };
  4839. #define DBF_NAME_LEN 20
  4840. struct qeth_dbf_entry {
  4841. char dbf_name[DBF_NAME_LEN];
  4842. debug_info_t *dbf_info;
  4843. struct list_head dbf_list;
  4844. };
  4845. static LIST_HEAD(qeth_dbf_list);
  4846. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4847. static debug_info_t *qeth_get_dbf_entry(char *name)
  4848. {
  4849. struct qeth_dbf_entry *entry;
  4850. debug_info_t *rc = NULL;
  4851. mutex_lock(&qeth_dbf_list_mutex);
  4852. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4853. if (strcmp(entry->dbf_name, name) == 0) {
  4854. rc = entry->dbf_info;
  4855. break;
  4856. }
  4857. }
  4858. mutex_unlock(&qeth_dbf_list_mutex);
  4859. return rc;
  4860. }
  4861. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4862. {
  4863. struct qeth_dbf_entry *new_entry;
  4864. card->debug = debug_register(name, 2, 1, 8);
  4865. if (!card->debug) {
  4866. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4867. goto err;
  4868. }
  4869. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4870. goto err_dbg;
  4871. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4872. if (!new_entry)
  4873. goto err_dbg;
  4874. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4875. new_entry->dbf_info = card->debug;
  4876. mutex_lock(&qeth_dbf_list_mutex);
  4877. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4878. mutex_unlock(&qeth_dbf_list_mutex);
  4879. return 0;
  4880. err_dbg:
  4881. debug_unregister(card->debug);
  4882. err:
  4883. return -ENOMEM;
  4884. }
  4885. static void qeth_clear_dbf_list(void)
  4886. {
  4887. struct qeth_dbf_entry *entry, *tmp;
  4888. mutex_lock(&qeth_dbf_list_mutex);
  4889. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  4890. list_del(&entry->dbf_list);
  4891. debug_unregister(entry->dbf_info);
  4892. kfree(entry);
  4893. }
  4894. mutex_unlock(&qeth_dbf_list_mutex);
  4895. }
  4896. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  4897. {
  4898. struct qeth_card *card;
  4899. struct device *dev;
  4900. int rc;
  4901. unsigned long flags;
  4902. char dbf_name[DBF_NAME_LEN];
  4903. QETH_DBF_TEXT(SETUP, 2, "probedev");
  4904. dev = &gdev->dev;
  4905. if (!get_device(dev))
  4906. return -ENODEV;
  4907. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  4908. card = qeth_alloc_card();
  4909. if (!card) {
  4910. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  4911. rc = -ENOMEM;
  4912. goto err_dev;
  4913. }
  4914. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  4915. dev_name(&gdev->dev));
  4916. card->debug = qeth_get_dbf_entry(dbf_name);
  4917. if (!card->debug) {
  4918. rc = qeth_add_dbf_entry(card, dbf_name);
  4919. if (rc)
  4920. goto err_card;
  4921. }
  4922. card->read.ccwdev = gdev->cdev[0];
  4923. card->write.ccwdev = gdev->cdev[1];
  4924. card->data.ccwdev = gdev->cdev[2];
  4925. dev_set_drvdata(&gdev->dev, card);
  4926. card->gdev = gdev;
  4927. gdev->cdev[0]->handler = qeth_irq;
  4928. gdev->cdev[1]->handler = qeth_irq;
  4929. gdev->cdev[2]->handler = qeth_irq;
  4930. rc = qeth_determine_card_type(card);
  4931. if (rc) {
  4932. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4933. goto err_card;
  4934. }
  4935. rc = qeth_setup_card(card);
  4936. if (rc) {
  4937. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  4938. goto err_card;
  4939. }
  4940. if (card->info.type == QETH_CARD_TYPE_OSN)
  4941. gdev->dev.type = &qeth_osn_devtype;
  4942. else
  4943. gdev->dev.type = &qeth_generic_devtype;
  4944. switch (card->info.type) {
  4945. case QETH_CARD_TYPE_OSN:
  4946. case QETH_CARD_TYPE_OSM:
  4947. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  4948. if (rc)
  4949. goto err_card;
  4950. rc = card->discipline->setup(card->gdev);
  4951. if (rc)
  4952. goto err_disc;
  4953. case QETH_CARD_TYPE_OSD:
  4954. case QETH_CARD_TYPE_OSX:
  4955. default:
  4956. break;
  4957. }
  4958. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4959. list_add_tail(&card->list, &qeth_core_card_list.list);
  4960. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4961. qeth_determine_capabilities(card);
  4962. return 0;
  4963. err_disc:
  4964. qeth_core_free_discipline(card);
  4965. err_card:
  4966. qeth_core_free_card(card);
  4967. err_dev:
  4968. put_device(dev);
  4969. return rc;
  4970. }
  4971. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  4972. {
  4973. unsigned long flags;
  4974. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4975. QETH_DBF_TEXT(SETUP, 2, "removedv");
  4976. if (card->discipline) {
  4977. card->discipline->remove(gdev);
  4978. qeth_core_free_discipline(card);
  4979. }
  4980. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4981. list_del(&card->list);
  4982. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4983. qeth_core_free_card(card);
  4984. dev_set_drvdata(&gdev->dev, NULL);
  4985. put_device(&gdev->dev);
  4986. return;
  4987. }
  4988. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  4989. {
  4990. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4991. int rc = 0;
  4992. int def_discipline;
  4993. if (!card->discipline) {
  4994. if (card->info.type == QETH_CARD_TYPE_IQD)
  4995. def_discipline = QETH_DISCIPLINE_LAYER3;
  4996. else
  4997. def_discipline = QETH_DISCIPLINE_LAYER2;
  4998. rc = qeth_core_load_discipline(card, def_discipline);
  4999. if (rc)
  5000. goto err;
  5001. rc = card->discipline->setup(card->gdev);
  5002. if (rc)
  5003. goto err;
  5004. }
  5005. rc = card->discipline->set_online(gdev);
  5006. err:
  5007. return rc;
  5008. }
  5009. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5010. {
  5011. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5012. return card->discipline->set_offline(gdev);
  5013. }
  5014. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5015. {
  5016. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5017. if (card->discipline && card->discipline->shutdown)
  5018. card->discipline->shutdown(gdev);
  5019. }
  5020. static int qeth_core_prepare(struct ccwgroup_device *gdev)
  5021. {
  5022. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5023. if (card->discipline && card->discipline->prepare)
  5024. return card->discipline->prepare(gdev);
  5025. return 0;
  5026. }
  5027. static void qeth_core_complete(struct ccwgroup_device *gdev)
  5028. {
  5029. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5030. if (card->discipline && card->discipline->complete)
  5031. card->discipline->complete(gdev);
  5032. }
  5033. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5034. {
  5035. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5036. if (card->discipline && card->discipline->freeze)
  5037. return card->discipline->freeze(gdev);
  5038. return 0;
  5039. }
  5040. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5041. {
  5042. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5043. if (card->discipline && card->discipline->thaw)
  5044. return card->discipline->thaw(gdev);
  5045. return 0;
  5046. }
  5047. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5048. {
  5049. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5050. if (card->discipline && card->discipline->restore)
  5051. return card->discipline->restore(gdev);
  5052. return 0;
  5053. }
  5054. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5055. .driver = {
  5056. .owner = THIS_MODULE,
  5057. .name = "qeth",
  5058. },
  5059. .setup = qeth_core_probe_device,
  5060. .remove = qeth_core_remove_device,
  5061. .set_online = qeth_core_set_online,
  5062. .set_offline = qeth_core_set_offline,
  5063. .shutdown = qeth_core_shutdown,
  5064. .prepare = qeth_core_prepare,
  5065. .complete = qeth_core_complete,
  5066. .freeze = qeth_core_freeze,
  5067. .thaw = qeth_core_thaw,
  5068. .restore = qeth_core_restore,
  5069. };
  5070. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  5071. const char *buf, size_t count)
  5072. {
  5073. int err;
  5074. err = ccwgroup_create_dev(qeth_core_root_dev,
  5075. &qeth_core_ccwgroup_driver, 3, buf);
  5076. return err ? err : count;
  5077. }
  5078. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  5079. static struct attribute *qeth_drv_attrs[] = {
  5080. &driver_attr_group.attr,
  5081. NULL,
  5082. };
  5083. static struct attribute_group qeth_drv_attr_group = {
  5084. .attrs = qeth_drv_attrs,
  5085. };
  5086. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5087. &qeth_drv_attr_group,
  5088. NULL,
  5089. };
  5090. static struct {
  5091. const char str[ETH_GSTRING_LEN];
  5092. } qeth_ethtool_stats_keys[] = {
  5093. /* 0 */{"rx skbs"},
  5094. {"rx buffers"},
  5095. {"tx skbs"},
  5096. {"tx buffers"},
  5097. {"tx skbs no packing"},
  5098. {"tx buffers no packing"},
  5099. {"tx skbs packing"},
  5100. {"tx buffers packing"},
  5101. {"tx sg skbs"},
  5102. {"tx sg frags"},
  5103. /* 10 */{"rx sg skbs"},
  5104. {"rx sg frags"},
  5105. {"rx sg page allocs"},
  5106. {"tx large kbytes"},
  5107. {"tx large count"},
  5108. {"tx pk state ch n->p"},
  5109. {"tx pk state ch p->n"},
  5110. {"tx pk watermark low"},
  5111. {"tx pk watermark high"},
  5112. {"queue 0 buffer usage"},
  5113. /* 20 */{"queue 1 buffer usage"},
  5114. {"queue 2 buffer usage"},
  5115. {"queue 3 buffer usage"},
  5116. {"rx poll time"},
  5117. {"rx poll count"},
  5118. {"rx do_QDIO time"},
  5119. {"rx do_QDIO count"},
  5120. {"tx handler time"},
  5121. {"tx handler count"},
  5122. {"tx time"},
  5123. /* 30 */{"tx count"},
  5124. {"tx do_QDIO time"},
  5125. {"tx do_QDIO count"},
  5126. {"tx csum"},
  5127. {"tx lin"},
  5128. {"cq handler count"},
  5129. {"cq handler time"}
  5130. };
  5131. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5132. {
  5133. switch (stringset) {
  5134. case ETH_SS_STATS:
  5135. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5136. default:
  5137. return -EINVAL;
  5138. }
  5139. }
  5140. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5141. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5142. struct ethtool_stats *stats, u64 *data)
  5143. {
  5144. struct qeth_card *card = dev->ml_priv;
  5145. data[0] = card->stats.rx_packets -
  5146. card->perf_stats.initial_rx_packets;
  5147. data[1] = card->perf_stats.bufs_rec;
  5148. data[2] = card->stats.tx_packets -
  5149. card->perf_stats.initial_tx_packets;
  5150. data[3] = card->perf_stats.bufs_sent;
  5151. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5152. - card->perf_stats.skbs_sent_pack;
  5153. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5154. data[6] = card->perf_stats.skbs_sent_pack;
  5155. data[7] = card->perf_stats.bufs_sent_pack;
  5156. data[8] = card->perf_stats.sg_skbs_sent;
  5157. data[9] = card->perf_stats.sg_frags_sent;
  5158. data[10] = card->perf_stats.sg_skbs_rx;
  5159. data[11] = card->perf_stats.sg_frags_rx;
  5160. data[12] = card->perf_stats.sg_alloc_page_rx;
  5161. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5162. data[14] = card->perf_stats.large_send_cnt;
  5163. data[15] = card->perf_stats.sc_dp_p;
  5164. data[16] = card->perf_stats.sc_p_dp;
  5165. data[17] = QETH_LOW_WATERMARK_PACK;
  5166. data[18] = QETH_HIGH_WATERMARK_PACK;
  5167. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5168. data[20] = (card->qdio.no_out_queues > 1) ?
  5169. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5170. data[21] = (card->qdio.no_out_queues > 2) ?
  5171. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5172. data[22] = (card->qdio.no_out_queues > 3) ?
  5173. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5174. data[23] = card->perf_stats.inbound_time;
  5175. data[24] = card->perf_stats.inbound_cnt;
  5176. data[25] = card->perf_stats.inbound_do_qdio_time;
  5177. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5178. data[27] = card->perf_stats.outbound_handler_time;
  5179. data[28] = card->perf_stats.outbound_handler_cnt;
  5180. data[29] = card->perf_stats.outbound_time;
  5181. data[30] = card->perf_stats.outbound_cnt;
  5182. data[31] = card->perf_stats.outbound_do_qdio_time;
  5183. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5184. data[33] = card->perf_stats.tx_csum;
  5185. data[34] = card->perf_stats.tx_lin;
  5186. data[35] = card->perf_stats.cq_cnt;
  5187. data[36] = card->perf_stats.cq_time;
  5188. }
  5189. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5190. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5191. {
  5192. switch (stringset) {
  5193. case ETH_SS_STATS:
  5194. memcpy(data, &qeth_ethtool_stats_keys,
  5195. sizeof(qeth_ethtool_stats_keys));
  5196. break;
  5197. default:
  5198. WARN_ON(1);
  5199. break;
  5200. }
  5201. }
  5202. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5203. void qeth_core_get_drvinfo(struct net_device *dev,
  5204. struct ethtool_drvinfo *info)
  5205. {
  5206. struct qeth_card *card = dev->ml_priv;
  5207. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5208. sizeof(info->driver));
  5209. strlcpy(info->version, "1.0", sizeof(info->version));
  5210. strlcpy(info->fw_version, card->info.mcl_level,
  5211. sizeof(info->fw_version));
  5212. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5213. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5214. }
  5215. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5216. /* Helper function to fill 'advertizing' and 'supported' which are the same. */
  5217. /* Autoneg and full-duplex are supported and advertized uncondionally. */
  5218. /* Always advertize and support all speeds up to specified, and only one */
  5219. /* specified port type. */
  5220. static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
  5221. int maxspeed, int porttype)
  5222. {
  5223. int port_sup, port_adv, spd_sup, spd_adv;
  5224. switch (porttype) {
  5225. case PORT_TP:
  5226. port_sup = SUPPORTED_TP;
  5227. port_adv = ADVERTISED_TP;
  5228. break;
  5229. case PORT_FIBRE:
  5230. port_sup = SUPPORTED_FIBRE;
  5231. port_adv = ADVERTISED_FIBRE;
  5232. break;
  5233. default:
  5234. port_sup = SUPPORTED_TP;
  5235. port_adv = ADVERTISED_TP;
  5236. WARN_ON_ONCE(1);
  5237. }
  5238. /* "Fallthrough" case'es ordered from high to low result in setting */
  5239. /* flags cumulatively, starting from the specified speed and down to */
  5240. /* the lowest possible. */
  5241. spd_sup = 0;
  5242. spd_adv = 0;
  5243. switch (maxspeed) {
  5244. case SPEED_10000:
  5245. spd_sup |= SUPPORTED_10000baseT_Full;
  5246. spd_adv |= ADVERTISED_10000baseT_Full;
  5247. case SPEED_1000:
  5248. spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
  5249. spd_adv |= ADVERTISED_1000baseT_Half |
  5250. ADVERTISED_1000baseT_Full;
  5251. case SPEED_100:
  5252. spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
  5253. spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
  5254. case SPEED_10:
  5255. spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5256. spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5257. break;
  5258. default:
  5259. spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5260. spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5261. WARN_ON_ONCE(1);
  5262. }
  5263. ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
  5264. ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
  5265. }
  5266. int qeth_core_ethtool_get_settings(struct net_device *netdev,
  5267. struct ethtool_cmd *ecmd)
  5268. {
  5269. struct qeth_card *card = netdev->ml_priv;
  5270. enum qeth_link_types link_type;
  5271. struct carrier_info carrier_info;
  5272. int rc;
  5273. u32 speed;
  5274. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5275. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5276. else
  5277. link_type = card->info.link_type;
  5278. ecmd->transceiver = XCVR_INTERNAL;
  5279. ecmd->duplex = DUPLEX_FULL;
  5280. ecmd->autoneg = AUTONEG_ENABLE;
  5281. switch (link_type) {
  5282. case QETH_LINK_TYPE_FAST_ETH:
  5283. case QETH_LINK_TYPE_LANE_ETH100:
  5284. qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
  5285. speed = SPEED_100;
  5286. ecmd->port = PORT_TP;
  5287. break;
  5288. case QETH_LINK_TYPE_GBIT_ETH:
  5289. case QETH_LINK_TYPE_LANE_ETH1000:
  5290. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5291. speed = SPEED_1000;
  5292. ecmd->port = PORT_FIBRE;
  5293. break;
  5294. case QETH_LINK_TYPE_10GBIT_ETH:
  5295. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5296. speed = SPEED_10000;
  5297. ecmd->port = PORT_FIBRE;
  5298. break;
  5299. default:
  5300. qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
  5301. speed = SPEED_10;
  5302. ecmd->port = PORT_TP;
  5303. }
  5304. ethtool_cmd_speed_set(ecmd, speed);
  5305. /* Check if we can obtain more accurate information. */
  5306. /* If QUERY_CARD_INFO command is not supported or fails, */
  5307. /* just return the heuristics that was filled above. */
  5308. if (!qeth_card_hw_is_reachable(card))
  5309. return -ENODEV;
  5310. rc = qeth_query_card_info(card, &carrier_info);
  5311. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5312. return 0;
  5313. if (rc) /* report error from the hardware operation */
  5314. return rc;
  5315. /* on success, fill in the information got from the hardware */
  5316. netdev_dbg(netdev,
  5317. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5318. carrier_info.card_type,
  5319. carrier_info.port_mode,
  5320. carrier_info.port_speed);
  5321. /* Update attributes for which we've obtained more authoritative */
  5322. /* information, leave the rest the way they where filled above. */
  5323. switch (carrier_info.card_type) {
  5324. case CARD_INFO_TYPE_1G_COPPER_A:
  5325. case CARD_INFO_TYPE_1G_COPPER_B:
  5326. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
  5327. ecmd->port = PORT_TP;
  5328. break;
  5329. case CARD_INFO_TYPE_1G_FIBRE_A:
  5330. case CARD_INFO_TYPE_1G_FIBRE_B:
  5331. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5332. ecmd->port = PORT_FIBRE;
  5333. break;
  5334. case CARD_INFO_TYPE_10G_FIBRE_A:
  5335. case CARD_INFO_TYPE_10G_FIBRE_B:
  5336. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5337. ecmd->port = PORT_FIBRE;
  5338. break;
  5339. }
  5340. switch (carrier_info.port_mode) {
  5341. case CARD_INFO_PORTM_FULLDUPLEX:
  5342. ecmd->duplex = DUPLEX_FULL;
  5343. break;
  5344. case CARD_INFO_PORTM_HALFDUPLEX:
  5345. ecmd->duplex = DUPLEX_HALF;
  5346. break;
  5347. }
  5348. switch (carrier_info.port_speed) {
  5349. case CARD_INFO_PORTS_10M:
  5350. speed = SPEED_10;
  5351. break;
  5352. case CARD_INFO_PORTS_100M:
  5353. speed = SPEED_100;
  5354. break;
  5355. case CARD_INFO_PORTS_1G:
  5356. speed = SPEED_1000;
  5357. break;
  5358. case CARD_INFO_PORTS_10G:
  5359. speed = SPEED_10000;
  5360. break;
  5361. }
  5362. ethtool_cmd_speed_set(ecmd, speed);
  5363. return 0;
  5364. }
  5365. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
  5366. static int __init qeth_core_init(void)
  5367. {
  5368. int rc;
  5369. pr_info("loading core functions\n");
  5370. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5371. INIT_LIST_HEAD(&qeth_dbf_list);
  5372. rwlock_init(&qeth_core_card_list.rwlock);
  5373. mutex_init(&qeth_mod_mutex);
  5374. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5375. rc = qeth_register_dbf_views();
  5376. if (rc)
  5377. goto out_err;
  5378. qeth_core_root_dev = root_device_register("qeth");
  5379. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5380. if (rc)
  5381. goto register_err;
  5382. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5383. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5384. if (!qeth_core_header_cache) {
  5385. rc = -ENOMEM;
  5386. goto slab_err;
  5387. }
  5388. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5389. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5390. if (!qeth_qdio_outbuf_cache) {
  5391. rc = -ENOMEM;
  5392. goto cqslab_err;
  5393. }
  5394. rc = ccw_driver_register(&qeth_ccw_driver);
  5395. if (rc)
  5396. goto ccw_err;
  5397. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5398. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5399. if (rc)
  5400. goto ccwgroup_err;
  5401. return 0;
  5402. ccwgroup_err:
  5403. ccw_driver_unregister(&qeth_ccw_driver);
  5404. ccw_err:
  5405. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5406. cqslab_err:
  5407. kmem_cache_destroy(qeth_core_header_cache);
  5408. slab_err:
  5409. root_device_unregister(qeth_core_root_dev);
  5410. register_err:
  5411. qeth_unregister_dbf_views();
  5412. out_err:
  5413. pr_err("Initializing the qeth device driver failed\n");
  5414. return rc;
  5415. }
  5416. static void __exit qeth_core_exit(void)
  5417. {
  5418. qeth_clear_dbf_list();
  5419. destroy_workqueue(qeth_wq);
  5420. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5421. ccw_driver_unregister(&qeth_ccw_driver);
  5422. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5423. kmem_cache_destroy(qeth_core_header_cache);
  5424. root_device_unregister(qeth_core_root_dev);
  5425. qeth_unregister_dbf_views();
  5426. pr_info("core functions removed\n");
  5427. }
  5428. module_init(qeth_core_init);
  5429. module_exit(qeth_core_exit);
  5430. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5431. MODULE_DESCRIPTION("qeth core functions");
  5432. MODULE_LICENSE("GPL");