zd_rf_al2230.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443
  1. /* ZD1211 USB-WLAN driver for Linux
  2. *
  3. * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
  4. * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include "zd_rf.h"
  21. #include "zd_usb.h"
  22. #include "zd_chip.h"
  23. #define IS_AL2230S(chip) ((chip)->al2230s_bit || (chip)->rf.type == AL2230S_RF)
  24. static const u32 zd1211_al2230_table[][3] = {
  25. RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
  26. RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
  27. RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
  28. RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
  29. RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
  30. RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
  31. RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
  32. RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
  33. RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
  34. RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
  35. RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
  36. RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
  37. RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
  38. RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
  39. };
  40. static const u32 zd1211b_al2230_table[][3] = {
  41. RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
  42. RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
  43. RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
  44. RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
  45. RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
  46. RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
  47. RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
  48. RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
  49. RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
  50. RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
  51. RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
  52. RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
  53. RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
  54. RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
  55. };
  56. static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
  57. { ZD_CR240, 0x57 }, { ZD_CR9, 0xe0 },
  58. };
  59. static const struct zd_ioreq16 ioreqs_init_al2230s[] = {
  60. { ZD_CR47, 0x1e }, /* MARK_002 */
  61. { ZD_CR106, 0x22 },
  62. { ZD_CR107, 0x2a }, /* MARK_002 */
  63. { ZD_CR109, 0x13 }, /* MARK_002 */
  64. { ZD_CR118, 0xf8 }, /* MARK_002 */
  65. { ZD_CR119, 0x12 }, { ZD_CR122, 0xe0 },
  66. { ZD_CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */
  67. { ZD_CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */
  68. { ZD_CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */
  69. };
  70. static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
  71. {
  72. int r;
  73. static const struct zd_ioreq16 ioreqs[] = {
  74. { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
  75. { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
  76. { ZD_CR203, 0x06 },
  77. { },
  78. { ZD_CR240, 0x80 },
  79. };
  80. r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  81. if (r)
  82. return r;
  83. /* related to antenna selection? */
  84. if (chip->new_phy_layout) {
  85. r = zd_iowrite16_locked(chip, 0xe1, ZD_CR9);
  86. if (r)
  87. return r;
  88. }
  89. return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
  90. }
  91. static int zd1211_al2230_init_hw(struct zd_rf *rf)
  92. {
  93. int r;
  94. struct zd_chip *chip = zd_rf_to_chip(rf);
  95. static const struct zd_ioreq16 ioreqs_init[] = {
  96. { ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
  97. { ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
  98. { ZD_CR44, 0x33 }, { ZD_CR106, 0x2a }, { ZD_CR107, 0x1a },
  99. { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 }, { ZD_CR111, 0x2b },
  100. { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a }, { ZD_CR10, 0x89 },
  101. /* for newest (3rd cut) AL2300 */
  102. { ZD_CR17, 0x28 },
  103. { ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
  104. /* for newest (3rd cut) AL2300 */
  105. { ZD_CR35, 0x3e },
  106. { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
  107. /* for newest (3rd cut) AL2300 */
  108. { ZD_CR46, 0x96 },
  109. { ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
  110. { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
  111. { ZD_CR92, 0x0a }, { ZD_CR99, 0x28 }, { ZD_CR100, 0x00 },
  112. { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 }, { ZD_CR106, 0x24 },
  113. { ZD_CR107, 0x2a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x13 },
  114. { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
  115. { ZD_CR114, 0x27 },
  116. /* for newest (3rd cut) AL2300 */
  117. { ZD_CR115, 0x24 },
  118. { ZD_CR116, 0x24 }, { ZD_CR117, 0xf4 }, { ZD_CR118, 0xfc },
  119. { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f }, { ZD_CR121, 0x77 },
  120. { ZD_CR122, 0xe0 }, { ZD_CR137, 0x88 }, { ZD_CR252, 0xff },
  121. { ZD_CR253, 0xff },
  122. };
  123. static const struct zd_ioreq16 ioreqs_pll[] = {
  124. /* shdnb(PLL_ON)=0 */
  125. { ZD_CR251, 0x2f },
  126. /* shdnb(PLL_ON)=1 */
  127. { ZD_CR251, 0x3f },
  128. { ZD_CR138, 0x28 }, { ZD_CR203, 0x06 },
  129. };
  130. static const u32 rv1[] = {
  131. /* Channel 1 */
  132. 0x03f790,
  133. 0x033331,
  134. 0x00000d,
  135. 0x0b3331,
  136. 0x03b812,
  137. 0x00fff3,
  138. };
  139. static const u32 rv2[] = {
  140. 0x000da4,
  141. 0x0f4dc5, /* fix freq shift, 0x04edc5 */
  142. 0x0805b6,
  143. 0x011687,
  144. 0x000688,
  145. 0x0403b9, /* external control TX power (ZD_CR31) */
  146. 0x00dbba,
  147. 0x00099b,
  148. 0x0bdffc,
  149. 0x00000d,
  150. 0x00500f,
  151. };
  152. static const u32 rv3[] = {
  153. 0x00d00f,
  154. 0x004c0f,
  155. 0x00540f,
  156. 0x00700f,
  157. 0x00500f,
  158. };
  159. r = zd_iowrite16a_locked(chip, ioreqs_init, ARRAY_SIZE(ioreqs_init));
  160. if (r)
  161. return r;
  162. if (IS_AL2230S(chip)) {
  163. r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
  164. ARRAY_SIZE(ioreqs_init_al2230s));
  165. if (r)
  166. return r;
  167. }
  168. r = zd_rfwritev_locked(chip, rv1, ARRAY_SIZE(rv1), RF_RV_BITS);
  169. if (r)
  170. return r;
  171. /* improve band edge for AL2230S */
  172. if (IS_AL2230S(chip))
  173. r = zd_rfwrite_locked(chip, 0x000824, RF_RV_BITS);
  174. else
  175. r = zd_rfwrite_locked(chip, 0x0005a4, RF_RV_BITS);
  176. if (r)
  177. return r;
  178. r = zd_rfwritev_locked(chip, rv2, ARRAY_SIZE(rv2), RF_RV_BITS);
  179. if (r)
  180. return r;
  181. r = zd_iowrite16a_locked(chip, ioreqs_pll, ARRAY_SIZE(ioreqs_pll));
  182. if (r)
  183. return r;
  184. r = zd_rfwritev_locked(chip, rv3, ARRAY_SIZE(rv3), RF_RV_BITS);
  185. if (r)
  186. return r;
  187. return 0;
  188. }
  189. static int zd1211b_al2230_init_hw(struct zd_rf *rf)
  190. {
  191. int r;
  192. struct zd_chip *chip = zd_rf_to_chip(rf);
  193. static const struct zd_ioreq16 ioreqs1[] = {
  194. { ZD_CR10, 0x89 }, { ZD_CR15, 0x20 },
  195. { ZD_CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
  196. { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
  197. { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
  198. { ZD_CR33, 0x28 }, /* 5621 */
  199. { ZD_CR34, 0x30 },
  200. { ZD_CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
  201. { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
  202. { ZD_CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
  203. { ZD_CR47, 0x1e },
  204. /* ZD1211B 05.06.10 */
  205. { ZD_CR48, 0x06 }, { ZD_CR49, 0xf9 }, { ZD_CR51, 0x01 },
  206. { ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
  207. { ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
  208. { ZD_CR69, 0x28 },
  209. { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
  210. { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
  211. { ZD_CR91, 0x00 }, /* 5621 */
  212. { ZD_CR92, 0x0a },
  213. { ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
  214. { ZD_CR99, 0x00 }, /* 5621 */
  215. { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
  216. { ZD_CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
  217. { ZD_CR107, 0x2a },
  218. { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
  219. { ZD_CR110, 0x1f }, /* 4804, for 1212 new algorithm */
  220. { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
  221. { ZD_CR114, 0x27 },
  222. { ZD_CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut)
  223. * AL2230
  224. */
  225. { ZD_CR116, 0x24 },
  226. { ZD_CR117, 0xfa }, /* for 1211b */
  227. { ZD_CR118, 0xfa }, /* for 1211b */
  228. { ZD_CR119, 0x10 },
  229. { ZD_CR120, 0x4f },
  230. { ZD_CR121, 0x6c }, /* for 1211b */
  231. { ZD_CR122, 0xfc }, /* E0->FC at 4902 */
  232. { ZD_CR123, 0x57 }, /* 5623 */
  233. { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
  234. { ZD_CR126, 0x6c }, /* 5614 */
  235. { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
  236. { ZD_CR137, 0x50 }, /* 5614 */
  237. { ZD_CR138, 0xa8 },
  238. { ZD_CR144, 0xac }, /* 5621 */
  239. { ZD_CR150, 0x0d }, { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
  240. };
  241. static const u32 rv1[] = {
  242. 0x8cccd0,
  243. 0x481dc0,
  244. 0xcfff00,
  245. 0x25a000,
  246. };
  247. static const u32 rv2[] = {
  248. /* To improve AL2230 yield, improve phase noise, 4713 */
  249. 0x25a000,
  250. 0xa3b2f0,
  251. 0x6da010, /* Reg6 update for MP versio */
  252. 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
  253. 0x116000,
  254. 0x9dc020, /* External control TX power (ZD_CR31) */
  255. 0x5ddb00, /* RegA update for MP version */
  256. 0xd99000, /* RegB update for MP version */
  257. 0x3ffbd0, /* RegC update for MP version */
  258. 0xb00000, /* RegD update for MP version */
  259. /* improve phase noise and remove phase calibration,4713 */
  260. 0xf01a00,
  261. };
  262. static const struct zd_ioreq16 ioreqs2[] = {
  263. { ZD_CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
  264. { ZD_CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
  265. };
  266. static const u32 rv3[] = {
  267. /* To improve AL2230 yield, 4713 */
  268. 0xf01b00,
  269. 0xf01e00,
  270. 0xf01a00,
  271. };
  272. static const struct zd_ioreq16 ioreqs3[] = {
  273. /* related to 6M band edge patching, happens unconditionally */
  274. { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
  275. };
  276. r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
  277. ARRAY_SIZE(zd1211b_ioreqs_shared_1));
  278. if (r)
  279. return r;
  280. r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
  281. if (r)
  282. return r;
  283. if (IS_AL2230S(chip)) {
  284. r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
  285. ARRAY_SIZE(ioreqs_init_al2230s));
  286. if (r)
  287. return r;
  288. }
  289. r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
  290. if (r)
  291. return r;
  292. r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
  293. if (r)
  294. return r;
  295. if (IS_AL2230S(chip))
  296. r = zd_rfwrite_locked(chip, 0x241000, RF_RV_BITS);
  297. else
  298. r = zd_rfwrite_locked(chip, 0x25a000, RF_RV_BITS);
  299. if (r)
  300. return r;
  301. r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
  302. if (r)
  303. return r;
  304. r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
  305. if (r)
  306. return r;
  307. r = zd_rfwritev_cr_locked(chip, rv3, ARRAY_SIZE(rv3));
  308. if (r)
  309. return r;
  310. r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
  311. if (r)
  312. return r;
  313. return zd1211b_al2230_finalize_rf(chip);
  314. }
  315. static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
  316. {
  317. int r;
  318. const u32 *rv = zd1211_al2230_table[channel-1];
  319. struct zd_chip *chip = zd_rf_to_chip(rf);
  320. static const struct zd_ioreq16 ioreqs[] = {
  321. { ZD_CR138, 0x28 },
  322. { ZD_CR203, 0x06 },
  323. };
  324. r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
  325. if (r)
  326. return r;
  327. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  328. }
  329. static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
  330. {
  331. int r;
  332. const u32 *rv = zd1211b_al2230_table[channel-1];
  333. struct zd_chip *chip = zd_rf_to_chip(rf);
  334. r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
  335. ARRAY_SIZE(zd1211b_ioreqs_shared_1));
  336. if (r)
  337. return r;
  338. r = zd_rfwritev_cr_locked(chip, rv, 3);
  339. if (r)
  340. return r;
  341. return zd1211b_al2230_finalize_rf(chip);
  342. }
  343. static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
  344. {
  345. struct zd_chip *chip = zd_rf_to_chip(rf);
  346. static const struct zd_ioreq16 ioreqs[] = {
  347. { ZD_CR11, 0x00 },
  348. { ZD_CR251, 0x3f },
  349. };
  350. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  351. }
  352. static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
  353. {
  354. struct zd_chip *chip = zd_rf_to_chip(rf);
  355. static const struct zd_ioreq16 ioreqs[] = {
  356. { ZD_CR11, 0x00 },
  357. { ZD_CR251, 0x7f },
  358. };
  359. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  360. }
  361. static int al2230_switch_radio_off(struct zd_rf *rf)
  362. {
  363. struct zd_chip *chip = zd_rf_to_chip(rf);
  364. static const struct zd_ioreq16 ioreqs[] = {
  365. { ZD_CR11, 0x04 },
  366. { ZD_CR251, 0x2f },
  367. };
  368. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  369. }
  370. int zd_rf_init_al2230(struct zd_rf *rf)
  371. {
  372. struct zd_chip *chip = zd_rf_to_chip(rf);
  373. rf->switch_radio_off = al2230_switch_radio_off;
  374. if (zd_chip_is_zd1211b(chip)) {
  375. rf->init_hw = zd1211b_al2230_init_hw;
  376. rf->set_channel = zd1211b_al2230_set_channel;
  377. rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
  378. } else {
  379. rf->init_hw = zd1211_al2230_init_hw;
  380. rf->set_channel = zd1211_al2230_set_channel;
  381. rf->switch_radio_on = zd1211_al2230_switch_radio_on;
  382. }
  383. rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
  384. rf->patch_cck_gain = 1;
  385. return 0;
  386. }