rsi_91x_sdio_ops.c 14 KB

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  1. /**
  2. * Copyright (c) 2014 Redpine Signals Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include <linux/firmware.h>
  18. #include "rsi_sdio.h"
  19. #include "rsi_common.h"
  20. /**
  21. * rsi_sdio_master_access_msword() - This function sets the AHB master access
  22. * MS word in the SDIO slave registers.
  23. * @adapter: Pointer to the adapter structure.
  24. * @ms_word: ms word need to be initialized.
  25. *
  26. * Return: status: 0 on success, -1 on failure.
  27. */
  28. static int rsi_sdio_master_access_msword(struct rsi_hw *adapter,
  29. u16 ms_word)
  30. {
  31. u8 byte;
  32. u8 function = 0;
  33. int status = 0;
  34. byte = (u8)(ms_word & 0x00FF);
  35. rsi_dbg(INIT_ZONE,
  36. "%s: MASTER_ACCESS_MSBYTE:0x%x\n", __func__, byte);
  37. status = rsi_sdio_write_register(adapter,
  38. function,
  39. SDIO_MASTER_ACCESS_MSBYTE,
  40. &byte);
  41. if (status) {
  42. rsi_dbg(ERR_ZONE,
  43. "%s: fail to access MASTER_ACCESS_MSBYTE\n",
  44. __func__);
  45. return -1;
  46. }
  47. byte = (u8)(ms_word >> 8);
  48. rsi_dbg(INIT_ZONE, "%s:MASTER_ACCESS_LSBYTE:0x%x\n", __func__, byte);
  49. status = rsi_sdio_write_register(adapter,
  50. function,
  51. SDIO_MASTER_ACCESS_LSBYTE,
  52. &byte);
  53. return status;
  54. }
  55. /**
  56. * rsi_copy_to_card() - This function includes the actual funtionality of
  57. * copying the TA firmware to the card.Basically this
  58. * function includes opening the TA file,reading the
  59. * TA file and writing their values in blocks of data.
  60. * @common: Pointer to the driver private structure.
  61. * @fw: Pointer to the firmware value to be written.
  62. * @len: length of firmware file.
  63. * @num_blocks: Number of blocks to be written to the card.
  64. *
  65. * Return: 0 on success and -1 on failure.
  66. */
  67. static int rsi_copy_to_card(struct rsi_common *common,
  68. const u8 *fw,
  69. u32 len,
  70. u32 num_blocks)
  71. {
  72. struct rsi_hw *adapter = common->priv;
  73. struct rsi_91x_sdiodev *dev =
  74. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  75. u32 indx, ii;
  76. u32 block_size = dev->tx_blk_size;
  77. u32 lsb_address;
  78. __le32 data[] = { TA_HOLD_THREAD_VALUE, TA_SOFT_RST_CLR,
  79. TA_PC_ZERO, TA_RELEASE_THREAD_VALUE };
  80. u32 address[] = { TA_HOLD_THREAD_REG, TA_SOFT_RESET_REG,
  81. TA_TH0_PC_REG, TA_RELEASE_THREAD_REG };
  82. u32 base_address;
  83. u16 msb_address;
  84. base_address = TA_LOAD_ADDRESS;
  85. msb_address = base_address >> 16;
  86. for (indx = 0, ii = 0; ii < num_blocks; ii++, indx += block_size) {
  87. lsb_address = ((u16) base_address | RSI_SD_REQUEST_MASTER);
  88. if (rsi_sdio_write_register_multiple(adapter,
  89. lsb_address,
  90. (u8 *)(fw + indx),
  91. block_size)) {
  92. rsi_dbg(ERR_ZONE,
  93. "%s: Unable to load %s blk\n", __func__,
  94. FIRMWARE_RSI9113);
  95. return -1;
  96. }
  97. rsi_dbg(INIT_ZONE, "%s: loading block: %d\n", __func__, ii);
  98. base_address += block_size;
  99. if ((base_address >> 16) != msb_address) {
  100. msb_address += 1;
  101. if (rsi_sdio_master_access_msword(adapter,
  102. msb_address)) {
  103. rsi_dbg(ERR_ZONE,
  104. "%s: Unable to set ms word reg\n",
  105. __func__);
  106. return -1;
  107. }
  108. }
  109. }
  110. if (len % block_size) {
  111. lsb_address = ((u16) base_address | RSI_SD_REQUEST_MASTER);
  112. if (rsi_sdio_write_register_multiple(adapter,
  113. lsb_address,
  114. (u8 *)(fw + indx),
  115. len % block_size)) {
  116. rsi_dbg(ERR_ZONE,
  117. "%s: Unable to load f/w\n", __func__);
  118. return -1;
  119. }
  120. }
  121. rsi_dbg(INIT_ZONE,
  122. "%s: Succesfully loaded TA instructions\n", __func__);
  123. if (rsi_sdio_master_access_msword(adapter, TA_BASE_ADDR)) {
  124. rsi_dbg(ERR_ZONE,
  125. "%s: Unable to set ms word to common reg\n",
  126. __func__);
  127. return -1;
  128. }
  129. for (ii = 0; ii < ARRAY_SIZE(data); ii++) {
  130. /* Bringing TA out of reset */
  131. if (rsi_sdio_write_register_multiple(adapter,
  132. (address[ii] |
  133. RSI_SD_REQUEST_MASTER),
  134. (u8 *)&data[ii],
  135. 4)) {
  136. rsi_dbg(ERR_ZONE,
  137. "%s: Unable to hold TA threads\n", __func__);
  138. return -1;
  139. }
  140. }
  141. rsi_dbg(INIT_ZONE, "%s: loaded firmware\n", __func__);
  142. return 0;
  143. }
  144. /**
  145. * rsi_load_ta_instructions() - This function includes the actual funtionality
  146. * of loading the TA firmware.This function also
  147. * includes opening the TA file,reading the TA
  148. * file and writing their value in blocks of data.
  149. * @common: Pointer to the driver private structure.
  150. *
  151. * Return: status: 0 on success, -1 on failure.
  152. */
  153. static int rsi_load_ta_instructions(struct rsi_common *common)
  154. {
  155. struct rsi_hw *adapter = common->priv;
  156. struct rsi_91x_sdiodev *dev =
  157. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  158. u32 len;
  159. u32 num_blocks;
  160. const struct firmware *fw_entry = NULL;
  161. u32 block_size = dev->tx_blk_size;
  162. int status = 0;
  163. u32 base_address;
  164. u16 msb_address;
  165. if (rsi_sdio_master_access_msword(adapter, TA_BASE_ADDR)) {
  166. rsi_dbg(ERR_ZONE,
  167. "%s: Unable to set ms word to common reg\n",
  168. __func__);
  169. return -1;
  170. }
  171. base_address = TA_LOAD_ADDRESS;
  172. msb_address = (base_address >> 16);
  173. if (rsi_sdio_master_access_msword(adapter, msb_address)) {
  174. rsi_dbg(ERR_ZONE,
  175. "%s: Unable to set ms word reg\n", __func__);
  176. return -1;
  177. }
  178. status = request_firmware(&fw_entry, FIRMWARE_RSI9113, adapter->device);
  179. if (status < 0) {
  180. rsi_dbg(ERR_ZONE, "%s Firmware file %s not found\n",
  181. __func__, FIRMWARE_RSI9113);
  182. return status;
  183. }
  184. len = fw_entry->size;
  185. if (len % 4)
  186. len += (4 - (len % 4));
  187. num_blocks = (len / block_size);
  188. rsi_dbg(INIT_ZONE, "%s: Instruction size:%d\n", __func__, len);
  189. rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks);
  190. status = rsi_copy_to_card(common, fw_entry->data, len, num_blocks);
  191. release_firmware(fw_entry);
  192. return status;
  193. }
  194. /**
  195. * rsi_process_pkt() - This Function reads rx_blocks register and figures out
  196. * the size of the rx pkt.
  197. * @common: Pointer to the driver private structure.
  198. *
  199. * Return: 0 on success, -1 on failure.
  200. */
  201. static int rsi_process_pkt(struct rsi_common *common)
  202. {
  203. struct rsi_hw *adapter = common->priv;
  204. u8 num_blks = 0;
  205. u32 rcv_pkt_len = 0;
  206. int status = 0;
  207. status = rsi_sdio_read_register(adapter,
  208. SDIO_RX_NUM_BLOCKS_REG,
  209. &num_blks);
  210. if (status) {
  211. rsi_dbg(ERR_ZONE,
  212. "%s: Failed to read pkt length from the card:\n",
  213. __func__);
  214. return status;
  215. }
  216. rcv_pkt_len = (num_blks * 256);
  217. common->rx_data_pkt = kmalloc(rcv_pkt_len, GFP_KERNEL);
  218. if (!common->rx_data_pkt) {
  219. rsi_dbg(ERR_ZONE, "%s: Failed in memory allocation\n",
  220. __func__);
  221. return -ENOMEM;
  222. }
  223. status = rsi_sdio_host_intf_read_pkt(adapter,
  224. common->rx_data_pkt,
  225. rcv_pkt_len);
  226. if (status) {
  227. rsi_dbg(ERR_ZONE, "%s: Failed to read packet from card\n",
  228. __func__);
  229. goto fail;
  230. }
  231. status = rsi_read_pkt(common, rcv_pkt_len);
  232. fail:
  233. kfree(common->rx_data_pkt);
  234. return status;
  235. }
  236. /**
  237. * rsi_init_sdio_slave_regs() - This function does the actual initialization
  238. * of SDBUS slave registers.
  239. * @adapter: Pointer to the adapter structure.
  240. *
  241. * Return: status: 0 on success, -1 on failure.
  242. */
  243. int rsi_init_sdio_slave_regs(struct rsi_hw *adapter)
  244. {
  245. struct rsi_91x_sdiodev *dev =
  246. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  247. u8 function = 0;
  248. u8 byte;
  249. int status = 0;
  250. if (dev->next_read_delay) {
  251. byte = dev->next_read_delay;
  252. status = rsi_sdio_write_register(adapter,
  253. function,
  254. SDIO_NXT_RD_DELAY2,
  255. &byte);
  256. if (status) {
  257. rsi_dbg(ERR_ZONE,
  258. "%s: Failed to write SDIO_NXT_RD_DELAY2\n",
  259. __func__);
  260. return -1;
  261. }
  262. }
  263. if (dev->sdio_high_speed_enable) {
  264. rsi_dbg(INIT_ZONE, "%s: Enabling SDIO High speed\n", __func__);
  265. byte = 0x3;
  266. status = rsi_sdio_write_register(adapter,
  267. function,
  268. SDIO_REG_HIGH_SPEED,
  269. &byte);
  270. if (status) {
  271. rsi_dbg(ERR_ZONE,
  272. "%s: Failed to enable SDIO high speed\n",
  273. __func__);
  274. return -1;
  275. }
  276. }
  277. /* This tells SDIO FIFO when to start read to host */
  278. rsi_dbg(INIT_ZONE, "%s: Initialzing SDIO read start level\n", __func__);
  279. byte = 0x24;
  280. status = rsi_sdio_write_register(adapter,
  281. function,
  282. SDIO_READ_START_LVL,
  283. &byte);
  284. if (status) {
  285. rsi_dbg(ERR_ZONE,
  286. "%s: Failed to write SDIO_READ_START_LVL\n", __func__);
  287. return -1;
  288. }
  289. rsi_dbg(INIT_ZONE, "%s: Initialzing FIFO ctrl registers\n", __func__);
  290. byte = (128 - 32);
  291. status = rsi_sdio_write_register(adapter,
  292. function,
  293. SDIO_READ_FIFO_CTL,
  294. &byte);
  295. if (status) {
  296. rsi_dbg(ERR_ZONE,
  297. "%s: Failed to write SDIO_READ_FIFO_CTL\n", __func__);
  298. return -1;
  299. }
  300. byte = 32;
  301. status = rsi_sdio_write_register(adapter,
  302. function,
  303. SDIO_WRITE_FIFO_CTL,
  304. &byte);
  305. if (status) {
  306. rsi_dbg(ERR_ZONE,
  307. "%s: Failed to write SDIO_WRITE_FIFO_CTL\n", __func__);
  308. return -1;
  309. }
  310. return 0;
  311. }
  312. /**
  313. * rsi_interrupt_handler() - This function read and process SDIO interrupts.
  314. * @adapter: Pointer to the adapter structure.
  315. *
  316. * Return: None.
  317. */
  318. void rsi_interrupt_handler(struct rsi_hw *adapter)
  319. {
  320. struct rsi_common *common = adapter->priv;
  321. struct rsi_91x_sdiodev *dev =
  322. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  323. int status;
  324. enum sdio_interrupt_type isr_type;
  325. u8 isr_status = 0;
  326. u8 fw_status = 0;
  327. dev->rx_info.sdio_int_counter++;
  328. do {
  329. mutex_lock(&common->tx_rxlock);
  330. status = rsi_sdio_read_register(common->priv,
  331. RSI_FN1_INT_REGISTER,
  332. &isr_status);
  333. if (status) {
  334. rsi_dbg(ERR_ZONE,
  335. "%s: Failed to Read Intr Status Register\n",
  336. __func__);
  337. mutex_unlock(&common->tx_rxlock);
  338. return;
  339. }
  340. if (isr_status == 0) {
  341. rsi_set_event(&common->tx_thread.event);
  342. dev->rx_info.sdio_intr_status_zero++;
  343. mutex_unlock(&common->tx_rxlock);
  344. return;
  345. }
  346. rsi_dbg(ISR_ZONE, "%s: Intr_status = %x %d %d\n",
  347. __func__, isr_status, (1 << MSDU_PKT_PENDING),
  348. (1 << FW_ASSERT_IND));
  349. do {
  350. RSI_GET_SDIO_INTERRUPT_TYPE(isr_status, isr_type);
  351. switch (isr_type) {
  352. case BUFFER_AVAILABLE:
  353. dev->rx_info.watch_bufferfull_count = 0;
  354. dev->rx_info.buffer_full = false;
  355. dev->rx_info.semi_buffer_full = false;
  356. dev->rx_info.mgmt_buffer_full = false;
  357. rsi_sdio_ack_intr(common->priv,
  358. (1 << PKT_BUFF_AVAILABLE));
  359. rsi_set_event(&common->tx_thread.event);
  360. rsi_dbg(ISR_ZONE,
  361. "%s: ==> BUFFER_AVAILABLE <==\n",
  362. __func__);
  363. dev->rx_info.buf_available_counter++;
  364. break;
  365. case FIRMWARE_ASSERT_IND:
  366. rsi_dbg(ERR_ZONE,
  367. "%s: ==> FIRMWARE Assert <==\n",
  368. __func__);
  369. status = rsi_sdio_read_register(common->priv,
  370. SDIO_FW_STATUS_REG,
  371. &fw_status);
  372. if (status) {
  373. rsi_dbg(ERR_ZONE,
  374. "%s: Failed to read f/w reg\n",
  375. __func__);
  376. } else {
  377. rsi_dbg(ERR_ZONE,
  378. "%s: Firmware Status is 0x%x\n",
  379. __func__ , fw_status);
  380. rsi_sdio_ack_intr(common->priv,
  381. (1 << FW_ASSERT_IND));
  382. }
  383. common->fsm_state = FSM_CARD_NOT_READY;
  384. break;
  385. case MSDU_PACKET_PENDING:
  386. rsi_dbg(ISR_ZONE, "Pkt pending interrupt\n");
  387. dev->rx_info.total_sdio_msdu_pending_intr++;
  388. status = rsi_process_pkt(common);
  389. if (status) {
  390. rsi_dbg(ERR_ZONE,
  391. "%s: Failed to read pkt\n",
  392. __func__);
  393. mutex_unlock(&common->tx_rxlock);
  394. return;
  395. }
  396. break;
  397. default:
  398. rsi_sdio_ack_intr(common->priv, isr_status);
  399. dev->rx_info.total_sdio_unknown_intr++;
  400. isr_status = 0;
  401. rsi_dbg(ISR_ZONE,
  402. "Unknown Interrupt %x\n",
  403. isr_status);
  404. break;
  405. }
  406. isr_status ^= BIT(isr_type - 1);
  407. } while (isr_status);
  408. mutex_unlock(&common->tx_rxlock);
  409. } while (1);
  410. }
  411. /**
  412. * rsi_device_init() - This Function Initializes The HAL.
  413. * @common: Pointer to the driver private structure.
  414. *
  415. * Return: 0 on success, -1 on failure.
  416. */
  417. int rsi_sdio_device_init(struct rsi_common *common)
  418. {
  419. if (rsi_load_ta_instructions(common))
  420. return -1;
  421. if (rsi_sdio_master_access_msword(common->priv, MISC_CFG_BASE_ADDR)) {
  422. rsi_dbg(ERR_ZONE, "%s: Unable to set ms word reg\n",
  423. __func__);
  424. return -1;
  425. }
  426. rsi_dbg(INIT_ZONE,
  427. "%s: Setting ms word to 0x41050000\n", __func__);
  428. return 0;
  429. }
  430. /**
  431. * rsi_sdio_read_buffer_status_register() - This function is used to the read
  432. * buffer status register and set
  433. * relevant fields in
  434. * rsi_91x_sdiodev struct.
  435. * @adapter: Pointer to the driver hw structure.
  436. * @q_num: The Q number whose status is to be found.
  437. *
  438. * Return: status: -1 on failure or else queue full/stop is indicated.
  439. */
  440. int rsi_sdio_read_buffer_status_register(struct rsi_hw *adapter, u8 q_num)
  441. {
  442. struct rsi_common *common = adapter->priv;
  443. struct rsi_91x_sdiodev *dev =
  444. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  445. u8 buf_status = 0;
  446. int status = 0;
  447. status = rsi_sdio_read_register(common->priv,
  448. RSI_DEVICE_BUFFER_STATUS_REGISTER,
  449. &buf_status);
  450. if (status) {
  451. rsi_dbg(ERR_ZONE,
  452. "%s: Failed to read status register\n", __func__);
  453. return -1;
  454. }
  455. if (buf_status & (BIT(PKT_MGMT_BUFF_FULL))) {
  456. if (!dev->rx_info.mgmt_buffer_full)
  457. dev->rx_info.mgmt_buf_full_counter++;
  458. dev->rx_info.mgmt_buffer_full = true;
  459. } else {
  460. dev->rx_info.mgmt_buffer_full = false;
  461. }
  462. if (buf_status & (BIT(PKT_BUFF_FULL))) {
  463. if (!dev->rx_info.buffer_full)
  464. dev->rx_info.buf_full_counter++;
  465. dev->rx_info.buffer_full = true;
  466. } else {
  467. dev->rx_info.buffer_full = false;
  468. }
  469. if (buf_status & (BIT(PKT_BUFF_SEMI_FULL))) {
  470. if (!dev->rx_info.semi_buffer_full)
  471. dev->rx_info.buf_semi_full_counter++;
  472. dev->rx_info.semi_buffer_full = true;
  473. } else {
  474. dev->rx_info.semi_buffer_full = false;
  475. }
  476. if ((q_num == MGMT_SOFT_Q) && (dev->rx_info.mgmt_buffer_full))
  477. return QUEUE_FULL;
  478. if (dev->rx_info.buffer_full)
  479. return QUEUE_FULL;
  480. return QUEUE_NOT_FULL;
  481. }
  482. /**
  483. * rsi_sdio_determine_event_timeout() - This Function determines the event
  484. * timeout duration.
  485. * @adapter: Pointer to the adapter structure.
  486. *
  487. * Return: timeout duration is returned.
  488. */
  489. int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter)
  490. {
  491. struct rsi_91x_sdiodev *dev =
  492. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  493. /* Once buffer full is seen, event timeout to occur every 2 msecs */
  494. if (dev->rx_info.buffer_full)
  495. return 2;
  496. return EVENT_WAIT_FOREVER;
  497. }