fw.c 24 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  23. * USA
  24. *
  25. * The full GNU General Public License is included in this distribution
  26. * in the file called COPYING.
  27. *
  28. * Contact Information:
  29. * Intel Linux Wireless <ilw@linux.intel.com>
  30. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  31. *
  32. * BSD LICENSE
  33. *
  34. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  35. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  36. * All rights reserved.
  37. *
  38. * Redistribution and use in source and binary forms, with or without
  39. * modification, are permitted provided that the following conditions
  40. * are met:
  41. *
  42. * * Redistributions of source code must retain the above copyright
  43. * notice, this list of conditions and the following disclaimer.
  44. * * Redistributions in binary form must reproduce the above copyright
  45. * notice, this list of conditions and the following disclaimer in
  46. * the documentation and/or other materials provided with the
  47. * distribution.
  48. * * Neither the name Intel Corporation nor the names of its
  49. * contributors may be used to endorse or promote products derived
  50. * from this software without specific prior written permission.
  51. *
  52. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  53. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  54. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  55. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  56. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  57. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  58. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  59. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  60. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  61. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  62. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  63. *
  64. *****************************************************************************/
  65. #include <net/mac80211.h>
  66. #include "iwl-trans.h"
  67. #include "iwl-op-mode.h"
  68. #include "iwl-fw.h"
  69. #include "iwl-debug.h"
  70. #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
  71. #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
  72. #include "iwl-prph.h"
  73. #include "iwl-eeprom-parse.h"
  74. #include "mvm.h"
  75. #include "iwl-phy-db.h"
  76. #define MVM_UCODE_ALIVE_TIMEOUT HZ
  77. #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
  78. #define UCODE_VALID_OK cpu_to_le32(0x1)
  79. struct iwl_mvm_alive_data {
  80. bool valid;
  81. u32 scd_base_addr;
  82. };
  83. static inline const struct fw_img *
  84. iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
  85. {
  86. if (ucode_type >= IWL_UCODE_TYPE_MAX)
  87. return NULL;
  88. return &mvm->fw->img[ucode_type];
  89. }
  90. static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
  91. {
  92. struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
  93. .valid = cpu_to_le32(valid_tx_ant),
  94. };
  95. IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
  96. return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
  97. sizeof(tx_ant_cmd), &tx_ant_cmd);
  98. }
  99. static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
  100. struct iwl_rx_packet *pkt, void *data)
  101. {
  102. struct iwl_mvm *mvm =
  103. container_of(notif_wait, struct iwl_mvm, notif_wait);
  104. struct iwl_mvm_alive_data *alive_data = data;
  105. struct mvm_alive_resp_ver1 *palive1;
  106. struct mvm_alive_resp_ver2 *palive2;
  107. struct mvm_alive_resp *palive;
  108. if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
  109. palive1 = (void *)pkt->data;
  110. mvm->support_umac_log = false;
  111. mvm->error_event_table =
  112. le32_to_cpu(palive1->error_event_table_ptr);
  113. mvm->log_event_table =
  114. le32_to_cpu(palive1->log_event_table_ptr);
  115. alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr);
  116. alive_data->valid = le16_to_cpu(palive1->status) ==
  117. IWL_ALIVE_STATUS_OK;
  118. IWL_DEBUG_FW(mvm,
  119. "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
  120. le16_to_cpu(palive1->status), palive1->ver_type,
  121. palive1->ver_subtype, palive1->flags);
  122. } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
  123. palive2 = (void *)pkt->data;
  124. mvm->error_event_table =
  125. le32_to_cpu(palive2->error_event_table_ptr);
  126. mvm->log_event_table =
  127. le32_to_cpu(palive2->log_event_table_ptr);
  128. alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
  129. mvm->umac_error_event_table =
  130. le32_to_cpu(palive2->error_info_addr);
  131. mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
  132. mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
  133. alive_data->valid = le16_to_cpu(palive2->status) ==
  134. IWL_ALIVE_STATUS_OK;
  135. if (mvm->umac_error_event_table)
  136. mvm->support_umac_log = true;
  137. IWL_DEBUG_FW(mvm,
  138. "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
  139. le16_to_cpu(palive2->status), palive2->ver_type,
  140. palive2->ver_subtype, palive2->flags);
  141. IWL_DEBUG_FW(mvm,
  142. "UMAC version: Major - 0x%x, Minor - 0x%x\n",
  143. palive2->umac_major, palive2->umac_minor);
  144. } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
  145. palive = (void *)pkt->data;
  146. mvm->error_event_table =
  147. le32_to_cpu(palive->error_event_table_ptr);
  148. mvm->log_event_table =
  149. le32_to_cpu(palive->log_event_table_ptr);
  150. alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
  151. mvm->umac_error_event_table =
  152. le32_to_cpu(palive->error_info_addr);
  153. mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr);
  154. mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size);
  155. alive_data->valid = le16_to_cpu(palive->status) ==
  156. IWL_ALIVE_STATUS_OK;
  157. if (mvm->umac_error_event_table)
  158. mvm->support_umac_log = true;
  159. IWL_DEBUG_FW(mvm,
  160. "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
  161. le16_to_cpu(palive->status), palive->ver_type,
  162. palive->ver_subtype, palive->flags);
  163. IWL_DEBUG_FW(mvm,
  164. "UMAC version: Major - 0x%x, Minor - 0x%x\n",
  165. le32_to_cpu(palive->umac_major),
  166. le32_to_cpu(palive->umac_minor));
  167. }
  168. return true;
  169. }
  170. static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
  171. struct iwl_rx_packet *pkt, void *data)
  172. {
  173. struct iwl_phy_db *phy_db = data;
  174. if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
  175. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  176. return true;
  177. }
  178. WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC));
  179. return false;
  180. }
  181. static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
  182. enum iwl_ucode_type ucode_type)
  183. {
  184. struct iwl_notification_wait alive_wait;
  185. struct iwl_mvm_alive_data alive_data;
  186. const struct fw_img *fw;
  187. int ret, i;
  188. enum iwl_ucode_type old_type = mvm->cur_ucode;
  189. static const u8 alive_cmd[] = { MVM_ALIVE };
  190. struct iwl_sf_region st_fwrd_space;
  191. if (ucode_type == IWL_UCODE_REGULAR &&
  192. iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE))
  193. fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER);
  194. else
  195. fw = iwl_get_ucode_image(mvm, ucode_type);
  196. if (WARN_ON(!fw))
  197. return -EINVAL;
  198. mvm->cur_ucode = ucode_type;
  199. mvm->ucode_loaded = false;
  200. iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
  201. alive_cmd, ARRAY_SIZE(alive_cmd),
  202. iwl_alive_fn, &alive_data);
  203. ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
  204. if (ret) {
  205. mvm->cur_ucode = old_type;
  206. iwl_remove_notification(&mvm->notif_wait, &alive_wait);
  207. return ret;
  208. }
  209. /*
  210. * Some things may run in the background now, but we
  211. * just wait for the ALIVE notification here.
  212. */
  213. ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
  214. MVM_UCODE_ALIVE_TIMEOUT);
  215. if (ret) {
  216. mvm->cur_ucode = old_type;
  217. return ret;
  218. }
  219. if (!alive_data.valid) {
  220. IWL_ERR(mvm, "Loaded ucode is not valid!\n");
  221. mvm->cur_ucode = old_type;
  222. return -EIO;
  223. }
  224. /*
  225. * update the sdio allocation according to the pointer we get in the
  226. * alive notification.
  227. */
  228. st_fwrd_space.addr = mvm->sf_space.addr;
  229. st_fwrd_space.size = mvm->sf_space.size;
  230. ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
  231. if (ret) {
  232. IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
  233. return ret;
  234. }
  235. iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
  236. /*
  237. * Note: all the queues are enabled as part of the interface
  238. * initialization, but in firmware restart scenarios they
  239. * could be stopped, so wake them up. In firmware restart,
  240. * mac80211 will have the queues stopped as well until the
  241. * reconfiguration completes. During normal startup, they
  242. * will be empty.
  243. */
  244. for (i = 0; i < IWL_MAX_HW_QUEUES; i++) {
  245. if (i < mvm->first_agg_queue && i != IWL_MVM_CMD_QUEUE)
  246. mvm->queue_to_mac80211[i] = i;
  247. else
  248. mvm->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;
  249. }
  250. for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
  251. atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
  252. mvm->ucode_loaded = true;
  253. return 0;
  254. }
  255. static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
  256. {
  257. struct iwl_phy_cfg_cmd phy_cfg_cmd;
  258. enum iwl_ucode_type ucode_type = mvm->cur_ucode;
  259. /* Set parameters */
  260. phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
  261. phy_cfg_cmd.calib_control.event_trigger =
  262. mvm->fw->default_calib[ucode_type].event_trigger;
  263. phy_cfg_cmd.calib_control.flow_trigger =
  264. mvm->fw->default_calib[ucode_type].flow_trigger;
  265. IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
  266. phy_cfg_cmd.phy_cfg);
  267. return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
  268. sizeof(phy_cfg_cmd), &phy_cfg_cmd);
  269. }
  270. int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  271. {
  272. struct iwl_notification_wait calib_wait;
  273. static const u8 init_complete[] = {
  274. INIT_COMPLETE_NOTIF,
  275. CALIB_RES_NOTIF_PHY_DB
  276. };
  277. int ret;
  278. lockdep_assert_held(&mvm->mutex);
  279. if (WARN_ON_ONCE(mvm->calibrating))
  280. return 0;
  281. iwl_init_notification_wait(&mvm->notif_wait,
  282. &calib_wait,
  283. init_complete,
  284. ARRAY_SIZE(init_complete),
  285. iwl_wait_phy_db_entry,
  286. mvm->phy_db);
  287. /* Will also start the device */
  288. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
  289. if (ret) {
  290. IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
  291. goto error;
  292. }
  293. ret = iwl_send_bt_init_conf(mvm);
  294. if (ret)
  295. goto error;
  296. /* Read the NVM only at driver load time, no need to do this twice */
  297. if (read_nvm) {
  298. /* Read nvm */
  299. ret = iwl_nvm_init(mvm, true);
  300. if (ret) {
  301. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  302. goto error;
  303. }
  304. }
  305. /* In case we read the NVM from external file, load it to the NIC */
  306. if (mvm->nvm_file_name)
  307. iwl_mvm_load_nvm_to_nic(mvm);
  308. ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
  309. WARN_ON(ret);
  310. /*
  311. * abort after reading the nvm in case RF Kill is on, we will complete
  312. * the init seq later when RF kill will switch to off
  313. */
  314. if (iwl_mvm_is_radio_killed(mvm)) {
  315. IWL_DEBUG_RF_KILL(mvm,
  316. "jump over all phy activities due to RF kill\n");
  317. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  318. ret = 1;
  319. goto out;
  320. }
  321. mvm->calibrating = true;
  322. /* Send TX valid antennas before triggering calibrations */
  323. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  324. if (ret)
  325. goto error;
  326. /*
  327. * Send phy configurations command to init uCode
  328. * to start the 16.0 uCode init image internal calibrations.
  329. */
  330. ret = iwl_send_phy_cfg_cmd(mvm);
  331. if (ret) {
  332. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  333. ret);
  334. goto error;
  335. }
  336. /*
  337. * Some things may run in the background now, but we
  338. * just wait for the calibration complete notification.
  339. */
  340. ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
  341. MVM_UCODE_CALIB_TIMEOUT);
  342. if (ret && iwl_mvm_is_radio_killed(mvm)) {
  343. IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
  344. ret = 1;
  345. }
  346. goto out;
  347. error:
  348. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  349. out:
  350. mvm->calibrating = false;
  351. if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
  352. /* we want to debug INIT and we have no NVM - fake */
  353. mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
  354. sizeof(struct ieee80211_channel) +
  355. sizeof(struct ieee80211_rate),
  356. GFP_KERNEL);
  357. if (!mvm->nvm_data)
  358. return -ENOMEM;
  359. mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
  360. mvm->nvm_data->bands[0].n_channels = 1;
  361. mvm->nvm_data->bands[0].n_bitrates = 1;
  362. mvm->nvm_data->bands[0].bitrates =
  363. (void *)mvm->nvm_data->channels + 1;
  364. mvm->nvm_data->bands[0].bitrates->hw_value = 10;
  365. }
  366. return ret;
  367. }
  368. static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
  369. {
  370. struct iwl_host_cmd cmd = {
  371. .id = SHARED_MEM_CFG,
  372. .flags = CMD_WANT_SKB,
  373. .data = { NULL, },
  374. .len = { 0, },
  375. };
  376. struct iwl_rx_packet *pkt;
  377. struct iwl_shared_mem_cfg *mem_cfg;
  378. u32 i;
  379. lockdep_assert_held(&mvm->mutex);
  380. if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
  381. return;
  382. pkt = cmd.resp_pkt;
  383. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  384. IWL_ERR(mvm, "Bad return from SHARED_MEM_CFG (0x%08X)\n",
  385. pkt->hdr.flags);
  386. goto exit;
  387. }
  388. mem_cfg = (void *)pkt->data;
  389. mvm->shared_mem_cfg.shared_mem_addr =
  390. le32_to_cpu(mem_cfg->shared_mem_addr);
  391. mvm->shared_mem_cfg.shared_mem_size =
  392. le32_to_cpu(mem_cfg->shared_mem_size);
  393. mvm->shared_mem_cfg.sample_buff_addr =
  394. le32_to_cpu(mem_cfg->sample_buff_addr);
  395. mvm->shared_mem_cfg.sample_buff_size =
  396. le32_to_cpu(mem_cfg->sample_buff_size);
  397. mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr);
  398. for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++)
  399. mvm->shared_mem_cfg.txfifo_size[i] =
  400. le32_to_cpu(mem_cfg->txfifo_size[i]);
  401. for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
  402. mvm->shared_mem_cfg.rxfifo_size[i] =
  403. le32_to_cpu(mem_cfg->rxfifo_size[i]);
  404. mvm->shared_mem_cfg.page_buff_addr =
  405. le32_to_cpu(mem_cfg->page_buff_addr);
  406. mvm->shared_mem_cfg.page_buff_size =
  407. le32_to_cpu(mem_cfg->page_buff_size);
  408. IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
  409. exit:
  410. iwl_free_resp(&cmd);
  411. }
  412. int iwl_mvm_fw_dbg_collect_desc(struct iwl_mvm *mvm,
  413. struct iwl_mvm_dump_desc *desc,
  414. unsigned int delay)
  415. {
  416. if (test_and_set_bit(IWL_MVM_STATUS_DUMPING_FW_LOG, &mvm->status))
  417. return -EBUSY;
  418. if (WARN_ON(mvm->fw_dump_desc))
  419. iwl_mvm_free_fw_dump_desc(mvm);
  420. IWL_WARN(mvm, "Collecting data: trigger %d fired.\n",
  421. le32_to_cpu(desc->trig_desc.type));
  422. mvm->fw_dump_desc = desc;
  423. queue_delayed_work(system_wq, &mvm->fw_dump_wk, delay);
  424. return 0;
  425. }
  426. int iwl_mvm_fw_dbg_collect(struct iwl_mvm *mvm, enum iwl_fw_dbg_trigger trig,
  427. const char *str, size_t len, unsigned int delay)
  428. {
  429. struct iwl_mvm_dump_desc *desc;
  430. desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC);
  431. if (!desc)
  432. return -ENOMEM;
  433. desc->len = len;
  434. desc->trig_desc.type = cpu_to_le32(trig);
  435. memcpy(desc->trig_desc.data, str, len);
  436. return iwl_mvm_fw_dbg_collect_desc(mvm, desc, delay);
  437. }
  438. int iwl_mvm_fw_dbg_collect_trig(struct iwl_mvm *mvm,
  439. struct iwl_fw_dbg_trigger_tlv *trigger,
  440. const char *fmt, ...)
  441. {
  442. unsigned int delay = msecs_to_jiffies(le32_to_cpu(trigger->stop_delay));
  443. u16 occurrences = le16_to_cpu(trigger->occurrences);
  444. int ret, len = 0;
  445. char buf[64];
  446. if (!occurrences)
  447. return 0;
  448. if (fmt) {
  449. va_list ap;
  450. buf[sizeof(buf) - 1] = '\0';
  451. va_start(ap, fmt);
  452. vsnprintf(buf, sizeof(buf), fmt, ap);
  453. va_end(ap);
  454. /* check for truncation */
  455. if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
  456. buf[sizeof(buf) - 1] = '\0';
  457. len = strlen(buf) + 1;
  458. }
  459. ret = iwl_mvm_fw_dbg_collect(mvm, le32_to_cpu(trigger->id), buf,
  460. len, delay);
  461. if (ret)
  462. return ret;
  463. trigger->occurrences = cpu_to_le16(occurrences - 1);
  464. return 0;
  465. }
  466. static inline void iwl_mvm_restart_early_start(struct iwl_mvm *mvm)
  467. {
  468. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000)
  469. iwl_clear_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100);
  470. else
  471. iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 1);
  472. }
  473. int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, u8 conf_id)
  474. {
  475. u8 *ptr;
  476. int ret;
  477. int i;
  478. if (WARN_ONCE(conf_id >= ARRAY_SIZE(mvm->fw->dbg_conf_tlv),
  479. "Invalid configuration %d\n", conf_id))
  480. return -EINVAL;
  481. /* EARLY START - firmware's configuration is hard coded */
  482. if ((!mvm->fw->dbg_conf_tlv[conf_id] ||
  483. !mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds) &&
  484. conf_id == FW_DBG_START_FROM_ALIVE) {
  485. iwl_mvm_restart_early_start(mvm);
  486. return 0;
  487. }
  488. if (!mvm->fw->dbg_conf_tlv[conf_id])
  489. return -EINVAL;
  490. if (mvm->fw_dbg_conf != FW_DBG_INVALID)
  491. IWL_WARN(mvm, "FW already configured (%d) - re-configuring\n",
  492. mvm->fw_dbg_conf);
  493. /* Send all HCMDs for configuring the FW debug */
  494. ptr = (void *)&mvm->fw->dbg_conf_tlv[conf_id]->hcmd;
  495. for (i = 0; i < mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) {
  496. struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
  497. ret = iwl_mvm_send_cmd_pdu(mvm, cmd->id, 0,
  498. le16_to_cpu(cmd->len), cmd->data);
  499. if (ret)
  500. return ret;
  501. ptr += sizeof(*cmd);
  502. ptr += le16_to_cpu(cmd->len);
  503. }
  504. mvm->fw_dbg_conf = conf_id;
  505. return ret;
  506. }
  507. static int iwl_mvm_config_ltr_v1(struct iwl_mvm *mvm)
  508. {
  509. struct iwl_ltr_config_cmd_v1 cmd_v1 = {
  510. .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
  511. };
  512. if (!mvm->trans->ltr_enabled)
  513. return 0;
  514. return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
  515. sizeof(cmd_v1), &cmd_v1);
  516. }
  517. static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
  518. {
  519. struct iwl_ltr_config_cmd cmd = {
  520. .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
  521. };
  522. if (!mvm->trans->ltr_enabled)
  523. return 0;
  524. if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_HDC_PHASE_0))
  525. return iwl_mvm_config_ltr_v1(mvm);
  526. return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
  527. sizeof(cmd), &cmd);
  528. }
  529. int iwl_mvm_up(struct iwl_mvm *mvm)
  530. {
  531. int ret, i;
  532. struct ieee80211_channel *chan;
  533. struct cfg80211_chan_def chandef;
  534. lockdep_assert_held(&mvm->mutex);
  535. ret = iwl_trans_start_hw(mvm->trans);
  536. if (ret)
  537. return ret;
  538. /*
  539. * If we haven't completed the run of the init ucode during
  540. * module loading, load init ucode now
  541. * (for example, if we were in RFKILL)
  542. */
  543. ret = iwl_run_init_mvm_ucode(mvm, false);
  544. if (ret && !iwlmvm_mod_params.init_dbg) {
  545. IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
  546. /* this can't happen */
  547. if (WARN_ON(ret > 0))
  548. ret = -ERFKILL;
  549. goto error;
  550. }
  551. if (!iwlmvm_mod_params.init_dbg) {
  552. /*
  553. * Stop and start the transport without entering low power
  554. * mode. This will save the state of other components on the
  555. * device that are triggered by the INIT firwmare (MFUART).
  556. */
  557. _iwl_trans_stop_device(mvm->trans, false);
  558. _iwl_trans_start_hw(mvm->trans, false);
  559. if (ret)
  560. return ret;
  561. }
  562. if (iwlmvm_mod_params.init_dbg)
  563. return 0;
  564. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  565. if (ret) {
  566. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  567. goto error;
  568. }
  569. if (IWL_UCODE_API(mvm->fw->ucode_ver) >= 10)
  570. iwl_mvm_get_shared_mem_conf(mvm);
  571. ret = iwl_mvm_sf_update(mvm, NULL, false);
  572. if (ret)
  573. IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
  574. mvm->fw_dbg_conf = FW_DBG_INVALID;
  575. /* if we have a destination, assume EARLY START */
  576. if (mvm->fw->dbg_dest_tlv)
  577. mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
  578. iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
  579. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  580. if (ret)
  581. goto error;
  582. ret = iwl_send_bt_init_conf(mvm);
  583. if (ret)
  584. goto error;
  585. /* Send phy db control command and then phy db calibration*/
  586. ret = iwl_send_phy_db_data(mvm->phy_db);
  587. if (ret)
  588. goto error;
  589. ret = iwl_send_phy_cfg_cmd(mvm);
  590. if (ret)
  591. goto error;
  592. /* init the fw <-> mac80211 STA mapping */
  593. for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
  594. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  595. mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
  596. /* reset quota debouncing buffer - 0xff will yield invalid data */
  597. memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
  598. /* Add auxiliary station for scanning */
  599. ret = iwl_mvm_add_aux_sta(mvm);
  600. if (ret)
  601. goto error;
  602. /* Add all the PHY contexts */
  603. chan = &mvm->hw->wiphy->bands[IEEE80211_BAND_2GHZ]->channels[0];
  604. cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
  605. for (i = 0; i < NUM_PHY_CTX; i++) {
  606. /*
  607. * The channel used here isn't relevant as it's
  608. * going to be overwritten in the other flows.
  609. * For now use the first channel we have.
  610. */
  611. ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
  612. &chandef, 1, 1);
  613. if (ret)
  614. goto error;
  615. }
  616. /* Initialize tx backoffs to the minimal possible */
  617. iwl_mvm_tt_tx_backoff(mvm, 0);
  618. WARN_ON(iwl_mvm_config_ltr(mvm));
  619. ret = iwl_mvm_power_update_device(mvm);
  620. if (ret)
  621. goto error;
  622. /*
  623. * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
  624. * anyway, so don't init MCC.
  625. */
  626. if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
  627. ret = iwl_mvm_init_mcc(mvm);
  628. if (ret)
  629. goto error;
  630. }
  631. if (mvm->fw->ucode_capa.capa[0] & IWL_UCODE_TLV_CAPA_UMAC_SCAN) {
  632. ret = iwl_mvm_config_scan(mvm);
  633. if (ret)
  634. goto error;
  635. }
  636. /* allow FW/transport low power modes if not during restart */
  637. if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
  638. iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
  639. IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
  640. return 0;
  641. error:
  642. iwl_trans_stop_device(mvm->trans);
  643. return ret;
  644. }
  645. int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
  646. {
  647. int ret, i;
  648. lockdep_assert_held(&mvm->mutex);
  649. ret = iwl_trans_start_hw(mvm->trans);
  650. if (ret)
  651. return ret;
  652. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
  653. if (ret) {
  654. IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
  655. goto error;
  656. }
  657. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  658. if (ret)
  659. goto error;
  660. /* Send phy db control command and then phy db calibration*/
  661. ret = iwl_send_phy_db_data(mvm->phy_db);
  662. if (ret)
  663. goto error;
  664. ret = iwl_send_phy_cfg_cmd(mvm);
  665. if (ret)
  666. goto error;
  667. /* init the fw <-> mac80211 STA mapping */
  668. for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
  669. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  670. /* Add auxiliary station for scanning */
  671. ret = iwl_mvm_add_aux_sta(mvm);
  672. if (ret)
  673. goto error;
  674. return 0;
  675. error:
  676. iwl_trans_stop_device(mvm->trans);
  677. return ret;
  678. }
  679. int iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
  680. struct iwl_rx_cmd_buffer *rxb,
  681. struct iwl_device_cmd *cmd)
  682. {
  683. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  684. struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
  685. u32 flags = le32_to_cpu(card_state_notif->flags);
  686. IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
  687. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  688. (flags & SW_CARD_DISABLED) ? "Kill" : "On",
  689. (flags & CT_KILL_CARD_DISABLED) ?
  690. "Reached" : "Not reached");
  691. return 0;
  692. }
  693. int iwl_mvm_rx_radio_ver(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb,
  694. struct iwl_device_cmd *cmd)
  695. {
  696. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  697. struct iwl_radio_version_notif *radio_version = (void *)pkt->data;
  698. /* TODO: what to do with that? */
  699. IWL_DEBUG_INFO(mvm,
  700. "Radio version: flavor: 0x%08x, step 0x%08x, dash 0x%08x\n",
  701. le32_to_cpu(radio_version->radio_flavor),
  702. le32_to_cpu(radio_version->radio_step),
  703. le32_to_cpu(radio_version->radio_dash));
  704. return 0;
  705. }
  706. int iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
  707. struct iwl_rx_cmd_buffer *rxb,
  708. struct iwl_device_cmd *cmd)
  709. {
  710. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  711. struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
  712. IWL_DEBUG_INFO(mvm,
  713. "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
  714. le32_to_cpu(mfuart_notif->installed_ver),
  715. le32_to_cpu(mfuart_notif->external_ver),
  716. le32_to_cpu(mfuart_notif->status),
  717. le32_to_cpu(mfuart_notif->duration));
  718. return 0;
  719. }