core.c 34 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include <linux/of.h>
  20. #include "core.h"
  21. #include "mac.h"
  22. #include "htc.h"
  23. #include "hif.h"
  24. #include "wmi.h"
  25. #include "bmi.h"
  26. #include "debug.h"
  27. #include "htt.h"
  28. #include "testmode.h"
  29. #include "wmi-ops.h"
  30. unsigned int ath10k_debug_mask;
  31. static bool uart_print;
  32. static bool skip_otp;
  33. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  34. module_param(uart_print, bool, 0644);
  35. module_param(skip_otp, bool, 0644);
  36. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  37. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  38. MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  39. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  40. {
  41. .id = QCA988X_HW_2_0_VERSION,
  42. .name = "qca988x hw2.0",
  43. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  44. .uart_pin = 7,
  45. .fw = {
  46. .dir = QCA988X_HW_2_0_FW_DIR,
  47. .fw = QCA988X_HW_2_0_FW_FILE,
  48. .otp = QCA988X_HW_2_0_OTP_FILE,
  49. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  50. .board_size = QCA988X_BOARD_DATA_SZ,
  51. .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  52. },
  53. },
  54. {
  55. .id = QCA6174_HW_2_1_VERSION,
  56. .name = "qca6174 hw2.1",
  57. .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  58. .uart_pin = 6,
  59. .fw = {
  60. .dir = QCA6174_HW_2_1_FW_DIR,
  61. .fw = QCA6174_HW_2_1_FW_FILE,
  62. .otp = QCA6174_HW_2_1_OTP_FILE,
  63. .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
  64. .board_size = QCA6174_BOARD_DATA_SZ,
  65. .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  66. },
  67. },
  68. {
  69. .id = QCA6174_HW_3_0_VERSION,
  70. .name = "qca6174 hw3.0",
  71. .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  72. .uart_pin = 6,
  73. .fw = {
  74. .dir = QCA6174_HW_3_0_FW_DIR,
  75. .fw = QCA6174_HW_3_0_FW_FILE,
  76. .otp = QCA6174_HW_3_0_OTP_FILE,
  77. .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
  78. .board_size = QCA6174_BOARD_DATA_SZ,
  79. .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  80. },
  81. },
  82. {
  83. .id = QCA6174_HW_3_2_VERSION,
  84. .name = "qca6174 hw3.2",
  85. .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
  86. .uart_pin = 6,
  87. .fw = {
  88. /* uses same binaries as hw3.0 */
  89. .dir = QCA6174_HW_3_0_FW_DIR,
  90. .fw = QCA6174_HW_3_0_FW_FILE,
  91. .otp = QCA6174_HW_3_0_OTP_FILE,
  92. .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
  93. .board_size = QCA6174_BOARD_DATA_SZ,
  94. .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
  95. },
  96. },
  97. };
  98. static void ath10k_send_suspend_complete(struct ath10k *ar)
  99. {
  100. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
  101. complete(&ar->target_suspend);
  102. }
  103. static int ath10k_init_configure_target(struct ath10k *ar)
  104. {
  105. u32 param_host;
  106. int ret;
  107. /* tell target which HTC version it is used*/
  108. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  109. HTC_PROTOCOL_VERSION);
  110. if (ret) {
  111. ath10k_err(ar, "settings HTC version failed\n");
  112. return ret;
  113. }
  114. /* set the firmware mode to STA/IBSS/AP */
  115. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  116. if (ret) {
  117. ath10k_err(ar, "setting firmware mode (1/2) failed\n");
  118. return ret;
  119. }
  120. /* TODO following parameters need to be re-visited. */
  121. /* num_device */
  122. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  123. /* Firmware mode */
  124. /* FIXME: Why FW_MODE_AP ??.*/
  125. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  126. /* mac_addr_method */
  127. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  128. /* firmware_bridge */
  129. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  130. /* fwsubmode */
  131. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  132. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  133. if (ret) {
  134. ath10k_err(ar, "setting firmware mode (2/2) failed\n");
  135. return ret;
  136. }
  137. /* We do all byte-swapping on the host */
  138. ret = ath10k_bmi_write32(ar, hi_be, 0);
  139. if (ret) {
  140. ath10k_err(ar, "setting host CPU BE mode failed\n");
  141. return ret;
  142. }
  143. /* FW descriptor/Data swap flags */
  144. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  145. if (ret) {
  146. ath10k_err(ar, "setting FW data/desc swap flags failed\n");
  147. return ret;
  148. }
  149. return 0;
  150. }
  151. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  152. const char *dir,
  153. const char *file)
  154. {
  155. char filename[100];
  156. const struct firmware *fw;
  157. int ret;
  158. if (file == NULL)
  159. return ERR_PTR(-ENOENT);
  160. if (dir == NULL)
  161. dir = ".";
  162. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  163. ret = request_firmware(&fw, filename, ar->dev);
  164. if (ret)
  165. return ERR_PTR(ret);
  166. return fw;
  167. }
  168. static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
  169. size_t data_len)
  170. {
  171. u32 board_data_size = ar->hw_params.fw.board_size;
  172. u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
  173. u32 board_ext_data_addr;
  174. int ret;
  175. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  176. if (ret) {
  177. ath10k_err(ar, "could not read board ext data addr (%d)\n",
  178. ret);
  179. return ret;
  180. }
  181. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  182. "boot push board extended data addr 0x%x\n",
  183. board_ext_data_addr);
  184. if (board_ext_data_addr == 0)
  185. return 0;
  186. if (data_len != (board_data_size + board_ext_data_size)) {
  187. ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
  188. data_len, board_data_size, board_ext_data_size);
  189. return -EINVAL;
  190. }
  191. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  192. data + board_data_size,
  193. board_ext_data_size);
  194. if (ret) {
  195. ath10k_err(ar, "could not write board ext data (%d)\n", ret);
  196. return ret;
  197. }
  198. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  199. (board_ext_data_size << 16) | 1);
  200. if (ret) {
  201. ath10k_err(ar, "could not write board ext data bit (%d)\n",
  202. ret);
  203. return ret;
  204. }
  205. return 0;
  206. }
  207. static int ath10k_download_board_data(struct ath10k *ar, const void *data,
  208. size_t data_len)
  209. {
  210. u32 board_data_size = ar->hw_params.fw.board_size;
  211. u32 address;
  212. int ret;
  213. ret = ath10k_push_board_ext_data(ar, data, data_len);
  214. if (ret) {
  215. ath10k_err(ar, "could not push board ext data (%d)\n", ret);
  216. goto exit;
  217. }
  218. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  219. if (ret) {
  220. ath10k_err(ar, "could not read board data addr (%d)\n", ret);
  221. goto exit;
  222. }
  223. ret = ath10k_bmi_write_memory(ar, address, data,
  224. min_t(u32, board_data_size,
  225. data_len));
  226. if (ret) {
  227. ath10k_err(ar, "could not write board data (%d)\n", ret);
  228. goto exit;
  229. }
  230. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  231. if (ret) {
  232. ath10k_err(ar, "could not write board data bit (%d)\n", ret);
  233. goto exit;
  234. }
  235. exit:
  236. return ret;
  237. }
  238. static int ath10k_download_cal_file(struct ath10k *ar)
  239. {
  240. int ret;
  241. if (!ar->cal_file)
  242. return -ENOENT;
  243. if (IS_ERR(ar->cal_file))
  244. return PTR_ERR(ar->cal_file);
  245. ret = ath10k_download_board_data(ar, ar->cal_file->data,
  246. ar->cal_file->size);
  247. if (ret) {
  248. ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
  249. return ret;
  250. }
  251. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
  252. return 0;
  253. }
  254. static int ath10k_download_cal_dt(struct ath10k *ar)
  255. {
  256. struct device_node *node;
  257. int data_len;
  258. void *data;
  259. int ret;
  260. node = ar->dev->of_node;
  261. if (!node)
  262. /* Device Tree is optional, don't print any warnings if
  263. * there's no node for ath10k.
  264. */
  265. return -ENOENT;
  266. if (!of_get_property(node, "qcom,ath10k-calibration-data",
  267. &data_len)) {
  268. /* The calibration data node is optional */
  269. return -ENOENT;
  270. }
  271. if (data_len != QCA988X_CAL_DATA_LEN) {
  272. ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
  273. data_len);
  274. ret = -EMSGSIZE;
  275. goto out;
  276. }
  277. data = kmalloc(data_len, GFP_KERNEL);
  278. if (!data) {
  279. ret = -ENOMEM;
  280. goto out;
  281. }
  282. ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data",
  283. data, data_len);
  284. if (ret) {
  285. ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
  286. ret);
  287. goto out_free;
  288. }
  289. ret = ath10k_download_board_data(ar, data, data_len);
  290. if (ret) {
  291. ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
  292. ret);
  293. goto out_free;
  294. }
  295. ret = 0;
  296. out_free:
  297. kfree(data);
  298. out:
  299. return ret;
  300. }
  301. static int ath10k_download_and_run_otp(struct ath10k *ar)
  302. {
  303. u32 result, address = ar->hw_params.patch_load_addr;
  304. int ret;
  305. ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
  306. if (ret) {
  307. ath10k_err(ar, "failed to download board data: %d\n", ret);
  308. return ret;
  309. }
  310. /* OTP is optional */
  311. if (!ar->otp_data || !ar->otp_len) {
  312. ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
  313. ar->otp_data, ar->otp_len);
  314. return 0;
  315. }
  316. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
  317. address, ar->otp_len);
  318. ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
  319. if (ret) {
  320. ath10k_err(ar, "could not write otp (%d)\n", ret);
  321. return ret;
  322. }
  323. ret = ath10k_bmi_execute(ar, address, 0, &result);
  324. if (ret) {
  325. ath10k_err(ar, "could not execute otp (%d)\n", ret);
  326. return ret;
  327. }
  328. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
  329. if (!skip_otp && result != 0) {
  330. ath10k_err(ar, "otp calibration failed: %d", result);
  331. return -EINVAL;
  332. }
  333. return 0;
  334. }
  335. static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
  336. {
  337. u32 address, data_len;
  338. const char *mode_name;
  339. const void *data;
  340. int ret;
  341. address = ar->hw_params.patch_load_addr;
  342. switch (mode) {
  343. case ATH10K_FIRMWARE_MODE_NORMAL:
  344. data = ar->firmware_data;
  345. data_len = ar->firmware_len;
  346. mode_name = "normal";
  347. break;
  348. case ATH10K_FIRMWARE_MODE_UTF:
  349. data = ar->testmode.utf->data;
  350. data_len = ar->testmode.utf->size;
  351. mode_name = "utf";
  352. break;
  353. default:
  354. ath10k_err(ar, "unknown firmware mode: %d\n", mode);
  355. return -EINVAL;
  356. }
  357. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  358. "boot uploading firmware image %p len %d mode %s\n",
  359. data, data_len, mode_name);
  360. ret = ath10k_bmi_fast_download(ar, address, data, data_len);
  361. if (ret) {
  362. ath10k_err(ar, "failed to download %s firmware: %d\n",
  363. mode_name, ret);
  364. return ret;
  365. }
  366. return ret;
  367. }
  368. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  369. {
  370. if (!IS_ERR(ar->board))
  371. release_firmware(ar->board);
  372. if (!IS_ERR(ar->otp))
  373. release_firmware(ar->otp);
  374. if (!IS_ERR(ar->firmware))
  375. release_firmware(ar->firmware);
  376. if (!IS_ERR(ar->cal_file))
  377. release_firmware(ar->cal_file);
  378. ar->board = NULL;
  379. ar->board_data = NULL;
  380. ar->board_len = 0;
  381. ar->otp = NULL;
  382. ar->otp_data = NULL;
  383. ar->otp_len = 0;
  384. ar->firmware = NULL;
  385. ar->firmware_data = NULL;
  386. ar->firmware_len = 0;
  387. ar->cal_file = NULL;
  388. }
  389. static int ath10k_fetch_cal_file(struct ath10k *ar)
  390. {
  391. char filename[100];
  392. /* cal-<bus>-<id>.bin */
  393. scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
  394. ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
  395. ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
  396. if (IS_ERR(ar->cal_file))
  397. /* calibration file is optional, don't print any warnings */
  398. return PTR_ERR(ar->cal_file);
  399. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
  400. ATH10K_FW_DIR, filename);
  401. return 0;
  402. }
  403. static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
  404. {
  405. int ret = 0;
  406. if (ar->hw_params.fw.fw == NULL) {
  407. ath10k_err(ar, "firmware file not defined\n");
  408. return -EINVAL;
  409. }
  410. if (ar->hw_params.fw.board == NULL) {
  411. ath10k_err(ar, "board data file not defined");
  412. return -EINVAL;
  413. }
  414. ar->board = ath10k_fetch_fw_file(ar,
  415. ar->hw_params.fw.dir,
  416. ar->hw_params.fw.board);
  417. if (IS_ERR(ar->board)) {
  418. ret = PTR_ERR(ar->board);
  419. ath10k_err(ar, "could not fetch board data (%d)\n", ret);
  420. goto err;
  421. }
  422. ar->board_data = ar->board->data;
  423. ar->board_len = ar->board->size;
  424. ar->firmware = ath10k_fetch_fw_file(ar,
  425. ar->hw_params.fw.dir,
  426. ar->hw_params.fw.fw);
  427. if (IS_ERR(ar->firmware)) {
  428. ret = PTR_ERR(ar->firmware);
  429. ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
  430. goto err;
  431. }
  432. ar->firmware_data = ar->firmware->data;
  433. ar->firmware_len = ar->firmware->size;
  434. /* OTP may be undefined. If so, don't fetch it at all */
  435. if (ar->hw_params.fw.otp == NULL)
  436. return 0;
  437. ar->otp = ath10k_fetch_fw_file(ar,
  438. ar->hw_params.fw.dir,
  439. ar->hw_params.fw.otp);
  440. if (IS_ERR(ar->otp)) {
  441. ret = PTR_ERR(ar->otp);
  442. ath10k_err(ar, "could not fetch otp (%d)\n", ret);
  443. goto err;
  444. }
  445. ar->otp_data = ar->otp->data;
  446. ar->otp_len = ar->otp->size;
  447. return 0;
  448. err:
  449. ath10k_core_free_firmware_files(ar);
  450. return ret;
  451. }
  452. static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
  453. {
  454. size_t magic_len, len, ie_len;
  455. int ie_id, i, index, bit, ret;
  456. struct ath10k_fw_ie *hdr;
  457. const u8 *data;
  458. __le32 *timestamp, *version;
  459. /* first fetch the firmware file (firmware-*.bin) */
  460. ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
  461. if (IS_ERR(ar->firmware)) {
  462. ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
  463. ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
  464. return PTR_ERR(ar->firmware);
  465. }
  466. data = ar->firmware->data;
  467. len = ar->firmware->size;
  468. /* magic also includes the null byte, check that as well */
  469. magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
  470. if (len < magic_len) {
  471. ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
  472. ar->hw_params.fw.dir, name, len);
  473. ret = -EINVAL;
  474. goto err;
  475. }
  476. if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
  477. ath10k_err(ar, "invalid firmware magic\n");
  478. ret = -EINVAL;
  479. goto err;
  480. }
  481. /* jump over the padding */
  482. magic_len = ALIGN(magic_len, 4);
  483. len -= magic_len;
  484. data += magic_len;
  485. /* loop elements */
  486. while (len > sizeof(struct ath10k_fw_ie)) {
  487. hdr = (struct ath10k_fw_ie *)data;
  488. ie_id = le32_to_cpu(hdr->id);
  489. ie_len = le32_to_cpu(hdr->len);
  490. len -= sizeof(*hdr);
  491. data += sizeof(*hdr);
  492. if (len < ie_len) {
  493. ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
  494. ie_id, len, ie_len);
  495. ret = -EINVAL;
  496. goto err;
  497. }
  498. switch (ie_id) {
  499. case ATH10K_FW_IE_FW_VERSION:
  500. if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
  501. break;
  502. memcpy(ar->hw->wiphy->fw_version, data, ie_len);
  503. ar->hw->wiphy->fw_version[ie_len] = '\0';
  504. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  505. "found fw version %s\n",
  506. ar->hw->wiphy->fw_version);
  507. break;
  508. case ATH10K_FW_IE_TIMESTAMP:
  509. if (ie_len != sizeof(u32))
  510. break;
  511. timestamp = (__le32 *)data;
  512. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
  513. le32_to_cpup(timestamp));
  514. break;
  515. case ATH10K_FW_IE_FEATURES:
  516. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  517. "found firmware features ie (%zd B)\n",
  518. ie_len);
  519. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  520. index = i / 8;
  521. bit = i % 8;
  522. if (index == ie_len)
  523. break;
  524. if (data[index] & (1 << bit)) {
  525. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  526. "Enabling feature bit: %i\n",
  527. i);
  528. __set_bit(i, ar->fw_features);
  529. }
  530. }
  531. ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
  532. ar->fw_features,
  533. sizeof(ar->fw_features));
  534. break;
  535. case ATH10K_FW_IE_FW_IMAGE:
  536. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  537. "found fw image ie (%zd B)\n",
  538. ie_len);
  539. ar->firmware_data = data;
  540. ar->firmware_len = ie_len;
  541. break;
  542. case ATH10K_FW_IE_OTP_IMAGE:
  543. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  544. "found otp image ie (%zd B)\n",
  545. ie_len);
  546. ar->otp_data = data;
  547. ar->otp_len = ie_len;
  548. break;
  549. case ATH10K_FW_IE_WMI_OP_VERSION:
  550. if (ie_len != sizeof(u32))
  551. break;
  552. version = (__le32 *)data;
  553. ar->wmi.op_version = le32_to_cpup(version);
  554. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
  555. ar->wmi.op_version);
  556. break;
  557. default:
  558. ath10k_warn(ar, "Unknown FW IE: %u\n",
  559. le32_to_cpu(hdr->id));
  560. break;
  561. }
  562. /* jump over the padding */
  563. ie_len = ALIGN(ie_len, 4);
  564. len -= ie_len;
  565. data += ie_len;
  566. }
  567. if (!ar->firmware_data || !ar->firmware_len) {
  568. ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
  569. ar->hw_params.fw.dir, name);
  570. ret = -ENOMEDIUM;
  571. goto err;
  572. }
  573. /* now fetch the board file */
  574. if (ar->hw_params.fw.board == NULL) {
  575. ath10k_err(ar, "board data file not defined");
  576. ret = -EINVAL;
  577. goto err;
  578. }
  579. ar->board = ath10k_fetch_fw_file(ar,
  580. ar->hw_params.fw.dir,
  581. ar->hw_params.fw.board);
  582. if (IS_ERR(ar->board)) {
  583. ret = PTR_ERR(ar->board);
  584. ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
  585. ar->hw_params.fw.dir, ar->hw_params.fw.board,
  586. ret);
  587. goto err;
  588. }
  589. ar->board_data = ar->board->data;
  590. ar->board_len = ar->board->size;
  591. return 0;
  592. err:
  593. ath10k_core_free_firmware_files(ar);
  594. return ret;
  595. }
  596. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  597. {
  598. int ret;
  599. /* calibration file is optional, don't check for any errors */
  600. ath10k_fetch_cal_file(ar);
  601. ar->fw_api = 4;
  602. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  603. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE);
  604. if (ret == 0)
  605. goto success;
  606. ar->fw_api = 3;
  607. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  608. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
  609. if (ret == 0)
  610. goto success;
  611. ar->fw_api = 2;
  612. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  613. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
  614. if (ret == 0)
  615. goto success;
  616. ar->fw_api = 1;
  617. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  618. ret = ath10k_core_fetch_firmware_api_1(ar);
  619. if (ret)
  620. return ret;
  621. success:
  622. ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  623. return 0;
  624. }
  625. static int ath10k_download_cal_data(struct ath10k *ar)
  626. {
  627. int ret;
  628. ret = ath10k_download_cal_file(ar);
  629. if (ret == 0) {
  630. ar->cal_mode = ATH10K_CAL_MODE_FILE;
  631. goto done;
  632. }
  633. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  634. "boot did not find a calibration file, try DT next: %d\n",
  635. ret);
  636. ret = ath10k_download_cal_dt(ar);
  637. if (ret == 0) {
  638. ar->cal_mode = ATH10K_CAL_MODE_DT;
  639. goto done;
  640. }
  641. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  642. "boot did not find DT entry, try OTP next: %d\n",
  643. ret);
  644. ret = ath10k_download_and_run_otp(ar);
  645. if (ret) {
  646. ath10k_err(ar, "failed to run otp: %d\n", ret);
  647. return ret;
  648. }
  649. ar->cal_mode = ATH10K_CAL_MODE_OTP;
  650. done:
  651. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
  652. ath10k_cal_mode_str(ar->cal_mode));
  653. return 0;
  654. }
  655. static int ath10k_init_uart(struct ath10k *ar)
  656. {
  657. int ret;
  658. /*
  659. * Explicitly setting UART prints to zero as target turns it on
  660. * based on scratch registers.
  661. */
  662. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  663. if (ret) {
  664. ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
  665. return ret;
  666. }
  667. if (!uart_print)
  668. return 0;
  669. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
  670. if (ret) {
  671. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  672. return ret;
  673. }
  674. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  675. if (ret) {
  676. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  677. return ret;
  678. }
  679. /* Set the UART baud rate to 19200. */
  680. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  681. if (ret) {
  682. ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
  683. return ret;
  684. }
  685. ath10k_info(ar, "UART prints enabled\n");
  686. return 0;
  687. }
  688. static int ath10k_init_hw_params(struct ath10k *ar)
  689. {
  690. const struct ath10k_hw_params *uninitialized_var(hw_params);
  691. int i;
  692. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  693. hw_params = &ath10k_hw_params_list[i];
  694. if (hw_params->id == ar->target_version)
  695. break;
  696. }
  697. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  698. ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
  699. ar->target_version);
  700. return -EINVAL;
  701. }
  702. ar->hw_params = *hw_params;
  703. ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
  704. ar->hw_params.name, ar->target_version);
  705. return 0;
  706. }
  707. static void ath10k_core_restart(struct work_struct *work)
  708. {
  709. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  710. set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
  711. /* Place a barrier to make sure the compiler doesn't reorder
  712. * CRASH_FLUSH and calling other functions.
  713. */
  714. barrier();
  715. ieee80211_stop_queues(ar->hw);
  716. ath10k_drain_tx(ar);
  717. complete_all(&ar->scan.started);
  718. complete_all(&ar->scan.completed);
  719. complete_all(&ar->scan.on_channel);
  720. complete_all(&ar->offchan_tx_completed);
  721. complete_all(&ar->install_key_done);
  722. complete_all(&ar->vdev_setup_done);
  723. complete_all(&ar->thermal.wmi_sync);
  724. wake_up(&ar->htt.empty_tx_wq);
  725. wake_up(&ar->wmi.tx_credits_wq);
  726. wake_up(&ar->peer_mapping_wq);
  727. mutex_lock(&ar->conf_mutex);
  728. switch (ar->state) {
  729. case ATH10K_STATE_ON:
  730. ar->state = ATH10K_STATE_RESTARTING;
  731. ath10k_hif_stop(ar);
  732. ath10k_scan_finish(ar);
  733. ieee80211_restart_hw(ar->hw);
  734. break;
  735. case ATH10K_STATE_OFF:
  736. /* this can happen if driver is being unloaded
  737. * or if the crash happens during FW probing */
  738. ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
  739. break;
  740. case ATH10K_STATE_RESTARTING:
  741. /* hw restart might be requested from multiple places */
  742. break;
  743. case ATH10K_STATE_RESTARTED:
  744. ar->state = ATH10K_STATE_WEDGED;
  745. /* fall through */
  746. case ATH10K_STATE_WEDGED:
  747. ath10k_warn(ar, "device is wedged, will not restart\n");
  748. break;
  749. case ATH10K_STATE_UTF:
  750. ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
  751. break;
  752. }
  753. mutex_unlock(&ar->conf_mutex);
  754. }
  755. static int ath10k_core_init_firmware_features(struct ath10k *ar)
  756. {
  757. if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
  758. !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  759. ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
  760. return -EINVAL;
  761. }
  762. if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
  763. ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
  764. ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version);
  765. return -EINVAL;
  766. }
  767. /* Backwards compatibility for firmwares without
  768. * ATH10K_FW_IE_WMI_OP_VERSION.
  769. */
  770. if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
  771. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  772. if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
  773. ar->fw_features))
  774. ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
  775. else
  776. ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
  777. } else {
  778. ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
  779. }
  780. }
  781. switch (ar->wmi.op_version) {
  782. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  783. ar->max_num_peers = TARGET_NUM_PEERS;
  784. ar->max_num_stations = TARGET_NUM_STATIONS;
  785. ar->max_num_vdevs = TARGET_NUM_VDEVS;
  786. ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
  787. break;
  788. case ATH10K_FW_WMI_OP_VERSION_10_1:
  789. case ATH10K_FW_WMI_OP_VERSION_10_2:
  790. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  791. ar->max_num_peers = TARGET_10X_NUM_PEERS;
  792. ar->max_num_stations = TARGET_10X_NUM_STATIONS;
  793. ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
  794. ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
  795. break;
  796. case ATH10K_FW_WMI_OP_VERSION_TLV:
  797. ar->max_num_peers = TARGET_TLV_NUM_PEERS;
  798. ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
  799. ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
  800. ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
  801. break;
  802. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  803. case ATH10K_FW_WMI_OP_VERSION_MAX:
  804. WARN_ON(1);
  805. return -EINVAL;
  806. }
  807. return 0;
  808. }
  809. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
  810. {
  811. int status;
  812. lockdep_assert_held(&ar->conf_mutex);
  813. clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
  814. ath10k_bmi_start(ar);
  815. if (ath10k_init_configure_target(ar)) {
  816. status = -EINVAL;
  817. goto err;
  818. }
  819. status = ath10k_download_cal_data(ar);
  820. if (status)
  821. goto err;
  822. status = ath10k_download_fw(ar, mode);
  823. if (status)
  824. goto err;
  825. status = ath10k_init_uart(ar);
  826. if (status)
  827. goto err;
  828. ar->htc.htc_ops.target_send_suspend_complete =
  829. ath10k_send_suspend_complete;
  830. status = ath10k_htc_init(ar);
  831. if (status) {
  832. ath10k_err(ar, "could not init HTC (%d)\n", status);
  833. goto err;
  834. }
  835. status = ath10k_bmi_done(ar);
  836. if (status)
  837. goto err;
  838. status = ath10k_wmi_attach(ar);
  839. if (status) {
  840. ath10k_err(ar, "WMI attach failed: %d\n", status);
  841. goto err;
  842. }
  843. status = ath10k_htt_init(ar);
  844. if (status) {
  845. ath10k_err(ar, "failed to init htt: %d\n", status);
  846. goto err_wmi_detach;
  847. }
  848. status = ath10k_htt_tx_alloc(&ar->htt);
  849. if (status) {
  850. ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
  851. goto err_wmi_detach;
  852. }
  853. status = ath10k_htt_rx_alloc(&ar->htt);
  854. if (status) {
  855. ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
  856. goto err_htt_tx_detach;
  857. }
  858. status = ath10k_hif_start(ar);
  859. if (status) {
  860. ath10k_err(ar, "could not start HIF: %d\n", status);
  861. goto err_htt_rx_detach;
  862. }
  863. status = ath10k_htc_wait_target(&ar->htc);
  864. if (status) {
  865. ath10k_err(ar, "failed to connect to HTC: %d\n", status);
  866. goto err_hif_stop;
  867. }
  868. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  869. status = ath10k_htt_connect(&ar->htt);
  870. if (status) {
  871. ath10k_err(ar, "failed to connect htt (%d)\n", status);
  872. goto err_hif_stop;
  873. }
  874. }
  875. status = ath10k_wmi_connect(ar);
  876. if (status) {
  877. ath10k_err(ar, "could not connect wmi: %d\n", status);
  878. goto err_hif_stop;
  879. }
  880. status = ath10k_htc_start(&ar->htc);
  881. if (status) {
  882. ath10k_err(ar, "failed to start htc: %d\n", status);
  883. goto err_hif_stop;
  884. }
  885. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  886. status = ath10k_wmi_wait_for_service_ready(ar);
  887. if (status <= 0) {
  888. ath10k_warn(ar, "wmi service ready event not received");
  889. status = -ETIMEDOUT;
  890. goto err_hif_stop;
  891. }
  892. }
  893. ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
  894. ar->hw->wiphy->fw_version);
  895. status = ath10k_wmi_cmd_init(ar);
  896. if (status) {
  897. ath10k_err(ar, "could not send WMI init command (%d)\n",
  898. status);
  899. goto err_hif_stop;
  900. }
  901. status = ath10k_wmi_wait_for_unified_ready(ar);
  902. if (status <= 0) {
  903. ath10k_err(ar, "wmi unified ready event not received\n");
  904. status = -ETIMEDOUT;
  905. goto err_hif_stop;
  906. }
  907. /* If firmware indicates Full Rx Reorder support it must be used in a
  908. * slightly different manner. Let HTT code know.
  909. */
  910. ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
  911. ar->wmi.svc_map));
  912. status = ath10k_htt_rx_ring_refill(ar);
  913. if (status) {
  914. ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
  915. goto err_hif_stop;
  916. }
  917. /* we don't care about HTT in UTF mode */
  918. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  919. status = ath10k_htt_setup(&ar->htt);
  920. if (status) {
  921. ath10k_err(ar, "failed to setup htt: %d\n", status);
  922. goto err_hif_stop;
  923. }
  924. }
  925. status = ath10k_debug_start(ar);
  926. if (status)
  927. goto err_hif_stop;
  928. ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
  929. INIT_LIST_HEAD(&ar->arvifs);
  930. return 0;
  931. err_hif_stop:
  932. ath10k_hif_stop(ar);
  933. err_htt_rx_detach:
  934. ath10k_htt_rx_free(&ar->htt);
  935. err_htt_tx_detach:
  936. ath10k_htt_tx_free(&ar->htt);
  937. err_wmi_detach:
  938. ath10k_wmi_detach(ar);
  939. err:
  940. return status;
  941. }
  942. EXPORT_SYMBOL(ath10k_core_start);
  943. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
  944. {
  945. int ret;
  946. reinit_completion(&ar->target_suspend);
  947. ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
  948. if (ret) {
  949. ath10k_warn(ar, "could not suspend target (%d)\n", ret);
  950. return ret;
  951. }
  952. ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
  953. if (ret == 0) {
  954. ath10k_warn(ar, "suspend timed out - target pause event never came\n");
  955. return -ETIMEDOUT;
  956. }
  957. return 0;
  958. }
  959. void ath10k_core_stop(struct ath10k *ar)
  960. {
  961. lockdep_assert_held(&ar->conf_mutex);
  962. /* try to suspend target */
  963. if (ar->state != ATH10K_STATE_RESTARTING &&
  964. ar->state != ATH10K_STATE_UTF)
  965. ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
  966. ath10k_debug_stop(ar);
  967. ath10k_hif_stop(ar);
  968. ath10k_htt_tx_free(&ar->htt);
  969. ath10k_htt_rx_free(&ar->htt);
  970. ath10k_wmi_detach(ar);
  971. }
  972. EXPORT_SYMBOL(ath10k_core_stop);
  973. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  974. * order to know what hw capabilities should be advertised to mac80211 it is
  975. * necessary to load the firmware (and tear it down immediately since start
  976. * hook will try to init it again) before registering */
  977. static int ath10k_core_probe_fw(struct ath10k *ar)
  978. {
  979. struct bmi_target_info target_info;
  980. int ret = 0;
  981. ret = ath10k_hif_power_up(ar);
  982. if (ret) {
  983. ath10k_err(ar, "could not start pci hif (%d)\n", ret);
  984. return ret;
  985. }
  986. memset(&target_info, 0, sizeof(target_info));
  987. ret = ath10k_bmi_get_target_info(ar, &target_info);
  988. if (ret) {
  989. ath10k_err(ar, "could not get target info (%d)\n", ret);
  990. goto err_power_down;
  991. }
  992. ar->target_version = target_info.version;
  993. ar->hw->wiphy->hw_version = target_info.version;
  994. ret = ath10k_init_hw_params(ar);
  995. if (ret) {
  996. ath10k_err(ar, "could not get hw params (%d)\n", ret);
  997. goto err_power_down;
  998. }
  999. ret = ath10k_core_fetch_firmware_files(ar);
  1000. if (ret) {
  1001. ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
  1002. goto err_power_down;
  1003. }
  1004. ret = ath10k_core_init_firmware_features(ar);
  1005. if (ret) {
  1006. ath10k_err(ar, "fatal problem with firmware features: %d\n",
  1007. ret);
  1008. goto err_free_firmware_files;
  1009. }
  1010. mutex_lock(&ar->conf_mutex);
  1011. ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
  1012. if (ret) {
  1013. ath10k_err(ar, "could not init core (%d)\n", ret);
  1014. goto err_unlock;
  1015. }
  1016. ath10k_print_driver_info(ar);
  1017. ath10k_core_stop(ar);
  1018. mutex_unlock(&ar->conf_mutex);
  1019. ath10k_hif_power_down(ar);
  1020. return 0;
  1021. err_unlock:
  1022. mutex_unlock(&ar->conf_mutex);
  1023. err_free_firmware_files:
  1024. ath10k_core_free_firmware_files(ar);
  1025. err_power_down:
  1026. ath10k_hif_power_down(ar);
  1027. return ret;
  1028. }
  1029. static void ath10k_core_register_work(struct work_struct *work)
  1030. {
  1031. struct ath10k *ar = container_of(work, struct ath10k, register_work);
  1032. int status;
  1033. status = ath10k_core_probe_fw(ar);
  1034. if (status) {
  1035. ath10k_err(ar, "could not probe fw (%d)\n", status);
  1036. goto err;
  1037. }
  1038. status = ath10k_mac_register(ar);
  1039. if (status) {
  1040. ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
  1041. goto err_release_fw;
  1042. }
  1043. status = ath10k_debug_register(ar);
  1044. if (status) {
  1045. ath10k_err(ar, "unable to initialize debugfs\n");
  1046. goto err_unregister_mac;
  1047. }
  1048. status = ath10k_spectral_create(ar);
  1049. if (status) {
  1050. ath10k_err(ar, "failed to initialize spectral\n");
  1051. goto err_debug_destroy;
  1052. }
  1053. status = ath10k_thermal_register(ar);
  1054. if (status) {
  1055. ath10k_err(ar, "could not register thermal device: %d\n",
  1056. status);
  1057. goto err_spectral_destroy;
  1058. }
  1059. set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
  1060. return;
  1061. err_spectral_destroy:
  1062. ath10k_spectral_destroy(ar);
  1063. err_debug_destroy:
  1064. ath10k_debug_destroy(ar);
  1065. err_unregister_mac:
  1066. ath10k_mac_unregister(ar);
  1067. err_release_fw:
  1068. ath10k_core_free_firmware_files(ar);
  1069. err:
  1070. /* TODO: It's probably a good idea to release device from the driver
  1071. * but calling device_release_driver() here will cause a deadlock.
  1072. */
  1073. return;
  1074. }
  1075. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  1076. {
  1077. ar->chip_id = chip_id;
  1078. queue_work(ar->workqueue, &ar->register_work);
  1079. return 0;
  1080. }
  1081. EXPORT_SYMBOL(ath10k_core_register);
  1082. void ath10k_core_unregister(struct ath10k *ar)
  1083. {
  1084. cancel_work_sync(&ar->register_work);
  1085. if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  1086. return;
  1087. ath10k_thermal_unregister(ar);
  1088. /* Stop spectral before unregistering from mac80211 to remove the
  1089. * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
  1090. * would be already be free'd recursively, leading to a double free.
  1091. */
  1092. ath10k_spectral_destroy(ar);
  1093. /* We must unregister from mac80211 before we stop HTC and HIF.
  1094. * Otherwise we will fail to submit commands to FW and mac80211 will be
  1095. * unhappy about callback failures. */
  1096. ath10k_mac_unregister(ar);
  1097. ath10k_testmode_destroy(ar);
  1098. ath10k_core_free_firmware_files(ar);
  1099. ath10k_debug_unregister(ar);
  1100. }
  1101. EXPORT_SYMBOL(ath10k_core_unregister);
  1102. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  1103. enum ath10k_bus bus,
  1104. enum ath10k_hw_rev hw_rev,
  1105. const struct ath10k_hif_ops *hif_ops)
  1106. {
  1107. struct ath10k *ar;
  1108. int ret;
  1109. ar = ath10k_mac_create(priv_size);
  1110. if (!ar)
  1111. return NULL;
  1112. ar->ath_common.priv = ar;
  1113. ar->ath_common.hw = ar->hw;
  1114. ar->dev = dev;
  1115. ar->hw_rev = hw_rev;
  1116. ar->hif.ops = hif_ops;
  1117. ar->hif.bus = bus;
  1118. switch (hw_rev) {
  1119. case ATH10K_HW_QCA988X:
  1120. ar->regs = &qca988x_regs;
  1121. break;
  1122. case ATH10K_HW_QCA6174:
  1123. ar->regs = &qca6174_regs;
  1124. break;
  1125. default:
  1126. ath10k_err(ar, "unsupported core hardware revision %d\n",
  1127. hw_rev);
  1128. ret = -ENOTSUPP;
  1129. goto err_free_mac;
  1130. }
  1131. init_completion(&ar->scan.started);
  1132. init_completion(&ar->scan.completed);
  1133. init_completion(&ar->scan.on_channel);
  1134. init_completion(&ar->target_suspend);
  1135. init_completion(&ar->install_key_done);
  1136. init_completion(&ar->vdev_setup_done);
  1137. init_completion(&ar->thermal.wmi_sync);
  1138. INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
  1139. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  1140. if (!ar->workqueue)
  1141. goto err_free_mac;
  1142. mutex_init(&ar->conf_mutex);
  1143. spin_lock_init(&ar->data_lock);
  1144. INIT_LIST_HEAD(&ar->peers);
  1145. init_waitqueue_head(&ar->peer_mapping_wq);
  1146. init_waitqueue_head(&ar->htt.empty_tx_wq);
  1147. init_waitqueue_head(&ar->wmi.tx_credits_wq);
  1148. init_completion(&ar->offchan_tx_completed);
  1149. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  1150. skb_queue_head_init(&ar->offchan_tx_queue);
  1151. INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
  1152. skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
  1153. INIT_WORK(&ar->register_work, ath10k_core_register_work);
  1154. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  1155. ret = ath10k_debug_create(ar);
  1156. if (ret)
  1157. goto err_free_wq;
  1158. return ar;
  1159. err_free_wq:
  1160. destroy_workqueue(ar->workqueue);
  1161. err_free_mac:
  1162. ath10k_mac_destroy(ar);
  1163. return NULL;
  1164. }
  1165. EXPORT_SYMBOL(ath10k_core_create);
  1166. void ath10k_core_destroy(struct ath10k *ar)
  1167. {
  1168. flush_workqueue(ar->workqueue);
  1169. destroy_workqueue(ar->workqueue);
  1170. ath10k_debug_destroy(ar);
  1171. ath10k_mac_destroy(ar);
  1172. }
  1173. EXPORT_SYMBOL(ath10k_core_destroy);
  1174. MODULE_AUTHOR("Qualcomm Atheros");
  1175. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  1176. MODULE_LICENSE("Dual BSD/GPL");