enic_main.c 68 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/if.h>
  31. #include <linux/if_ether.h>
  32. #include <linux/if_vlan.h>
  33. #include <linux/in.h>
  34. #include <linux/ip.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/tcp.h>
  37. #include <linux/rtnetlink.h>
  38. #include <linux/prefetch.h>
  39. #include <net/ip6_checksum.h>
  40. #include <linux/ktime.h>
  41. #ifdef CONFIG_RFS_ACCEL
  42. #include <linux/cpu_rmap.h>
  43. #endif
  44. #ifdef CONFIG_NET_RX_BUSY_POLL
  45. #include <net/busy_poll.h>
  46. #endif
  47. #include <linux/crash_dump.h>
  48. #include "cq_enet_desc.h"
  49. #include "vnic_dev.h"
  50. #include "vnic_intr.h"
  51. #include "vnic_stats.h"
  52. #include "vnic_vic.h"
  53. #include "enic_res.h"
  54. #include "enic.h"
  55. #include "enic_dev.h"
  56. #include "enic_pp.h"
  57. #include "enic_clsf.h"
  58. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  59. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  60. #define MAX_TSO (1 << 16)
  61. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  62. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  63. #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
  64. #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
  65. #define RX_COPYBREAK_DEFAULT 256
  66. /* Supported devices */
  67. static const struct pci_device_id enic_id_table[] = {
  68. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  69. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
  70. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
  71. { 0, } /* end of table */
  72. };
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  75. MODULE_LICENSE("GPL");
  76. MODULE_VERSION(DRV_VERSION);
  77. MODULE_DEVICE_TABLE(pci, enic_id_table);
  78. #define ENIC_LARGE_PKT_THRESHOLD 1000
  79. #define ENIC_MAX_COALESCE_TIMERS 10
  80. /* Interrupt moderation table, which will be used to decide the
  81. * coalescing timer values
  82. * {rx_rate in Mbps, mapping percentage of the range}
  83. */
  84. static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {
  85. {4000, 0},
  86. {4400, 10},
  87. {5060, 20},
  88. {5230, 30},
  89. {5540, 40},
  90. {5820, 50},
  91. {6120, 60},
  92. {6435, 70},
  93. {6745, 80},
  94. {7000, 90},
  95. {0xFFFFFFFF, 100}
  96. };
  97. /* This table helps the driver to pick different ranges for rx coalescing
  98. * timer depending on the link speed.
  99. */
  100. static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {
  101. {0, 0}, /* 0 - 4 Gbps */
  102. {0, 3}, /* 4 - 10 Gbps */
  103. {3, 6}, /* 10 - 40 Gbps */
  104. };
  105. int enic_is_dynamic(struct enic *enic)
  106. {
  107. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
  108. }
  109. int enic_sriov_enabled(struct enic *enic)
  110. {
  111. return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
  112. }
  113. static int enic_is_sriov_vf(struct enic *enic)
  114. {
  115. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
  116. }
  117. int enic_is_valid_vf(struct enic *enic, int vf)
  118. {
  119. #ifdef CONFIG_PCI_IOV
  120. return vf >= 0 && vf < enic->num_vfs;
  121. #else
  122. return 0;
  123. #endif
  124. }
  125. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  126. {
  127. struct enic *enic = vnic_dev_priv(wq->vdev);
  128. if (buf->sop)
  129. pci_unmap_single(enic->pdev, buf->dma_addr,
  130. buf->len, PCI_DMA_TODEVICE);
  131. else
  132. pci_unmap_page(enic->pdev, buf->dma_addr,
  133. buf->len, PCI_DMA_TODEVICE);
  134. if (buf->os_buf)
  135. dev_kfree_skb_any(buf->os_buf);
  136. }
  137. static void enic_wq_free_buf(struct vnic_wq *wq,
  138. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  139. {
  140. enic_free_wq_buf(wq, buf);
  141. }
  142. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  143. u8 type, u16 q_number, u16 completed_index, void *opaque)
  144. {
  145. struct enic *enic = vnic_dev_priv(vdev);
  146. spin_lock(&enic->wq_lock[q_number]);
  147. vnic_wq_service(&enic->wq[q_number], cq_desc,
  148. completed_index, enic_wq_free_buf,
  149. opaque);
  150. if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
  151. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  152. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  153. netif_wake_subqueue(enic->netdev, q_number);
  154. spin_unlock(&enic->wq_lock[q_number]);
  155. return 0;
  156. }
  157. static void enic_log_q_error(struct enic *enic)
  158. {
  159. unsigned int i;
  160. u32 error_status;
  161. for (i = 0; i < enic->wq_count; i++) {
  162. error_status = vnic_wq_error_status(&enic->wq[i]);
  163. if (error_status)
  164. netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
  165. i, error_status);
  166. }
  167. for (i = 0; i < enic->rq_count; i++) {
  168. error_status = vnic_rq_error_status(&enic->rq[i]);
  169. if (error_status)
  170. netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
  171. i, error_status);
  172. }
  173. }
  174. static void enic_msglvl_check(struct enic *enic)
  175. {
  176. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  177. if (msg_enable != enic->msg_enable) {
  178. netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
  179. enic->msg_enable, msg_enable);
  180. enic->msg_enable = msg_enable;
  181. }
  182. }
  183. static void enic_mtu_check(struct enic *enic)
  184. {
  185. u32 mtu = vnic_dev_mtu(enic->vdev);
  186. struct net_device *netdev = enic->netdev;
  187. if (mtu && mtu != enic->port_mtu) {
  188. enic->port_mtu = mtu;
  189. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  190. mtu = max_t(int, ENIC_MIN_MTU,
  191. min_t(int, ENIC_MAX_MTU, mtu));
  192. if (mtu != netdev->mtu)
  193. schedule_work(&enic->change_mtu_work);
  194. } else {
  195. if (mtu < netdev->mtu)
  196. netdev_warn(netdev,
  197. "interface MTU (%d) set higher "
  198. "than switch port MTU (%d)\n",
  199. netdev->mtu, mtu);
  200. }
  201. }
  202. }
  203. static void enic_link_check(struct enic *enic)
  204. {
  205. int link_status = vnic_dev_link_status(enic->vdev);
  206. int carrier_ok = netif_carrier_ok(enic->netdev);
  207. if (link_status && !carrier_ok) {
  208. netdev_info(enic->netdev, "Link UP\n");
  209. netif_carrier_on(enic->netdev);
  210. } else if (!link_status && carrier_ok) {
  211. netdev_info(enic->netdev, "Link DOWN\n");
  212. netif_carrier_off(enic->netdev);
  213. }
  214. }
  215. static void enic_notify_check(struct enic *enic)
  216. {
  217. enic_msglvl_check(enic);
  218. enic_mtu_check(enic);
  219. enic_link_check(enic);
  220. }
  221. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  222. static irqreturn_t enic_isr_legacy(int irq, void *data)
  223. {
  224. struct net_device *netdev = data;
  225. struct enic *enic = netdev_priv(netdev);
  226. unsigned int io_intr = enic_legacy_io_intr();
  227. unsigned int err_intr = enic_legacy_err_intr();
  228. unsigned int notify_intr = enic_legacy_notify_intr();
  229. u32 pba;
  230. vnic_intr_mask(&enic->intr[io_intr]);
  231. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  232. if (!pba) {
  233. vnic_intr_unmask(&enic->intr[io_intr]);
  234. return IRQ_NONE; /* not our interrupt */
  235. }
  236. if (ENIC_TEST_INTR(pba, notify_intr)) {
  237. enic_notify_check(enic);
  238. vnic_intr_return_all_credits(&enic->intr[notify_intr]);
  239. }
  240. if (ENIC_TEST_INTR(pba, err_intr)) {
  241. vnic_intr_return_all_credits(&enic->intr[err_intr]);
  242. enic_log_q_error(enic);
  243. /* schedule recovery from WQ/RQ error */
  244. schedule_work(&enic->reset);
  245. return IRQ_HANDLED;
  246. }
  247. if (ENIC_TEST_INTR(pba, io_intr))
  248. napi_schedule_irqoff(&enic->napi[0]);
  249. else
  250. vnic_intr_unmask(&enic->intr[io_intr]);
  251. return IRQ_HANDLED;
  252. }
  253. static irqreturn_t enic_isr_msi(int irq, void *data)
  254. {
  255. struct enic *enic = data;
  256. /* With MSI, there is no sharing of interrupts, so this is
  257. * our interrupt and there is no need to ack it. The device
  258. * is not providing per-vector masking, so the OS will not
  259. * write to PCI config space to mask/unmask the interrupt.
  260. * We're using mask_on_assertion for MSI, so the device
  261. * automatically masks the interrupt when the interrupt is
  262. * generated. Later, when exiting polling, the interrupt
  263. * will be unmasked (see enic_poll).
  264. *
  265. * Also, the device uses the same PCIe Traffic Class (TC)
  266. * for Memory Write data and MSI, so there are no ordering
  267. * issues; the MSI will always arrive at the Root Complex
  268. * _after_ corresponding Memory Writes (i.e. descriptor
  269. * writes).
  270. */
  271. napi_schedule_irqoff(&enic->napi[0]);
  272. return IRQ_HANDLED;
  273. }
  274. static irqreturn_t enic_isr_msix(int irq, void *data)
  275. {
  276. struct napi_struct *napi = data;
  277. napi_schedule_irqoff(napi);
  278. return IRQ_HANDLED;
  279. }
  280. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  281. {
  282. struct enic *enic = data;
  283. unsigned int intr = enic_msix_err_intr(enic);
  284. vnic_intr_return_all_credits(&enic->intr[intr]);
  285. enic_log_q_error(enic);
  286. /* schedule recovery from WQ/RQ error */
  287. schedule_work(&enic->reset);
  288. return IRQ_HANDLED;
  289. }
  290. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  291. {
  292. struct enic *enic = data;
  293. unsigned int intr = enic_msix_notify_intr(enic);
  294. enic_notify_check(enic);
  295. vnic_intr_return_all_credits(&enic->intr[intr]);
  296. return IRQ_HANDLED;
  297. }
  298. static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq,
  299. struct sk_buff *skb, unsigned int len_left,
  300. int loopback)
  301. {
  302. const skb_frag_t *frag;
  303. dma_addr_t dma_addr;
  304. /* Queue additional data fragments */
  305. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  306. len_left -= skb_frag_size(frag);
  307. dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0,
  308. skb_frag_size(frag),
  309. DMA_TO_DEVICE);
  310. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  311. return -ENOMEM;
  312. enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag),
  313. (len_left == 0), /* EOP? */
  314. loopback);
  315. }
  316. return 0;
  317. }
  318. static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq,
  319. struct sk_buff *skb, int vlan_tag_insert,
  320. unsigned int vlan_tag, int loopback)
  321. {
  322. unsigned int head_len = skb_headlen(skb);
  323. unsigned int len_left = skb->len - head_len;
  324. int eop = (len_left == 0);
  325. dma_addr_t dma_addr;
  326. int err = 0;
  327. dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
  328. PCI_DMA_TODEVICE);
  329. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  330. return -ENOMEM;
  331. /* Queue the main skb fragment. The fragments are no larger
  332. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  333. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  334. * per fragment is queued.
  335. */
  336. enic_queue_wq_desc(wq, skb, dma_addr, head_len, vlan_tag_insert,
  337. vlan_tag, eop, loopback);
  338. if (!eop)
  339. err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  340. return err;
  341. }
  342. static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq,
  343. struct sk_buff *skb, int vlan_tag_insert,
  344. unsigned int vlan_tag, int loopback)
  345. {
  346. unsigned int head_len = skb_headlen(skb);
  347. unsigned int len_left = skb->len - head_len;
  348. unsigned int hdr_len = skb_checksum_start_offset(skb);
  349. unsigned int csum_offset = hdr_len + skb->csum_offset;
  350. int eop = (len_left == 0);
  351. dma_addr_t dma_addr;
  352. int err = 0;
  353. dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
  354. PCI_DMA_TODEVICE);
  355. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  356. return -ENOMEM;
  357. /* Queue the main skb fragment. The fragments are no larger
  358. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  359. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  360. * per fragment is queued.
  361. */
  362. enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len, csum_offset,
  363. hdr_len, vlan_tag_insert, vlan_tag, eop,
  364. loopback);
  365. if (!eop)
  366. err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  367. return err;
  368. }
  369. static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq,
  370. struct sk_buff *skb, unsigned int mss,
  371. int vlan_tag_insert, unsigned int vlan_tag,
  372. int loopback)
  373. {
  374. unsigned int frag_len_left = skb_headlen(skb);
  375. unsigned int len_left = skb->len - frag_len_left;
  376. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  377. int eop = (len_left == 0);
  378. unsigned int len;
  379. dma_addr_t dma_addr;
  380. unsigned int offset = 0;
  381. skb_frag_t *frag;
  382. /* Preload TCP csum field with IP pseudo hdr calculated
  383. * with IP length set to zero. HW will later add in length
  384. * to each TCP segment resulting from the TSO.
  385. */
  386. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  387. ip_hdr(skb)->check = 0;
  388. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  389. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  390. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  391. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  392. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  393. }
  394. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  395. * for the main skb fragment
  396. */
  397. while (frag_len_left) {
  398. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  399. dma_addr = pci_map_single(enic->pdev, skb->data + offset, len,
  400. PCI_DMA_TODEVICE);
  401. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  402. return -ENOMEM;
  403. enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len,
  404. vlan_tag_insert, vlan_tag,
  405. eop && (len == frag_len_left), loopback);
  406. frag_len_left -= len;
  407. offset += len;
  408. }
  409. if (eop)
  410. return 0;
  411. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  412. * for additional data fragments
  413. */
  414. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  415. len_left -= skb_frag_size(frag);
  416. frag_len_left = skb_frag_size(frag);
  417. offset = 0;
  418. while (frag_len_left) {
  419. len = min(frag_len_left,
  420. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  421. dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
  422. offset, len,
  423. DMA_TO_DEVICE);
  424. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  425. return -ENOMEM;
  426. enic_queue_wq_desc_cont(wq, skb, dma_addr, len,
  427. (len_left == 0) &&
  428. (len == frag_len_left),/*EOP*/
  429. loopback);
  430. frag_len_left -= len;
  431. offset += len;
  432. }
  433. }
  434. return 0;
  435. }
  436. static inline void enic_queue_wq_skb(struct enic *enic,
  437. struct vnic_wq *wq, struct sk_buff *skb)
  438. {
  439. unsigned int mss = skb_shinfo(skb)->gso_size;
  440. unsigned int vlan_tag = 0;
  441. int vlan_tag_insert = 0;
  442. int loopback = 0;
  443. int err;
  444. if (skb_vlan_tag_present(skb)) {
  445. /* VLAN tag from trunking driver */
  446. vlan_tag_insert = 1;
  447. vlan_tag = skb_vlan_tag_get(skb);
  448. } else if (enic->loop_enable) {
  449. vlan_tag = enic->loop_tag;
  450. loopback = 1;
  451. }
  452. if (mss)
  453. err = enic_queue_wq_skb_tso(enic, wq, skb, mss,
  454. vlan_tag_insert, vlan_tag,
  455. loopback);
  456. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  457. err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert,
  458. vlan_tag, loopback);
  459. else
  460. err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert,
  461. vlan_tag, loopback);
  462. if (unlikely(err)) {
  463. struct vnic_wq_buf *buf;
  464. buf = wq->to_use->prev;
  465. /* while not EOP of previous pkt && queue not empty.
  466. * For all non EOP bufs, os_buf is NULL.
  467. */
  468. while (!buf->os_buf && (buf->next != wq->to_clean)) {
  469. enic_free_wq_buf(wq, buf);
  470. wq->ring.desc_avail++;
  471. buf = buf->prev;
  472. }
  473. wq->to_use = buf->next;
  474. dev_kfree_skb(skb);
  475. }
  476. }
  477. /* netif_tx_lock held, process context with BHs disabled, or BH */
  478. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  479. struct net_device *netdev)
  480. {
  481. struct enic *enic = netdev_priv(netdev);
  482. struct vnic_wq *wq;
  483. unsigned int txq_map;
  484. struct netdev_queue *txq;
  485. if (skb->len <= 0) {
  486. dev_kfree_skb_any(skb);
  487. return NETDEV_TX_OK;
  488. }
  489. txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
  490. wq = &enic->wq[txq_map];
  491. txq = netdev_get_tx_queue(netdev, txq_map);
  492. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  493. * which is very likely. In the off chance it's going to take
  494. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  495. */
  496. if (skb_shinfo(skb)->gso_size == 0 &&
  497. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  498. skb_linearize(skb)) {
  499. dev_kfree_skb_any(skb);
  500. return NETDEV_TX_OK;
  501. }
  502. spin_lock(&enic->wq_lock[txq_map]);
  503. if (vnic_wq_desc_avail(wq) <
  504. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  505. netif_tx_stop_queue(txq);
  506. /* This is a hard error, log it */
  507. netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
  508. spin_unlock(&enic->wq_lock[txq_map]);
  509. return NETDEV_TX_BUSY;
  510. }
  511. enic_queue_wq_skb(enic, wq, skb);
  512. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  513. netif_tx_stop_queue(txq);
  514. if (!skb->xmit_more || netif_xmit_stopped(txq))
  515. vnic_wq_doorbell(wq);
  516. spin_unlock(&enic->wq_lock[txq_map]);
  517. return NETDEV_TX_OK;
  518. }
  519. /* dev_base_lock rwlock held, nominally process context */
  520. static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
  521. struct rtnl_link_stats64 *net_stats)
  522. {
  523. struct enic *enic = netdev_priv(netdev);
  524. struct vnic_stats *stats;
  525. int err;
  526. err = enic_dev_stats_dump(enic, &stats);
  527. /* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump
  528. * For other failures, like devcmd failure, we return previously
  529. * recorded stats.
  530. */
  531. if (err == -ENOMEM)
  532. return net_stats;
  533. net_stats->tx_packets = stats->tx.tx_frames_ok;
  534. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  535. net_stats->tx_errors = stats->tx.tx_errors;
  536. net_stats->tx_dropped = stats->tx.tx_drops;
  537. net_stats->rx_packets = stats->rx.rx_frames_ok;
  538. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  539. net_stats->rx_errors = stats->rx.rx_errors;
  540. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  541. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  542. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  543. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  544. return net_stats;
  545. }
  546. static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr)
  547. {
  548. struct enic *enic = netdev_priv(netdev);
  549. if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) {
  550. unsigned int mc_count = netdev_mc_count(netdev);
  551. netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n",
  552. ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
  553. return -ENOSPC;
  554. }
  555. enic_dev_add_addr(enic, mc_addr);
  556. enic->mc_count++;
  557. return 0;
  558. }
  559. static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr)
  560. {
  561. struct enic *enic = netdev_priv(netdev);
  562. enic_dev_del_addr(enic, mc_addr);
  563. enic->mc_count--;
  564. return 0;
  565. }
  566. static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr)
  567. {
  568. struct enic *enic = netdev_priv(netdev);
  569. if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) {
  570. unsigned int uc_count = netdev_uc_count(netdev);
  571. netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n",
  572. ENIC_UNICAST_PERFECT_FILTERS, uc_count);
  573. return -ENOSPC;
  574. }
  575. enic_dev_add_addr(enic, uc_addr);
  576. enic->uc_count++;
  577. return 0;
  578. }
  579. static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr)
  580. {
  581. struct enic *enic = netdev_priv(netdev);
  582. enic_dev_del_addr(enic, uc_addr);
  583. enic->uc_count--;
  584. return 0;
  585. }
  586. void enic_reset_addr_lists(struct enic *enic)
  587. {
  588. struct net_device *netdev = enic->netdev;
  589. __dev_uc_unsync(netdev, NULL);
  590. __dev_mc_unsync(netdev, NULL);
  591. enic->mc_count = 0;
  592. enic->uc_count = 0;
  593. enic->flags = 0;
  594. }
  595. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  596. {
  597. struct enic *enic = netdev_priv(netdev);
  598. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  599. if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
  600. return -EADDRNOTAVAIL;
  601. } else {
  602. if (!is_valid_ether_addr(addr))
  603. return -EADDRNOTAVAIL;
  604. }
  605. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  606. return 0;
  607. }
  608. static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
  609. {
  610. struct enic *enic = netdev_priv(netdev);
  611. struct sockaddr *saddr = p;
  612. char *addr = saddr->sa_data;
  613. int err;
  614. if (netif_running(enic->netdev)) {
  615. err = enic_dev_del_station_addr(enic);
  616. if (err)
  617. return err;
  618. }
  619. err = enic_set_mac_addr(netdev, addr);
  620. if (err)
  621. return err;
  622. if (netif_running(enic->netdev)) {
  623. err = enic_dev_add_station_addr(enic);
  624. if (err)
  625. return err;
  626. }
  627. return err;
  628. }
  629. static int enic_set_mac_address(struct net_device *netdev, void *p)
  630. {
  631. struct sockaddr *saddr = p;
  632. char *addr = saddr->sa_data;
  633. struct enic *enic = netdev_priv(netdev);
  634. int err;
  635. err = enic_dev_del_station_addr(enic);
  636. if (err)
  637. return err;
  638. err = enic_set_mac_addr(netdev, addr);
  639. if (err)
  640. return err;
  641. return enic_dev_add_station_addr(enic);
  642. }
  643. /* netif_tx_lock held, BHs disabled */
  644. static void enic_set_rx_mode(struct net_device *netdev)
  645. {
  646. struct enic *enic = netdev_priv(netdev);
  647. int directed = 1;
  648. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  649. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  650. int promisc = (netdev->flags & IFF_PROMISC) ||
  651. netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
  652. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  653. netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
  654. unsigned int flags = netdev->flags |
  655. (allmulti ? IFF_ALLMULTI : 0) |
  656. (promisc ? IFF_PROMISC : 0);
  657. if (enic->flags != flags) {
  658. enic->flags = flags;
  659. enic_dev_packet_filter(enic, directed,
  660. multicast, broadcast, promisc, allmulti);
  661. }
  662. if (!promisc) {
  663. __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync);
  664. if (!allmulti)
  665. __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync);
  666. }
  667. }
  668. /* netif_tx_lock held, BHs disabled */
  669. static void enic_tx_timeout(struct net_device *netdev)
  670. {
  671. struct enic *enic = netdev_priv(netdev);
  672. schedule_work(&enic->reset);
  673. }
  674. static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  675. {
  676. struct enic *enic = netdev_priv(netdev);
  677. struct enic_port_profile *pp;
  678. int err;
  679. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  680. if (err)
  681. return err;
  682. if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
  683. if (vf == PORT_SELF_VF) {
  684. memcpy(pp->vf_mac, mac, ETH_ALEN);
  685. return 0;
  686. } else {
  687. /*
  688. * For sriov vf's set the mac in hw
  689. */
  690. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  691. vnic_dev_set_mac_addr, mac);
  692. return enic_dev_status_to_errno(err);
  693. }
  694. } else
  695. return -EINVAL;
  696. }
  697. static int enic_set_vf_port(struct net_device *netdev, int vf,
  698. struct nlattr *port[])
  699. {
  700. struct enic *enic = netdev_priv(netdev);
  701. struct enic_port_profile prev_pp;
  702. struct enic_port_profile *pp;
  703. int err = 0, restore_pp = 1;
  704. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  705. if (err)
  706. return err;
  707. if (!port[IFLA_PORT_REQUEST])
  708. return -EOPNOTSUPP;
  709. memcpy(&prev_pp, pp, sizeof(*enic->pp));
  710. memset(pp, 0, sizeof(*enic->pp));
  711. pp->set |= ENIC_SET_REQUEST;
  712. pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
  713. if (port[IFLA_PORT_PROFILE]) {
  714. pp->set |= ENIC_SET_NAME;
  715. memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
  716. PORT_PROFILE_MAX);
  717. }
  718. if (port[IFLA_PORT_INSTANCE_UUID]) {
  719. pp->set |= ENIC_SET_INSTANCE;
  720. memcpy(pp->instance_uuid,
  721. nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
  722. }
  723. if (port[IFLA_PORT_HOST_UUID]) {
  724. pp->set |= ENIC_SET_HOST;
  725. memcpy(pp->host_uuid,
  726. nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
  727. }
  728. if (vf == PORT_SELF_VF) {
  729. /* Special case handling: mac came from IFLA_VF_MAC */
  730. if (!is_zero_ether_addr(prev_pp.vf_mac))
  731. memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
  732. if (is_zero_ether_addr(netdev->dev_addr))
  733. eth_hw_addr_random(netdev);
  734. } else {
  735. /* SR-IOV VF: get mac from adapter */
  736. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  737. vnic_dev_get_mac_addr, pp->mac_addr);
  738. if (err) {
  739. netdev_err(netdev, "Error getting mac for vf %d\n", vf);
  740. memcpy(pp, &prev_pp, sizeof(*pp));
  741. return enic_dev_status_to_errno(err);
  742. }
  743. }
  744. err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
  745. if (err) {
  746. if (restore_pp) {
  747. /* Things are still the way they were: Implicit
  748. * DISASSOCIATE failed
  749. */
  750. memcpy(pp, &prev_pp, sizeof(*pp));
  751. } else {
  752. memset(pp, 0, sizeof(*pp));
  753. if (vf == PORT_SELF_VF)
  754. eth_zero_addr(netdev->dev_addr);
  755. }
  756. } else {
  757. /* Set flag to indicate that the port assoc/disassoc
  758. * request has been sent out to fw
  759. */
  760. pp->set |= ENIC_PORT_REQUEST_APPLIED;
  761. /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
  762. if (pp->request == PORT_REQUEST_DISASSOCIATE) {
  763. eth_zero_addr(pp->mac_addr);
  764. if (vf == PORT_SELF_VF)
  765. eth_zero_addr(netdev->dev_addr);
  766. }
  767. }
  768. if (vf == PORT_SELF_VF)
  769. eth_zero_addr(pp->vf_mac);
  770. return err;
  771. }
  772. static int enic_get_vf_port(struct net_device *netdev, int vf,
  773. struct sk_buff *skb)
  774. {
  775. struct enic *enic = netdev_priv(netdev);
  776. u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
  777. struct enic_port_profile *pp;
  778. int err;
  779. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  780. if (err)
  781. return err;
  782. if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
  783. return -ENODATA;
  784. err = enic_process_get_pp_request(enic, vf, pp->request, &response);
  785. if (err)
  786. return err;
  787. if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
  788. nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
  789. ((pp->set & ENIC_SET_NAME) &&
  790. nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
  791. ((pp->set & ENIC_SET_INSTANCE) &&
  792. nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
  793. pp->instance_uuid)) ||
  794. ((pp->set & ENIC_SET_HOST) &&
  795. nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
  796. goto nla_put_failure;
  797. return 0;
  798. nla_put_failure:
  799. return -EMSGSIZE;
  800. }
  801. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  802. {
  803. struct enic *enic = vnic_dev_priv(rq->vdev);
  804. if (!buf->os_buf)
  805. return;
  806. pci_unmap_single(enic->pdev, buf->dma_addr,
  807. buf->len, PCI_DMA_FROMDEVICE);
  808. dev_kfree_skb_any(buf->os_buf);
  809. buf->os_buf = NULL;
  810. }
  811. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  812. {
  813. struct enic *enic = vnic_dev_priv(rq->vdev);
  814. struct net_device *netdev = enic->netdev;
  815. struct sk_buff *skb;
  816. unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
  817. unsigned int os_buf_index = 0;
  818. dma_addr_t dma_addr;
  819. struct vnic_rq_buf *buf = rq->to_use;
  820. if (buf->os_buf) {
  821. enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr,
  822. buf->len);
  823. return 0;
  824. }
  825. skb = netdev_alloc_skb_ip_align(netdev, len);
  826. if (!skb)
  827. return -ENOMEM;
  828. dma_addr = pci_map_single(enic->pdev, skb->data, len,
  829. PCI_DMA_FROMDEVICE);
  830. if (unlikely(enic_dma_map_check(enic, dma_addr))) {
  831. dev_kfree_skb(skb);
  832. return -ENOMEM;
  833. }
  834. enic_queue_rq_desc(rq, skb, os_buf_index,
  835. dma_addr, len);
  836. return 0;
  837. }
  838. static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,
  839. u32 pkt_len)
  840. {
  841. if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len)
  842. pkt_size->large_pkt_bytes_cnt += pkt_len;
  843. else
  844. pkt_size->small_pkt_bytes_cnt += pkt_len;
  845. }
  846. static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb,
  847. struct vnic_rq_buf *buf, u16 len)
  848. {
  849. struct enic *enic = netdev_priv(netdev);
  850. struct sk_buff *new_skb;
  851. if (len > enic->rx_copybreak)
  852. return false;
  853. new_skb = netdev_alloc_skb_ip_align(netdev, len);
  854. if (!new_skb)
  855. return false;
  856. pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len,
  857. DMA_FROM_DEVICE);
  858. memcpy(new_skb->data, (*skb)->data, len);
  859. *skb = new_skb;
  860. return true;
  861. }
  862. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  863. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  864. int skipped, void *opaque)
  865. {
  866. struct enic *enic = vnic_dev_priv(rq->vdev);
  867. struct net_device *netdev = enic->netdev;
  868. struct sk_buff *skb;
  869. struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
  870. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  871. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  872. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  873. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  874. u8 packet_error;
  875. u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
  876. u32 rss_hash;
  877. if (skipped)
  878. return;
  879. skb = buf->os_buf;
  880. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  881. &type, &color, &q_number, &completed_index,
  882. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  883. &csum_not_calc, &rss_hash, &bytes_written,
  884. &packet_error, &vlan_stripped, &vlan_tci, &checksum,
  885. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  886. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  887. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  888. &fcs_ok);
  889. if (packet_error) {
  890. if (!fcs_ok) {
  891. if (bytes_written > 0)
  892. enic->rq_bad_fcs++;
  893. else if (bytes_written == 0)
  894. enic->rq_truncated_pkts++;
  895. }
  896. pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
  897. PCI_DMA_FROMDEVICE);
  898. dev_kfree_skb_any(skb);
  899. buf->os_buf = NULL;
  900. return;
  901. }
  902. if (eop && bytes_written > 0) {
  903. /* Good receive
  904. */
  905. if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) {
  906. buf->os_buf = NULL;
  907. pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
  908. PCI_DMA_FROMDEVICE);
  909. }
  910. prefetch(skb->data - NET_IP_ALIGN);
  911. skb_put(skb, bytes_written);
  912. skb->protocol = eth_type_trans(skb, netdev);
  913. skb_record_rx_queue(skb, q_number);
  914. if (netdev->features & NETIF_F_RXHASH) {
  915. skb_set_hash(skb, rss_hash,
  916. (rss_type &
  917. (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX |
  918. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 |
  919. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ?
  920. PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
  921. }
  922. /* Hardware does not provide whole packet checksum. It only
  923. * provides pseudo checksum. Since hw validates the packet
  924. * checksum but not provide us the checksum value. use
  925. * CHECSUM_UNNECESSARY.
  926. */
  927. if ((netdev->features & NETIF_F_RXCSUM) && tcp_udp_csum_ok &&
  928. ipv4_csum_ok)
  929. skb->ip_summed = CHECKSUM_UNNECESSARY;
  930. if (vlan_stripped)
  931. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
  932. skb_mark_napi_id(skb, &enic->napi[rq->index]);
  933. if (enic_poll_busy_polling(rq) ||
  934. !(netdev->features & NETIF_F_GRO))
  935. netif_receive_skb(skb);
  936. else
  937. napi_gro_receive(&enic->napi[q_number], skb);
  938. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  939. enic_intr_update_pkt_size(&cq->pkt_size_counter,
  940. bytes_written);
  941. } else {
  942. /* Buffer overflow
  943. */
  944. pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
  945. PCI_DMA_FROMDEVICE);
  946. dev_kfree_skb_any(skb);
  947. buf->os_buf = NULL;
  948. }
  949. }
  950. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  951. u8 type, u16 q_number, u16 completed_index, void *opaque)
  952. {
  953. struct enic *enic = vnic_dev_priv(vdev);
  954. vnic_rq_service(&enic->rq[q_number], cq_desc,
  955. completed_index, VNIC_RQ_RETURN_DESC,
  956. enic_rq_indicate_buf, opaque);
  957. return 0;
  958. }
  959. static int enic_poll(struct napi_struct *napi, int budget)
  960. {
  961. struct net_device *netdev = napi->dev;
  962. struct enic *enic = netdev_priv(netdev);
  963. unsigned int cq_rq = enic_cq_rq(enic, 0);
  964. unsigned int cq_wq = enic_cq_wq(enic, 0);
  965. unsigned int intr = enic_legacy_io_intr();
  966. unsigned int rq_work_to_do = budget;
  967. unsigned int wq_work_to_do = -1; /* no limit */
  968. unsigned int work_done, rq_work_done = 0, wq_work_done;
  969. int err;
  970. wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do,
  971. enic_wq_service, NULL);
  972. if (!enic_poll_lock_napi(&enic->rq[cq_rq])) {
  973. if (wq_work_done > 0)
  974. vnic_intr_return_credits(&enic->intr[intr],
  975. wq_work_done,
  976. 0 /* dont unmask intr */,
  977. 0 /* dont reset intr timer */);
  978. return rq_work_done;
  979. }
  980. if (budget > 0)
  981. rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
  982. rq_work_to_do, enic_rq_service, NULL);
  983. /* Accumulate intr event credits for this polling
  984. * cycle. An intr event is the completion of a
  985. * a WQ or RQ packet.
  986. */
  987. work_done = rq_work_done + wq_work_done;
  988. if (work_done > 0)
  989. vnic_intr_return_credits(&enic->intr[intr],
  990. work_done,
  991. 0 /* don't unmask intr */,
  992. 0 /* don't reset intr timer */);
  993. err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  994. /* Buffer allocation failed. Stay in polling
  995. * mode so we can try to fill the ring again.
  996. */
  997. if (err)
  998. rq_work_done = rq_work_to_do;
  999. if (rq_work_done < rq_work_to_do) {
  1000. /* Some work done, but not enough to stay in polling,
  1001. * exit polling
  1002. */
  1003. napi_complete(napi);
  1004. vnic_intr_unmask(&enic->intr[intr]);
  1005. }
  1006. enic_poll_unlock_napi(&enic->rq[cq_rq]);
  1007. return rq_work_done;
  1008. }
  1009. static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)
  1010. {
  1011. unsigned int intr = enic_msix_rq_intr(enic, rq->index);
  1012. struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
  1013. u32 timer = cq->tobe_rx_coal_timeval;
  1014. if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) {
  1015. vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);
  1016. cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval;
  1017. }
  1018. }
  1019. static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq)
  1020. {
  1021. struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
  1022. struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
  1023. struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter;
  1024. int index;
  1025. u32 timer;
  1026. u32 range_start;
  1027. u32 traffic;
  1028. u64 delta;
  1029. ktime_t now = ktime_get();
  1030. delta = ktime_us_delta(now, cq->prev_ts);
  1031. if (delta < ENIC_AIC_TS_BREAK)
  1032. return;
  1033. cq->prev_ts = now;
  1034. traffic = pkt_size_counter->large_pkt_bytes_cnt +
  1035. pkt_size_counter->small_pkt_bytes_cnt;
  1036. /* The table takes Mbps
  1037. * traffic *= 8 => bits
  1038. * traffic *= (10^6 / delta) => bps
  1039. * traffic /= 10^6 => Mbps
  1040. *
  1041. * Combining, traffic *= (8 / delta)
  1042. */
  1043. traffic <<= 3;
  1044. traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta;
  1045. for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++)
  1046. if (traffic < mod_table[index].rx_rate)
  1047. break;
  1048. range_start = (pkt_size_counter->small_pkt_bytes_cnt >
  1049. pkt_size_counter->large_pkt_bytes_cnt << 1) ?
  1050. rx_coal->small_pkt_range_start :
  1051. rx_coal->large_pkt_range_start;
  1052. timer = range_start + ((rx_coal->range_end - range_start) *
  1053. mod_table[index].range_percent / 100);
  1054. /* Damping */
  1055. cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1;
  1056. pkt_size_counter->large_pkt_bytes_cnt = 0;
  1057. pkt_size_counter->small_pkt_bytes_cnt = 0;
  1058. }
  1059. #ifdef CONFIG_RFS_ACCEL
  1060. static void enic_free_rx_cpu_rmap(struct enic *enic)
  1061. {
  1062. free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap);
  1063. enic->netdev->rx_cpu_rmap = NULL;
  1064. }
  1065. static void enic_set_rx_cpu_rmap(struct enic *enic)
  1066. {
  1067. int i, res;
  1068. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) {
  1069. enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count);
  1070. if (unlikely(!enic->netdev->rx_cpu_rmap))
  1071. return;
  1072. for (i = 0; i < enic->rq_count; i++) {
  1073. res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap,
  1074. enic->msix_entry[i].vector);
  1075. if (unlikely(res)) {
  1076. enic_free_rx_cpu_rmap(enic);
  1077. return;
  1078. }
  1079. }
  1080. }
  1081. }
  1082. #else
  1083. static void enic_free_rx_cpu_rmap(struct enic *enic)
  1084. {
  1085. }
  1086. static void enic_set_rx_cpu_rmap(struct enic *enic)
  1087. {
  1088. }
  1089. #endif /* CONFIG_RFS_ACCEL */
  1090. #ifdef CONFIG_NET_RX_BUSY_POLL
  1091. static int enic_busy_poll(struct napi_struct *napi)
  1092. {
  1093. struct net_device *netdev = napi->dev;
  1094. struct enic *enic = netdev_priv(netdev);
  1095. unsigned int rq = (napi - &enic->napi[0]);
  1096. unsigned int cq = enic_cq_rq(enic, rq);
  1097. unsigned int intr = enic_msix_rq_intr(enic, rq);
  1098. unsigned int work_to_do = -1; /* clean all pkts possible */
  1099. unsigned int work_done;
  1100. if (!enic_poll_lock_poll(&enic->rq[rq]))
  1101. return LL_FLUSH_BUSY;
  1102. work_done = vnic_cq_service(&enic->cq[cq], work_to_do,
  1103. enic_rq_service, NULL);
  1104. if (work_done > 0)
  1105. vnic_intr_return_credits(&enic->intr[intr],
  1106. work_done, 0, 0);
  1107. vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  1108. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  1109. enic_calc_int_moderation(enic, &enic->rq[rq]);
  1110. enic_poll_unlock_poll(&enic->rq[rq]);
  1111. return work_done;
  1112. }
  1113. #endif /* CONFIG_NET_RX_BUSY_POLL */
  1114. static int enic_poll_msix_wq(struct napi_struct *napi, int budget)
  1115. {
  1116. struct net_device *netdev = napi->dev;
  1117. struct enic *enic = netdev_priv(netdev);
  1118. unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count;
  1119. struct vnic_wq *wq = &enic->wq[wq_index];
  1120. unsigned int cq;
  1121. unsigned int intr;
  1122. unsigned int wq_work_to_do = -1; /* clean all desc possible */
  1123. unsigned int wq_work_done;
  1124. unsigned int wq_irq;
  1125. wq_irq = wq->index;
  1126. cq = enic_cq_wq(enic, wq_irq);
  1127. intr = enic_msix_wq_intr(enic, wq_irq);
  1128. wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do,
  1129. enic_wq_service, NULL);
  1130. vnic_intr_return_credits(&enic->intr[intr], wq_work_done,
  1131. 0 /* don't unmask intr */,
  1132. 1 /* reset intr timer */);
  1133. if (!wq_work_done) {
  1134. napi_complete(napi);
  1135. vnic_intr_unmask(&enic->intr[intr]);
  1136. return 0;
  1137. }
  1138. return budget;
  1139. }
  1140. static int enic_poll_msix_rq(struct napi_struct *napi, int budget)
  1141. {
  1142. struct net_device *netdev = napi->dev;
  1143. struct enic *enic = netdev_priv(netdev);
  1144. unsigned int rq = (napi - &enic->napi[0]);
  1145. unsigned int cq = enic_cq_rq(enic, rq);
  1146. unsigned int intr = enic_msix_rq_intr(enic, rq);
  1147. unsigned int work_to_do = budget;
  1148. unsigned int work_done = 0;
  1149. int err;
  1150. if (!enic_poll_lock_napi(&enic->rq[rq]))
  1151. return budget;
  1152. /* Service RQ
  1153. */
  1154. if (budget > 0)
  1155. work_done = vnic_cq_service(&enic->cq[cq],
  1156. work_to_do, enic_rq_service, NULL);
  1157. /* Return intr event credits for this polling
  1158. * cycle. An intr event is the completion of a
  1159. * RQ packet.
  1160. */
  1161. if (work_done > 0)
  1162. vnic_intr_return_credits(&enic->intr[intr],
  1163. work_done,
  1164. 0 /* don't unmask intr */,
  1165. 0 /* don't reset intr timer */);
  1166. err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  1167. /* Buffer allocation failed. Stay in polling mode
  1168. * so we can try to fill the ring again.
  1169. */
  1170. if (err)
  1171. work_done = work_to_do;
  1172. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  1173. /* Call the function which refreshes
  1174. * the intr coalescing timer value based on
  1175. * the traffic. This is supported only in
  1176. * the case of MSI-x mode
  1177. */
  1178. enic_calc_int_moderation(enic, &enic->rq[rq]);
  1179. enic_poll_unlock_napi(&enic->rq[rq]);
  1180. if (work_done < work_to_do) {
  1181. /* Some work done, but not enough to stay in polling,
  1182. * exit polling
  1183. */
  1184. napi_complete(napi);
  1185. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  1186. enic_set_int_moderation(enic, &enic->rq[rq]);
  1187. vnic_intr_unmask(&enic->intr[intr]);
  1188. }
  1189. return work_done;
  1190. }
  1191. static void enic_notify_timer(unsigned long data)
  1192. {
  1193. struct enic *enic = (struct enic *)data;
  1194. enic_notify_check(enic);
  1195. mod_timer(&enic->notify_timer,
  1196. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  1197. }
  1198. static void enic_free_intr(struct enic *enic)
  1199. {
  1200. struct net_device *netdev = enic->netdev;
  1201. unsigned int i;
  1202. enic_free_rx_cpu_rmap(enic);
  1203. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1204. case VNIC_DEV_INTR_MODE_INTX:
  1205. free_irq(enic->pdev->irq, netdev);
  1206. break;
  1207. case VNIC_DEV_INTR_MODE_MSI:
  1208. free_irq(enic->pdev->irq, enic);
  1209. break;
  1210. case VNIC_DEV_INTR_MODE_MSIX:
  1211. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1212. if (enic->msix[i].requested)
  1213. free_irq(enic->msix_entry[i].vector,
  1214. enic->msix[i].devid);
  1215. break;
  1216. default:
  1217. break;
  1218. }
  1219. }
  1220. static int enic_request_intr(struct enic *enic)
  1221. {
  1222. struct net_device *netdev = enic->netdev;
  1223. unsigned int i, intr;
  1224. int err = 0;
  1225. enic_set_rx_cpu_rmap(enic);
  1226. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1227. case VNIC_DEV_INTR_MODE_INTX:
  1228. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1229. IRQF_SHARED, netdev->name, netdev);
  1230. break;
  1231. case VNIC_DEV_INTR_MODE_MSI:
  1232. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1233. 0, netdev->name, enic);
  1234. break;
  1235. case VNIC_DEV_INTR_MODE_MSIX:
  1236. for (i = 0; i < enic->rq_count; i++) {
  1237. intr = enic_msix_rq_intr(enic, i);
  1238. snprintf(enic->msix[intr].devname,
  1239. sizeof(enic->msix[intr].devname),
  1240. "%.11s-rx-%d", netdev->name, i);
  1241. enic->msix[intr].isr = enic_isr_msix;
  1242. enic->msix[intr].devid = &enic->napi[i];
  1243. }
  1244. for (i = 0; i < enic->wq_count; i++) {
  1245. int wq = enic_cq_wq(enic, i);
  1246. intr = enic_msix_wq_intr(enic, i);
  1247. snprintf(enic->msix[intr].devname,
  1248. sizeof(enic->msix[intr].devname),
  1249. "%.11s-tx-%d", netdev->name, i);
  1250. enic->msix[intr].isr = enic_isr_msix;
  1251. enic->msix[intr].devid = &enic->napi[wq];
  1252. }
  1253. intr = enic_msix_err_intr(enic);
  1254. snprintf(enic->msix[intr].devname,
  1255. sizeof(enic->msix[intr].devname),
  1256. "%.11s-err", netdev->name);
  1257. enic->msix[intr].isr = enic_isr_msix_err;
  1258. enic->msix[intr].devid = enic;
  1259. intr = enic_msix_notify_intr(enic);
  1260. snprintf(enic->msix[intr].devname,
  1261. sizeof(enic->msix[intr].devname),
  1262. "%.11s-notify", netdev->name);
  1263. enic->msix[intr].isr = enic_isr_msix_notify;
  1264. enic->msix[intr].devid = enic;
  1265. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1266. enic->msix[i].requested = 0;
  1267. for (i = 0; i < enic->intr_count; i++) {
  1268. err = request_irq(enic->msix_entry[i].vector,
  1269. enic->msix[i].isr, 0,
  1270. enic->msix[i].devname,
  1271. enic->msix[i].devid);
  1272. if (err) {
  1273. enic_free_intr(enic);
  1274. break;
  1275. }
  1276. enic->msix[i].requested = 1;
  1277. }
  1278. break;
  1279. default:
  1280. break;
  1281. }
  1282. return err;
  1283. }
  1284. static void enic_synchronize_irqs(struct enic *enic)
  1285. {
  1286. unsigned int i;
  1287. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1288. case VNIC_DEV_INTR_MODE_INTX:
  1289. case VNIC_DEV_INTR_MODE_MSI:
  1290. synchronize_irq(enic->pdev->irq);
  1291. break;
  1292. case VNIC_DEV_INTR_MODE_MSIX:
  1293. for (i = 0; i < enic->intr_count; i++)
  1294. synchronize_irq(enic->msix_entry[i].vector);
  1295. break;
  1296. default:
  1297. break;
  1298. }
  1299. }
  1300. static void enic_set_rx_coal_setting(struct enic *enic)
  1301. {
  1302. unsigned int speed;
  1303. int index = -1;
  1304. struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
  1305. /* If intr mode is not MSIX, do not do adaptive coalescing */
  1306. if (VNIC_DEV_INTR_MODE_MSIX != vnic_dev_get_intr_mode(enic->vdev)) {
  1307. netdev_info(enic->netdev, "INTR mode is not MSIX, Not initializing adaptive coalescing");
  1308. return;
  1309. }
  1310. /* 1. Read the link speed from fw
  1311. * 2. Pick the default range for the speed
  1312. * 3. Update it in enic->rx_coalesce_setting
  1313. */
  1314. speed = vnic_dev_port_speed(enic->vdev);
  1315. if (ENIC_LINK_SPEED_10G < speed)
  1316. index = ENIC_LINK_40G_INDEX;
  1317. else if (ENIC_LINK_SPEED_4G < speed)
  1318. index = ENIC_LINK_10G_INDEX;
  1319. else
  1320. index = ENIC_LINK_4G_INDEX;
  1321. rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start;
  1322. rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start;
  1323. rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END;
  1324. /* Start with the value provided by UCSM */
  1325. for (index = 0; index < enic->rq_count; index++)
  1326. enic->cq[index].cur_rx_coal_timeval =
  1327. enic->config.intr_timer_usec;
  1328. rx_coal->use_adaptive_rx_coalesce = 1;
  1329. }
  1330. static int enic_dev_notify_set(struct enic *enic)
  1331. {
  1332. int err;
  1333. spin_lock_bh(&enic->devcmd_lock);
  1334. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1335. case VNIC_DEV_INTR_MODE_INTX:
  1336. err = vnic_dev_notify_set(enic->vdev,
  1337. enic_legacy_notify_intr());
  1338. break;
  1339. case VNIC_DEV_INTR_MODE_MSIX:
  1340. err = vnic_dev_notify_set(enic->vdev,
  1341. enic_msix_notify_intr(enic));
  1342. break;
  1343. default:
  1344. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1345. break;
  1346. }
  1347. spin_unlock_bh(&enic->devcmd_lock);
  1348. return err;
  1349. }
  1350. static void enic_notify_timer_start(struct enic *enic)
  1351. {
  1352. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1353. case VNIC_DEV_INTR_MODE_MSI:
  1354. mod_timer(&enic->notify_timer, jiffies);
  1355. break;
  1356. default:
  1357. /* Using intr for notification for INTx/MSI-X */
  1358. break;
  1359. }
  1360. }
  1361. /* rtnl lock is held, process context */
  1362. static int enic_open(struct net_device *netdev)
  1363. {
  1364. struct enic *enic = netdev_priv(netdev);
  1365. unsigned int i;
  1366. int err;
  1367. err = enic_request_intr(enic);
  1368. if (err) {
  1369. netdev_err(netdev, "Unable to request irq.\n");
  1370. return err;
  1371. }
  1372. err = enic_dev_notify_set(enic);
  1373. if (err) {
  1374. netdev_err(netdev,
  1375. "Failed to alloc notify buffer, aborting.\n");
  1376. goto err_out_free_intr;
  1377. }
  1378. for (i = 0; i < enic->rq_count; i++) {
  1379. vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
  1380. /* Need at least one buffer on ring to get going */
  1381. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1382. netdev_err(netdev, "Unable to alloc receive buffers\n");
  1383. err = -ENOMEM;
  1384. goto err_out_free_rq;
  1385. }
  1386. }
  1387. for (i = 0; i < enic->wq_count; i++)
  1388. vnic_wq_enable(&enic->wq[i]);
  1389. for (i = 0; i < enic->rq_count; i++)
  1390. vnic_rq_enable(&enic->rq[i]);
  1391. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1392. enic_dev_add_station_addr(enic);
  1393. enic_set_rx_mode(netdev);
  1394. netif_tx_wake_all_queues(netdev);
  1395. for (i = 0; i < enic->rq_count; i++) {
  1396. enic_busy_poll_init_lock(&enic->rq[i]);
  1397. napi_enable(&enic->napi[i]);
  1398. }
  1399. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
  1400. for (i = 0; i < enic->wq_count; i++)
  1401. napi_enable(&enic->napi[enic_cq_wq(enic, i)]);
  1402. enic_dev_enable(enic);
  1403. for (i = 0; i < enic->intr_count; i++)
  1404. vnic_intr_unmask(&enic->intr[i]);
  1405. enic_notify_timer_start(enic);
  1406. enic_rfs_flw_tbl_init(enic);
  1407. return 0;
  1408. err_out_free_rq:
  1409. for (i = 0; i < enic->rq_count; i++)
  1410. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1411. enic_dev_notify_unset(enic);
  1412. err_out_free_intr:
  1413. enic_free_intr(enic);
  1414. return err;
  1415. }
  1416. /* rtnl lock is held, process context */
  1417. static int enic_stop(struct net_device *netdev)
  1418. {
  1419. struct enic *enic = netdev_priv(netdev);
  1420. unsigned int i;
  1421. int err;
  1422. for (i = 0; i < enic->intr_count; i++) {
  1423. vnic_intr_mask(&enic->intr[i]);
  1424. (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
  1425. }
  1426. enic_synchronize_irqs(enic);
  1427. del_timer_sync(&enic->notify_timer);
  1428. enic_rfs_flw_tbl_free(enic);
  1429. enic_dev_disable(enic);
  1430. for (i = 0; i < enic->rq_count; i++) {
  1431. napi_disable(&enic->napi[i]);
  1432. local_bh_disable();
  1433. while (!enic_poll_lock_napi(&enic->rq[i]))
  1434. mdelay(1);
  1435. local_bh_enable();
  1436. }
  1437. netif_carrier_off(netdev);
  1438. netif_tx_disable(netdev);
  1439. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
  1440. for (i = 0; i < enic->wq_count; i++)
  1441. napi_disable(&enic->napi[enic_cq_wq(enic, i)]);
  1442. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1443. enic_dev_del_station_addr(enic);
  1444. for (i = 0; i < enic->wq_count; i++) {
  1445. err = vnic_wq_disable(&enic->wq[i]);
  1446. if (err)
  1447. return err;
  1448. }
  1449. for (i = 0; i < enic->rq_count; i++) {
  1450. err = vnic_rq_disable(&enic->rq[i]);
  1451. if (err)
  1452. return err;
  1453. }
  1454. enic_dev_notify_unset(enic);
  1455. enic_free_intr(enic);
  1456. for (i = 0; i < enic->wq_count; i++)
  1457. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1458. for (i = 0; i < enic->rq_count; i++)
  1459. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1460. for (i = 0; i < enic->cq_count; i++)
  1461. vnic_cq_clean(&enic->cq[i]);
  1462. for (i = 0; i < enic->intr_count; i++)
  1463. vnic_intr_clean(&enic->intr[i]);
  1464. return 0;
  1465. }
  1466. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1467. {
  1468. struct enic *enic = netdev_priv(netdev);
  1469. int running = netif_running(netdev);
  1470. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1471. return -EINVAL;
  1472. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  1473. return -EOPNOTSUPP;
  1474. if (running)
  1475. enic_stop(netdev);
  1476. netdev->mtu = new_mtu;
  1477. if (netdev->mtu > enic->port_mtu)
  1478. netdev_warn(netdev,
  1479. "interface MTU (%d) set higher than port MTU (%d)\n",
  1480. netdev->mtu, enic->port_mtu);
  1481. if (running)
  1482. enic_open(netdev);
  1483. return 0;
  1484. }
  1485. static void enic_change_mtu_work(struct work_struct *work)
  1486. {
  1487. struct enic *enic = container_of(work, struct enic, change_mtu_work);
  1488. struct net_device *netdev = enic->netdev;
  1489. int new_mtu = vnic_dev_mtu(enic->vdev);
  1490. int err;
  1491. unsigned int i;
  1492. new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
  1493. rtnl_lock();
  1494. /* Stop RQ */
  1495. del_timer_sync(&enic->notify_timer);
  1496. for (i = 0; i < enic->rq_count; i++)
  1497. napi_disable(&enic->napi[i]);
  1498. vnic_intr_mask(&enic->intr[0]);
  1499. enic_synchronize_irqs(enic);
  1500. err = vnic_rq_disable(&enic->rq[0]);
  1501. if (err) {
  1502. rtnl_unlock();
  1503. netdev_err(netdev, "Unable to disable RQ.\n");
  1504. return;
  1505. }
  1506. vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
  1507. vnic_cq_clean(&enic->cq[0]);
  1508. vnic_intr_clean(&enic->intr[0]);
  1509. /* Fill RQ with new_mtu-sized buffers */
  1510. netdev->mtu = new_mtu;
  1511. vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1512. /* Need at least one buffer on ring to get going */
  1513. if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
  1514. rtnl_unlock();
  1515. netdev_err(netdev, "Unable to alloc receive buffers.\n");
  1516. return;
  1517. }
  1518. /* Start RQ */
  1519. vnic_rq_enable(&enic->rq[0]);
  1520. napi_enable(&enic->napi[0]);
  1521. vnic_intr_unmask(&enic->intr[0]);
  1522. enic_notify_timer_start(enic);
  1523. rtnl_unlock();
  1524. netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
  1525. }
  1526. #ifdef CONFIG_NET_POLL_CONTROLLER
  1527. static void enic_poll_controller(struct net_device *netdev)
  1528. {
  1529. struct enic *enic = netdev_priv(netdev);
  1530. struct vnic_dev *vdev = enic->vdev;
  1531. unsigned int i, intr;
  1532. switch (vnic_dev_get_intr_mode(vdev)) {
  1533. case VNIC_DEV_INTR_MODE_MSIX:
  1534. for (i = 0; i < enic->rq_count; i++) {
  1535. intr = enic_msix_rq_intr(enic, i);
  1536. enic_isr_msix(enic->msix_entry[intr].vector,
  1537. &enic->napi[i]);
  1538. }
  1539. for (i = 0; i < enic->wq_count; i++) {
  1540. intr = enic_msix_wq_intr(enic, i);
  1541. enic_isr_msix(enic->msix_entry[intr].vector,
  1542. &enic->napi[enic_cq_wq(enic, i)]);
  1543. }
  1544. break;
  1545. case VNIC_DEV_INTR_MODE_MSI:
  1546. enic_isr_msi(enic->pdev->irq, enic);
  1547. break;
  1548. case VNIC_DEV_INTR_MODE_INTX:
  1549. enic_isr_legacy(enic->pdev->irq, netdev);
  1550. break;
  1551. default:
  1552. break;
  1553. }
  1554. }
  1555. #endif
  1556. static int enic_dev_wait(struct vnic_dev *vdev,
  1557. int (*start)(struct vnic_dev *, int),
  1558. int (*finished)(struct vnic_dev *, int *),
  1559. int arg)
  1560. {
  1561. unsigned long time;
  1562. int done;
  1563. int err;
  1564. BUG_ON(in_interrupt());
  1565. err = start(vdev, arg);
  1566. if (err)
  1567. return err;
  1568. /* Wait for func to complete...2 seconds max
  1569. */
  1570. time = jiffies + (HZ * 2);
  1571. do {
  1572. err = finished(vdev, &done);
  1573. if (err)
  1574. return err;
  1575. if (done)
  1576. return 0;
  1577. schedule_timeout_uninterruptible(HZ / 10);
  1578. } while (time_after(time, jiffies));
  1579. return -ETIMEDOUT;
  1580. }
  1581. static int enic_dev_open(struct enic *enic)
  1582. {
  1583. int err;
  1584. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1585. vnic_dev_open_done, 0);
  1586. if (err)
  1587. dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
  1588. err);
  1589. return err;
  1590. }
  1591. static int enic_dev_hang_reset(struct enic *enic)
  1592. {
  1593. int err;
  1594. err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
  1595. vnic_dev_hang_reset_done, 0);
  1596. if (err)
  1597. netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
  1598. err);
  1599. return err;
  1600. }
  1601. int __enic_set_rsskey(struct enic *enic)
  1602. {
  1603. union vnic_rss_key *rss_key_buf_va;
  1604. dma_addr_t rss_key_buf_pa;
  1605. int i, kidx, bidx, err;
  1606. rss_key_buf_va = pci_zalloc_consistent(enic->pdev,
  1607. sizeof(union vnic_rss_key),
  1608. &rss_key_buf_pa);
  1609. if (!rss_key_buf_va)
  1610. return -ENOMEM;
  1611. for (i = 0; i < ENIC_RSS_LEN; i++) {
  1612. kidx = i / ENIC_RSS_BYTES_PER_KEY;
  1613. bidx = i % ENIC_RSS_BYTES_PER_KEY;
  1614. rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i];
  1615. }
  1616. spin_lock_bh(&enic->devcmd_lock);
  1617. err = enic_set_rss_key(enic,
  1618. rss_key_buf_pa,
  1619. sizeof(union vnic_rss_key));
  1620. spin_unlock_bh(&enic->devcmd_lock);
  1621. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
  1622. rss_key_buf_va, rss_key_buf_pa);
  1623. return err;
  1624. }
  1625. static int enic_set_rsskey(struct enic *enic)
  1626. {
  1627. netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN);
  1628. return __enic_set_rsskey(enic);
  1629. }
  1630. static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
  1631. {
  1632. dma_addr_t rss_cpu_buf_pa;
  1633. union vnic_rss_cpu *rss_cpu_buf_va = NULL;
  1634. unsigned int i;
  1635. int err;
  1636. rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
  1637. sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
  1638. if (!rss_cpu_buf_va)
  1639. return -ENOMEM;
  1640. for (i = 0; i < (1 << rss_hash_bits); i++)
  1641. (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
  1642. spin_lock_bh(&enic->devcmd_lock);
  1643. err = enic_set_rss_cpu(enic,
  1644. rss_cpu_buf_pa,
  1645. sizeof(union vnic_rss_cpu));
  1646. spin_unlock_bh(&enic->devcmd_lock);
  1647. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
  1648. rss_cpu_buf_va, rss_cpu_buf_pa);
  1649. return err;
  1650. }
  1651. static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
  1652. u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
  1653. {
  1654. const u8 tso_ipid_split_en = 0;
  1655. const u8 ig_vlan_strip_en = 1;
  1656. int err;
  1657. /* Enable VLAN tag stripping.
  1658. */
  1659. spin_lock_bh(&enic->devcmd_lock);
  1660. err = enic_set_nic_cfg(enic,
  1661. rss_default_cpu, rss_hash_type,
  1662. rss_hash_bits, rss_base_cpu,
  1663. rss_enable, tso_ipid_split_en,
  1664. ig_vlan_strip_en);
  1665. spin_unlock_bh(&enic->devcmd_lock);
  1666. return err;
  1667. }
  1668. static int enic_set_rss_nic_cfg(struct enic *enic)
  1669. {
  1670. struct device *dev = enic_get_dev(enic);
  1671. const u8 rss_default_cpu = 0;
  1672. const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
  1673. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
  1674. NIC_CFG_RSS_HASH_TYPE_IPV6 |
  1675. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
  1676. const u8 rss_hash_bits = 7;
  1677. const u8 rss_base_cpu = 0;
  1678. u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
  1679. if (rss_enable) {
  1680. if (!enic_set_rsskey(enic)) {
  1681. if (enic_set_rsscpu(enic, rss_hash_bits)) {
  1682. rss_enable = 0;
  1683. dev_warn(dev, "RSS disabled, "
  1684. "Failed to set RSS cpu indirection table.");
  1685. }
  1686. } else {
  1687. rss_enable = 0;
  1688. dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
  1689. }
  1690. }
  1691. return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
  1692. rss_hash_bits, rss_base_cpu, rss_enable);
  1693. }
  1694. static void enic_reset(struct work_struct *work)
  1695. {
  1696. struct enic *enic = container_of(work, struct enic, reset);
  1697. if (!netif_running(enic->netdev))
  1698. return;
  1699. rtnl_lock();
  1700. spin_lock(&enic->enic_api_lock);
  1701. enic_dev_hang_notify(enic);
  1702. enic_stop(enic->netdev);
  1703. enic_dev_hang_reset(enic);
  1704. enic_reset_addr_lists(enic);
  1705. enic_init_vnic_resources(enic);
  1706. enic_set_rss_nic_cfg(enic);
  1707. enic_dev_set_ig_vlan_rewrite_mode(enic);
  1708. enic_open(enic->netdev);
  1709. spin_unlock(&enic->enic_api_lock);
  1710. call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
  1711. rtnl_unlock();
  1712. }
  1713. static int enic_set_intr_mode(struct enic *enic)
  1714. {
  1715. unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
  1716. unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
  1717. unsigned int i;
  1718. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1719. * on system capabilities.
  1720. *
  1721. * Try MSI-X first
  1722. *
  1723. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1724. * (the second to last INTR is used for WQ/RQ errors)
  1725. * (the last INTR is used for notifications)
  1726. */
  1727. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1728. for (i = 0; i < n + m + 2; i++)
  1729. enic->msix_entry[i].entry = i;
  1730. /* Use multiple RQs if RSS is enabled
  1731. */
  1732. if (ENIC_SETTING(enic, RSS) &&
  1733. enic->config.intr_mode < 1 &&
  1734. enic->rq_count >= n &&
  1735. enic->wq_count >= m &&
  1736. enic->cq_count >= n + m &&
  1737. enic->intr_count >= n + m + 2) {
  1738. if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
  1739. n + m + 2, n + m + 2) > 0) {
  1740. enic->rq_count = n;
  1741. enic->wq_count = m;
  1742. enic->cq_count = n + m;
  1743. enic->intr_count = n + m + 2;
  1744. vnic_dev_set_intr_mode(enic->vdev,
  1745. VNIC_DEV_INTR_MODE_MSIX);
  1746. return 0;
  1747. }
  1748. }
  1749. if (enic->config.intr_mode < 1 &&
  1750. enic->rq_count >= 1 &&
  1751. enic->wq_count >= m &&
  1752. enic->cq_count >= 1 + m &&
  1753. enic->intr_count >= 1 + m + 2) {
  1754. if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
  1755. 1 + m + 2, 1 + m + 2) > 0) {
  1756. enic->rq_count = 1;
  1757. enic->wq_count = m;
  1758. enic->cq_count = 1 + m;
  1759. enic->intr_count = 1 + m + 2;
  1760. vnic_dev_set_intr_mode(enic->vdev,
  1761. VNIC_DEV_INTR_MODE_MSIX);
  1762. return 0;
  1763. }
  1764. }
  1765. /* Next try MSI
  1766. *
  1767. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1768. */
  1769. if (enic->config.intr_mode < 2 &&
  1770. enic->rq_count >= 1 &&
  1771. enic->wq_count >= 1 &&
  1772. enic->cq_count >= 2 &&
  1773. enic->intr_count >= 1 &&
  1774. !pci_enable_msi(enic->pdev)) {
  1775. enic->rq_count = 1;
  1776. enic->wq_count = 1;
  1777. enic->cq_count = 2;
  1778. enic->intr_count = 1;
  1779. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1780. return 0;
  1781. }
  1782. /* Next try INTx
  1783. *
  1784. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1785. * (the first INTR is used for WQ/RQ)
  1786. * (the second INTR is used for WQ/RQ errors)
  1787. * (the last INTR is used for notifications)
  1788. */
  1789. if (enic->config.intr_mode < 3 &&
  1790. enic->rq_count >= 1 &&
  1791. enic->wq_count >= 1 &&
  1792. enic->cq_count >= 2 &&
  1793. enic->intr_count >= 3) {
  1794. enic->rq_count = 1;
  1795. enic->wq_count = 1;
  1796. enic->cq_count = 2;
  1797. enic->intr_count = 3;
  1798. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1799. return 0;
  1800. }
  1801. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1802. return -EINVAL;
  1803. }
  1804. static void enic_clear_intr_mode(struct enic *enic)
  1805. {
  1806. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1807. case VNIC_DEV_INTR_MODE_MSIX:
  1808. pci_disable_msix(enic->pdev);
  1809. break;
  1810. case VNIC_DEV_INTR_MODE_MSI:
  1811. pci_disable_msi(enic->pdev);
  1812. break;
  1813. default:
  1814. break;
  1815. }
  1816. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1817. }
  1818. static const struct net_device_ops enic_netdev_dynamic_ops = {
  1819. .ndo_open = enic_open,
  1820. .ndo_stop = enic_stop,
  1821. .ndo_start_xmit = enic_hard_start_xmit,
  1822. .ndo_get_stats64 = enic_get_stats,
  1823. .ndo_validate_addr = eth_validate_addr,
  1824. .ndo_set_rx_mode = enic_set_rx_mode,
  1825. .ndo_set_mac_address = enic_set_mac_address_dynamic,
  1826. .ndo_change_mtu = enic_change_mtu,
  1827. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1828. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1829. .ndo_tx_timeout = enic_tx_timeout,
  1830. .ndo_set_vf_port = enic_set_vf_port,
  1831. .ndo_get_vf_port = enic_get_vf_port,
  1832. .ndo_set_vf_mac = enic_set_vf_mac,
  1833. #ifdef CONFIG_NET_POLL_CONTROLLER
  1834. .ndo_poll_controller = enic_poll_controller,
  1835. #endif
  1836. #ifdef CONFIG_RFS_ACCEL
  1837. .ndo_rx_flow_steer = enic_rx_flow_steer,
  1838. #endif
  1839. #ifdef CONFIG_NET_RX_BUSY_POLL
  1840. .ndo_busy_poll = enic_busy_poll,
  1841. #endif
  1842. };
  1843. static const struct net_device_ops enic_netdev_ops = {
  1844. .ndo_open = enic_open,
  1845. .ndo_stop = enic_stop,
  1846. .ndo_start_xmit = enic_hard_start_xmit,
  1847. .ndo_get_stats64 = enic_get_stats,
  1848. .ndo_validate_addr = eth_validate_addr,
  1849. .ndo_set_mac_address = enic_set_mac_address,
  1850. .ndo_set_rx_mode = enic_set_rx_mode,
  1851. .ndo_change_mtu = enic_change_mtu,
  1852. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1853. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1854. .ndo_tx_timeout = enic_tx_timeout,
  1855. .ndo_set_vf_port = enic_set_vf_port,
  1856. .ndo_get_vf_port = enic_get_vf_port,
  1857. .ndo_set_vf_mac = enic_set_vf_mac,
  1858. #ifdef CONFIG_NET_POLL_CONTROLLER
  1859. .ndo_poll_controller = enic_poll_controller,
  1860. #endif
  1861. #ifdef CONFIG_RFS_ACCEL
  1862. .ndo_rx_flow_steer = enic_rx_flow_steer,
  1863. #endif
  1864. #ifdef CONFIG_NET_RX_BUSY_POLL
  1865. .ndo_busy_poll = enic_busy_poll,
  1866. #endif
  1867. };
  1868. static void enic_dev_deinit(struct enic *enic)
  1869. {
  1870. unsigned int i;
  1871. for (i = 0; i < enic->rq_count; i++) {
  1872. napi_hash_del(&enic->napi[i]);
  1873. netif_napi_del(&enic->napi[i]);
  1874. }
  1875. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
  1876. for (i = 0; i < enic->wq_count; i++)
  1877. netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]);
  1878. enic_free_vnic_resources(enic);
  1879. enic_clear_intr_mode(enic);
  1880. }
  1881. static void enic_kdump_kernel_config(struct enic *enic)
  1882. {
  1883. if (is_kdump_kernel()) {
  1884. dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");
  1885. enic->rq_count = 1;
  1886. enic->wq_count = 1;
  1887. enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS;
  1888. enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS;
  1889. enic->config.mtu = min_t(u16, 1500, enic->config.mtu);
  1890. }
  1891. }
  1892. static int enic_dev_init(struct enic *enic)
  1893. {
  1894. struct device *dev = enic_get_dev(enic);
  1895. struct net_device *netdev = enic->netdev;
  1896. unsigned int i;
  1897. int err;
  1898. /* Get interrupt coalesce timer info */
  1899. err = enic_dev_intr_coal_timer_info(enic);
  1900. if (err) {
  1901. dev_warn(dev, "Using default conversion factor for "
  1902. "interrupt coalesce timer\n");
  1903. vnic_dev_intr_coal_timer_info_default(enic->vdev);
  1904. }
  1905. /* Get vNIC configuration
  1906. */
  1907. err = enic_get_vnic_config(enic);
  1908. if (err) {
  1909. dev_err(dev, "Get vNIC configuration failed, aborting\n");
  1910. return err;
  1911. }
  1912. /* Get available resource counts
  1913. */
  1914. enic_get_res_counts(enic);
  1915. /* modify resource count if we are in kdump_kernel
  1916. */
  1917. enic_kdump_kernel_config(enic);
  1918. /* Set interrupt mode based on resource counts and system
  1919. * capabilities
  1920. */
  1921. err = enic_set_intr_mode(enic);
  1922. if (err) {
  1923. dev_err(dev, "Failed to set intr mode based on resource "
  1924. "counts and system capabilities, aborting\n");
  1925. return err;
  1926. }
  1927. /* Allocate and configure vNIC resources
  1928. */
  1929. err = enic_alloc_vnic_resources(enic);
  1930. if (err) {
  1931. dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
  1932. goto err_out_free_vnic_resources;
  1933. }
  1934. enic_init_vnic_resources(enic);
  1935. err = enic_set_rss_nic_cfg(enic);
  1936. if (err) {
  1937. dev_err(dev, "Failed to config nic, aborting\n");
  1938. goto err_out_free_vnic_resources;
  1939. }
  1940. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1941. default:
  1942. netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
  1943. napi_hash_add(&enic->napi[0]);
  1944. break;
  1945. case VNIC_DEV_INTR_MODE_MSIX:
  1946. for (i = 0; i < enic->rq_count; i++) {
  1947. netif_napi_add(netdev, &enic->napi[i],
  1948. enic_poll_msix_rq, NAPI_POLL_WEIGHT);
  1949. napi_hash_add(&enic->napi[i]);
  1950. }
  1951. for (i = 0; i < enic->wq_count; i++)
  1952. netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)],
  1953. enic_poll_msix_wq, NAPI_POLL_WEIGHT);
  1954. break;
  1955. }
  1956. return 0;
  1957. err_out_free_vnic_resources:
  1958. enic_clear_intr_mode(enic);
  1959. enic_free_vnic_resources(enic);
  1960. return err;
  1961. }
  1962. static void enic_iounmap(struct enic *enic)
  1963. {
  1964. unsigned int i;
  1965. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1966. if (enic->bar[i].vaddr)
  1967. iounmap(enic->bar[i].vaddr);
  1968. }
  1969. static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1970. {
  1971. struct device *dev = &pdev->dev;
  1972. struct net_device *netdev;
  1973. struct enic *enic;
  1974. int using_dac = 0;
  1975. unsigned int i;
  1976. int err;
  1977. #ifdef CONFIG_PCI_IOV
  1978. int pos = 0;
  1979. #endif
  1980. int num_pps = 1;
  1981. /* Allocate net device structure and initialize. Private
  1982. * instance data is initialized to zero.
  1983. */
  1984. netdev = alloc_etherdev_mqs(sizeof(struct enic),
  1985. ENIC_RQ_MAX, ENIC_WQ_MAX);
  1986. if (!netdev)
  1987. return -ENOMEM;
  1988. pci_set_drvdata(pdev, netdev);
  1989. SET_NETDEV_DEV(netdev, &pdev->dev);
  1990. enic = netdev_priv(netdev);
  1991. enic->netdev = netdev;
  1992. enic->pdev = pdev;
  1993. /* Setup PCI resources
  1994. */
  1995. err = pci_enable_device_mem(pdev);
  1996. if (err) {
  1997. dev_err(dev, "Cannot enable PCI device, aborting\n");
  1998. goto err_out_free_netdev;
  1999. }
  2000. err = pci_request_regions(pdev, DRV_NAME);
  2001. if (err) {
  2002. dev_err(dev, "Cannot request PCI regions, aborting\n");
  2003. goto err_out_disable_device;
  2004. }
  2005. pci_set_master(pdev);
  2006. /* Query PCI controller on system for DMA addressing
  2007. * limitation for the device. Try 64-bit first, and
  2008. * fail to 32-bit.
  2009. */
  2010. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  2011. if (err) {
  2012. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  2013. if (err) {
  2014. dev_err(dev, "No usable DMA configuration, aborting\n");
  2015. goto err_out_release_regions;
  2016. }
  2017. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2018. if (err) {
  2019. dev_err(dev, "Unable to obtain %u-bit DMA "
  2020. "for consistent allocations, aborting\n", 32);
  2021. goto err_out_release_regions;
  2022. }
  2023. } else {
  2024. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
  2025. if (err) {
  2026. dev_err(dev, "Unable to obtain %u-bit DMA "
  2027. "for consistent allocations, aborting\n", 64);
  2028. goto err_out_release_regions;
  2029. }
  2030. using_dac = 1;
  2031. }
  2032. /* Map vNIC resources from BAR0-5
  2033. */
  2034. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  2035. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  2036. continue;
  2037. enic->bar[i].len = pci_resource_len(pdev, i);
  2038. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  2039. if (!enic->bar[i].vaddr) {
  2040. dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
  2041. err = -ENODEV;
  2042. goto err_out_iounmap;
  2043. }
  2044. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  2045. }
  2046. /* Register vNIC device
  2047. */
  2048. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  2049. ARRAY_SIZE(enic->bar));
  2050. if (!enic->vdev) {
  2051. dev_err(dev, "vNIC registration failed, aborting\n");
  2052. err = -ENODEV;
  2053. goto err_out_iounmap;
  2054. }
  2055. #ifdef CONFIG_PCI_IOV
  2056. /* Get number of subvnics */
  2057. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
  2058. if (pos) {
  2059. pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
  2060. &enic->num_vfs);
  2061. if (enic->num_vfs) {
  2062. err = pci_enable_sriov(pdev, enic->num_vfs);
  2063. if (err) {
  2064. dev_err(dev, "SRIOV enable failed, aborting."
  2065. " pci_enable_sriov() returned %d\n",
  2066. err);
  2067. goto err_out_vnic_unregister;
  2068. }
  2069. enic->priv_flags |= ENIC_SRIOV_ENABLED;
  2070. num_pps = enic->num_vfs;
  2071. }
  2072. }
  2073. #endif
  2074. /* Allocate structure for port profiles */
  2075. enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
  2076. if (!enic->pp) {
  2077. err = -ENOMEM;
  2078. goto err_out_disable_sriov_pp;
  2079. }
  2080. /* Issue device open to get device in known state
  2081. */
  2082. err = enic_dev_open(enic);
  2083. if (err) {
  2084. dev_err(dev, "vNIC dev open failed, aborting\n");
  2085. goto err_out_disable_sriov;
  2086. }
  2087. /* Setup devcmd lock
  2088. */
  2089. spin_lock_init(&enic->devcmd_lock);
  2090. spin_lock_init(&enic->enic_api_lock);
  2091. /*
  2092. * Set ingress vlan rewrite mode before vnic initialization
  2093. */
  2094. err = enic_dev_set_ig_vlan_rewrite_mode(enic);
  2095. if (err) {
  2096. dev_err(dev,
  2097. "Failed to set ingress vlan rewrite mode, aborting.\n");
  2098. goto err_out_dev_close;
  2099. }
  2100. /* Issue device init to initialize the vnic-to-switch link.
  2101. * We'll start with carrier off and wait for link UP
  2102. * notification later to turn on carrier. We don't need
  2103. * to wait here for the vnic-to-switch link initialization
  2104. * to complete; link UP notification is the indication that
  2105. * the process is complete.
  2106. */
  2107. netif_carrier_off(netdev);
  2108. /* Do not call dev_init for a dynamic vnic.
  2109. * For a dynamic vnic, init_prov_info will be
  2110. * called later by an upper layer.
  2111. */
  2112. if (!enic_is_dynamic(enic)) {
  2113. err = vnic_dev_init(enic->vdev, 0);
  2114. if (err) {
  2115. dev_err(dev, "vNIC dev init failed, aborting\n");
  2116. goto err_out_dev_close;
  2117. }
  2118. }
  2119. err = enic_dev_init(enic);
  2120. if (err) {
  2121. dev_err(dev, "Device initialization failed, aborting\n");
  2122. goto err_out_dev_close;
  2123. }
  2124. netif_set_real_num_tx_queues(netdev, enic->wq_count);
  2125. netif_set_real_num_rx_queues(netdev, enic->rq_count);
  2126. /* Setup notification timer, HW reset task, and wq locks
  2127. */
  2128. init_timer(&enic->notify_timer);
  2129. enic->notify_timer.function = enic_notify_timer;
  2130. enic->notify_timer.data = (unsigned long)enic;
  2131. enic_set_rx_coal_setting(enic);
  2132. INIT_WORK(&enic->reset, enic_reset);
  2133. INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
  2134. for (i = 0; i < enic->wq_count; i++)
  2135. spin_lock_init(&enic->wq_lock[i]);
  2136. /* Register net device
  2137. */
  2138. enic->port_mtu = enic->config.mtu;
  2139. (void)enic_change_mtu(netdev, enic->port_mtu);
  2140. err = enic_set_mac_addr(netdev, enic->mac_addr);
  2141. if (err) {
  2142. dev_err(dev, "Invalid MAC address, aborting\n");
  2143. goto err_out_dev_deinit;
  2144. }
  2145. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  2146. /* rx coalesce time already got initialized. This gets used
  2147. * if adaptive coal is turned off
  2148. */
  2149. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  2150. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  2151. netdev->netdev_ops = &enic_netdev_dynamic_ops;
  2152. else
  2153. netdev->netdev_ops = &enic_netdev_ops;
  2154. netdev->watchdog_timeo = 2 * HZ;
  2155. enic_set_ethtool_ops(netdev);
  2156. netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2157. if (ENIC_SETTING(enic, LOOP)) {
  2158. netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  2159. enic->loop_enable = 1;
  2160. enic->loop_tag = enic->config.loop_tag;
  2161. dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
  2162. }
  2163. if (ENIC_SETTING(enic, TXCSUM))
  2164. netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  2165. if (ENIC_SETTING(enic, TSO))
  2166. netdev->hw_features |= NETIF_F_TSO |
  2167. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  2168. if (ENIC_SETTING(enic, RSS))
  2169. netdev->hw_features |= NETIF_F_RXHASH;
  2170. if (ENIC_SETTING(enic, RXCSUM))
  2171. netdev->hw_features |= NETIF_F_RXCSUM;
  2172. netdev->features |= netdev->hw_features;
  2173. #ifdef CONFIG_RFS_ACCEL
  2174. netdev->hw_features |= NETIF_F_NTUPLE;
  2175. #endif
  2176. if (using_dac)
  2177. netdev->features |= NETIF_F_HIGHDMA;
  2178. netdev->priv_flags |= IFF_UNICAST_FLT;
  2179. err = register_netdev(netdev);
  2180. if (err) {
  2181. dev_err(dev, "Cannot register net device, aborting\n");
  2182. goto err_out_dev_deinit;
  2183. }
  2184. enic->rx_copybreak = RX_COPYBREAK_DEFAULT;
  2185. return 0;
  2186. err_out_dev_deinit:
  2187. enic_dev_deinit(enic);
  2188. err_out_dev_close:
  2189. vnic_dev_close(enic->vdev);
  2190. err_out_disable_sriov:
  2191. kfree(enic->pp);
  2192. err_out_disable_sriov_pp:
  2193. #ifdef CONFIG_PCI_IOV
  2194. if (enic_sriov_enabled(enic)) {
  2195. pci_disable_sriov(pdev);
  2196. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  2197. }
  2198. err_out_vnic_unregister:
  2199. #endif
  2200. vnic_dev_unregister(enic->vdev);
  2201. err_out_iounmap:
  2202. enic_iounmap(enic);
  2203. err_out_release_regions:
  2204. pci_release_regions(pdev);
  2205. err_out_disable_device:
  2206. pci_disable_device(pdev);
  2207. err_out_free_netdev:
  2208. free_netdev(netdev);
  2209. return err;
  2210. }
  2211. static void enic_remove(struct pci_dev *pdev)
  2212. {
  2213. struct net_device *netdev = pci_get_drvdata(pdev);
  2214. if (netdev) {
  2215. struct enic *enic = netdev_priv(netdev);
  2216. cancel_work_sync(&enic->reset);
  2217. cancel_work_sync(&enic->change_mtu_work);
  2218. unregister_netdev(netdev);
  2219. enic_dev_deinit(enic);
  2220. vnic_dev_close(enic->vdev);
  2221. #ifdef CONFIG_PCI_IOV
  2222. if (enic_sriov_enabled(enic)) {
  2223. pci_disable_sriov(pdev);
  2224. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  2225. }
  2226. #endif
  2227. kfree(enic->pp);
  2228. vnic_dev_unregister(enic->vdev);
  2229. enic_iounmap(enic);
  2230. pci_release_regions(pdev);
  2231. pci_disable_device(pdev);
  2232. free_netdev(netdev);
  2233. }
  2234. }
  2235. static struct pci_driver enic_driver = {
  2236. .name = DRV_NAME,
  2237. .id_table = enic_id_table,
  2238. .probe = enic_probe,
  2239. .remove = enic_remove,
  2240. };
  2241. static int __init enic_init_module(void)
  2242. {
  2243. pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  2244. return pci_register_driver(&enic_driver);
  2245. }
  2246. static void __exit enic_cleanup_module(void)
  2247. {
  2248. pci_unregister_driver(&enic_driver);
  2249. }
  2250. module_init(enic_init_module);
  2251. module_exit(enic_cleanup_module);