cxgb4_debugfs.c 58 KB

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  1. /*
  2. * This file is part of the Chelsio T4 Ethernet driver for Linux.
  3. *
  4. * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/seq_file.h>
  35. #include <linux/debugfs.h>
  36. #include <linux/string_helpers.h>
  37. #include <linux/sort.h>
  38. #include <linux/ctype.h>
  39. #include "cxgb4.h"
  40. #include "t4_regs.h"
  41. #include "t4_values.h"
  42. #include "t4fw_api.h"
  43. #include "cxgb4_debugfs.h"
  44. #include "clip_tbl.h"
  45. #include "l2t.h"
  46. /* generic seq_file support for showing a table of size rows x width. */
  47. static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
  48. {
  49. pos -= tb->skip_first;
  50. return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
  51. }
  52. static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
  53. {
  54. struct seq_tab *tb = seq->private;
  55. if (tb->skip_first && *pos == 0)
  56. return SEQ_START_TOKEN;
  57. return seq_tab_get_idx(tb, *pos);
  58. }
  59. static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
  60. {
  61. v = seq_tab_get_idx(seq->private, *pos + 1);
  62. if (v)
  63. ++*pos;
  64. return v;
  65. }
  66. static void seq_tab_stop(struct seq_file *seq, void *v)
  67. {
  68. }
  69. static int seq_tab_show(struct seq_file *seq, void *v)
  70. {
  71. const struct seq_tab *tb = seq->private;
  72. return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
  73. }
  74. static const struct seq_operations seq_tab_ops = {
  75. .start = seq_tab_start,
  76. .next = seq_tab_next,
  77. .stop = seq_tab_stop,
  78. .show = seq_tab_show
  79. };
  80. struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
  81. unsigned int width, unsigned int have_header,
  82. int (*show)(struct seq_file *seq, void *v, int i))
  83. {
  84. struct seq_tab *p;
  85. p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
  86. if (p) {
  87. p->show = show;
  88. p->rows = rows;
  89. p->width = width;
  90. p->skip_first = have_header != 0;
  91. }
  92. return p;
  93. }
  94. /* Trim the size of a seq_tab to the supplied number of rows. The operation is
  95. * irreversible.
  96. */
  97. static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
  98. {
  99. if (new_rows > p->rows)
  100. return -EINVAL;
  101. p->rows = new_rows;
  102. return 0;
  103. }
  104. static int cim_la_show(struct seq_file *seq, void *v, int idx)
  105. {
  106. if (v == SEQ_START_TOKEN)
  107. seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
  108. " LS0Data\n");
  109. else {
  110. const u32 *p = v;
  111. seq_printf(seq,
  112. " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
  113. (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
  114. p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
  115. p[6], p[7]);
  116. }
  117. return 0;
  118. }
  119. static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
  120. {
  121. if (v == SEQ_START_TOKEN) {
  122. seq_puts(seq, "Status Data PC\n");
  123. } else {
  124. const u32 *p = v;
  125. seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
  126. p[7]);
  127. seq_printf(seq, " %02x %02x%06x %02x%06x\n",
  128. (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
  129. p[4] & 0xff, p[5] >> 8);
  130. seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
  131. p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
  132. }
  133. return 0;
  134. }
  135. static int cim_la_open(struct inode *inode, struct file *file)
  136. {
  137. int ret;
  138. unsigned int cfg;
  139. struct seq_tab *p;
  140. struct adapter *adap = inode->i_private;
  141. ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
  142. if (ret)
  143. return ret;
  144. p = seq_open_tab(file, adap->params.cim_la_size / 8, 8 * sizeof(u32), 1,
  145. cfg & UPDBGLACAPTPCONLY_F ?
  146. cim_la_show_3in1 : cim_la_show);
  147. if (!p)
  148. return -ENOMEM;
  149. ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
  150. if (ret)
  151. seq_release_private(inode, file);
  152. return ret;
  153. }
  154. static const struct file_operations cim_la_fops = {
  155. .owner = THIS_MODULE,
  156. .open = cim_la_open,
  157. .read = seq_read,
  158. .llseek = seq_lseek,
  159. .release = seq_release_private
  160. };
  161. static int cim_qcfg_show(struct seq_file *seq, void *v)
  162. {
  163. static const char * const qname[] = {
  164. "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
  165. "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
  166. "SGE0-RX", "SGE1-RX"
  167. };
  168. int i;
  169. struct adapter *adap = seq->private;
  170. u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
  171. u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
  172. u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
  173. u16 thres[CIM_NUM_IBQ];
  174. u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
  175. u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
  176. u32 *p = stat;
  177. int cim_num_obq = is_t4(adap->params.chip) ?
  178. CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
  179. i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
  180. UP_IBQ_0_SHADOW_RDADDR_A,
  181. ARRAY_SIZE(stat), stat);
  182. if (!i) {
  183. if (is_t4(adap->params.chip)) {
  184. i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
  185. ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
  186. wr = obq_wr_t4;
  187. } else {
  188. i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
  189. ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
  190. wr = obq_wr_t5;
  191. }
  192. }
  193. if (i)
  194. return i;
  195. t4_read_cimq_cfg(adap, base, size, thres);
  196. seq_printf(seq,
  197. " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
  198. for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
  199. seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
  200. qname[i], base[i], size[i], thres[i],
  201. IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
  202. QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
  203. QUEREMFLITS_G(p[2]) * 16);
  204. for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
  205. seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
  206. qname[i], base[i], size[i],
  207. QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
  208. QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
  209. QUEREMFLITS_G(p[2]) * 16);
  210. return 0;
  211. }
  212. static int cim_qcfg_open(struct inode *inode, struct file *file)
  213. {
  214. return single_open(file, cim_qcfg_show, inode->i_private);
  215. }
  216. static const struct file_operations cim_qcfg_fops = {
  217. .owner = THIS_MODULE,
  218. .open = cim_qcfg_open,
  219. .read = seq_read,
  220. .llseek = seq_lseek,
  221. .release = single_release,
  222. };
  223. static int cimq_show(struct seq_file *seq, void *v, int idx)
  224. {
  225. const u32 *p = v;
  226. seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
  227. p[2], p[3]);
  228. return 0;
  229. }
  230. static int cim_ibq_open(struct inode *inode, struct file *file)
  231. {
  232. int ret;
  233. struct seq_tab *p;
  234. unsigned int qid = (uintptr_t)inode->i_private & 7;
  235. struct adapter *adap = inode->i_private - qid;
  236. p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
  237. if (!p)
  238. return -ENOMEM;
  239. ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
  240. if (ret < 0)
  241. seq_release_private(inode, file);
  242. else
  243. ret = 0;
  244. return ret;
  245. }
  246. static const struct file_operations cim_ibq_fops = {
  247. .owner = THIS_MODULE,
  248. .open = cim_ibq_open,
  249. .read = seq_read,
  250. .llseek = seq_lseek,
  251. .release = seq_release_private
  252. };
  253. static int cim_obq_open(struct inode *inode, struct file *file)
  254. {
  255. int ret;
  256. struct seq_tab *p;
  257. unsigned int qid = (uintptr_t)inode->i_private & 7;
  258. struct adapter *adap = inode->i_private - qid;
  259. p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
  260. if (!p)
  261. return -ENOMEM;
  262. ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
  263. if (ret < 0) {
  264. seq_release_private(inode, file);
  265. } else {
  266. seq_tab_trim(p, ret / 4);
  267. ret = 0;
  268. }
  269. return ret;
  270. }
  271. static const struct file_operations cim_obq_fops = {
  272. .owner = THIS_MODULE,
  273. .open = cim_obq_open,
  274. .read = seq_read,
  275. .llseek = seq_lseek,
  276. .release = seq_release_private
  277. };
  278. struct field_desc {
  279. const char *name;
  280. unsigned int start;
  281. unsigned int width;
  282. };
  283. static void field_desc_show(struct seq_file *seq, u64 v,
  284. const struct field_desc *p)
  285. {
  286. char buf[32];
  287. int line_size = 0;
  288. while (p->name) {
  289. u64 mask = (1ULL << p->width) - 1;
  290. int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
  291. ((unsigned long long)v >> p->start) & mask);
  292. if (line_size + len >= 79) {
  293. line_size = 8;
  294. seq_puts(seq, "\n ");
  295. }
  296. seq_printf(seq, "%s ", buf);
  297. line_size += len + 1;
  298. p++;
  299. }
  300. seq_putc(seq, '\n');
  301. }
  302. static struct field_desc tp_la0[] = {
  303. { "RcfOpCodeOut", 60, 4 },
  304. { "State", 56, 4 },
  305. { "WcfState", 52, 4 },
  306. { "RcfOpcSrcOut", 50, 2 },
  307. { "CRxError", 49, 1 },
  308. { "ERxError", 48, 1 },
  309. { "SanityFailed", 47, 1 },
  310. { "SpuriousMsg", 46, 1 },
  311. { "FlushInputMsg", 45, 1 },
  312. { "FlushInputCpl", 44, 1 },
  313. { "RssUpBit", 43, 1 },
  314. { "RssFilterHit", 42, 1 },
  315. { "Tid", 32, 10 },
  316. { "InitTcb", 31, 1 },
  317. { "LineNumber", 24, 7 },
  318. { "Emsg", 23, 1 },
  319. { "EdataOut", 22, 1 },
  320. { "Cmsg", 21, 1 },
  321. { "CdataOut", 20, 1 },
  322. { "EreadPdu", 19, 1 },
  323. { "CreadPdu", 18, 1 },
  324. { "TunnelPkt", 17, 1 },
  325. { "RcfPeerFin", 16, 1 },
  326. { "RcfReasonOut", 12, 4 },
  327. { "TxCchannel", 10, 2 },
  328. { "RcfTxChannel", 8, 2 },
  329. { "RxEchannel", 6, 2 },
  330. { "RcfRxChannel", 5, 1 },
  331. { "RcfDataOutSrdy", 4, 1 },
  332. { "RxDvld", 3, 1 },
  333. { "RxOoDvld", 2, 1 },
  334. { "RxCongestion", 1, 1 },
  335. { "TxCongestion", 0, 1 },
  336. { NULL }
  337. };
  338. static int tp_la_show(struct seq_file *seq, void *v, int idx)
  339. {
  340. const u64 *p = v;
  341. field_desc_show(seq, *p, tp_la0);
  342. return 0;
  343. }
  344. static int tp_la_show2(struct seq_file *seq, void *v, int idx)
  345. {
  346. const u64 *p = v;
  347. if (idx)
  348. seq_putc(seq, '\n');
  349. field_desc_show(seq, p[0], tp_la0);
  350. if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
  351. field_desc_show(seq, p[1], tp_la0);
  352. return 0;
  353. }
  354. static int tp_la_show3(struct seq_file *seq, void *v, int idx)
  355. {
  356. static struct field_desc tp_la1[] = {
  357. { "CplCmdIn", 56, 8 },
  358. { "CplCmdOut", 48, 8 },
  359. { "ESynOut", 47, 1 },
  360. { "EAckOut", 46, 1 },
  361. { "EFinOut", 45, 1 },
  362. { "ERstOut", 44, 1 },
  363. { "SynIn", 43, 1 },
  364. { "AckIn", 42, 1 },
  365. { "FinIn", 41, 1 },
  366. { "RstIn", 40, 1 },
  367. { "DataIn", 39, 1 },
  368. { "DataInVld", 38, 1 },
  369. { "PadIn", 37, 1 },
  370. { "RxBufEmpty", 36, 1 },
  371. { "RxDdp", 35, 1 },
  372. { "RxFbCongestion", 34, 1 },
  373. { "TxFbCongestion", 33, 1 },
  374. { "TxPktSumSrdy", 32, 1 },
  375. { "RcfUlpType", 28, 4 },
  376. { "Eread", 27, 1 },
  377. { "Ebypass", 26, 1 },
  378. { "Esave", 25, 1 },
  379. { "Static0", 24, 1 },
  380. { "Cread", 23, 1 },
  381. { "Cbypass", 22, 1 },
  382. { "Csave", 21, 1 },
  383. { "CPktOut", 20, 1 },
  384. { "RxPagePoolFull", 18, 2 },
  385. { "RxLpbkPkt", 17, 1 },
  386. { "TxLpbkPkt", 16, 1 },
  387. { "RxVfValid", 15, 1 },
  388. { "SynLearned", 14, 1 },
  389. { "SetDelEntry", 13, 1 },
  390. { "SetInvEntry", 12, 1 },
  391. { "CpcmdDvld", 11, 1 },
  392. { "CpcmdSave", 10, 1 },
  393. { "RxPstructsFull", 8, 2 },
  394. { "EpcmdDvld", 7, 1 },
  395. { "EpcmdFlush", 6, 1 },
  396. { "EpcmdTrimPrefix", 5, 1 },
  397. { "EpcmdTrimPostfix", 4, 1 },
  398. { "ERssIp4Pkt", 3, 1 },
  399. { "ERssIp6Pkt", 2, 1 },
  400. { "ERssTcpUdpPkt", 1, 1 },
  401. { "ERssFceFipPkt", 0, 1 },
  402. { NULL }
  403. };
  404. static struct field_desc tp_la2[] = {
  405. { "CplCmdIn", 56, 8 },
  406. { "MpsVfVld", 55, 1 },
  407. { "MpsPf", 52, 3 },
  408. { "MpsVf", 44, 8 },
  409. { "SynIn", 43, 1 },
  410. { "AckIn", 42, 1 },
  411. { "FinIn", 41, 1 },
  412. { "RstIn", 40, 1 },
  413. { "DataIn", 39, 1 },
  414. { "DataInVld", 38, 1 },
  415. { "PadIn", 37, 1 },
  416. { "RxBufEmpty", 36, 1 },
  417. { "RxDdp", 35, 1 },
  418. { "RxFbCongestion", 34, 1 },
  419. { "TxFbCongestion", 33, 1 },
  420. { "TxPktSumSrdy", 32, 1 },
  421. { "RcfUlpType", 28, 4 },
  422. { "Eread", 27, 1 },
  423. { "Ebypass", 26, 1 },
  424. { "Esave", 25, 1 },
  425. { "Static0", 24, 1 },
  426. { "Cread", 23, 1 },
  427. { "Cbypass", 22, 1 },
  428. { "Csave", 21, 1 },
  429. { "CPktOut", 20, 1 },
  430. { "RxPagePoolFull", 18, 2 },
  431. { "RxLpbkPkt", 17, 1 },
  432. { "TxLpbkPkt", 16, 1 },
  433. { "RxVfValid", 15, 1 },
  434. { "SynLearned", 14, 1 },
  435. { "SetDelEntry", 13, 1 },
  436. { "SetInvEntry", 12, 1 },
  437. { "CpcmdDvld", 11, 1 },
  438. { "CpcmdSave", 10, 1 },
  439. { "RxPstructsFull", 8, 2 },
  440. { "EpcmdDvld", 7, 1 },
  441. { "EpcmdFlush", 6, 1 },
  442. { "EpcmdTrimPrefix", 5, 1 },
  443. { "EpcmdTrimPostfix", 4, 1 },
  444. { "ERssIp4Pkt", 3, 1 },
  445. { "ERssIp6Pkt", 2, 1 },
  446. { "ERssTcpUdpPkt", 1, 1 },
  447. { "ERssFceFipPkt", 0, 1 },
  448. { NULL }
  449. };
  450. const u64 *p = v;
  451. if (idx)
  452. seq_putc(seq, '\n');
  453. field_desc_show(seq, p[0], tp_la0);
  454. if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
  455. field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
  456. return 0;
  457. }
  458. static int tp_la_open(struct inode *inode, struct file *file)
  459. {
  460. struct seq_tab *p;
  461. struct adapter *adap = inode->i_private;
  462. switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
  463. case 2:
  464. p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
  465. tp_la_show2);
  466. break;
  467. case 3:
  468. p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
  469. tp_la_show3);
  470. break;
  471. default:
  472. p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
  473. }
  474. if (!p)
  475. return -ENOMEM;
  476. t4_tp_read_la(adap, (u64 *)p->data, NULL);
  477. return 0;
  478. }
  479. static ssize_t tp_la_write(struct file *file, const char __user *buf,
  480. size_t count, loff_t *pos)
  481. {
  482. int err;
  483. char s[32];
  484. unsigned long val;
  485. size_t size = min(sizeof(s) - 1, count);
  486. struct adapter *adap = file_inode(file)->i_private;
  487. if (copy_from_user(s, buf, size))
  488. return -EFAULT;
  489. s[size] = '\0';
  490. err = kstrtoul(s, 0, &val);
  491. if (err)
  492. return err;
  493. if (val > 0xffff)
  494. return -EINVAL;
  495. adap->params.tp.la_mask = val << 16;
  496. t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
  497. adap->params.tp.la_mask);
  498. return count;
  499. }
  500. static const struct file_operations tp_la_fops = {
  501. .owner = THIS_MODULE,
  502. .open = tp_la_open,
  503. .read = seq_read,
  504. .llseek = seq_lseek,
  505. .release = seq_release_private,
  506. .write = tp_la_write
  507. };
  508. static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
  509. {
  510. const u32 *p = v;
  511. if (v == SEQ_START_TOKEN)
  512. seq_puts(seq, " Pcmd Type Message"
  513. " Data\n");
  514. else
  515. seq_printf(seq, "%08x%08x %4x %08x %08x%08x%08x%08x\n",
  516. p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
  517. return 0;
  518. }
  519. static int ulprx_la_open(struct inode *inode, struct file *file)
  520. {
  521. struct seq_tab *p;
  522. struct adapter *adap = inode->i_private;
  523. p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
  524. ulprx_la_show);
  525. if (!p)
  526. return -ENOMEM;
  527. t4_ulprx_read_la(adap, (u32 *)p->data);
  528. return 0;
  529. }
  530. static const struct file_operations ulprx_la_fops = {
  531. .owner = THIS_MODULE,
  532. .open = ulprx_la_open,
  533. .read = seq_read,
  534. .llseek = seq_lseek,
  535. .release = seq_release_private
  536. };
  537. /* Show the PM memory stats. These stats include:
  538. *
  539. * TX:
  540. * Read: memory read operation
  541. * Write Bypass: cut-through
  542. * Bypass + mem: cut-through and save copy
  543. *
  544. * RX:
  545. * Read: memory read
  546. * Write Bypass: cut-through
  547. * Flush: payload trim or drop
  548. */
  549. static int pm_stats_show(struct seq_file *seq, void *v)
  550. {
  551. static const char * const tx_pm_stats[] = {
  552. "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
  553. };
  554. static const char * const rx_pm_stats[] = {
  555. "Read:", "Write bypass:", "Write mem:", "Flush:"
  556. };
  557. int i;
  558. u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
  559. u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
  560. struct adapter *adap = seq->private;
  561. t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
  562. t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
  563. seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
  564. for (i = 0; i < PM_NSTATS - 1; i++)
  565. seq_printf(seq, "%-13s %10u %20llu\n",
  566. tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
  567. seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
  568. for (i = 0; i < PM_NSTATS - 1; i++)
  569. seq_printf(seq, "%-13s %10u %20llu\n",
  570. rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
  571. return 0;
  572. }
  573. static int pm_stats_open(struct inode *inode, struct file *file)
  574. {
  575. return single_open(file, pm_stats_show, inode->i_private);
  576. }
  577. static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
  578. size_t count, loff_t *pos)
  579. {
  580. struct adapter *adap = file_inode(file)->i_private;
  581. t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
  582. t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
  583. return count;
  584. }
  585. static const struct file_operations pm_stats_debugfs_fops = {
  586. .owner = THIS_MODULE,
  587. .open = pm_stats_open,
  588. .read = seq_read,
  589. .llseek = seq_lseek,
  590. .release = single_release,
  591. .write = pm_stats_clear
  592. };
  593. static int cctrl_tbl_show(struct seq_file *seq, void *v)
  594. {
  595. static const char * const dec_fac[] = {
  596. "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
  597. "0.9375" };
  598. int i;
  599. u16 (*incr)[NCCTRL_WIN];
  600. struct adapter *adap = seq->private;
  601. incr = kmalloc(sizeof(*incr) * NMTUS, GFP_KERNEL);
  602. if (!incr)
  603. return -ENOMEM;
  604. t4_read_cong_tbl(adap, incr);
  605. for (i = 0; i < NCCTRL_WIN; ++i) {
  606. seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
  607. incr[0][i], incr[1][i], incr[2][i], incr[3][i],
  608. incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
  609. seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
  610. incr[8][i], incr[9][i], incr[10][i], incr[11][i],
  611. incr[12][i], incr[13][i], incr[14][i], incr[15][i],
  612. adap->params.a_wnd[i],
  613. dec_fac[adap->params.b_wnd[i]]);
  614. }
  615. kfree(incr);
  616. return 0;
  617. }
  618. DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
  619. /* Format a value in a unit that differs from the value's native unit by the
  620. * given factor.
  621. */
  622. static char *unit_conv(char *buf, size_t len, unsigned int val,
  623. unsigned int factor)
  624. {
  625. unsigned int rem = val % factor;
  626. if (rem == 0) {
  627. snprintf(buf, len, "%u", val / factor);
  628. } else {
  629. while (rem % 10 == 0)
  630. rem /= 10;
  631. snprintf(buf, len, "%u.%u", val / factor, rem);
  632. }
  633. return buf;
  634. }
  635. static int clk_show(struct seq_file *seq, void *v)
  636. {
  637. char buf[32];
  638. struct adapter *adap = seq->private;
  639. unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
  640. u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
  641. unsigned int tre = TIMERRESOLUTION_G(res);
  642. unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
  643. unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
  644. seq_printf(seq, "Core clock period: %s ns\n",
  645. unit_conv(buf, sizeof(buf), cclk_ps, 1000));
  646. seq_printf(seq, "TP timer tick: %s us\n",
  647. unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
  648. seq_printf(seq, "TCP timestamp tick: %s us\n",
  649. unit_conv(buf, sizeof(buf),
  650. (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
  651. seq_printf(seq, "DACK tick: %s us\n",
  652. unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
  653. seq_printf(seq, "DACK timer: %u us\n",
  654. ((cclk_ps << dack_re) / 1000000) *
  655. t4_read_reg(adap, TP_DACK_TIMER_A));
  656. seq_printf(seq, "Retransmit min: %llu us\n",
  657. tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
  658. seq_printf(seq, "Retransmit max: %llu us\n",
  659. tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
  660. seq_printf(seq, "Persist timer min: %llu us\n",
  661. tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
  662. seq_printf(seq, "Persist timer max: %llu us\n",
  663. tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
  664. seq_printf(seq, "Keepalive idle timer: %llu us\n",
  665. tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
  666. seq_printf(seq, "Keepalive interval: %llu us\n",
  667. tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
  668. seq_printf(seq, "Initial SRTT: %llu us\n",
  669. tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
  670. seq_printf(seq, "FINWAIT2 timer: %llu us\n",
  671. tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
  672. return 0;
  673. }
  674. DEFINE_SIMPLE_DEBUGFS_FILE(clk);
  675. /* Firmware Device Log dump. */
  676. static const char * const devlog_level_strings[] = {
  677. [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
  678. [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
  679. [FW_DEVLOG_LEVEL_ERR] = "ERR",
  680. [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
  681. [FW_DEVLOG_LEVEL_INFO] = "INFO",
  682. [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
  683. };
  684. static const char * const devlog_facility_strings[] = {
  685. [FW_DEVLOG_FACILITY_CORE] = "CORE",
  686. [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
  687. [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
  688. [FW_DEVLOG_FACILITY_RES] = "RES",
  689. [FW_DEVLOG_FACILITY_HW] = "HW",
  690. [FW_DEVLOG_FACILITY_FLR] = "FLR",
  691. [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
  692. [FW_DEVLOG_FACILITY_PHY] = "PHY",
  693. [FW_DEVLOG_FACILITY_MAC] = "MAC",
  694. [FW_DEVLOG_FACILITY_PORT] = "PORT",
  695. [FW_DEVLOG_FACILITY_VI] = "VI",
  696. [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
  697. [FW_DEVLOG_FACILITY_ACL] = "ACL",
  698. [FW_DEVLOG_FACILITY_TM] = "TM",
  699. [FW_DEVLOG_FACILITY_QFC] = "QFC",
  700. [FW_DEVLOG_FACILITY_DCB] = "DCB",
  701. [FW_DEVLOG_FACILITY_ETH] = "ETH",
  702. [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
  703. [FW_DEVLOG_FACILITY_RI] = "RI",
  704. [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
  705. [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
  706. [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
  707. [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
  708. };
  709. /* Information gathered by Device Log Open routine for the display routine.
  710. */
  711. struct devlog_info {
  712. unsigned int nentries; /* number of entries in log[] */
  713. unsigned int first; /* first [temporal] entry in log[] */
  714. struct fw_devlog_e log[0]; /* Firmware Device Log */
  715. };
  716. /* Dump a Firmaware Device Log entry.
  717. */
  718. static int devlog_show(struct seq_file *seq, void *v)
  719. {
  720. if (v == SEQ_START_TOKEN)
  721. seq_printf(seq, "%10s %15s %8s %8s %s\n",
  722. "Seq#", "Tstamp", "Level", "Facility", "Message");
  723. else {
  724. struct devlog_info *dinfo = seq->private;
  725. int fidx = (uintptr_t)v - 2;
  726. unsigned long index;
  727. struct fw_devlog_e *e;
  728. /* Get a pointer to the log entry to display. Skip unused log
  729. * entries.
  730. */
  731. index = dinfo->first + fidx;
  732. if (index >= dinfo->nentries)
  733. index -= dinfo->nentries;
  734. e = &dinfo->log[index];
  735. if (e->timestamp == 0)
  736. return 0;
  737. /* Print the message. This depends on the firmware using
  738. * exactly the same formating strings as the kernel so we may
  739. * eventually have to put a format interpreter in here ...
  740. */
  741. seq_printf(seq, "%10d %15llu %8s %8s ",
  742. e->seqno, e->timestamp,
  743. (e->level < ARRAY_SIZE(devlog_level_strings)
  744. ? devlog_level_strings[e->level]
  745. : "UNKNOWN"),
  746. (e->facility < ARRAY_SIZE(devlog_facility_strings)
  747. ? devlog_facility_strings[e->facility]
  748. : "UNKNOWN"));
  749. seq_printf(seq, e->fmt, e->params[0], e->params[1],
  750. e->params[2], e->params[3], e->params[4],
  751. e->params[5], e->params[6], e->params[7]);
  752. }
  753. return 0;
  754. }
  755. /* Sequential File Operations for Device Log.
  756. */
  757. static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
  758. {
  759. if (pos > dinfo->nentries)
  760. return NULL;
  761. return (void *)(uintptr_t)(pos + 1);
  762. }
  763. static void *devlog_start(struct seq_file *seq, loff_t *pos)
  764. {
  765. struct devlog_info *dinfo = seq->private;
  766. return (*pos
  767. ? devlog_get_idx(dinfo, *pos)
  768. : SEQ_START_TOKEN);
  769. }
  770. static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
  771. {
  772. struct devlog_info *dinfo = seq->private;
  773. (*pos)++;
  774. return devlog_get_idx(dinfo, *pos);
  775. }
  776. static void devlog_stop(struct seq_file *seq, void *v)
  777. {
  778. }
  779. static const struct seq_operations devlog_seq_ops = {
  780. .start = devlog_start,
  781. .next = devlog_next,
  782. .stop = devlog_stop,
  783. .show = devlog_show
  784. };
  785. /* Set up for reading the firmware's device log. We read the entire log here
  786. * and then display it incrementally in devlog_show().
  787. */
  788. static int devlog_open(struct inode *inode, struct file *file)
  789. {
  790. struct adapter *adap = inode->i_private;
  791. struct devlog_params *dparams = &adap->params.devlog;
  792. struct devlog_info *dinfo;
  793. unsigned int index;
  794. u32 fseqno;
  795. int ret;
  796. /* If we don't know where the log is we can't do anything.
  797. */
  798. if (dparams->start == 0)
  799. return -ENXIO;
  800. /* Allocate the space to read in the firmware's device log and set up
  801. * for the iterated call to our display function.
  802. */
  803. dinfo = __seq_open_private(file, &devlog_seq_ops,
  804. sizeof(*dinfo) + dparams->size);
  805. if (!dinfo)
  806. return -ENOMEM;
  807. /* Record the basic log buffer information and read in the raw log.
  808. */
  809. dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
  810. dinfo->first = 0;
  811. spin_lock(&adap->win0_lock);
  812. ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
  813. dparams->start, dparams->size, (__be32 *)dinfo->log,
  814. T4_MEMORY_READ);
  815. spin_unlock(&adap->win0_lock);
  816. if (ret) {
  817. seq_release_private(inode, file);
  818. return ret;
  819. }
  820. /* Translate log multi-byte integral elements into host native format
  821. * and determine where the first entry in the log is.
  822. */
  823. for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
  824. struct fw_devlog_e *e = &dinfo->log[index];
  825. int i;
  826. __u32 seqno;
  827. if (e->timestamp == 0)
  828. continue;
  829. e->timestamp = (__force __be64)be64_to_cpu(e->timestamp);
  830. seqno = be32_to_cpu(e->seqno);
  831. for (i = 0; i < 8; i++)
  832. e->params[i] =
  833. (__force __be32)be32_to_cpu(e->params[i]);
  834. if (seqno < fseqno) {
  835. fseqno = seqno;
  836. dinfo->first = index;
  837. }
  838. }
  839. return 0;
  840. }
  841. static const struct file_operations devlog_fops = {
  842. .owner = THIS_MODULE,
  843. .open = devlog_open,
  844. .read = seq_read,
  845. .llseek = seq_lseek,
  846. .release = seq_release_private
  847. };
  848. static int mbox_show(struct seq_file *seq, void *v)
  849. {
  850. static const char * const owner[] = { "none", "FW", "driver",
  851. "unknown" };
  852. int i;
  853. unsigned int mbox = (uintptr_t)seq->private & 7;
  854. struct adapter *adap = seq->private - mbox;
  855. void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
  856. unsigned int ctrl_reg = (is_t4(adap->params.chip)
  857. ? CIM_PF_MAILBOX_CTRL_A
  858. : CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A);
  859. void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
  860. i = MBOWNER_G(readl(ctrl));
  861. seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
  862. for (i = 0; i < MBOX_LEN; i += 8)
  863. seq_printf(seq, "%016llx\n",
  864. (unsigned long long)readq(addr + i));
  865. return 0;
  866. }
  867. static int mbox_open(struct inode *inode, struct file *file)
  868. {
  869. return single_open(file, mbox_show, inode->i_private);
  870. }
  871. static ssize_t mbox_write(struct file *file, const char __user *buf,
  872. size_t count, loff_t *pos)
  873. {
  874. int i;
  875. char c = '\n', s[256];
  876. unsigned long long data[8];
  877. const struct inode *ino;
  878. unsigned int mbox;
  879. struct adapter *adap;
  880. void __iomem *addr;
  881. void __iomem *ctrl;
  882. if (count > sizeof(s) - 1 || !count)
  883. return -EINVAL;
  884. if (copy_from_user(s, buf, count))
  885. return -EFAULT;
  886. s[count] = '\0';
  887. if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
  888. &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
  889. &data[7], &c) < 8 || c != '\n')
  890. return -EINVAL;
  891. ino = file_inode(file);
  892. mbox = (uintptr_t)ino->i_private & 7;
  893. adap = ino->i_private - mbox;
  894. addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
  895. ctrl = addr + MBOX_LEN;
  896. if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
  897. return -EBUSY;
  898. for (i = 0; i < 8; i++)
  899. writeq(data[i], addr + 8 * i);
  900. writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
  901. return count;
  902. }
  903. static const struct file_operations mbox_debugfs_fops = {
  904. .owner = THIS_MODULE,
  905. .open = mbox_open,
  906. .read = seq_read,
  907. .llseek = seq_lseek,
  908. .release = single_release,
  909. .write = mbox_write
  910. };
  911. static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
  912. loff_t *ppos)
  913. {
  914. loff_t pos = *ppos;
  915. loff_t avail = file_inode(file)->i_size;
  916. struct adapter *adap = file->private_data;
  917. if (pos < 0)
  918. return -EINVAL;
  919. if (pos >= avail)
  920. return 0;
  921. if (count > avail - pos)
  922. count = avail - pos;
  923. while (count) {
  924. size_t len;
  925. int ret, ofst;
  926. u8 data[256];
  927. ofst = pos & 3;
  928. len = min(count + ofst, sizeof(data));
  929. ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
  930. (u32 *)data, 1);
  931. if (ret)
  932. return ret;
  933. len -= ofst;
  934. if (copy_to_user(buf, data + ofst, len))
  935. return -EFAULT;
  936. buf += len;
  937. pos += len;
  938. count -= len;
  939. }
  940. count = pos - *ppos;
  941. *ppos = pos;
  942. return count;
  943. }
  944. static const struct file_operations flash_debugfs_fops = {
  945. .owner = THIS_MODULE,
  946. .open = mem_open,
  947. .read = flash_read,
  948. };
  949. static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
  950. {
  951. *mask = x | y;
  952. y = (__force u64)cpu_to_be64(y);
  953. memcpy(addr, (char *)&y + 2, ETH_ALEN);
  954. }
  955. static int mps_tcam_show(struct seq_file *seq, void *v)
  956. {
  957. if (v == SEQ_START_TOKEN)
  958. seq_puts(seq, "Idx Ethernet address Mask Vld Ports PF"
  959. " VF Replication "
  960. "P0 P1 P2 P3 ML\n");
  961. else {
  962. u64 mask;
  963. u8 addr[ETH_ALEN];
  964. struct adapter *adap = seq->private;
  965. unsigned int idx = (uintptr_t)v - 2;
  966. u64 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
  967. u64 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
  968. u32 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
  969. u32 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
  970. u32 rplc[4] = {0, 0, 0, 0};
  971. if (tcamx & tcamy) {
  972. seq_printf(seq, "%3u -\n", idx);
  973. goto out;
  974. }
  975. if (cls_lo & REPLICATE_F) {
  976. struct fw_ldst_cmd ldst_cmd;
  977. int ret;
  978. memset(&ldst_cmd, 0, sizeof(ldst_cmd));
  979. ldst_cmd.op_to_addrspace =
  980. htonl(FW_CMD_OP_V(FW_LDST_CMD) |
  981. FW_CMD_REQUEST_F |
  982. FW_CMD_READ_F |
  983. FW_LDST_CMD_ADDRSPACE_V(
  984. FW_LDST_ADDRSPC_MPS));
  985. ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
  986. ldst_cmd.u.mps.fid_ctl =
  987. htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
  988. FW_LDST_CMD_CTL_V(idx));
  989. ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
  990. sizeof(ldst_cmd), &ldst_cmd);
  991. if (ret)
  992. dev_warn(adap->pdev_dev, "Can't read MPS "
  993. "replication map for idx %d: %d\n",
  994. idx, -ret);
  995. else {
  996. rplc[0] = ntohl(ldst_cmd.u.mps.rplc31_0);
  997. rplc[1] = ntohl(ldst_cmd.u.mps.rplc63_32);
  998. rplc[2] = ntohl(ldst_cmd.u.mps.rplc95_64);
  999. rplc[3] = ntohl(ldst_cmd.u.mps.rplc127_96);
  1000. }
  1001. }
  1002. tcamxy2valmask(tcamx, tcamy, addr, &mask);
  1003. seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
  1004. "%3c %#x%4u%4d",
  1005. idx, addr[0], addr[1], addr[2], addr[3], addr[4],
  1006. addr[5], (unsigned long long)mask,
  1007. (cls_lo & SRAM_VLD_F) ? 'Y' : 'N', PORTMAP_G(cls_hi),
  1008. PF_G(cls_lo),
  1009. (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
  1010. if (cls_lo & REPLICATE_F)
  1011. seq_printf(seq, " %08x %08x %08x %08x",
  1012. rplc[3], rplc[2], rplc[1], rplc[0]);
  1013. else
  1014. seq_printf(seq, "%36c", ' ');
  1015. seq_printf(seq, "%4u%3u%3u%3u %#x\n",
  1016. SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
  1017. SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
  1018. (cls_lo >> MULTILISTEN0_S) & 0xf);
  1019. }
  1020. out: return 0;
  1021. }
  1022. static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
  1023. {
  1024. struct adapter *adap = seq->private;
  1025. int max_mac_addr = is_t4(adap->params.chip) ?
  1026. NUM_MPS_CLS_SRAM_L_INSTANCES :
  1027. NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
  1028. return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
  1029. }
  1030. static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
  1031. {
  1032. return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
  1033. }
  1034. static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
  1035. {
  1036. ++*pos;
  1037. return mps_tcam_get_idx(seq, *pos);
  1038. }
  1039. static void mps_tcam_stop(struct seq_file *seq, void *v)
  1040. {
  1041. }
  1042. static const struct seq_operations mps_tcam_seq_ops = {
  1043. .start = mps_tcam_start,
  1044. .next = mps_tcam_next,
  1045. .stop = mps_tcam_stop,
  1046. .show = mps_tcam_show
  1047. };
  1048. static int mps_tcam_open(struct inode *inode, struct file *file)
  1049. {
  1050. int res = seq_open(file, &mps_tcam_seq_ops);
  1051. if (!res) {
  1052. struct seq_file *seq = file->private_data;
  1053. seq->private = inode->i_private;
  1054. }
  1055. return res;
  1056. }
  1057. static const struct file_operations mps_tcam_debugfs_fops = {
  1058. .owner = THIS_MODULE,
  1059. .open = mps_tcam_open,
  1060. .read = seq_read,
  1061. .llseek = seq_lseek,
  1062. .release = seq_release,
  1063. };
  1064. /* Display various sensor information.
  1065. */
  1066. static int sensors_show(struct seq_file *seq, void *v)
  1067. {
  1068. struct adapter *adap = seq->private;
  1069. u32 param[7], val[7];
  1070. int ret;
  1071. /* Note that if the sensors haven't been initialized and turned on
  1072. * we'll get values of 0, so treat those as "<unknown>" ...
  1073. */
  1074. param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
  1075. FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
  1076. FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
  1077. param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
  1078. FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
  1079. FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
  1080. ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2,
  1081. param, val);
  1082. if (ret < 0 || val[0] == 0)
  1083. seq_puts(seq, "Temperature: <unknown>\n");
  1084. else
  1085. seq_printf(seq, "Temperature: %dC\n", val[0]);
  1086. if (ret < 0 || val[1] == 0)
  1087. seq_puts(seq, "Core VDD: <unknown>\n");
  1088. else
  1089. seq_printf(seq, "Core VDD: %dmV\n", val[1]);
  1090. return 0;
  1091. }
  1092. DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
  1093. #if IS_ENABLED(CONFIG_IPV6)
  1094. static int clip_tbl_open(struct inode *inode, struct file *file)
  1095. {
  1096. return single_open(file, clip_tbl_show, inode->i_private);
  1097. }
  1098. static const struct file_operations clip_tbl_debugfs_fops = {
  1099. .owner = THIS_MODULE,
  1100. .open = clip_tbl_open,
  1101. .read = seq_read,
  1102. .llseek = seq_lseek,
  1103. .release = single_release
  1104. };
  1105. #endif
  1106. /*RSS Table.
  1107. */
  1108. static int rss_show(struct seq_file *seq, void *v, int idx)
  1109. {
  1110. u16 *entry = v;
  1111. seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
  1112. idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
  1113. entry[5], entry[6], entry[7]);
  1114. return 0;
  1115. }
  1116. static int rss_open(struct inode *inode, struct file *file)
  1117. {
  1118. int ret;
  1119. struct seq_tab *p;
  1120. struct adapter *adap = inode->i_private;
  1121. p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
  1122. if (!p)
  1123. return -ENOMEM;
  1124. ret = t4_read_rss(adap, (u16 *)p->data);
  1125. if (ret)
  1126. seq_release_private(inode, file);
  1127. return ret;
  1128. }
  1129. static const struct file_operations rss_debugfs_fops = {
  1130. .owner = THIS_MODULE,
  1131. .open = rss_open,
  1132. .read = seq_read,
  1133. .llseek = seq_lseek,
  1134. .release = seq_release_private
  1135. };
  1136. /* RSS Configuration.
  1137. */
  1138. /* Small utility function to return the strings "yes" or "no" if the supplied
  1139. * argument is non-zero.
  1140. */
  1141. static const char *yesno(int x)
  1142. {
  1143. static const char *yes = "yes";
  1144. static const char *no = "no";
  1145. return x ? yes : no;
  1146. }
  1147. static int rss_config_show(struct seq_file *seq, void *v)
  1148. {
  1149. struct adapter *adapter = seq->private;
  1150. static const char * const keymode[] = {
  1151. "global",
  1152. "global and per-VF scramble",
  1153. "per-PF and per-VF scramble",
  1154. "per-VF and per-VF scramble",
  1155. };
  1156. u32 rssconf;
  1157. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
  1158. seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
  1159. seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
  1160. TNL4TUPENIPV6_F));
  1161. seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
  1162. TNL2TUPENIPV6_F));
  1163. seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
  1164. TNL4TUPENIPV4_F));
  1165. seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
  1166. TNL2TUPENIPV4_F));
  1167. seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
  1168. seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
  1169. seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
  1170. seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
  1171. seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
  1172. OFDHASHSAVE_F));
  1173. seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
  1174. seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
  1175. seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
  1176. seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
  1177. SYN4TUPENIPV6_F));
  1178. seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
  1179. SYN2TUPENIPV6_F));
  1180. seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
  1181. SYN4TUPENIPV4_F));
  1182. seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
  1183. SYN2TUPENIPV4_F));
  1184. seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
  1185. SYN4TUPENIPV6_F));
  1186. seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
  1187. seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
  1188. seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
  1189. seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
  1190. seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
  1191. CHANNELENABLE_F));
  1192. seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
  1193. PORTENABLE_F));
  1194. seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
  1195. TNLALLLOOKUP_F));
  1196. seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
  1197. VIRTENABLE_F));
  1198. seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
  1199. CONGESTIONENABLE_F));
  1200. seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
  1201. HASHTOEPLITZ_F));
  1202. seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
  1203. seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
  1204. seq_puts(seq, "\n");
  1205. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
  1206. seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
  1207. seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
  1208. seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
  1209. if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
  1210. seq_printf(seq, " HashAll: %3s\n",
  1211. yesno(rssconf & HASHALL_F));
  1212. seq_printf(seq, " HashEth: %3s\n",
  1213. yesno(rssconf & HASHETH_F));
  1214. }
  1215. seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
  1216. seq_puts(seq, "\n");
  1217. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
  1218. seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
  1219. seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
  1220. seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
  1221. RRCPLMAPEN_F));
  1222. seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
  1223. seq_puts(seq, "\n");
  1224. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
  1225. seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
  1226. seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
  1227. seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
  1228. seq_puts(seq, "\n");
  1229. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
  1230. seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
  1231. if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
  1232. seq_printf(seq, " KeyWrAddrX: %3d\n",
  1233. KEYWRADDRX_G(rssconf));
  1234. seq_printf(seq, " KeyExtend: %3s\n",
  1235. yesno(rssconf & KEYEXTEND_F));
  1236. }
  1237. seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
  1238. seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
  1239. seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
  1240. seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
  1241. seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
  1242. DISABLEVLAN_F));
  1243. seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
  1244. seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
  1245. if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
  1246. seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
  1247. seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
  1248. seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
  1249. seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
  1250. seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
  1251. seq_puts(seq, "\n");
  1252. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
  1253. seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
  1254. seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
  1255. seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
  1256. seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
  1257. seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
  1258. seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
  1259. CHNUNDFLOW3_F));
  1260. seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
  1261. CHNUNDFLOW2_F));
  1262. seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
  1263. CHNUNDFLOW1_F));
  1264. seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
  1265. CHNUNDFLOW0_F));
  1266. seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
  1267. seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
  1268. seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
  1269. seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
  1270. seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
  1271. seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
  1272. seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
  1273. seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
  1274. seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
  1275. seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
  1276. seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
  1277. return 0;
  1278. }
  1279. DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
  1280. /* RSS Secret Key.
  1281. */
  1282. static int rss_key_show(struct seq_file *seq, void *v)
  1283. {
  1284. u32 key[10];
  1285. t4_read_rss_key(seq->private, key);
  1286. seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
  1287. key[9], key[8], key[7], key[6], key[5], key[4], key[3],
  1288. key[2], key[1], key[0]);
  1289. return 0;
  1290. }
  1291. static int rss_key_open(struct inode *inode, struct file *file)
  1292. {
  1293. return single_open(file, rss_key_show, inode->i_private);
  1294. }
  1295. static ssize_t rss_key_write(struct file *file, const char __user *buf,
  1296. size_t count, loff_t *pos)
  1297. {
  1298. int i, j;
  1299. u32 key[10];
  1300. char s[100], *p;
  1301. struct adapter *adap = file_inode(file)->i_private;
  1302. if (count > sizeof(s) - 1)
  1303. return -EINVAL;
  1304. if (copy_from_user(s, buf, count))
  1305. return -EFAULT;
  1306. for (i = count; i > 0 && isspace(s[i - 1]); i--)
  1307. ;
  1308. s[i] = '\0';
  1309. for (p = s, i = 9; i >= 0; i--) {
  1310. key[i] = 0;
  1311. for (j = 0; j < 8; j++, p++) {
  1312. if (!isxdigit(*p))
  1313. return -EINVAL;
  1314. key[i] = (key[i] << 4) | hex2val(*p);
  1315. }
  1316. }
  1317. t4_write_rss_key(adap, key, -1);
  1318. return count;
  1319. }
  1320. static const struct file_operations rss_key_debugfs_fops = {
  1321. .owner = THIS_MODULE,
  1322. .open = rss_key_open,
  1323. .read = seq_read,
  1324. .llseek = seq_lseek,
  1325. .release = single_release,
  1326. .write = rss_key_write
  1327. };
  1328. /* PF RSS Configuration.
  1329. */
  1330. struct rss_pf_conf {
  1331. u32 rss_pf_map;
  1332. u32 rss_pf_mask;
  1333. u32 rss_pf_config;
  1334. };
  1335. static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
  1336. {
  1337. struct rss_pf_conf *pfconf;
  1338. if (v == SEQ_START_TOKEN) {
  1339. /* use the 0th entry to dump the PF Map Index Size */
  1340. pfconf = seq->private + offsetof(struct seq_tab, data);
  1341. seq_printf(seq, "PF Map Index Size = %d\n\n",
  1342. LKPIDXSIZE_G(pfconf->rss_pf_map));
  1343. seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
  1344. seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
  1345. seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
  1346. } else {
  1347. #define G_PFnLKPIDX(map, n) \
  1348. (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
  1349. #define G_PFnMSKSIZE(mask, n) \
  1350. (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
  1351. pfconf = v;
  1352. seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
  1353. idx,
  1354. yesno(pfconf->rss_pf_config & MAPENABLE_F),
  1355. yesno(pfconf->rss_pf_config & CHNENABLE_F),
  1356. yesno(pfconf->rss_pf_config & PRTENABLE_F),
  1357. G_PFnLKPIDX(pfconf->rss_pf_map, idx),
  1358. G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
  1359. IVFWIDTH_G(pfconf->rss_pf_config),
  1360. yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
  1361. yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
  1362. yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
  1363. yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
  1364. yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
  1365. CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
  1366. CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
  1367. #undef G_PFnLKPIDX
  1368. #undef G_PFnMSKSIZE
  1369. }
  1370. return 0;
  1371. }
  1372. static int rss_pf_config_open(struct inode *inode, struct file *file)
  1373. {
  1374. struct adapter *adapter = inode->i_private;
  1375. struct seq_tab *p;
  1376. u32 rss_pf_map, rss_pf_mask;
  1377. struct rss_pf_conf *pfconf;
  1378. int pf;
  1379. p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
  1380. if (!p)
  1381. return -ENOMEM;
  1382. pfconf = (struct rss_pf_conf *)p->data;
  1383. rss_pf_map = t4_read_rss_pf_map(adapter);
  1384. rss_pf_mask = t4_read_rss_pf_mask(adapter);
  1385. for (pf = 0; pf < 8; pf++) {
  1386. pfconf[pf].rss_pf_map = rss_pf_map;
  1387. pfconf[pf].rss_pf_mask = rss_pf_mask;
  1388. t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
  1389. }
  1390. return 0;
  1391. }
  1392. static const struct file_operations rss_pf_config_debugfs_fops = {
  1393. .owner = THIS_MODULE,
  1394. .open = rss_pf_config_open,
  1395. .read = seq_read,
  1396. .llseek = seq_lseek,
  1397. .release = seq_release_private
  1398. };
  1399. /* VF RSS Configuration.
  1400. */
  1401. struct rss_vf_conf {
  1402. u32 rss_vf_vfl;
  1403. u32 rss_vf_vfh;
  1404. };
  1405. static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
  1406. {
  1407. if (v == SEQ_START_TOKEN) {
  1408. seq_puts(seq, " RSS Hash Tuple Enable\n");
  1409. seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
  1410. seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
  1411. } else {
  1412. struct rss_vf_conf *vfconf = v;
  1413. seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
  1414. idx,
  1415. yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
  1416. yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
  1417. VFLKPIDX_G(vfconf->rss_vf_vfh),
  1418. yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
  1419. yesno(vfconf->rss_vf_vfh & VFUPEN_F),
  1420. yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
  1421. yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
  1422. yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
  1423. yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
  1424. yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
  1425. DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
  1426. KEYINDEX_G(vfconf->rss_vf_vfh),
  1427. vfconf->rss_vf_vfl);
  1428. }
  1429. return 0;
  1430. }
  1431. static int rss_vf_config_open(struct inode *inode, struct file *file)
  1432. {
  1433. struct adapter *adapter = inode->i_private;
  1434. struct seq_tab *p;
  1435. struct rss_vf_conf *vfconf;
  1436. int vf;
  1437. p = seq_open_tab(file, 128, sizeof(*vfconf), 1, rss_vf_config_show);
  1438. if (!p)
  1439. return -ENOMEM;
  1440. vfconf = (struct rss_vf_conf *)p->data;
  1441. for (vf = 0; vf < 128; vf++) {
  1442. t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
  1443. &vfconf[vf].rss_vf_vfh);
  1444. }
  1445. return 0;
  1446. }
  1447. static const struct file_operations rss_vf_config_debugfs_fops = {
  1448. .owner = THIS_MODULE,
  1449. .open = rss_vf_config_open,
  1450. .read = seq_read,
  1451. .llseek = seq_lseek,
  1452. .release = seq_release_private
  1453. };
  1454. /**
  1455. * ethqset2pinfo - return port_info of an Ethernet Queue Set
  1456. * @adap: the adapter
  1457. * @qset: Ethernet Queue Set
  1458. */
  1459. static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
  1460. {
  1461. int pidx;
  1462. for_each_port(adap, pidx) {
  1463. struct port_info *pi = adap2pinfo(adap, pidx);
  1464. if (qset >= pi->first_qset &&
  1465. qset < pi->first_qset + pi->nqsets)
  1466. return pi;
  1467. }
  1468. /* should never happen! */
  1469. BUG_ON(1);
  1470. return NULL;
  1471. }
  1472. static int sge_qinfo_show(struct seq_file *seq, void *v)
  1473. {
  1474. struct adapter *adap = seq->private;
  1475. int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
  1476. int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
  1477. int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
  1478. int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
  1479. int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
  1480. int i, r = (uintptr_t)v - 1;
  1481. int toe_idx = r - eth_entries;
  1482. int rdma_idx = toe_idx - toe_entries;
  1483. int ciq_idx = rdma_idx - rdma_entries;
  1484. int ctrl_idx = ciq_idx - ciq_entries;
  1485. int fq_idx = ctrl_idx - ctrl_entries;
  1486. if (r)
  1487. seq_putc(seq, '\n');
  1488. #define S3(fmt_spec, s, v) \
  1489. do { \
  1490. seq_printf(seq, "%-12s", s); \
  1491. for (i = 0; i < n; ++i) \
  1492. seq_printf(seq, " %16" fmt_spec, v); \
  1493. seq_putc(seq, '\n'); \
  1494. } while (0)
  1495. #define S(s, v) S3("s", s, v)
  1496. #define T(s, v) S3("u", s, tx[i].v)
  1497. #define R(s, v) S3("u", s, rx[i].v)
  1498. if (r < eth_entries) {
  1499. int base_qset = r * 4;
  1500. const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
  1501. const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
  1502. int n = min(4, adap->sge.ethqsets - 4 * r);
  1503. S("QType:", "Ethernet");
  1504. S("Interface:",
  1505. rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
  1506. T("TxQ ID:", q.cntxt_id);
  1507. T("TxQ size:", q.size);
  1508. T("TxQ inuse:", q.in_use);
  1509. T("TxQ CIDX:", q.cidx);
  1510. T("TxQ PIDX:", q.pidx);
  1511. #ifdef CONFIG_CHELSIO_T4_DCB
  1512. T("DCB Prio:", dcb_prio);
  1513. S3("u", "DCB PGID:",
  1514. (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
  1515. 4*(7-tx[i].dcb_prio)) & 0xf);
  1516. S3("u", "DCB PFC:",
  1517. (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
  1518. 1*(7-tx[i].dcb_prio)) & 0x1);
  1519. #endif
  1520. R("RspQ ID:", rspq.abs_id);
  1521. R("RspQ size:", rspq.size);
  1522. R("RspQE size:", rspq.iqe_len);
  1523. R("RspQ CIDX:", rspq.cidx);
  1524. R("RspQ Gen:", rspq.gen);
  1525. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1526. S3("u", "Intr pktcnt:",
  1527. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1528. R("FL ID:", fl.cntxt_id);
  1529. R("FL size:", fl.size - 8);
  1530. R("FL pend:", fl.pend_cred);
  1531. R("FL avail:", fl.avail);
  1532. R("FL PIDX:", fl.pidx);
  1533. R("FL CIDX:", fl.cidx);
  1534. } else if (toe_idx < toe_entries) {
  1535. const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
  1536. const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
  1537. int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
  1538. S("QType:", "TOE");
  1539. T("TxQ ID:", q.cntxt_id);
  1540. T("TxQ size:", q.size);
  1541. T("TxQ inuse:", q.in_use);
  1542. T("TxQ CIDX:", q.cidx);
  1543. T("TxQ PIDX:", q.pidx);
  1544. R("RspQ ID:", rspq.abs_id);
  1545. R("RspQ size:", rspq.size);
  1546. R("RspQE size:", rspq.iqe_len);
  1547. R("RspQ CIDX:", rspq.cidx);
  1548. R("RspQ Gen:", rspq.gen);
  1549. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1550. S3("u", "Intr pktcnt:",
  1551. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1552. R("FL ID:", fl.cntxt_id);
  1553. R("FL size:", fl.size - 8);
  1554. R("FL pend:", fl.pend_cred);
  1555. R("FL avail:", fl.avail);
  1556. R("FL PIDX:", fl.pidx);
  1557. R("FL CIDX:", fl.cidx);
  1558. } else if (rdma_idx < rdma_entries) {
  1559. const struct sge_ofld_rxq *rx =
  1560. &adap->sge.rdmarxq[rdma_idx * 4];
  1561. int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
  1562. S("QType:", "RDMA-CPL");
  1563. S("Interface:",
  1564. rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
  1565. R("RspQ ID:", rspq.abs_id);
  1566. R("RspQ size:", rspq.size);
  1567. R("RspQE size:", rspq.iqe_len);
  1568. R("RspQ CIDX:", rspq.cidx);
  1569. R("RspQ Gen:", rspq.gen);
  1570. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1571. S3("u", "Intr pktcnt:",
  1572. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1573. R("FL ID:", fl.cntxt_id);
  1574. R("FL size:", fl.size - 8);
  1575. R("FL pend:", fl.pend_cred);
  1576. R("FL avail:", fl.avail);
  1577. R("FL PIDX:", fl.pidx);
  1578. R("FL CIDX:", fl.cidx);
  1579. } else if (ciq_idx < ciq_entries) {
  1580. const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
  1581. int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
  1582. S("QType:", "RDMA-CIQ");
  1583. S("Interface:",
  1584. rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
  1585. R("RspQ ID:", rspq.abs_id);
  1586. R("RspQ size:", rspq.size);
  1587. R("RspQE size:", rspq.iqe_len);
  1588. R("RspQ CIDX:", rspq.cidx);
  1589. R("RspQ Gen:", rspq.gen);
  1590. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1591. S3("u", "Intr pktcnt:",
  1592. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1593. } else if (ctrl_idx < ctrl_entries) {
  1594. const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
  1595. int n = min(4, adap->params.nports - 4 * ctrl_idx);
  1596. S("QType:", "Control");
  1597. T("TxQ ID:", q.cntxt_id);
  1598. T("TxQ size:", q.size);
  1599. T("TxQ inuse:", q.in_use);
  1600. T("TxQ CIDX:", q.cidx);
  1601. T("TxQ PIDX:", q.pidx);
  1602. } else if (fq_idx == 0) {
  1603. const struct sge_rspq *evtq = &adap->sge.fw_evtq;
  1604. seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
  1605. seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
  1606. seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
  1607. seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
  1608. seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
  1609. seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
  1610. seq_printf(seq, "%-12s %16u\n", "Intr delay:",
  1611. qtimer_val(adap, evtq));
  1612. seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
  1613. adap->sge.counter_val[evtq->pktcnt_idx]);
  1614. }
  1615. #undef R
  1616. #undef T
  1617. #undef S
  1618. #undef S3
  1619. return 0;
  1620. }
  1621. static int sge_queue_entries(const struct adapter *adap)
  1622. {
  1623. return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
  1624. DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
  1625. DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
  1626. DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
  1627. DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
  1628. }
  1629. static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
  1630. {
  1631. int entries = sge_queue_entries(seq->private);
  1632. return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
  1633. }
  1634. static void sge_queue_stop(struct seq_file *seq, void *v)
  1635. {
  1636. }
  1637. static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
  1638. {
  1639. int entries = sge_queue_entries(seq->private);
  1640. ++*pos;
  1641. return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
  1642. }
  1643. static const struct seq_operations sge_qinfo_seq_ops = {
  1644. .start = sge_queue_start,
  1645. .next = sge_queue_next,
  1646. .stop = sge_queue_stop,
  1647. .show = sge_qinfo_show
  1648. };
  1649. static int sge_qinfo_open(struct inode *inode, struct file *file)
  1650. {
  1651. int res = seq_open(file, &sge_qinfo_seq_ops);
  1652. if (!res) {
  1653. struct seq_file *seq = file->private_data;
  1654. seq->private = inode->i_private;
  1655. }
  1656. return res;
  1657. }
  1658. static const struct file_operations sge_qinfo_debugfs_fops = {
  1659. .owner = THIS_MODULE,
  1660. .open = sge_qinfo_open,
  1661. .read = seq_read,
  1662. .llseek = seq_lseek,
  1663. .release = seq_release,
  1664. };
  1665. int mem_open(struct inode *inode, struct file *file)
  1666. {
  1667. unsigned int mem;
  1668. struct adapter *adap;
  1669. file->private_data = inode->i_private;
  1670. mem = (uintptr_t)file->private_data & 0x3;
  1671. adap = file->private_data - mem;
  1672. (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
  1673. return 0;
  1674. }
  1675. static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
  1676. loff_t *ppos)
  1677. {
  1678. loff_t pos = *ppos;
  1679. loff_t avail = file_inode(file)->i_size;
  1680. unsigned int mem = (uintptr_t)file->private_data & 3;
  1681. struct adapter *adap = file->private_data - mem;
  1682. __be32 *data;
  1683. int ret;
  1684. if (pos < 0)
  1685. return -EINVAL;
  1686. if (pos >= avail)
  1687. return 0;
  1688. if (count > avail - pos)
  1689. count = avail - pos;
  1690. data = t4_alloc_mem(count);
  1691. if (!data)
  1692. return -ENOMEM;
  1693. spin_lock(&adap->win0_lock);
  1694. ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
  1695. spin_unlock(&adap->win0_lock);
  1696. if (ret) {
  1697. t4_free_mem(data);
  1698. return ret;
  1699. }
  1700. ret = copy_to_user(buf, data, count);
  1701. t4_free_mem(data);
  1702. if (ret)
  1703. return -EFAULT;
  1704. *ppos = pos + count;
  1705. return count;
  1706. }
  1707. static const struct file_operations mem_debugfs_fops = {
  1708. .owner = THIS_MODULE,
  1709. .open = simple_open,
  1710. .read = mem_read,
  1711. .llseek = default_llseek,
  1712. };
  1713. static void add_debugfs_mem(struct adapter *adap, const char *name,
  1714. unsigned int idx, unsigned int size_mb)
  1715. {
  1716. debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root,
  1717. (void *)adap + idx, &mem_debugfs_fops,
  1718. size_mb << 20);
  1719. }
  1720. /* Add an array of Debug FS files.
  1721. */
  1722. void add_debugfs_files(struct adapter *adap,
  1723. struct t4_debugfs_entry *files,
  1724. unsigned int nfiles)
  1725. {
  1726. int i;
  1727. /* debugfs support is best effort */
  1728. for (i = 0; i < nfiles; i++)
  1729. debugfs_create_file(files[i].name, files[i].mode,
  1730. adap->debugfs_root,
  1731. (void *)adap + files[i].data,
  1732. files[i].ops);
  1733. }
  1734. int t4_setup_debugfs(struct adapter *adap)
  1735. {
  1736. int i;
  1737. u32 size;
  1738. struct dentry *de;
  1739. static struct t4_debugfs_entry t4_debugfs_files[] = {
  1740. { "cim_la", &cim_la_fops, S_IRUSR, 0 },
  1741. { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
  1742. { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
  1743. { "devlog", &devlog_fops, S_IRUSR, 0 },
  1744. { "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
  1745. { "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
  1746. { "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
  1747. { "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
  1748. { "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 },
  1749. { "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 },
  1750. { "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 },
  1751. { "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 },
  1752. { "l2t", &t4_l2t_fops, S_IRUSR, 0},
  1753. { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
  1754. { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
  1755. { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
  1756. { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
  1757. { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
  1758. { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
  1759. { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
  1760. { "ibq_tp0", &cim_ibq_fops, S_IRUSR, 0 },
  1761. { "ibq_tp1", &cim_ibq_fops, S_IRUSR, 1 },
  1762. { "ibq_ulp", &cim_ibq_fops, S_IRUSR, 2 },
  1763. { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
  1764. { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
  1765. { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
  1766. { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
  1767. { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
  1768. { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
  1769. { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
  1770. { "obq_sge", &cim_obq_fops, S_IRUSR, 4 },
  1771. { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
  1772. { "tp_la", &tp_la_fops, S_IRUSR, 0 },
  1773. { "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 },
  1774. { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
  1775. { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
  1776. { "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 },
  1777. #if IS_ENABLED(CONFIG_IPV6)
  1778. { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
  1779. #endif
  1780. };
  1781. /* Debug FS nodes common to all T5 and later adapters.
  1782. */
  1783. static struct t4_debugfs_entry t5_debugfs_files[] = {
  1784. { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
  1785. { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
  1786. };
  1787. add_debugfs_files(adap,
  1788. t4_debugfs_files,
  1789. ARRAY_SIZE(t4_debugfs_files));
  1790. if (!is_t4(adap->params.chip))
  1791. add_debugfs_files(adap,
  1792. t5_debugfs_files,
  1793. ARRAY_SIZE(t5_debugfs_files));
  1794. i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
  1795. if (i & EDRAM0_ENABLE_F) {
  1796. size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
  1797. add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
  1798. }
  1799. if (i & EDRAM1_ENABLE_F) {
  1800. size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
  1801. add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
  1802. }
  1803. if (is_t4(adap->params.chip)) {
  1804. size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
  1805. if (i & EXT_MEM_ENABLE_F)
  1806. add_debugfs_mem(adap, "mc", MEM_MC,
  1807. EXT_MEM_SIZE_G(size));
  1808. } else {
  1809. if (i & EXT_MEM0_ENABLE_F) {
  1810. size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
  1811. add_debugfs_mem(adap, "mc0", MEM_MC0,
  1812. EXT_MEM0_SIZE_G(size));
  1813. }
  1814. if (i & EXT_MEM1_ENABLE_F) {
  1815. size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
  1816. add_debugfs_mem(adap, "mc1", MEM_MC1,
  1817. EXT_MEM1_SIZE_G(size));
  1818. }
  1819. }
  1820. de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap,
  1821. &flash_debugfs_fops, adap->params.sf_size);
  1822. return 0;
  1823. }