cnic_if.h 9.1 KB

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  1. /* cnic_if.h: QLogic cnic core network driver.
  2. *
  3. * Copyright (c) 2006-2014 Broadcom Corporation
  4. * Copyright (c) 2014-2015 QLogic Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. *
  10. */
  11. #ifndef CNIC_IF_H
  12. #define CNIC_IF_H
  13. #include "bnx2x/bnx2x_mfw_req.h"
  14. #define CNIC_MODULE_VERSION "2.5.21"
  15. #define CNIC_MODULE_RELDATE "January 29, 2015"
  16. #define CNIC_ULP_RDMA 0
  17. #define CNIC_ULP_ISCSI 1
  18. #define CNIC_ULP_FCOE 2
  19. #define CNIC_ULP_L4 3
  20. #define MAX_CNIC_ULP_TYPE_EXT 3
  21. #define MAX_CNIC_ULP_TYPE 4
  22. /* Use CPU native page size up to 16K for cnic ring sizes. */
  23. #if (PAGE_SHIFT > 14)
  24. #define CNIC_PAGE_BITS 14
  25. #else
  26. #define CNIC_PAGE_BITS PAGE_SHIFT
  27. #endif
  28. #define CNIC_PAGE_SIZE (1 << (CNIC_PAGE_BITS))
  29. #define CNIC_PAGE_ALIGN(addr) ALIGN(addr, CNIC_PAGE_SIZE)
  30. #define CNIC_PAGE_MASK (~((CNIC_PAGE_SIZE) - 1))
  31. struct kwqe {
  32. u32 kwqe_op_flag;
  33. #define KWQE_QID_SHIFT 8
  34. #define KWQE_OPCODE_MASK 0x00ff0000
  35. #define KWQE_OPCODE_SHIFT 16
  36. #define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
  37. #define KWQE_LAYER_MASK 0x70000000
  38. #define KWQE_LAYER_SHIFT 28
  39. #define KWQE_FLAGS_LAYER_MASK_L2 (2<<28)
  40. #define KWQE_FLAGS_LAYER_MASK_L3 (3<<28)
  41. #define KWQE_FLAGS_LAYER_MASK_L4 (4<<28)
  42. #define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
  43. #define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
  44. #define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
  45. u32 kwqe_info0;
  46. u32 kwqe_info1;
  47. u32 kwqe_info2;
  48. u32 kwqe_info3;
  49. u32 kwqe_info4;
  50. u32 kwqe_info5;
  51. u32 kwqe_info6;
  52. };
  53. struct kwqe_16 {
  54. u32 kwqe_info0;
  55. u32 kwqe_info1;
  56. u32 kwqe_info2;
  57. u32 kwqe_info3;
  58. };
  59. struct kcqe {
  60. u32 kcqe_info0;
  61. u32 kcqe_info1;
  62. u32 kcqe_info2;
  63. u32 kcqe_info3;
  64. u32 kcqe_info4;
  65. u32 kcqe_info5;
  66. u32 kcqe_info6;
  67. u32 kcqe_op_flag;
  68. #define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
  69. #define KCQE_FLAGS_LAYER_MASK (0x7<<28)
  70. #define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
  71. #define KCQE_FLAGS_LAYER_MASK_L2 (2<<28)
  72. #define KCQE_FLAGS_LAYER_MASK_L3 (3<<28)
  73. #define KCQE_FLAGS_LAYER_MASK_L4 (4<<28)
  74. #define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
  75. #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
  76. #define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
  77. #define KCQE_FLAGS_NEXT (1<<31)
  78. #define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
  79. #define KCQE_FLAGS_OPCODE_SHIFT (16)
  80. #define KCQE_OPCODE(op) \
  81. (((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
  82. };
  83. #define MAX_CNIC_CTL_DATA 64
  84. #define MAX_DRV_CTL_DATA 64
  85. #define CNIC_CTL_STOP_CMD 1
  86. #define CNIC_CTL_START_CMD 2
  87. #define CNIC_CTL_COMPLETION_CMD 3
  88. #define CNIC_CTL_STOP_ISCSI_CMD 4
  89. #define CNIC_CTL_FCOE_STATS_GET_CMD 5
  90. #define CNIC_CTL_ISCSI_STATS_GET_CMD 6
  91. #define DRV_CTL_IO_WR_CMD 0x101
  92. #define DRV_CTL_IO_RD_CMD 0x102
  93. #define DRV_CTL_CTX_WR_CMD 0x103
  94. #define DRV_CTL_CTXTBL_WR_CMD 0x104
  95. #define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105
  96. #define DRV_CTL_START_L2_CMD 0x106
  97. #define DRV_CTL_STOP_L2_CMD 0x107
  98. #define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c
  99. #define DRV_CTL_ISCSI_STOPPED_CMD 0x10d
  100. #define DRV_CTL_ULP_REGISTER_CMD 0x10e
  101. #define DRV_CTL_ULP_UNREGISTER_CMD 0x10f
  102. struct cnic_ctl_completion {
  103. u32 cid;
  104. u8 opcode;
  105. u8 error;
  106. };
  107. struct cnic_ctl_info {
  108. int cmd;
  109. union {
  110. struct cnic_ctl_completion comp;
  111. char bytes[MAX_CNIC_CTL_DATA];
  112. } data;
  113. };
  114. struct drv_ctl_spq_credit {
  115. u32 credit_count;
  116. };
  117. struct drv_ctl_io {
  118. u32 cid_addr;
  119. u32 offset;
  120. u32 data;
  121. dma_addr_t dma_addr;
  122. };
  123. struct drv_ctl_l2_ring {
  124. u32 client_id;
  125. u32 cid;
  126. };
  127. struct drv_ctl_register_data {
  128. int ulp_type;
  129. struct fcoe_capabilities fcoe_features;
  130. };
  131. struct drv_ctl_info {
  132. int cmd;
  133. union {
  134. struct drv_ctl_spq_credit credit;
  135. struct drv_ctl_io io;
  136. struct drv_ctl_l2_ring ring;
  137. int ulp_type;
  138. struct drv_ctl_register_data register_data;
  139. char bytes[MAX_DRV_CTL_DATA];
  140. } data;
  141. };
  142. struct cnic_ops {
  143. struct module *cnic_owner;
  144. /* Calls to these functions are protected by RCU. When
  145. * unregistering, we wait for any calls to complete before
  146. * continuing.
  147. */
  148. int (*cnic_handler)(void *, void *);
  149. int (*cnic_ctl)(void *, struct cnic_ctl_info *);
  150. };
  151. #define MAX_CNIC_VEC 8
  152. struct cnic_irq {
  153. unsigned int vector;
  154. void *status_blk;
  155. u32 status_blk_num;
  156. u32 status_blk_num2;
  157. u32 irq_flags;
  158. #define CNIC_IRQ_FL_MSIX 0x00000001
  159. };
  160. struct cnic_eth_dev {
  161. struct module *drv_owner;
  162. u32 drv_state;
  163. #define CNIC_DRV_STATE_REGD 0x00000001
  164. #define CNIC_DRV_STATE_USING_MSIX 0x00000002
  165. #define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
  166. #define CNIC_DRV_STATE_NO_ISCSI 0x00000008
  167. #define CNIC_DRV_STATE_NO_FCOE 0x00000010
  168. #define CNIC_DRV_STATE_HANDLES_IRQ 0x00000020
  169. u32 chip_id;
  170. u32 max_kwqe_pending;
  171. struct pci_dev *pdev;
  172. void __iomem *io_base;
  173. void __iomem *io_base2;
  174. const void *iro_arr;
  175. u32 ctx_tbl_offset;
  176. u32 ctx_tbl_len;
  177. int ctx_blk_size;
  178. u32 starting_cid;
  179. u32 max_iscsi_conn;
  180. u32 max_fcoe_conn;
  181. u32 max_rdma_conn;
  182. u32 fcoe_init_cid;
  183. u32 max_fcoe_exchanges;
  184. u32 fcoe_wwn_port_name_hi;
  185. u32 fcoe_wwn_port_name_lo;
  186. u32 fcoe_wwn_node_name_hi;
  187. u32 fcoe_wwn_node_name_lo;
  188. u16 iscsi_l2_client_id;
  189. u16 iscsi_l2_cid;
  190. u8 iscsi_mac[ETH_ALEN];
  191. int num_irq;
  192. struct cnic_irq irq_arr[MAX_CNIC_VEC];
  193. int (*drv_register_cnic)(struct net_device *,
  194. struct cnic_ops *, void *);
  195. int (*drv_unregister_cnic)(struct net_device *);
  196. int (*drv_submit_kwqes_32)(struct net_device *,
  197. struct kwqe *[], u32);
  198. int (*drv_submit_kwqes_16)(struct net_device *,
  199. struct kwqe_16 *[], u32);
  200. int (*drv_ctl)(struct net_device *, struct drv_ctl_info *);
  201. unsigned long reserved1[2];
  202. union drv_info_to_mcp *addr_drv_info_to_mcp;
  203. };
  204. struct cnic_sockaddr {
  205. union {
  206. struct sockaddr_in v4;
  207. struct sockaddr_in6 v6;
  208. } local;
  209. union {
  210. struct sockaddr_in v4;
  211. struct sockaddr_in6 v6;
  212. } remote;
  213. };
  214. struct cnic_sock {
  215. struct cnic_dev *dev;
  216. void *context;
  217. u32 src_ip[4];
  218. u32 dst_ip[4];
  219. u16 src_port;
  220. u16 dst_port;
  221. u16 vlan_id;
  222. unsigned char old_ha[ETH_ALEN];
  223. unsigned char ha[ETH_ALEN];
  224. u32 mtu;
  225. u32 cid;
  226. u32 l5_cid;
  227. u32 pg_cid;
  228. int ulp_type;
  229. u32 ka_timeout;
  230. u32 ka_interval;
  231. u8 ka_max_probe_count;
  232. u8 tos;
  233. u8 ttl;
  234. u8 snd_seq_scale;
  235. u32 rcv_buf;
  236. u32 snd_buf;
  237. u32 seed;
  238. unsigned long tcp_flags;
  239. #define SK_TCP_NO_DELAY_ACK 0x1
  240. #define SK_TCP_KEEP_ALIVE 0x2
  241. #define SK_TCP_NAGLE 0x4
  242. #define SK_TCP_TIMESTAMP 0x8
  243. #define SK_TCP_SACK 0x10
  244. #define SK_TCP_SEG_SCALING 0x20
  245. unsigned long flags;
  246. #define SK_F_INUSE 0
  247. #define SK_F_OFFLD_COMPLETE 1
  248. #define SK_F_OFFLD_SCHED 2
  249. #define SK_F_PG_OFFLD_COMPLETE 3
  250. #define SK_F_CONNECT_START 4
  251. #define SK_F_IPV6 5
  252. #define SK_F_CLOSING 7
  253. #define SK_F_HW_ERR 8
  254. atomic_t ref_count;
  255. u32 state;
  256. struct kwqe kwqe1;
  257. struct kwqe kwqe2;
  258. struct kwqe kwqe3;
  259. };
  260. struct cnic_dev {
  261. struct net_device *netdev;
  262. struct pci_dev *pcidev;
  263. void __iomem *regview;
  264. struct list_head list;
  265. int (*register_device)(struct cnic_dev *dev, int ulp_type,
  266. void *ulp_ctx);
  267. int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
  268. int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
  269. u32 num_wqes);
  270. int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
  271. u32 num_wqes);
  272. int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
  273. void *);
  274. int (*cm_destroy)(struct cnic_sock *);
  275. int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
  276. int (*cm_abort)(struct cnic_sock *);
  277. int (*cm_close)(struct cnic_sock *);
  278. struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
  279. int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
  280. char *data, u16 data_size);
  281. unsigned long flags;
  282. #define CNIC_F_CNIC_UP 1
  283. #define CNIC_F_BNX2_CLASS 3
  284. #define CNIC_F_BNX2X_CLASS 4
  285. atomic_t ref_count;
  286. u8 mac_addr[ETH_ALEN];
  287. int max_iscsi_conn;
  288. int max_fcoe_conn;
  289. int max_rdma_conn;
  290. int max_fcoe_exchanges;
  291. union drv_info_to_mcp *stats_addr;
  292. struct fcoe_capabilities *fcoe_cap;
  293. void *cnic_priv;
  294. };
  295. #define CNIC_WR(dev, off, val) writel(val, dev->regview + off)
  296. #define CNIC_WR16(dev, off, val) writew(val, dev->regview + off)
  297. #define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off)
  298. #define CNIC_RD(dev, off) readl(dev->regview + off)
  299. #define CNIC_RD16(dev, off) readw(dev->regview + off)
  300. struct cnic_ulp_ops {
  301. /* Calls to these functions are protected by RCU. When
  302. * unregistering, we wait for any calls to complete before
  303. * continuing.
  304. */
  305. void (*cnic_init)(struct cnic_dev *dev);
  306. void (*cnic_exit)(struct cnic_dev *dev);
  307. void (*cnic_start)(void *ulp_ctx);
  308. void (*cnic_stop)(void *ulp_ctx);
  309. void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
  310. u32 num_cqes);
  311. void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
  312. void (*cm_connect_complete)(struct cnic_sock *);
  313. void (*cm_close_complete)(struct cnic_sock *);
  314. void (*cm_abort_complete)(struct cnic_sock *);
  315. void (*cm_remote_close)(struct cnic_sock *);
  316. void (*cm_remote_abort)(struct cnic_sock *);
  317. int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
  318. char *data, u16 data_size);
  319. int (*cnic_get_stats)(void *ulp_ctx);
  320. struct module *owner;
  321. atomic_t ref_count;
  322. };
  323. int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
  324. int cnic_unregister_driver(int ulp_type);
  325. #endif