bnx2x_stats.c 62 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2013 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "bnx2x_stats.h"
  19. #include "bnx2x_cmn.h"
  20. #include "bnx2x_sriov.h"
  21. /* Statistics */
  22. /*
  23. * General service functions
  24. */
  25. static inline long bnx2x_hilo(u32 *hiref)
  26. {
  27. u32 lo = *(hiref + 1);
  28. #if (BITS_PER_LONG == 64)
  29. u32 hi = *hiref;
  30. return HILO_U64(hi, lo);
  31. #else
  32. return lo;
  33. #endif
  34. }
  35. static inline u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
  36. {
  37. u16 res = 0;
  38. /* 'newest' convention - shmem2 cotains the size of the port stats */
  39. if (SHMEM2_HAS(bp, sizeof_port_stats)) {
  40. u32 size = SHMEM2_RD(bp, sizeof_port_stats);
  41. if (size)
  42. res = size;
  43. /* prevent newer BC from causing buffer overflow */
  44. if (res > sizeof(struct host_port_stats))
  45. res = sizeof(struct host_port_stats);
  46. }
  47. /* Older convention - all BCs support the port stats' fields up until
  48. * the 'not_used' field
  49. */
  50. if (!res) {
  51. res = offsetof(struct host_port_stats, not_used) + 4;
  52. /* if PFC stats are supported by the MFW, DMA them as well */
  53. if (bp->flags & BC_SUPPORTS_PFC_STATS) {
  54. res += offsetof(struct host_port_stats,
  55. pfc_frames_rx_lo) -
  56. offsetof(struct host_port_stats,
  57. pfc_frames_tx_hi) + 4 ;
  58. }
  59. }
  60. res >>= 2;
  61. WARN_ON(res > 2 * DMAE_LEN32_RD_MAX);
  62. return res;
  63. }
  64. /*
  65. * Init service functions
  66. */
  67. static void bnx2x_dp_stats(struct bnx2x *bp)
  68. {
  69. int i;
  70. DP(BNX2X_MSG_STATS, "dumping stats:\n"
  71. "fw_stats_req\n"
  72. " hdr\n"
  73. " cmd_num %d\n"
  74. " reserved0 %d\n"
  75. " drv_stats_counter %d\n"
  76. " reserved1 %d\n"
  77. " stats_counters_addrs %x %x\n",
  78. bp->fw_stats_req->hdr.cmd_num,
  79. bp->fw_stats_req->hdr.reserved0,
  80. bp->fw_stats_req->hdr.drv_stats_counter,
  81. bp->fw_stats_req->hdr.reserved1,
  82. bp->fw_stats_req->hdr.stats_counters_addrs.hi,
  83. bp->fw_stats_req->hdr.stats_counters_addrs.lo);
  84. for (i = 0; i < bp->fw_stats_req->hdr.cmd_num; i++) {
  85. DP(BNX2X_MSG_STATS,
  86. "query[%d]\n"
  87. " kind %d\n"
  88. " index %d\n"
  89. " funcID %d\n"
  90. " reserved %d\n"
  91. " address %x %x\n",
  92. i, bp->fw_stats_req->query[i].kind,
  93. bp->fw_stats_req->query[i].index,
  94. bp->fw_stats_req->query[i].funcID,
  95. bp->fw_stats_req->query[i].reserved,
  96. bp->fw_stats_req->query[i].address.hi,
  97. bp->fw_stats_req->query[i].address.lo);
  98. }
  99. }
  100. /* Post the next statistics ramrod. Protect it with the spin in
  101. * order to ensure the strict order between statistics ramrods
  102. * (each ramrod has a sequence number passed in a
  103. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  104. * sent in order).
  105. */
  106. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  107. {
  108. int rc;
  109. if (bp->stats_pending)
  110. return;
  111. bp->fw_stats_req->hdr.drv_stats_counter =
  112. cpu_to_le16(bp->stats_counter++);
  113. DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
  114. le16_to_cpu(bp->fw_stats_req->hdr.drv_stats_counter));
  115. /* adjust the ramrod to include VF queues statistics */
  116. bnx2x_iov_adjust_stats_req(bp);
  117. bnx2x_dp_stats(bp);
  118. /* send FW stats ramrod */
  119. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  120. U64_HI(bp->fw_stats_req_mapping),
  121. U64_LO(bp->fw_stats_req_mapping),
  122. NONE_CONNECTION_TYPE);
  123. if (rc == 0)
  124. bp->stats_pending = 1;
  125. }
  126. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  127. {
  128. struct dmae_command *dmae = &bp->stats_dmae;
  129. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  130. *stats_comp = DMAE_COMP_VAL;
  131. if (CHIP_REV_IS_SLOW(bp))
  132. return;
  133. /* Update MCP's statistics if possible */
  134. if (bp->func_stx)
  135. memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
  136. sizeof(bp->func_stats));
  137. /* loader */
  138. if (bp->executer_idx) {
  139. int loader_idx = PMF_DMAE_C(bp);
  140. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  141. true, DMAE_COMP_GRC);
  142. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  143. memset(dmae, 0, sizeof(struct dmae_command));
  144. dmae->opcode = opcode;
  145. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  146. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  147. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  148. sizeof(struct dmae_command) *
  149. (loader_idx + 1)) >> 2;
  150. dmae->dst_addr_hi = 0;
  151. dmae->len = sizeof(struct dmae_command) >> 2;
  152. if (CHIP_IS_E1(bp))
  153. dmae->len--;
  154. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  155. dmae->comp_addr_hi = 0;
  156. dmae->comp_val = 1;
  157. *stats_comp = 0;
  158. bnx2x_post_dmae(bp, dmae, loader_idx);
  159. } else if (bp->func_stx) {
  160. *stats_comp = 0;
  161. bnx2x_issue_dmae_with_comp(bp, dmae, stats_comp);
  162. }
  163. }
  164. static void bnx2x_stats_comp(struct bnx2x *bp)
  165. {
  166. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  167. int cnt = 10;
  168. might_sleep();
  169. while (*stats_comp != DMAE_COMP_VAL) {
  170. if (!cnt) {
  171. BNX2X_ERR("timeout waiting for stats finished\n");
  172. break;
  173. }
  174. cnt--;
  175. usleep_range(1000, 2000);
  176. }
  177. }
  178. /*
  179. * Statistics service functions
  180. */
  181. /* should be called under stats_sema */
  182. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  183. {
  184. struct dmae_command *dmae;
  185. u32 opcode;
  186. int loader_idx = PMF_DMAE_C(bp);
  187. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  188. /* sanity */
  189. if (!bp->port.pmf || !bp->port.port_stx) {
  190. BNX2X_ERR("BUG!\n");
  191. return;
  192. }
  193. bp->executer_idx = 0;
  194. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  195. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  196. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  197. dmae->src_addr_lo = bp->port.port_stx >> 2;
  198. dmae->src_addr_hi = 0;
  199. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  200. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  201. dmae->len = DMAE_LEN32_RD_MAX;
  202. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  203. dmae->comp_addr_hi = 0;
  204. dmae->comp_val = 1;
  205. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  206. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  207. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  208. dmae->src_addr_hi = 0;
  209. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  210. DMAE_LEN32_RD_MAX * 4);
  211. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  212. DMAE_LEN32_RD_MAX * 4);
  213. dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
  214. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  215. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  216. dmae->comp_val = DMAE_COMP_VAL;
  217. *stats_comp = 0;
  218. bnx2x_hw_stats_post(bp);
  219. bnx2x_stats_comp(bp);
  220. }
  221. static void bnx2x_port_stats_init(struct bnx2x *bp)
  222. {
  223. struct dmae_command *dmae;
  224. int port = BP_PORT(bp);
  225. u32 opcode;
  226. int loader_idx = PMF_DMAE_C(bp);
  227. u32 mac_addr;
  228. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  229. /* sanity */
  230. if (!bp->link_vars.link_up || !bp->port.pmf) {
  231. BNX2X_ERR("BUG!\n");
  232. return;
  233. }
  234. bp->executer_idx = 0;
  235. /* MCP */
  236. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  237. true, DMAE_COMP_GRC);
  238. if (bp->port.port_stx) {
  239. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  240. dmae->opcode = opcode;
  241. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  242. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  243. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  244. dmae->dst_addr_hi = 0;
  245. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  246. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  247. dmae->comp_addr_hi = 0;
  248. dmae->comp_val = 1;
  249. }
  250. if (bp->func_stx) {
  251. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  252. dmae->opcode = opcode;
  253. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  254. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  255. dmae->dst_addr_lo = bp->func_stx >> 2;
  256. dmae->dst_addr_hi = 0;
  257. dmae->len = sizeof(struct host_func_stats) >> 2;
  258. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  259. dmae->comp_addr_hi = 0;
  260. dmae->comp_val = 1;
  261. }
  262. /* MAC */
  263. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  264. true, DMAE_COMP_GRC);
  265. /* EMAC is special */
  266. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  267. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  268. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  269. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  270. dmae->opcode = opcode;
  271. dmae->src_addr_lo = (mac_addr +
  272. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  273. dmae->src_addr_hi = 0;
  274. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  275. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  276. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  277. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  278. dmae->comp_addr_hi = 0;
  279. dmae->comp_val = 1;
  280. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  281. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  282. dmae->opcode = opcode;
  283. dmae->src_addr_lo = (mac_addr +
  284. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  285. dmae->src_addr_hi = 0;
  286. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  287. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  288. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  289. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  290. dmae->len = 1;
  291. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  292. dmae->comp_addr_hi = 0;
  293. dmae->comp_val = 1;
  294. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  295. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  296. dmae->opcode = opcode;
  297. dmae->src_addr_lo = (mac_addr +
  298. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  299. dmae->src_addr_hi = 0;
  300. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  301. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  302. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  303. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  304. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  305. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  306. dmae->comp_addr_hi = 0;
  307. dmae->comp_val = 1;
  308. } else {
  309. u32 tx_src_addr_lo, rx_src_addr_lo;
  310. u16 rx_len, tx_len;
  311. /* configure the params according to MAC type */
  312. switch (bp->link_vars.mac_type) {
  313. case MAC_TYPE_BMAC:
  314. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  315. NIG_REG_INGRESS_BMAC0_MEM);
  316. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  317. BIGMAC_REGISTER_TX_STAT_GTBYT */
  318. if (CHIP_IS_E1x(bp)) {
  319. tx_src_addr_lo = (mac_addr +
  320. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  321. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  322. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  323. rx_src_addr_lo = (mac_addr +
  324. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  325. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  326. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  327. } else {
  328. tx_src_addr_lo = (mac_addr +
  329. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  330. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  331. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  332. rx_src_addr_lo = (mac_addr +
  333. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  334. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  335. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  336. }
  337. break;
  338. case MAC_TYPE_UMAC: /* handled by MSTAT */
  339. case MAC_TYPE_XMAC: /* handled by MSTAT */
  340. default:
  341. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  342. tx_src_addr_lo = (mac_addr +
  343. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  344. rx_src_addr_lo = (mac_addr +
  345. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  346. tx_len = sizeof(bp->slowpath->
  347. mac_stats.mstat_stats.stats_tx) >> 2;
  348. rx_len = sizeof(bp->slowpath->
  349. mac_stats.mstat_stats.stats_rx) >> 2;
  350. break;
  351. }
  352. /* TX stats */
  353. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  354. dmae->opcode = opcode;
  355. dmae->src_addr_lo = tx_src_addr_lo;
  356. dmae->src_addr_hi = 0;
  357. dmae->len = tx_len;
  358. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  359. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  360. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  361. dmae->comp_addr_hi = 0;
  362. dmae->comp_val = 1;
  363. /* RX stats */
  364. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  365. dmae->opcode = opcode;
  366. dmae->src_addr_hi = 0;
  367. dmae->src_addr_lo = rx_src_addr_lo;
  368. dmae->dst_addr_lo =
  369. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  370. dmae->dst_addr_hi =
  371. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  372. dmae->len = rx_len;
  373. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  374. dmae->comp_addr_hi = 0;
  375. dmae->comp_val = 1;
  376. }
  377. /* NIG */
  378. if (!CHIP_IS_E3(bp)) {
  379. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  380. dmae->opcode = opcode;
  381. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  382. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  383. dmae->src_addr_hi = 0;
  384. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  385. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  386. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  387. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  388. dmae->len = (2*sizeof(u32)) >> 2;
  389. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  390. dmae->comp_addr_hi = 0;
  391. dmae->comp_val = 1;
  392. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  393. dmae->opcode = opcode;
  394. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  395. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  396. dmae->src_addr_hi = 0;
  397. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  398. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  399. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  400. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  401. dmae->len = (2*sizeof(u32)) >> 2;
  402. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  403. dmae->comp_addr_hi = 0;
  404. dmae->comp_val = 1;
  405. }
  406. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  407. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  408. true, DMAE_COMP_PCI);
  409. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  410. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  411. dmae->src_addr_hi = 0;
  412. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  413. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  414. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  415. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  416. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  417. dmae->comp_val = DMAE_COMP_VAL;
  418. *stats_comp = 0;
  419. }
  420. static void bnx2x_func_stats_init(struct bnx2x *bp)
  421. {
  422. struct dmae_command *dmae = &bp->stats_dmae;
  423. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  424. /* sanity */
  425. if (!bp->func_stx) {
  426. BNX2X_ERR("BUG!\n");
  427. return;
  428. }
  429. bp->executer_idx = 0;
  430. memset(dmae, 0, sizeof(struct dmae_command));
  431. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  432. true, DMAE_COMP_PCI);
  433. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  434. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  435. dmae->dst_addr_lo = bp->func_stx >> 2;
  436. dmae->dst_addr_hi = 0;
  437. dmae->len = sizeof(struct host_func_stats) >> 2;
  438. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  439. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  440. dmae->comp_val = DMAE_COMP_VAL;
  441. *stats_comp = 0;
  442. }
  443. /* should be called under stats_sema */
  444. static void bnx2x_stats_start(struct bnx2x *bp)
  445. {
  446. if (IS_PF(bp)) {
  447. if (bp->port.pmf)
  448. bnx2x_port_stats_init(bp);
  449. else if (bp->func_stx)
  450. bnx2x_func_stats_init(bp);
  451. bnx2x_hw_stats_post(bp);
  452. bnx2x_storm_stats_post(bp);
  453. }
  454. }
  455. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  456. {
  457. bnx2x_stats_comp(bp);
  458. bnx2x_stats_pmf_update(bp);
  459. bnx2x_stats_start(bp);
  460. }
  461. static void bnx2x_stats_restart(struct bnx2x *bp)
  462. {
  463. /* vfs travel through here as part of the statistics FSM, but no action
  464. * is required
  465. */
  466. if (IS_VF(bp))
  467. return;
  468. bnx2x_stats_comp(bp);
  469. bnx2x_stats_start(bp);
  470. }
  471. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  472. {
  473. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  474. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  475. struct {
  476. u32 lo;
  477. u32 hi;
  478. } diff;
  479. if (CHIP_IS_E1x(bp)) {
  480. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  481. /* the macros below will use "bmac1_stats" type */
  482. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  483. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  484. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  485. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  486. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  487. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  488. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  489. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  490. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  491. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  492. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  493. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  494. UPDATE_STAT64(tx_stat_gt127,
  495. tx_stat_etherstatspkts65octetsto127octets);
  496. UPDATE_STAT64(tx_stat_gt255,
  497. tx_stat_etherstatspkts128octetsto255octets);
  498. UPDATE_STAT64(tx_stat_gt511,
  499. tx_stat_etherstatspkts256octetsto511octets);
  500. UPDATE_STAT64(tx_stat_gt1023,
  501. tx_stat_etherstatspkts512octetsto1023octets);
  502. UPDATE_STAT64(tx_stat_gt1518,
  503. tx_stat_etherstatspkts1024octetsto1522octets);
  504. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  505. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  506. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  507. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  508. UPDATE_STAT64(tx_stat_gterr,
  509. tx_stat_dot3statsinternalmactransmiterrors);
  510. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  511. } else {
  512. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  513. /* the macros below will use "bmac2_stats" type */
  514. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  515. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  516. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  517. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  518. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  519. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  520. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  521. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  522. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  523. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  524. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  525. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  526. UPDATE_STAT64(tx_stat_gt127,
  527. tx_stat_etherstatspkts65octetsto127octets);
  528. UPDATE_STAT64(tx_stat_gt255,
  529. tx_stat_etherstatspkts128octetsto255octets);
  530. UPDATE_STAT64(tx_stat_gt511,
  531. tx_stat_etherstatspkts256octetsto511octets);
  532. UPDATE_STAT64(tx_stat_gt1023,
  533. tx_stat_etherstatspkts512octetsto1023octets);
  534. UPDATE_STAT64(tx_stat_gt1518,
  535. tx_stat_etherstatspkts1024octetsto1522octets);
  536. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  537. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  538. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  539. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  540. UPDATE_STAT64(tx_stat_gterr,
  541. tx_stat_dot3statsinternalmactransmiterrors);
  542. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  543. /* collect PFC stats */
  544. pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
  545. pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
  546. pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
  547. pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
  548. }
  549. estats->pause_frames_received_hi =
  550. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  551. estats->pause_frames_received_lo =
  552. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  553. estats->pause_frames_sent_hi =
  554. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  555. estats->pause_frames_sent_lo =
  556. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  557. estats->pfc_frames_received_hi =
  558. pstats->pfc_frames_rx_hi;
  559. estats->pfc_frames_received_lo =
  560. pstats->pfc_frames_rx_lo;
  561. estats->pfc_frames_sent_hi =
  562. pstats->pfc_frames_tx_hi;
  563. estats->pfc_frames_sent_lo =
  564. pstats->pfc_frames_tx_lo;
  565. }
  566. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  567. {
  568. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  569. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  570. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  571. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  572. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  573. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  574. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  575. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  576. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  577. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  578. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  579. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  580. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  581. /* collect pfc stats */
  582. ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
  583. pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
  584. ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
  585. pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
  586. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  587. ADD_STAT64(stats_tx.tx_gt127,
  588. tx_stat_etherstatspkts65octetsto127octets);
  589. ADD_STAT64(stats_tx.tx_gt255,
  590. tx_stat_etherstatspkts128octetsto255octets);
  591. ADD_STAT64(stats_tx.tx_gt511,
  592. tx_stat_etherstatspkts256octetsto511octets);
  593. ADD_STAT64(stats_tx.tx_gt1023,
  594. tx_stat_etherstatspkts512octetsto1023octets);
  595. ADD_STAT64(stats_tx.tx_gt1518,
  596. tx_stat_etherstatspkts1024octetsto1522octets);
  597. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  598. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  599. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  600. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  601. ADD_STAT64(stats_tx.tx_gterr,
  602. tx_stat_dot3statsinternalmactransmiterrors);
  603. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  604. estats->etherstatspkts1024octetsto1522octets_hi =
  605. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
  606. estats->etherstatspkts1024octetsto1522octets_lo =
  607. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
  608. estats->etherstatspktsover1522octets_hi =
  609. pstats->mac_stx[1].tx_stat_mac_2047_hi;
  610. estats->etherstatspktsover1522octets_lo =
  611. pstats->mac_stx[1].tx_stat_mac_2047_lo;
  612. ADD_64(estats->etherstatspktsover1522octets_hi,
  613. pstats->mac_stx[1].tx_stat_mac_4095_hi,
  614. estats->etherstatspktsover1522octets_lo,
  615. pstats->mac_stx[1].tx_stat_mac_4095_lo);
  616. ADD_64(estats->etherstatspktsover1522octets_hi,
  617. pstats->mac_stx[1].tx_stat_mac_9216_hi,
  618. estats->etherstatspktsover1522octets_lo,
  619. pstats->mac_stx[1].tx_stat_mac_9216_lo);
  620. ADD_64(estats->etherstatspktsover1522octets_hi,
  621. pstats->mac_stx[1].tx_stat_mac_16383_hi,
  622. estats->etherstatspktsover1522octets_lo,
  623. pstats->mac_stx[1].tx_stat_mac_16383_lo);
  624. estats->pause_frames_received_hi =
  625. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  626. estats->pause_frames_received_lo =
  627. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  628. estats->pause_frames_sent_hi =
  629. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  630. estats->pause_frames_sent_lo =
  631. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  632. estats->pfc_frames_received_hi =
  633. pstats->pfc_frames_rx_hi;
  634. estats->pfc_frames_received_lo =
  635. pstats->pfc_frames_rx_lo;
  636. estats->pfc_frames_sent_hi =
  637. pstats->pfc_frames_tx_hi;
  638. estats->pfc_frames_sent_lo =
  639. pstats->pfc_frames_tx_lo;
  640. }
  641. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  642. {
  643. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  644. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  645. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  646. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  647. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  648. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  649. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  650. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  651. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  652. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  653. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  654. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  655. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  656. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  657. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  658. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  659. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  660. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  661. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  662. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  663. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  664. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  665. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  666. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  667. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  668. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  669. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  670. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  671. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  672. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  673. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  674. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  675. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  676. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  677. estats->pause_frames_received_hi =
  678. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  679. estats->pause_frames_received_lo =
  680. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  681. ADD_64(estats->pause_frames_received_hi,
  682. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  683. estats->pause_frames_received_lo,
  684. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  685. estats->pause_frames_sent_hi =
  686. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  687. estats->pause_frames_sent_lo =
  688. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  689. ADD_64(estats->pause_frames_sent_hi,
  690. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  691. estats->pause_frames_sent_lo,
  692. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  693. }
  694. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  695. {
  696. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  697. struct nig_stats *old = &(bp->port.old_nig_stats);
  698. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  699. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  700. struct {
  701. u32 lo;
  702. u32 hi;
  703. } diff;
  704. switch (bp->link_vars.mac_type) {
  705. case MAC_TYPE_BMAC:
  706. bnx2x_bmac_stats_update(bp);
  707. break;
  708. case MAC_TYPE_EMAC:
  709. bnx2x_emac_stats_update(bp);
  710. break;
  711. case MAC_TYPE_UMAC:
  712. case MAC_TYPE_XMAC:
  713. bnx2x_mstat_stats_update(bp);
  714. break;
  715. case MAC_TYPE_NONE: /* unreached */
  716. DP(BNX2X_MSG_STATS,
  717. "stats updated by DMAE but no MAC active\n");
  718. return -1;
  719. default: /* unreached */
  720. BNX2X_ERR("Unknown MAC type\n");
  721. }
  722. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  723. new->brb_discard - old->brb_discard);
  724. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  725. new->brb_truncate - old->brb_truncate);
  726. if (!CHIP_IS_E3(bp)) {
  727. UPDATE_STAT64_NIG(egress_mac_pkt0,
  728. etherstatspkts1024octetsto1522octets);
  729. UPDATE_STAT64_NIG(egress_mac_pkt1,
  730. etherstatspktsover1522octets);
  731. }
  732. memcpy(old, new, sizeof(struct nig_stats));
  733. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  734. sizeof(struct mac_stx));
  735. estats->brb_drop_hi = pstats->brb_drop_hi;
  736. estats->brb_drop_lo = pstats->brb_drop_lo;
  737. pstats->host_port_stats_counter++;
  738. if (CHIP_IS_E3(bp)) {
  739. u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
  740. : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
  741. estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
  742. }
  743. if (!BP_NOMCP(bp)) {
  744. u32 nig_timer_max =
  745. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  746. if (nig_timer_max != estats->nig_timer_max) {
  747. estats->nig_timer_max = nig_timer_max;
  748. BNX2X_ERR("NIG timer max (%u)\n",
  749. estats->nig_timer_max);
  750. }
  751. }
  752. return 0;
  753. }
  754. static int bnx2x_storm_stats_validate_counters(struct bnx2x *bp)
  755. {
  756. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  757. u16 cur_stats_counter;
  758. /* Make sure we use the value of the counter
  759. * used for sending the last stats ramrod.
  760. */
  761. cur_stats_counter = bp->stats_counter - 1;
  762. /* are storm stats valid? */
  763. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  764. DP(BNX2X_MSG_STATS,
  765. "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n",
  766. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  767. return -EAGAIN;
  768. }
  769. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  770. DP(BNX2X_MSG_STATS,
  771. "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n",
  772. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  773. return -EAGAIN;
  774. }
  775. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  776. DP(BNX2X_MSG_STATS,
  777. "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n",
  778. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  779. return -EAGAIN;
  780. }
  781. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  782. DP(BNX2X_MSG_STATS,
  783. "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n",
  784. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  785. return -EAGAIN;
  786. }
  787. return 0;
  788. }
  789. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  790. {
  791. struct tstorm_per_port_stats *tport =
  792. &bp->fw_stats_data->port.tstorm_port_statistics;
  793. struct tstorm_per_pf_stats *tfunc =
  794. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  795. struct host_func_stats *fstats = &bp->func_stats;
  796. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  797. struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
  798. int i;
  799. /* vfs stat counter is managed by pf */
  800. if (IS_PF(bp) && bnx2x_storm_stats_validate_counters(bp))
  801. return -EAGAIN;
  802. estats->error_bytes_received_hi = 0;
  803. estats->error_bytes_received_lo = 0;
  804. for_each_eth_queue(bp, i) {
  805. struct bnx2x_fastpath *fp = &bp->fp[i];
  806. struct tstorm_per_queue_stats *tclient =
  807. &bp->fw_stats_data->queue_stats[i].
  808. tstorm_queue_statistics;
  809. struct tstorm_per_queue_stats *old_tclient =
  810. &bnx2x_fp_stats(bp, fp)->old_tclient;
  811. struct ustorm_per_queue_stats *uclient =
  812. &bp->fw_stats_data->queue_stats[i].
  813. ustorm_queue_statistics;
  814. struct ustorm_per_queue_stats *old_uclient =
  815. &bnx2x_fp_stats(bp, fp)->old_uclient;
  816. struct xstorm_per_queue_stats *xclient =
  817. &bp->fw_stats_data->queue_stats[i].
  818. xstorm_queue_statistics;
  819. struct xstorm_per_queue_stats *old_xclient =
  820. &bnx2x_fp_stats(bp, fp)->old_xclient;
  821. struct bnx2x_eth_q_stats *qstats =
  822. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  823. struct bnx2x_eth_q_stats_old *qstats_old =
  824. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  825. u32 diff;
  826. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
  827. i, xclient->ucast_pkts_sent,
  828. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  829. DP(BNX2X_MSG_STATS, "---------------\n");
  830. UPDATE_QSTAT(tclient->rcv_bcast_bytes,
  831. total_broadcast_bytes_received);
  832. UPDATE_QSTAT(tclient->rcv_mcast_bytes,
  833. total_multicast_bytes_received);
  834. UPDATE_QSTAT(tclient->rcv_ucast_bytes,
  835. total_unicast_bytes_received);
  836. /*
  837. * sum to total_bytes_received all
  838. * unicast/multicast/broadcast
  839. */
  840. qstats->total_bytes_received_hi =
  841. qstats->total_broadcast_bytes_received_hi;
  842. qstats->total_bytes_received_lo =
  843. qstats->total_broadcast_bytes_received_lo;
  844. ADD_64(qstats->total_bytes_received_hi,
  845. qstats->total_multicast_bytes_received_hi,
  846. qstats->total_bytes_received_lo,
  847. qstats->total_multicast_bytes_received_lo);
  848. ADD_64(qstats->total_bytes_received_hi,
  849. qstats->total_unicast_bytes_received_hi,
  850. qstats->total_bytes_received_lo,
  851. qstats->total_unicast_bytes_received_lo);
  852. qstats->valid_bytes_received_hi =
  853. qstats->total_bytes_received_hi;
  854. qstats->valid_bytes_received_lo =
  855. qstats->total_bytes_received_lo;
  856. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  857. total_unicast_packets_received);
  858. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  859. total_multicast_packets_received);
  860. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  861. total_broadcast_packets_received);
  862. UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
  863. etherstatsoverrsizepkts, 32);
  864. UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16);
  865. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  866. total_unicast_packets_received);
  867. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  868. total_multicast_packets_received);
  869. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  870. total_broadcast_packets_received);
  871. UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
  872. UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
  873. UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
  874. UPDATE_QSTAT(xclient->bcast_bytes_sent,
  875. total_broadcast_bytes_transmitted);
  876. UPDATE_QSTAT(xclient->mcast_bytes_sent,
  877. total_multicast_bytes_transmitted);
  878. UPDATE_QSTAT(xclient->ucast_bytes_sent,
  879. total_unicast_bytes_transmitted);
  880. /*
  881. * sum to total_bytes_transmitted all
  882. * unicast/multicast/broadcast
  883. */
  884. qstats->total_bytes_transmitted_hi =
  885. qstats->total_unicast_bytes_transmitted_hi;
  886. qstats->total_bytes_transmitted_lo =
  887. qstats->total_unicast_bytes_transmitted_lo;
  888. ADD_64(qstats->total_bytes_transmitted_hi,
  889. qstats->total_broadcast_bytes_transmitted_hi,
  890. qstats->total_bytes_transmitted_lo,
  891. qstats->total_broadcast_bytes_transmitted_lo);
  892. ADD_64(qstats->total_bytes_transmitted_hi,
  893. qstats->total_multicast_bytes_transmitted_hi,
  894. qstats->total_bytes_transmitted_lo,
  895. qstats->total_multicast_bytes_transmitted_lo);
  896. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  897. total_unicast_packets_transmitted);
  898. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  899. total_multicast_packets_transmitted);
  900. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  901. total_broadcast_packets_transmitted);
  902. UPDATE_EXTEND_TSTAT(checksum_discard,
  903. total_packets_received_checksum_discarded);
  904. UPDATE_EXTEND_TSTAT(ttl0_discard,
  905. total_packets_received_ttl0_discarded);
  906. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  907. total_transmitted_dropped_packets_error);
  908. /* TPA aggregations completed */
  909. UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
  910. /* Number of network frames aggregated by TPA */
  911. UPDATE_EXTEND_E_USTAT(coalesced_pkts,
  912. total_tpa_aggregated_frames);
  913. /* Total number of bytes in completed TPA aggregations */
  914. UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
  915. UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
  916. UPDATE_FSTAT_QSTAT(total_bytes_received);
  917. UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
  918. UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
  919. UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
  920. UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
  921. UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
  922. UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
  923. UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
  924. UPDATE_FSTAT_QSTAT(valid_bytes_received);
  925. }
  926. ADD_64(estats->total_bytes_received_hi,
  927. estats->rx_stat_ifhcinbadoctets_hi,
  928. estats->total_bytes_received_lo,
  929. estats->rx_stat_ifhcinbadoctets_lo);
  930. ADD_64_LE(estats->total_bytes_received_hi,
  931. tfunc->rcv_error_bytes.hi,
  932. estats->total_bytes_received_lo,
  933. tfunc->rcv_error_bytes.lo);
  934. ADD_64_LE(estats->error_bytes_received_hi,
  935. tfunc->rcv_error_bytes.hi,
  936. estats->error_bytes_received_lo,
  937. tfunc->rcv_error_bytes.lo);
  938. UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
  939. ADD_64(estats->error_bytes_received_hi,
  940. estats->rx_stat_ifhcinbadoctets_hi,
  941. estats->error_bytes_received_lo,
  942. estats->rx_stat_ifhcinbadoctets_lo);
  943. if (bp->port.pmf) {
  944. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  945. UPDATE_FW_STAT(mac_filter_discard);
  946. UPDATE_FW_STAT(mf_tag_discard);
  947. UPDATE_FW_STAT(brb_truncate_discard);
  948. UPDATE_FW_STAT(mac_discard);
  949. }
  950. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  951. bp->stats_pending = 0;
  952. return 0;
  953. }
  954. static void bnx2x_net_stats_update(struct bnx2x *bp)
  955. {
  956. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  957. struct net_device_stats *nstats = &bp->dev->stats;
  958. unsigned long tmp;
  959. int i;
  960. nstats->rx_packets =
  961. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  962. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  963. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  964. nstats->tx_packets =
  965. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  966. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  967. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  968. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  969. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  970. tmp = estats->mac_discard;
  971. for_each_rx_queue(bp, i) {
  972. struct tstorm_per_queue_stats *old_tclient =
  973. &bp->fp_stats[i].old_tclient;
  974. tmp += le32_to_cpu(old_tclient->checksum_discard);
  975. }
  976. nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
  977. nstats->tx_dropped = 0;
  978. nstats->multicast =
  979. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  980. nstats->collisions =
  981. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  982. nstats->rx_length_errors =
  983. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  984. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  985. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  986. bnx2x_hilo(&estats->brb_truncate_hi);
  987. nstats->rx_crc_errors =
  988. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  989. nstats->rx_frame_errors =
  990. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  991. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  992. nstats->rx_missed_errors = 0;
  993. nstats->rx_errors = nstats->rx_length_errors +
  994. nstats->rx_over_errors +
  995. nstats->rx_crc_errors +
  996. nstats->rx_frame_errors +
  997. nstats->rx_fifo_errors +
  998. nstats->rx_missed_errors;
  999. nstats->tx_aborted_errors =
  1000. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  1001. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  1002. nstats->tx_carrier_errors =
  1003. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  1004. nstats->tx_fifo_errors = 0;
  1005. nstats->tx_heartbeat_errors = 0;
  1006. nstats->tx_window_errors = 0;
  1007. nstats->tx_errors = nstats->tx_aborted_errors +
  1008. nstats->tx_carrier_errors +
  1009. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  1010. }
  1011. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  1012. {
  1013. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1014. int i;
  1015. for_each_queue(bp, i) {
  1016. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1017. struct bnx2x_eth_q_stats_old *qstats_old =
  1018. &bp->fp_stats[i].eth_q_stats_old;
  1019. UPDATE_ESTAT_QSTAT(driver_xoff);
  1020. UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
  1021. UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
  1022. UPDATE_ESTAT_QSTAT(hw_csum_err);
  1023. UPDATE_ESTAT_QSTAT(driver_filtered_tx_pkt);
  1024. }
  1025. }
  1026. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  1027. {
  1028. u32 val;
  1029. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  1030. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  1031. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  1032. return true;
  1033. }
  1034. return false;
  1035. }
  1036. static void bnx2x_stats_update(struct bnx2x *bp)
  1037. {
  1038. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1039. if (bnx2x_edebug_stats_stopped(bp))
  1040. return;
  1041. if (IS_PF(bp)) {
  1042. if (*stats_comp != DMAE_COMP_VAL)
  1043. return;
  1044. if (bp->port.pmf)
  1045. bnx2x_hw_stats_update(bp);
  1046. if (bnx2x_storm_stats_update(bp)) {
  1047. if (bp->stats_pending++ == 3) {
  1048. BNX2X_ERR("storm stats were not updated for 3 times\n");
  1049. bnx2x_panic();
  1050. }
  1051. return;
  1052. }
  1053. } else {
  1054. /* vf doesn't collect HW statistics, and doesn't get completions
  1055. * perform only update
  1056. */
  1057. bnx2x_storm_stats_update(bp);
  1058. }
  1059. bnx2x_net_stats_update(bp);
  1060. bnx2x_drv_stats_update(bp);
  1061. /* vf is done */
  1062. if (IS_VF(bp))
  1063. return;
  1064. if (netif_msg_timer(bp)) {
  1065. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1066. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  1067. estats->brb_drop_lo, estats->brb_truncate_lo);
  1068. }
  1069. bnx2x_hw_stats_post(bp);
  1070. bnx2x_storm_stats_post(bp);
  1071. }
  1072. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  1073. {
  1074. struct dmae_command *dmae;
  1075. u32 opcode;
  1076. int loader_idx = PMF_DMAE_C(bp);
  1077. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1078. bp->executer_idx = 0;
  1079. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1080. if (bp->port.port_stx) {
  1081. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1082. if (bp->func_stx)
  1083. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1084. opcode, DMAE_COMP_GRC);
  1085. else
  1086. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1087. opcode, DMAE_COMP_PCI);
  1088. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1089. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1090. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1091. dmae->dst_addr_hi = 0;
  1092. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1093. if (bp->func_stx) {
  1094. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1095. dmae->comp_addr_hi = 0;
  1096. dmae->comp_val = 1;
  1097. } else {
  1098. dmae->comp_addr_lo =
  1099. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1100. dmae->comp_addr_hi =
  1101. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1102. dmae->comp_val = DMAE_COMP_VAL;
  1103. *stats_comp = 0;
  1104. }
  1105. }
  1106. if (bp->func_stx) {
  1107. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1108. dmae->opcode =
  1109. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1110. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1111. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1112. dmae->dst_addr_lo = bp->func_stx >> 2;
  1113. dmae->dst_addr_hi = 0;
  1114. dmae->len = sizeof(struct host_func_stats) >> 2;
  1115. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1116. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1117. dmae->comp_val = DMAE_COMP_VAL;
  1118. *stats_comp = 0;
  1119. }
  1120. }
  1121. static void bnx2x_stats_stop(struct bnx2x *bp)
  1122. {
  1123. bool update = false;
  1124. bnx2x_stats_comp(bp);
  1125. if (bp->port.pmf)
  1126. update = (bnx2x_hw_stats_update(bp) == 0);
  1127. update |= (bnx2x_storm_stats_update(bp) == 0);
  1128. if (update) {
  1129. bnx2x_net_stats_update(bp);
  1130. if (bp->port.pmf)
  1131. bnx2x_port_stats_stop(bp);
  1132. bnx2x_hw_stats_post(bp);
  1133. bnx2x_stats_comp(bp);
  1134. }
  1135. }
  1136. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1137. {
  1138. }
  1139. static const struct {
  1140. void (*action)(struct bnx2x *bp);
  1141. enum bnx2x_stats_state next_state;
  1142. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1143. /* state event */
  1144. {
  1145. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1146. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1147. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1148. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1149. },
  1150. {
  1151. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1152. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1153. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1154. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1155. }
  1156. };
  1157. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1158. {
  1159. enum bnx2x_stats_state state = bp->stats_state;
  1160. if (unlikely(bp->panic))
  1161. return;
  1162. /* Statistics update run from timer context, and we don't want to stop
  1163. * that context in case someone is in the middle of a transition.
  1164. * For other events, wait a bit until lock is taken.
  1165. */
  1166. if (down_trylock(&bp->stats_lock)) {
  1167. if (event == STATS_EVENT_UPDATE)
  1168. return;
  1169. DP(BNX2X_MSG_STATS,
  1170. "Unlikely stats' lock contention [event %d]\n", event);
  1171. if (unlikely(down_timeout(&bp->stats_lock, HZ / 10))) {
  1172. BNX2X_ERR("Failed to take stats lock [event %d]\n",
  1173. event);
  1174. return;
  1175. }
  1176. }
  1177. bnx2x_stats_stm[state][event].action(bp);
  1178. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1179. up(&bp->stats_lock);
  1180. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1181. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1182. state, event, bp->stats_state);
  1183. }
  1184. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1185. {
  1186. struct dmae_command *dmae;
  1187. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1188. /* sanity */
  1189. if (!bp->port.pmf || !bp->port.port_stx) {
  1190. BNX2X_ERR("BUG!\n");
  1191. return;
  1192. }
  1193. bp->executer_idx = 0;
  1194. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1195. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1196. true, DMAE_COMP_PCI);
  1197. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1198. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1199. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1200. dmae->dst_addr_hi = 0;
  1201. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1202. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1203. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1204. dmae->comp_val = DMAE_COMP_VAL;
  1205. *stats_comp = 0;
  1206. bnx2x_hw_stats_post(bp);
  1207. bnx2x_stats_comp(bp);
  1208. }
  1209. /* This function will prepare the statistics ramrod data the way
  1210. * we will only have to increment the statistics counter and
  1211. * send the ramrod each time we have to.
  1212. */
  1213. static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1214. {
  1215. int i;
  1216. int first_queue_query_index;
  1217. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1218. dma_addr_t cur_data_offset;
  1219. struct stats_query_entry *cur_query_entry;
  1220. stats_hdr->cmd_num = bp->fw_stats_num;
  1221. stats_hdr->drv_stats_counter = 0;
  1222. /* storm_counters struct contains the counters of completed
  1223. * statistics requests per storm which are incremented by FW
  1224. * each time it completes hadning a statistics ramrod. We will
  1225. * check these counters in the timer handler and discard a
  1226. * (statistics) ramrod completion.
  1227. */
  1228. cur_data_offset = bp->fw_stats_data_mapping +
  1229. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1230. stats_hdr->stats_counters_addrs.hi =
  1231. cpu_to_le32(U64_HI(cur_data_offset));
  1232. stats_hdr->stats_counters_addrs.lo =
  1233. cpu_to_le32(U64_LO(cur_data_offset));
  1234. /* prepare to the first stats ramrod (will be completed with
  1235. * the counters equal to zero) - init counters to somethig different.
  1236. */
  1237. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1238. sizeof(struct stats_counter));
  1239. /**** Port FW statistics data ****/
  1240. cur_data_offset = bp->fw_stats_data_mapping +
  1241. offsetof(struct bnx2x_fw_stats_data, port);
  1242. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1243. cur_query_entry->kind = STATS_TYPE_PORT;
  1244. /* For port query index is a DONT CARE */
  1245. cur_query_entry->index = BP_PORT(bp);
  1246. /* For port query funcID is a DONT CARE */
  1247. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1248. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1249. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1250. /**** PF FW statistics data ****/
  1251. cur_data_offset = bp->fw_stats_data_mapping +
  1252. offsetof(struct bnx2x_fw_stats_data, pf);
  1253. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1254. cur_query_entry->kind = STATS_TYPE_PF;
  1255. /* For PF query index is a DONT CARE */
  1256. cur_query_entry->index = BP_PORT(bp);
  1257. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1258. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1259. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1260. /**** FCoE FW statistics data ****/
  1261. if (!NO_FCOE(bp)) {
  1262. cur_data_offset = bp->fw_stats_data_mapping +
  1263. offsetof(struct bnx2x_fw_stats_data, fcoe);
  1264. cur_query_entry =
  1265. &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
  1266. cur_query_entry->kind = STATS_TYPE_FCOE;
  1267. /* For FCoE query index is a DONT CARE */
  1268. cur_query_entry->index = BP_PORT(bp);
  1269. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1270. cur_query_entry->address.hi =
  1271. cpu_to_le32(U64_HI(cur_data_offset));
  1272. cur_query_entry->address.lo =
  1273. cpu_to_le32(U64_LO(cur_data_offset));
  1274. }
  1275. /**** Clients' queries ****/
  1276. cur_data_offset = bp->fw_stats_data_mapping +
  1277. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1278. /* first queue query index depends whether FCoE offloaded request will
  1279. * be included in the ramrod
  1280. */
  1281. if (!NO_FCOE(bp))
  1282. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
  1283. else
  1284. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
  1285. for_each_eth_queue(bp, i) {
  1286. cur_query_entry =
  1287. &bp->fw_stats_req->
  1288. query[first_queue_query_index + i];
  1289. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1290. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1291. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1292. cur_query_entry->address.hi =
  1293. cpu_to_le32(U64_HI(cur_data_offset));
  1294. cur_query_entry->address.lo =
  1295. cpu_to_le32(U64_LO(cur_data_offset));
  1296. cur_data_offset += sizeof(struct per_queue_stats);
  1297. }
  1298. /* add FCoE queue query if needed */
  1299. if (!NO_FCOE(bp)) {
  1300. cur_query_entry =
  1301. &bp->fw_stats_req->
  1302. query[first_queue_query_index + i];
  1303. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1304. cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
  1305. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1306. cur_query_entry->address.hi =
  1307. cpu_to_le32(U64_HI(cur_data_offset));
  1308. cur_query_entry->address.lo =
  1309. cpu_to_le32(U64_LO(cur_data_offset));
  1310. }
  1311. }
  1312. void bnx2x_memset_stats(struct bnx2x *bp)
  1313. {
  1314. int i;
  1315. /* function stats */
  1316. for_each_queue(bp, i) {
  1317. struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
  1318. memset(&fp_stats->old_tclient, 0,
  1319. sizeof(fp_stats->old_tclient));
  1320. memset(&fp_stats->old_uclient, 0,
  1321. sizeof(fp_stats->old_uclient));
  1322. memset(&fp_stats->old_xclient, 0,
  1323. sizeof(fp_stats->old_xclient));
  1324. if (bp->stats_init) {
  1325. memset(&fp_stats->eth_q_stats, 0,
  1326. sizeof(fp_stats->eth_q_stats));
  1327. memset(&fp_stats->eth_q_stats_old, 0,
  1328. sizeof(fp_stats->eth_q_stats_old));
  1329. }
  1330. }
  1331. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1332. if (bp->stats_init) {
  1333. memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
  1334. memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
  1335. memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
  1336. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1337. memset(&bp->func_stats, 0, sizeof(bp->func_stats));
  1338. }
  1339. bp->stats_state = STATS_STATE_DISABLED;
  1340. if (bp->port.pmf && bp->port.port_stx)
  1341. bnx2x_port_stats_base_init(bp);
  1342. /* mark the end of statistics initialization */
  1343. bp->stats_init = false;
  1344. }
  1345. void bnx2x_stats_init(struct bnx2x *bp)
  1346. {
  1347. int /*abs*/port = BP_PORT(bp);
  1348. int mb_idx = BP_FW_MB_IDX(bp);
  1349. if (IS_VF(bp)) {
  1350. bnx2x_memset_stats(bp);
  1351. return;
  1352. }
  1353. bp->stats_pending = 0;
  1354. bp->executer_idx = 0;
  1355. bp->stats_counter = 0;
  1356. /* port and func stats for management */
  1357. if (!BP_NOMCP(bp)) {
  1358. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1359. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1360. } else {
  1361. bp->port.port_stx = 0;
  1362. bp->func_stx = 0;
  1363. }
  1364. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1365. bp->port.port_stx, bp->func_stx);
  1366. /* pmf should retrieve port statistics from SP on a non-init*/
  1367. if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
  1368. bnx2x_stats_handle(bp, STATS_EVENT_PMF);
  1369. port = BP_PORT(bp);
  1370. /* port stats */
  1371. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1372. bp->port.old_nig_stats.brb_discard =
  1373. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1374. bp->port.old_nig_stats.brb_truncate =
  1375. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1376. if (!CHIP_IS_E3(bp)) {
  1377. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1378. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1379. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1380. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1381. }
  1382. /* Prepare statistics ramrod data */
  1383. bnx2x_prep_fw_stats_req(bp);
  1384. /* Clean SP from previous statistics */
  1385. if (bp->stats_init) {
  1386. if (bp->func_stx) {
  1387. memset(bnx2x_sp(bp, func_stats), 0,
  1388. sizeof(struct host_func_stats));
  1389. bnx2x_func_stats_init(bp);
  1390. bnx2x_hw_stats_post(bp);
  1391. bnx2x_stats_comp(bp);
  1392. }
  1393. }
  1394. bnx2x_memset_stats(bp);
  1395. }
  1396. void bnx2x_save_statistics(struct bnx2x *bp)
  1397. {
  1398. int i;
  1399. struct net_device_stats *nstats = &bp->dev->stats;
  1400. /* save queue statistics */
  1401. for_each_eth_queue(bp, i) {
  1402. struct bnx2x_fastpath *fp = &bp->fp[i];
  1403. struct bnx2x_eth_q_stats *qstats =
  1404. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  1405. struct bnx2x_eth_q_stats_old *qstats_old =
  1406. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  1407. UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
  1408. UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
  1409. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
  1410. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
  1411. UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
  1412. UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
  1413. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
  1414. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
  1415. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
  1416. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
  1417. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
  1418. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
  1419. UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
  1420. UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
  1421. }
  1422. /* save net_device_stats statistics */
  1423. bp->net_stats_old.rx_dropped = nstats->rx_dropped;
  1424. /* store port firmware statistics */
  1425. if (bp->port.pmf && IS_MF(bp)) {
  1426. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1427. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  1428. UPDATE_FW_STAT_OLD(mac_filter_discard);
  1429. UPDATE_FW_STAT_OLD(mf_tag_discard);
  1430. UPDATE_FW_STAT_OLD(brb_truncate_discard);
  1431. UPDATE_FW_STAT_OLD(mac_discard);
  1432. }
  1433. }
  1434. void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
  1435. u32 stats_type)
  1436. {
  1437. int i;
  1438. struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
  1439. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1440. struct per_queue_stats *fcoe_q_stats =
  1441. &bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
  1442. struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
  1443. &fcoe_q_stats->tstorm_queue_statistics;
  1444. struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
  1445. &fcoe_q_stats->ustorm_queue_statistics;
  1446. struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
  1447. &fcoe_q_stats->xstorm_queue_statistics;
  1448. struct fcoe_statistics_params *fw_fcoe_stat =
  1449. &bp->fw_stats_data->fcoe;
  1450. memset(afex_stats, 0, sizeof(struct afex_stats));
  1451. for_each_eth_queue(bp, i) {
  1452. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1453. ADD_64(afex_stats->rx_unicast_bytes_hi,
  1454. qstats->total_unicast_bytes_received_hi,
  1455. afex_stats->rx_unicast_bytes_lo,
  1456. qstats->total_unicast_bytes_received_lo);
  1457. ADD_64(afex_stats->rx_broadcast_bytes_hi,
  1458. qstats->total_broadcast_bytes_received_hi,
  1459. afex_stats->rx_broadcast_bytes_lo,
  1460. qstats->total_broadcast_bytes_received_lo);
  1461. ADD_64(afex_stats->rx_multicast_bytes_hi,
  1462. qstats->total_multicast_bytes_received_hi,
  1463. afex_stats->rx_multicast_bytes_lo,
  1464. qstats->total_multicast_bytes_received_lo);
  1465. ADD_64(afex_stats->rx_unicast_frames_hi,
  1466. qstats->total_unicast_packets_received_hi,
  1467. afex_stats->rx_unicast_frames_lo,
  1468. qstats->total_unicast_packets_received_lo);
  1469. ADD_64(afex_stats->rx_broadcast_frames_hi,
  1470. qstats->total_broadcast_packets_received_hi,
  1471. afex_stats->rx_broadcast_frames_lo,
  1472. qstats->total_broadcast_packets_received_lo);
  1473. ADD_64(afex_stats->rx_multicast_frames_hi,
  1474. qstats->total_multicast_packets_received_hi,
  1475. afex_stats->rx_multicast_frames_lo,
  1476. qstats->total_multicast_packets_received_lo);
  1477. /* sum to rx_frames_discarded all discraded
  1478. * packets due to size, ttl0 and checksum
  1479. */
  1480. ADD_64(afex_stats->rx_frames_discarded_hi,
  1481. qstats->total_packets_received_checksum_discarded_hi,
  1482. afex_stats->rx_frames_discarded_lo,
  1483. qstats->total_packets_received_checksum_discarded_lo);
  1484. ADD_64(afex_stats->rx_frames_discarded_hi,
  1485. qstats->total_packets_received_ttl0_discarded_hi,
  1486. afex_stats->rx_frames_discarded_lo,
  1487. qstats->total_packets_received_ttl0_discarded_lo);
  1488. ADD_64(afex_stats->rx_frames_discarded_hi,
  1489. qstats->etherstatsoverrsizepkts_hi,
  1490. afex_stats->rx_frames_discarded_lo,
  1491. qstats->etherstatsoverrsizepkts_lo);
  1492. ADD_64(afex_stats->rx_frames_dropped_hi,
  1493. qstats->no_buff_discard_hi,
  1494. afex_stats->rx_frames_dropped_lo,
  1495. qstats->no_buff_discard_lo);
  1496. ADD_64(afex_stats->tx_unicast_bytes_hi,
  1497. qstats->total_unicast_bytes_transmitted_hi,
  1498. afex_stats->tx_unicast_bytes_lo,
  1499. qstats->total_unicast_bytes_transmitted_lo);
  1500. ADD_64(afex_stats->tx_broadcast_bytes_hi,
  1501. qstats->total_broadcast_bytes_transmitted_hi,
  1502. afex_stats->tx_broadcast_bytes_lo,
  1503. qstats->total_broadcast_bytes_transmitted_lo);
  1504. ADD_64(afex_stats->tx_multicast_bytes_hi,
  1505. qstats->total_multicast_bytes_transmitted_hi,
  1506. afex_stats->tx_multicast_bytes_lo,
  1507. qstats->total_multicast_bytes_transmitted_lo);
  1508. ADD_64(afex_stats->tx_unicast_frames_hi,
  1509. qstats->total_unicast_packets_transmitted_hi,
  1510. afex_stats->tx_unicast_frames_lo,
  1511. qstats->total_unicast_packets_transmitted_lo);
  1512. ADD_64(afex_stats->tx_broadcast_frames_hi,
  1513. qstats->total_broadcast_packets_transmitted_hi,
  1514. afex_stats->tx_broadcast_frames_lo,
  1515. qstats->total_broadcast_packets_transmitted_lo);
  1516. ADD_64(afex_stats->tx_multicast_frames_hi,
  1517. qstats->total_multicast_packets_transmitted_hi,
  1518. afex_stats->tx_multicast_frames_lo,
  1519. qstats->total_multicast_packets_transmitted_lo);
  1520. ADD_64(afex_stats->tx_frames_dropped_hi,
  1521. qstats->total_transmitted_dropped_packets_error_hi,
  1522. afex_stats->tx_frames_dropped_lo,
  1523. qstats->total_transmitted_dropped_packets_error_lo);
  1524. }
  1525. /* now add FCoE statistics which are collected separately
  1526. * (both offloaded and non offloaded)
  1527. */
  1528. if (!NO_FCOE(bp)) {
  1529. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1530. LE32_0,
  1531. afex_stats->rx_unicast_bytes_lo,
  1532. fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
  1533. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1534. fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
  1535. afex_stats->rx_unicast_bytes_lo,
  1536. fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
  1537. ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
  1538. fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
  1539. afex_stats->rx_broadcast_bytes_lo,
  1540. fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
  1541. ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
  1542. fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
  1543. afex_stats->rx_multicast_bytes_lo,
  1544. fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
  1545. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1546. LE32_0,
  1547. afex_stats->rx_unicast_frames_lo,
  1548. fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
  1549. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1550. LE32_0,
  1551. afex_stats->rx_unicast_frames_lo,
  1552. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1553. ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
  1554. LE32_0,
  1555. afex_stats->rx_broadcast_frames_lo,
  1556. fcoe_q_tstorm_stats->rcv_bcast_pkts);
  1557. ADD_64_LE(afex_stats->rx_multicast_frames_hi,
  1558. LE32_0,
  1559. afex_stats->rx_multicast_frames_lo,
  1560. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1561. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1562. LE32_0,
  1563. afex_stats->rx_frames_discarded_lo,
  1564. fcoe_q_tstorm_stats->checksum_discard);
  1565. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1566. LE32_0,
  1567. afex_stats->rx_frames_discarded_lo,
  1568. fcoe_q_tstorm_stats->pkts_too_big_discard);
  1569. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1570. LE32_0,
  1571. afex_stats->rx_frames_discarded_lo,
  1572. fcoe_q_tstorm_stats->ttl0_discard);
  1573. ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
  1574. LE16_0,
  1575. afex_stats->rx_frames_dropped_lo,
  1576. fcoe_q_tstorm_stats->no_buff_discard);
  1577. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1578. LE32_0,
  1579. afex_stats->rx_frames_dropped_lo,
  1580. fcoe_q_ustorm_stats->ucast_no_buff_pkts);
  1581. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1582. LE32_0,
  1583. afex_stats->rx_frames_dropped_lo,
  1584. fcoe_q_ustorm_stats->mcast_no_buff_pkts);
  1585. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1586. LE32_0,
  1587. afex_stats->rx_frames_dropped_lo,
  1588. fcoe_q_ustorm_stats->bcast_no_buff_pkts);
  1589. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1590. LE32_0,
  1591. afex_stats->rx_frames_dropped_lo,
  1592. fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
  1593. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1594. LE32_0,
  1595. afex_stats->rx_frames_dropped_lo,
  1596. fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
  1597. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1598. LE32_0,
  1599. afex_stats->tx_unicast_bytes_lo,
  1600. fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
  1601. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1602. fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
  1603. afex_stats->tx_unicast_bytes_lo,
  1604. fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
  1605. ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
  1606. fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
  1607. afex_stats->tx_broadcast_bytes_lo,
  1608. fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
  1609. ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
  1610. fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
  1611. afex_stats->tx_multicast_bytes_lo,
  1612. fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
  1613. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1614. LE32_0,
  1615. afex_stats->tx_unicast_frames_lo,
  1616. fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
  1617. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1618. LE32_0,
  1619. afex_stats->tx_unicast_frames_lo,
  1620. fcoe_q_xstorm_stats->ucast_pkts_sent);
  1621. ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
  1622. LE32_0,
  1623. afex_stats->tx_broadcast_frames_lo,
  1624. fcoe_q_xstorm_stats->bcast_pkts_sent);
  1625. ADD_64_LE(afex_stats->tx_multicast_frames_hi,
  1626. LE32_0,
  1627. afex_stats->tx_multicast_frames_lo,
  1628. fcoe_q_xstorm_stats->mcast_pkts_sent);
  1629. ADD_64_LE(afex_stats->tx_frames_dropped_hi,
  1630. LE32_0,
  1631. afex_stats->tx_frames_dropped_lo,
  1632. fcoe_q_xstorm_stats->error_drop_pkts);
  1633. }
  1634. /* if port stats are requested, add them to the PMF
  1635. * stats, as anyway they will be accumulated by the
  1636. * MCP before sent to the switch
  1637. */
  1638. if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
  1639. ADD_64(afex_stats->rx_frames_dropped_hi,
  1640. 0,
  1641. afex_stats->rx_frames_dropped_lo,
  1642. estats->mac_filter_discard);
  1643. ADD_64(afex_stats->rx_frames_dropped_hi,
  1644. 0,
  1645. afex_stats->rx_frames_dropped_lo,
  1646. estats->brb_truncate_discard);
  1647. ADD_64(afex_stats->rx_frames_discarded_hi,
  1648. 0,
  1649. afex_stats->rx_frames_discarded_lo,
  1650. estats->mac_discard);
  1651. }
  1652. }
  1653. int bnx2x_stats_safe_exec(struct bnx2x *bp,
  1654. void (func_to_exec)(void *cookie),
  1655. void *cookie)
  1656. {
  1657. int cnt = 10, rc = 0;
  1658. /* Wait for statistics to end [while blocking further requests],
  1659. * then run supplied function 'safely'.
  1660. */
  1661. rc = down_timeout(&bp->stats_lock, HZ / 10);
  1662. if (unlikely(rc)) {
  1663. BNX2X_ERR("Failed to take statistics lock for safe execution\n");
  1664. goto out_no_lock;
  1665. }
  1666. bnx2x_stats_comp(bp);
  1667. while (bp->stats_pending && cnt--)
  1668. if (bnx2x_storm_stats_update(bp))
  1669. usleep_range(1000, 2000);
  1670. if (bp->stats_pending) {
  1671. BNX2X_ERR("Failed to wait for stats pending to clear [possibly FW is stuck]\n");
  1672. rc = -EBUSY;
  1673. goto out;
  1674. }
  1675. func_to_exec(cookie);
  1676. out:
  1677. /* No need to restart statistics - if they're enabled, the timer
  1678. * will restart the statistics.
  1679. */
  1680. up(&bp->stats_lock);
  1681. out_no_lock:
  1682. return rc;
  1683. }