peak_pci.c 20 KB

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  1. /*
  2. * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com>
  3. * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
  4. *
  5. * Derived from the PCAN project file driver/src/pcan_pci.c:
  6. *
  7. * Copyright (C) 2001-2006 PEAK System-Technik GmbH
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the version 2 of the GNU General Public License
  11. * as published by the Free Software Foundation
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/delay.h>
  23. #include <linux/pci.h>
  24. #include <linux/io.h>
  25. #include <linux/i2c.h>
  26. #include <linux/i2c-algo-bit.h>
  27. #include <linux/can.h>
  28. #include <linux/can/dev.h>
  29. #include "sja1000.h"
  30. MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
  31. MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
  32. MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards");
  33. MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards");
  34. MODULE_LICENSE("GPL v2");
  35. #define DRV_NAME "peak_pci"
  36. struct peak_pciec_card;
  37. struct peak_pci_chan {
  38. void __iomem *cfg_base; /* Common for all channels */
  39. struct net_device *prev_dev; /* Chain of network devices */
  40. u16 icr_mask; /* Interrupt mask for fast ack */
  41. struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */
  42. };
  43. #define PEAK_PCI_CAN_CLOCK (16000000 / 2)
  44. #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
  45. #define PEAK_PCI_OCR OCR_TX0_PUSHPULL
  46. /*
  47. * Important PITA registers
  48. */
  49. #define PITA_ICR 0x00 /* Interrupt control register */
  50. #define PITA_GPIOICR 0x18 /* GPIO interface control register */
  51. #define PITA_MISC 0x1C /* Miscellaneous register */
  52. #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */
  53. #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */
  54. #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */
  55. #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */
  56. #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */
  57. #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */
  58. #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */
  59. #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */
  60. #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */
  61. #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */
  62. #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */
  63. #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */
  64. #define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */
  65. #define PEAK_PCI_CHAN_MAX 4
  66. static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = {
  67. 0x02, 0x01, 0x40, 0x80
  68. };
  69. static const struct pci_device_id peak_pci_tbl[] = {
  70. {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  71. {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  72. {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  73. {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  74. {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  75. {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  76. {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  77. #ifdef CONFIG_CAN_PEAK_PCIEC
  78. {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  79. {PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  80. #endif
  81. {0,}
  82. };
  83. MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
  84. #ifdef CONFIG_CAN_PEAK_PCIEC
  85. /*
  86. * PCAN-ExpressCard needs I2C bit-banging configuration option.
  87. */
  88. /* GPIOICR byte access offsets */
  89. #define PITA_GPOUT 0x18 /* GPx output value */
  90. #define PITA_GPIN 0x19 /* GPx input value */
  91. #define PITA_GPOEN 0x1A /* configure GPx as ouput pin */
  92. /* I2C GP bits */
  93. #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */
  94. #define PITA_GPIN_SDA 0x04 /* Serial DAta line */
  95. #define PCA9553_1_SLAVEADDR (0xC4 >> 1)
  96. /* PCA9553 LS0 fields values */
  97. enum {
  98. PCA9553_LOW,
  99. PCA9553_HIGHZ,
  100. PCA9553_PWM0,
  101. PCA9553_PWM1
  102. };
  103. /* LEDs control */
  104. #define PCA9553_ON PCA9553_LOW
  105. #define PCA9553_OFF PCA9553_HIGHZ
  106. #define PCA9553_SLOW PCA9553_PWM0
  107. #define PCA9553_FAST PCA9553_PWM1
  108. #define PCA9553_LED(c) (1 << (c))
  109. #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1))
  110. #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c)
  111. #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c)
  112. #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c)
  113. #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c)
  114. #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c)
  115. #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1))
  116. #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */
  117. struct peak_pciec_chan {
  118. struct net_device *netdev;
  119. unsigned long prev_rx_bytes;
  120. unsigned long prev_tx_bytes;
  121. };
  122. struct peak_pciec_card {
  123. void __iomem *cfg_base; /* Common for all channels */
  124. void __iomem *reg_base; /* first channel base address */
  125. u8 led_cache; /* leds state cache */
  126. /* PCIExpressCard i2c data */
  127. struct i2c_algo_bit_data i2c_bit;
  128. struct i2c_adapter led_chip;
  129. struct delayed_work led_work; /* led delayed work */
  130. int chan_count;
  131. struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX];
  132. };
  133. /* "normal" pci register write callback is overloaded for leds control */
  134. static void peak_pci_write_reg(const struct sja1000_priv *priv,
  135. int port, u8 val);
  136. static inline void pita_set_scl_highz(struct peak_pciec_card *card)
  137. {
  138. u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL;
  139. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  140. }
  141. static inline void pita_set_sda_highz(struct peak_pciec_card *card)
  142. {
  143. u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA;
  144. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  145. }
  146. static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card)
  147. {
  148. /* raise SCL & SDA GPIOs to high-Z */
  149. pita_set_scl_highz(card);
  150. pita_set_sda_highz(card);
  151. }
  152. static void pita_setsda(void *data, int state)
  153. {
  154. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  155. u8 gp_out, gp_outen;
  156. /* set output sda always to 0 */
  157. gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA;
  158. writeb(gp_out, card->cfg_base + PITA_GPOUT);
  159. /* control output sda with GPOEN */
  160. gp_outen = readb(card->cfg_base + PITA_GPOEN);
  161. if (state)
  162. gp_outen &= ~PITA_GPIN_SDA;
  163. else
  164. gp_outen |= PITA_GPIN_SDA;
  165. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  166. }
  167. static void pita_setscl(void *data, int state)
  168. {
  169. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  170. u8 gp_out, gp_outen;
  171. /* set output scl always to 0 */
  172. gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL;
  173. writeb(gp_out, card->cfg_base + PITA_GPOUT);
  174. /* control output scl with GPOEN */
  175. gp_outen = readb(card->cfg_base + PITA_GPOEN);
  176. if (state)
  177. gp_outen &= ~PITA_GPIN_SCL;
  178. else
  179. gp_outen |= PITA_GPIN_SCL;
  180. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  181. }
  182. static int pita_getsda(void *data)
  183. {
  184. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  185. /* set tristate */
  186. pita_set_sda_highz(card);
  187. return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0;
  188. }
  189. static int pita_getscl(void *data)
  190. {
  191. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  192. /* set tristate */
  193. pita_set_scl_highz(card);
  194. return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0;
  195. }
  196. /*
  197. * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC
  198. */
  199. static int peak_pciec_write_pca9553(struct peak_pciec_card *card,
  200. u8 offset, u8 data)
  201. {
  202. u8 buffer[2] = {
  203. offset,
  204. data
  205. };
  206. struct i2c_msg msg = {
  207. .addr = PCA9553_1_SLAVEADDR,
  208. .len = 2,
  209. .buf = buffer,
  210. };
  211. int ret;
  212. /* cache led mask */
  213. if ((offset == 5) && (data == card->led_cache))
  214. return 0;
  215. ret = i2c_transfer(&card->led_chip, &msg, 1);
  216. if (ret < 0)
  217. return ret;
  218. if (offset == 5)
  219. card->led_cache = data;
  220. return 0;
  221. }
  222. /*
  223. * delayed work callback used to control the LEDs
  224. */
  225. static void peak_pciec_led_work(struct work_struct *work)
  226. {
  227. struct peak_pciec_card *card =
  228. container_of(work, struct peak_pciec_card, led_work.work);
  229. struct net_device *netdev;
  230. u8 new_led = card->led_cache;
  231. int i, up_count = 0;
  232. /* first check what is to do */
  233. for (i = 0; i < card->chan_count; i++) {
  234. /* default is: not configured */
  235. new_led &= ~PCA9553_LED_MASK(i);
  236. new_led |= PCA9553_LED_ON(i);
  237. netdev = card->channel[i].netdev;
  238. if (!netdev || !(netdev->flags & IFF_UP))
  239. continue;
  240. up_count++;
  241. /* no activity (but configured) */
  242. new_led &= ~PCA9553_LED_MASK(i);
  243. new_led |= PCA9553_LED_SLOW(i);
  244. /* if bytes counters changed, set fast blinking led */
  245. if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) {
  246. card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes;
  247. new_led &= ~PCA9553_LED_MASK(i);
  248. new_led |= PCA9553_LED_FAST(i);
  249. }
  250. if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) {
  251. card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes;
  252. new_led &= ~PCA9553_LED_MASK(i);
  253. new_led |= PCA9553_LED_FAST(i);
  254. }
  255. }
  256. /* check if LS0 settings changed, only update i2c if so */
  257. peak_pciec_write_pca9553(card, 5, new_led);
  258. /* restart timer (except if no more configured channels) */
  259. if (up_count)
  260. schedule_delayed_work(&card->led_work, HZ);
  261. }
  262. /*
  263. * set LEDs blinking state
  264. */
  265. static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)
  266. {
  267. u8 new_led = card->led_cache;
  268. int i;
  269. /* first check what is to do */
  270. for (i = 0; i < card->chan_count; i++)
  271. if (led_mask & PCA9553_LED(i)) {
  272. new_led &= ~PCA9553_LED_MASK(i);
  273. new_led |= PCA9553_LED_STATE(s, i);
  274. }
  275. /* check if LS0 settings changed, only update i2c if so */
  276. peak_pciec_write_pca9553(card, 5, new_led);
  277. }
  278. /*
  279. * start one second delayed work to control LEDs
  280. */
  281. static void peak_pciec_start_led_work(struct peak_pciec_card *card)
  282. {
  283. schedule_delayed_work(&card->led_work, HZ);
  284. }
  285. /*
  286. * stop LEDs delayed work
  287. */
  288. static void peak_pciec_stop_led_work(struct peak_pciec_card *card)
  289. {
  290. cancel_delayed_work_sync(&card->led_work);
  291. }
  292. /*
  293. * initialize the PCA9553 4-bit I2C-bus LED chip
  294. */
  295. static int peak_pciec_init_leds(struct peak_pciec_card *card)
  296. {
  297. int err;
  298. /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */
  299. err = peak_pciec_write_pca9553(card, 1, 44 / 1);
  300. if (err)
  301. return err;
  302. /* duty cycle 0: 50% */
  303. err = peak_pciec_write_pca9553(card, 2, 0x80);
  304. if (err)
  305. return err;
  306. /* prescaler for frequency 1: "FAST" = 5 Hz */
  307. err = peak_pciec_write_pca9553(card, 3, 44 / 5);
  308. if (err)
  309. return err;
  310. /* duty cycle 1: 50% */
  311. err = peak_pciec_write_pca9553(card, 4, 0x80);
  312. if (err)
  313. return err;
  314. /* switch LEDs to initial state */
  315. return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT);
  316. }
  317. /*
  318. * restore LEDs state to off peak_pciec_leds_exit
  319. */
  320. static void peak_pciec_leds_exit(struct peak_pciec_card *card)
  321. {
  322. /* switch LEDs to off */
  323. peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL);
  324. }
  325. /*
  326. * normal write sja1000 register method overloaded to catch when controller
  327. * is started or stopped, to control leds
  328. */
  329. static void peak_pciec_write_reg(const struct sja1000_priv *priv,
  330. int port, u8 val)
  331. {
  332. struct peak_pci_chan *chan = priv->priv;
  333. struct peak_pciec_card *card = chan->pciec_card;
  334. int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE;
  335. /* sja1000 register changes control the leds state */
  336. if (port == SJA1000_MOD)
  337. switch (val) {
  338. case MOD_RM:
  339. /* Reset Mode: set led on */
  340. peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON);
  341. break;
  342. case 0x00:
  343. /* Normal Mode: led slow blinking and start led timer */
  344. peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW);
  345. peak_pciec_start_led_work(card);
  346. break;
  347. default:
  348. break;
  349. }
  350. /* call base function */
  351. peak_pci_write_reg(priv, port, val);
  352. }
  353. static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {
  354. .setsda = pita_setsda,
  355. .setscl = pita_setscl,
  356. .getsda = pita_getsda,
  357. .getscl = pita_getscl,
  358. .udelay = 10,
  359. .timeout = HZ,
  360. };
  361. static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
  362. {
  363. struct sja1000_priv *priv = netdev_priv(dev);
  364. struct peak_pci_chan *chan = priv->priv;
  365. struct peak_pciec_card *card;
  366. int err;
  367. /* copy i2c object address from 1st channel */
  368. if (chan->prev_dev) {
  369. struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev);
  370. struct peak_pci_chan *prev_chan = prev_priv->priv;
  371. card = prev_chan->pciec_card;
  372. if (!card)
  373. return -ENODEV;
  374. /* channel is the first one: do the init part */
  375. } else {
  376. /* create the bit banging I2C adapter structure */
  377. card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL);
  378. if (!card)
  379. return -ENOMEM;
  380. card->cfg_base = chan->cfg_base;
  381. card->reg_base = priv->reg_base;
  382. card->led_chip.owner = THIS_MODULE;
  383. card->led_chip.dev.parent = &pdev->dev;
  384. card->led_chip.algo_data = &card->i2c_bit;
  385. strncpy(card->led_chip.name, "peak_i2c",
  386. sizeof(card->led_chip.name));
  387. card->i2c_bit = peak_pciec_i2c_bit_ops;
  388. card->i2c_bit.udelay = 10;
  389. card->i2c_bit.timeout = HZ;
  390. card->i2c_bit.data = card;
  391. peak_pciec_init_pita_gpio(card);
  392. err = i2c_bit_add_bus(&card->led_chip);
  393. if (err) {
  394. dev_err(&pdev->dev, "i2c init failed\n");
  395. goto pciec_init_err_1;
  396. }
  397. err = peak_pciec_init_leds(card);
  398. if (err) {
  399. dev_err(&pdev->dev, "leds hardware init failed\n");
  400. goto pciec_init_err_2;
  401. }
  402. INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work);
  403. /* PCAN-ExpressCard needs its own callback for leds */
  404. priv->write_reg = peak_pciec_write_reg;
  405. }
  406. chan->pciec_card = card;
  407. card->channel[card->chan_count++].netdev = dev;
  408. return 0;
  409. pciec_init_err_2:
  410. i2c_del_adapter(&card->led_chip);
  411. pciec_init_err_1:
  412. peak_pciec_init_pita_gpio(card);
  413. kfree(card);
  414. return err;
  415. }
  416. static void peak_pciec_remove(struct peak_pciec_card *card)
  417. {
  418. peak_pciec_stop_led_work(card);
  419. peak_pciec_leds_exit(card);
  420. i2c_del_adapter(&card->led_chip);
  421. peak_pciec_init_pita_gpio(card);
  422. kfree(card);
  423. }
  424. #else /* CONFIG_CAN_PEAK_PCIEC */
  425. /*
  426. * Placebo functions when PCAN-ExpressCard support is not selected
  427. */
  428. static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
  429. {
  430. return -ENODEV;
  431. }
  432. static inline void peak_pciec_remove(struct peak_pciec_card *card)
  433. {
  434. }
  435. #endif /* CONFIG_CAN_PEAK_PCIEC */
  436. static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port)
  437. {
  438. return readb(priv->reg_base + (port << 2));
  439. }
  440. static void peak_pci_write_reg(const struct sja1000_priv *priv,
  441. int port, u8 val)
  442. {
  443. writeb(val, priv->reg_base + (port << 2));
  444. }
  445. static void peak_pci_post_irq(const struct sja1000_priv *priv)
  446. {
  447. struct peak_pci_chan *chan = priv->priv;
  448. u16 icr;
  449. /* Select and clear in PITA stored interrupt */
  450. icr = readw(chan->cfg_base + PITA_ICR);
  451. if (icr & chan->icr_mask)
  452. writew(chan->icr_mask, chan->cfg_base + PITA_ICR);
  453. }
  454. static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  455. {
  456. struct sja1000_priv *priv;
  457. struct peak_pci_chan *chan;
  458. struct net_device *dev, *prev_dev;
  459. void __iomem *cfg_base, *reg_base;
  460. u16 sub_sys_id, icr;
  461. int i, err, channels;
  462. err = pci_enable_device(pdev);
  463. if (err)
  464. return err;
  465. err = pci_request_regions(pdev, DRV_NAME);
  466. if (err)
  467. goto failure_disable_pci;
  468. err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
  469. if (err)
  470. goto failure_release_regions;
  471. dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
  472. pdev->vendor, pdev->device, sub_sys_id);
  473. err = pci_write_config_word(pdev, 0x44, 0);
  474. if (err)
  475. goto failure_release_regions;
  476. if (sub_sys_id >= 12)
  477. channels = 4;
  478. else if (sub_sys_id >= 10)
  479. channels = 3;
  480. else if (sub_sys_id >= 4)
  481. channels = 2;
  482. else
  483. channels = 1;
  484. cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
  485. if (!cfg_base) {
  486. dev_err(&pdev->dev, "failed to map PCI resource #0\n");
  487. err = -ENOMEM;
  488. goto failure_release_regions;
  489. }
  490. reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
  491. if (!reg_base) {
  492. dev_err(&pdev->dev, "failed to map PCI resource #1\n");
  493. err = -ENOMEM;
  494. goto failure_unmap_cfg_base;
  495. }
  496. /* Set GPIO control register */
  497. writew(0x0005, cfg_base + PITA_GPIOICR + 2);
  498. /* Enable all channels of this card */
  499. writeb(0x00, cfg_base + PITA_GPIOICR);
  500. /* Toggle reset */
  501. writeb(0x05, cfg_base + PITA_MISC + 3);
  502. mdelay(5);
  503. /* Leave parport mux mode */
  504. writeb(0x04, cfg_base + PITA_MISC + 3);
  505. icr = readw(cfg_base + PITA_ICR + 2);
  506. for (i = 0; i < channels; i++) {
  507. dev = alloc_sja1000dev(sizeof(struct peak_pci_chan));
  508. if (!dev) {
  509. err = -ENOMEM;
  510. goto failure_remove_channels;
  511. }
  512. priv = netdev_priv(dev);
  513. chan = priv->priv;
  514. chan->cfg_base = cfg_base;
  515. priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE;
  516. priv->read_reg = peak_pci_read_reg;
  517. priv->write_reg = peak_pci_write_reg;
  518. priv->post_irq = peak_pci_post_irq;
  519. priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;
  520. priv->ocr = PEAK_PCI_OCR;
  521. priv->cdr = PEAK_PCI_CDR;
  522. /* Neither a slave nor a single device distributes the clock */
  523. if (channels == 1 || i > 0)
  524. priv->cdr |= CDR_CLK_OFF;
  525. /* Setup interrupt handling */
  526. priv->irq_flags = IRQF_SHARED;
  527. dev->irq = pdev->irq;
  528. chan->icr_mask = peak_pci_icr_masks[i];
  529. icr |= chan->icr_mask;
  530. SET_NETDEV_DEV(dev, &pdev->dev);
  531. dev->dev_id = i;
  532. /* Create chain of SJA1000 devices */
  533. chan->prev_dev = pci_get_drvdata(pdev);
  534. pci_set_drvdata(pdev, dev);
  535. /*
  536. * PCAN-ExpressCard needs some additional i2c init.
  537. * This must be done *before* register_sja1000dev() but
  538. * *after* devices linkage
  539. */
  540. if (pdev->device == PEAK_PCIEC_DEVICE_ID ||
  541. pdev->device == PEAK_PCIEC34_DEVICE_ID) {
  542. err = peak_pciec_probe(pdev, dev);
  543. if (err) {
  544. dev_err(&pdev->dev,
  545. "failed to probe device (err %d)\n",
  546. err);
  547. goto failure_free_dev;
  548. }
  549. }
  550. err = register_sja1000dev(dev);
  551. if (err) {
  552. dev_err(&pdev->dev, "failed to register device\n");
  553. goto failure_free_dev;
  554. }
  555. dev_info(&pdev->dev,
  556. "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n",
  557. dev->name, priv->reg_base, chan->cfg_base, dev->irq);
  558. }
  559. /* Enable interrupts */
  560. writew(icr, cfg_base + PITA_ICR + 2);
  561. return 0;
  562. failure_free_dev:
  563. pci_set_drvdata(pdev, chan->prev_dev);
  564. free_sja1000dev(dev);
  565. failure_remove_channels:
  566. /* Disable interrupts */
  567. writew(0x0, cfg_base + PITA_ICR + 2);
  568. chan = NULL;
  569. for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) {
  570. priv = netdev_priv(dev);
  571. chan = priv->priv;
  572. prev_dev = chan->prev_dev;
  573. unregister_sja1000dev(dev);
  574. free_sja1000dev(dev);
  575. }
  576. /* free any PCIeC resources too */
  577. if (chan && chan->pciec_card)
  578. peak_pciec_remove(chan->pciec_card);
  579. pci_iounmap(pdev, reg_base);
  580. failure_unmap_cfg_base:
  581. pci_iounmap(pdev, cfg_base);
  582. failure_release_regions:
  583. pci_release_regions(pdev);
  584. failure_disable_pci:
  585. pci_disable_device(pdev);
  586. return err;
  587. }
  588. static void peak_pci_remove(struct pci_dev *pdev)
  589. {
  590. struct net_device *dev = pci_get_drvdata(pdev); /* Last device */
  591. struct sja1000_priv *priv = netdev_priv(dev);
  592. struct peak_pci_chan *chan = priv->priv;
  593. void __iomem *cfg_base = chan->cfg_base;
  594. void __iomem *reg_base = priv->reg_base;
  595. /* Disable interrupts */
  596. writew(0x0, cfg_base + PITA_ICR + 2);
  597. /* Loop over all registered devices */
  598. while (1) {
  599. struct net_device *prev_dev = chan->prev_dev;
  600. dev_info(&pdev->dev, "removing device %s\n", dev->name);
  601. unregister_sja1000dev(dev);
  602. free_sja1000dev(dev);
  603. dev = prev_dev;
  604. if (!dev) {
  605. /* do that only for first channel */
  606. if (chan->pciec_card)
  607. peak_pciec_remove(chan->pciec_card);
  608. break;
  609. }
  610. priv = netdev_priv(dev);
  611. chan = priv->priv;
  612. }
  613. pci_iounmap(pdev, reg_base);
  614. pci_iounmap(pdev, cfg_base);
  615. pci_release_regions(pdev);
  616. pci_disable_device(pdev);
  617. }
  618. static struct pci_driver peak_pci_driver = {
  619. .name = DRV_NAME,
  620. .id_table = peak_pci_tbl,
  621. .probe = peak_pci_probe,
  622. .remove = peak_pci_remove,
  623. };
  624. module_pci_driver(peak_pci_driver);