dib0700_devices.c 137 KB

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  1. /* Linux driver for devices based on the DiBcom DiB0700 USB bridge
  2. *
  3. * This program is free software; you can redistribute it and/or modify it
  4. * under the terms of the GNU General Public License as published by the Free
  5. * Software Foundation, version 2.
  6. *
  7. * Copyright (C) 2005-9 DiBcom, SA et al
  8. */
  9. #include "dib0700.h"
  10. #include "dib3000mc.h"
  11. #include "dib7000m.h"
  12. #include "dib7000p.h"
  13. #include "dib8000.h"
  14. #include "dib9000.h"
  15. #include "mt2060.h"
  16. #include "mt2266.h"
  17. #include "tuner-xc2028.h"
  18. #include "xc5000.h"
  19. #include "xc4000.h"
  20. #include "s5h1411.h"
  21. #include "dib0070.h"
  22. #include "dib0090.h"
  23. #include "lgdt3305.h"
  24. #include "mxl5007t.h"
  25. static int force_lna_activation;
  26. module_param(force_lna_activation, int, 0644);
  27. MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), "
  28. "if applicable for the device (default: 0=automatic/off).");
  29. struct dib0700_adapter_state {
  30. int (*set_param_save) (struct dvb_frontend *);
  31. const struct firmware *frontend_firmware;
  32. struct dib7000p_ops dib7000p_ops;
  33. struct dib8000_ops dib8000_ops;
  34. };
  35. /* Hauppauge Nova-T 500 (aka Bristol)
  36. * has a LNA on GPIO0 which is enabled by setting 1 */
  37. static struct mt2060_config bristol_mt2060_config[2] = {
  38. {
  39. .i2c_address = 0x60,
  40. .clock_out = 3,
  41. }, {
  42. .i2c_address = 0x61,
  43. }
  44. };
  45. static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
  46. .band_caps = BAND_VHF | BAND_UHF,
  47. .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
  48. .agc1_max = 42598,
  49. .agc1_min = 17694,
  50. .agc2_max = 45875,
  51. .agc2_min = 0,
  52. .agc1_pt1 = 0,
  53. .agc1_pt2 = 59,
  54. .agc1_slope1 = 0,
  55. .agc1_slope2 = 69,
  56. .agc2_pt1 = 0,
  57. .agc2_pt2 = 59,
  58. .agc2_slope1 = 111,
  59. .agc2_slope2 = 28,
  60. };
  61. static struct dib3000mc_config bristol_dib3000mc_config[2] = {
  62. { .agc = &bristol_dib3000p_mt2060_agc_config,
  63. .max_time = 0x196,
  64. .ln_adc_level = 0x1cc7,
  65. .output_mpeg2_in_188_bytes = 1,
  66. },
  67. { .agc = &bristol_dib3000p_mt2060_agc_config,
  68. .max_time = 0x196,
  69. .ln_adc_level = 0x1cc7,
  70. .output_mpeg2_in_188_bytes = 1,
  71. }
  72. };
  73. static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
  74. {
  75. struct dib0700_state *st = adap->dev->priv;
  76. if (adap->id == 0) {
  77. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
  78. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
  79. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
  80. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
  81. if (force_lna_activation)
  82. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  83. else
  84. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
  85. if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
  86. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
  87. return -ENODEV;
  88. }
  89. }
  90. st->mt2060_if1[adap->id] = 1220;
  91. return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
  92. (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
  93. }
  94. static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
  95. {
  96. struct i2c_msg msg[2] = {
  97. { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
  98. { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
  99. };
  100. if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
  101. return 0;
  102. }
  103. static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
  104. {
  105. struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
  106. struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
  107. s8 a;
  108. int if1=1220;
  109. if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
  110. adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
  111. if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
  112. }
  113. return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
  114. &bristol_mt2060_config[adap->id], if1) == NULL ?
  115. -ENODEV : 0;
  116. }
  117. /* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
  118. /* MT226x */
  119. static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
  120. {
  121. BAND_UHF,
  122. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
  123. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  124. (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
  125. | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  126. 1130,
  127. 21,
  128. 0,
  129. 118,
  130. 0,
  131. 3530,
  132. 1,
  133. 0,
  134. 65535,
  135. 33770,
  136. 65535,
  137. 23592,
  138. 0,
  139. 62,
  140. 255,
  141. 64,
  142. 64,
  143. 132,
  144. 192,
  145. 80,
  146. 80,
  147. 17,
  148. 27,
  149. 23,
  150. 51,
  151. 1,
  152. }, {
  153. BAND_VHF | BAND_LBAND,
  154. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
  155. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  156. (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
  157. | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  158. 2372,
  159. 21,
  160. 0,
  161. 118,
  162. 0,
  163. 3530,
  164. 1,
  165. 0,
  166. 65535,
  167. 0,
  168. 65535,
  169. 23592,
  170. 0,
  171. 128,
  172. 128,
  173. 128,
  174. 0,
  175. 128,
  176. 253,
  177. 81,
  178. 0,
  179. 17,
  180. 27,
  181. 23,
  182. 51,
  183. 1,
  184. }
  185. };
  186. static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
  187. .internal = 60000,
  188. .sampling = 30000,
  189. .pll_prediv = 1,
  190. .pll_ratio = 8,
  191. .pll_range = 3,
  192. .pll_reset = 1,
  193. .pll_bypass = 0,
  194. .enable_refdiv = 0,
  195. .bypclk_div = 0,
  196. .IO_CLK_en_core = 1,
  197. .ADClkSrc = 1,
  198. .modulo = 2,
  199. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  200. .ifreq = 0,
  201. .timf = 20452225,
  202. };
  203. static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
  204. { .output_mpeg2_in_188_bytes = 1,
  205. .hostbus_diversity = 1,
  206. .tuner_is_baseband = 1,
  207. .agc_config_count = 2,
  208. .agc = stk7700d_7000p_mt2266_agc_config,
  209. .bw = &stk7700d_mt2266_pll_config,
  210. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  211. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  212. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  213. },
  214. { .output_mpeg2_in_188_bytes = 1,
  215. .hostbus_diversity = 1,
  216. .tuner_is_baseband = 1,
  217. .agc_config_count = 2,
  218. .agc = stk7700d_7000p_mt2266_agc_config,
  219. .bw = &stk7700d_mt2266_pll_config,
  220. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  221. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  222. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  223. }
  224. };
  225. static struct mt2266_config stk7700d_mt2266_config[2] = {
  226. { .i2c_address = 0x60
  227. },
  228. { .i2c_address = 0x60
  229. }
  230. };
  231. static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
  232. {
  233. struct dib0700_adapter_state *state = adap->priv;
  234. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  235. return -ENODEV;
  236. if (adap->id == 0) {
  237. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  238. msleep(10);
  239. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  240. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  241. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  242. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  243. msleep(10);
  244. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  245. msleep(10);
  246. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  247. stk7700d_dib7000p_mt2266_config)
  248. != 0) {
  249. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  250. dvb_detach(&state->dib7000p_ops);
  251. return -ENODEV;
  252. }
  253. }
  254. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
  255. 0x80 + (adap->id << 1),
  256. &stk7700d_dib7000p_mt2266_config[adap->id]);
  257. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  258. }
  259. static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
  260. {
  261. struct dib0700_adapter_state *state = adap->priv;
  262. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  263. return -ENODEV;
  264. if (adap->id == 0) {
  265. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  266. msleep(10);
  267. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  268. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  269. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  270. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  271. msleep(10);
  272. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  273. msleep(10);
  274. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  275. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
  276. stk7700d_dib7000p_mt2266_config)
  277. != 0) {
  278. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  279. dvb_detach(&state->dib7000p_ops);
  280. return -ENODEV;
  281. }
  282. }
  283. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
  284. 0x80 + (adap->id << 1),
  285. &stk7700d_dib7000p_mt2266_config[adap->id]);
  286. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  287. }
  288. static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
  289. {
  290. struct i2c_adapter *tun_i2c;
  291. struct dib0700_adapter_state *state = adap->priv;
  292. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  293. DIBX000_I2C_INTERFACE_TUNER, 1);
  294. return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
  295. &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
  296. }
  297. /* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
  298. static struct dibx000_agc_config xc3028_agc_config = {
  299. .band_caps = BAND_VHF | BAND_UHF,
  300. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
  301. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  302. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  303. .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  304. .inv_gain = 712,
  305. .time_stabiliz = 21,
  306. .alpha_level = 0,
  307. .thlock = 118,
  308. .wbd_inv = 0,
  309. .wbd_ref = 2867,
  310. .wbd_sel = 0,
  311. .wbd_alpha = 2,
  312. .agc1_max = 0,
  313. .agc1_min = 0,
  314. .agc2_max = 39718,
  315. .agc2_min = 9930,
  316. .agc1_pt1 = 0,
  317. .agc1_pt2 = 0,
  318. .agc1_pt3 = 0,
  319. .agc1_slope1 = 0,
  320. .agc1_slope2 = 0,
  321. .agc2_pt1 = 0,
  322. .agc2_pt2 = 128,
  323. .agc2_slope1 = 29,
  324. .agc2_slope2 = 29,
  325. .alpha_mant = 17,
  326. .alpha_exp = 27,
  327. .beta_mant = 23,
  328. .beta_exp = 51,
  329. .perform_agc_softsplit = 1,
  330. };
  331. /* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
  332. static struct dibx000_bandwidth_config xc3028_bw_config = {
  333. .internal = 60000,
  334. .sampling = 30000,
  335. .pll_prediv = 1,
  336. .pll_ratio = 8,
  337. .pll_range = 3,
  338. .pll_reset = 1,
  339. .pll_bypass = 0,
  340. .enable_refdiv = 0,
  341. .bypclk_div = 0,
  342. .IO_CLK_en_core = 1,
  343. .ADClkSrc = 1,
  344. .modulo = 0,
  345. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
  346. .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
  347. .timf = 20452225,
  348. .xtal_hz = 30000000,
  349. };
  350. static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
  351. .output_mpeg2_in_188_bytes = 1,
  352. .tuner_is_baseband = 1,
  353. .agc_config_count = 1,
  354. .agc = &xc3028_agc_config,
  355. .bw = &xc3028_bw_config,
  356. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  357. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  358. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  359. };
  360. static int stk7700ph_xc3028_callback(void *ptr, int component,
  361. int command, int arg)
  362. {
  363. struct dvb_usb_adapter *adap = ptr;
  364. struct dib0700_adapter_state *state = adap->priv;
  365. switch (command) {
  366. case XC2028_TUNER_RESET:
  367. /* Send the tuner in then out of reset */
  368. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
  369. msleep(10);
  370. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  371. break;
  372. case XC2028_RESET_CLK:
  373. break;
  374. default:
  375. err("%s: unknown command %d, arg %d\n", __func__,
  376. command, arg);
  377. return -EINVAL;
  378. }
  379. return 0;
  380. }
  381. static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
  382. .fname = XC2028_DEFAULT_FIRMWARE,
  383. .max_len = 64,
  384. .demod = XC3028_FE_DIBCOM52,
  385. };
  386. static struct xc2028_config stk7700ph_xc3028_config = {
  387. .i2c_addr = 0x61,
  388. .ctrl = &stk7700ph_xc3028_ctrl,
  389. };
  390. static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
  391. {
  392. struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
  393. struct dib0700_adapter_state *state = adap->priv;
  394. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  395. return -ENODEV;
  396. if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
  397. desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
  398. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  399. else
  400. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  401. msleep(20);
  402. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  403. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  404. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  405. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  406. msleep(10);
  407. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  408. msleep(20);
  409. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  410. msleep(10);
  411. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  412. &stk7700ph_dib7700_xc3028_config) != 0) {
  413. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  414. __func__);
  415. dvb_detach(&state->dib7000p_ops);
  416. return -ENODEV;
  417. }
  418. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
  419. &stk7700ph_dib7700_xc3028_config);
  420. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  421. }
  422. static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
  423. {
  424. struct i2c_adapter *tun_i2c;
  425. struct dib0700_adapter_state *state = adap->priv;
  426. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  427. DIBX000_I2C_INTERFACE_TUNER, 1);
  428. stk7700ph_xc3028_config.i2c_adap = tun_i2c;
  429. /* FIXME: generalize & move to common area */
  430. adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
  431. return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
  432. == NULL ? -ENODEV : 0;
  433. }
  434. #define DEFAULT_RC_INTERVAL 50
  435. static u8 rc_request[] = { REQUEST_POLL_RC, 0 };
  436. /*
  437. * This function is used only when firmware is < 1.20 version. Newer
  438. * firmwares use bulk mode, with functions implemented at dib0700_core,
  439. * at dib0700_rc_urb_completion()
  440. */
  441. static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
  442. {
  443. u8 key[4];
  444. enum rc_type protocol;
  445. u32 scancode;
  446. u8 toggle;
  447. int i;
  448. struct dib0700_state *st = d->priv;
  449. if (st->fw_version >= 0x10200) {
  450. /* For 1.20 firmware , We need to keep the RC polling
  451. callback so we can reuse the input device setup in
  452. dvb-usb-remote.c. However, the actual work is being done
  453. in the bulk URB completion handler. */
  454. return 0;
  455. }
  456. i = dib0700_ctrl_rd(d, rc_request, 2, key, 4);
  457. if (i <= 0) {
  458. err("RC Query Failed");
  459. return -1;
  460. }
  461. /* losing half of KEY_0 events from Philipps rc5 remotes.. */
  462. if (key[0] == 0 && key[1] == 0 && key[2] == 0 && key[3] == 0)
  463. return 0;
  464. /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)key[3-2],(int)key[3-3],(int)key[3-1],(int)key[3]); */
  465. dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
  466. switch (d->props.rc.core.protocol) {
  467. case RC_BIT_NEC:
  468. /* NEC protocol sends repeat code as 0 0 0 FF */
  469. if ((key[3-2] == 0x00) && (key[3-3] == 0x00) &&
  470. (key[3] == 0xff)) {
  471. rc_repeat(d->rc_dev);
  472. return 0;
  473. }
  474. protocol = RC_TYPE_NEC;
  475. scancode = RC_SCANCODE_NEC(key[3-2], key[3-3]);
  476. toggle = 0;
  477. break;
  478. default:
  479. /* RC-5 protocol changes toggle bit on new keypress */
  480. protocol = RC_TYPE_RC5;
  481. scancode = RC_SCANCODE_RC5(key[3-2], key[3-3]);
  482. toggle = key[3-1];
  483. break;
  484. }
  485. rc_keydown(d->rc_dev, protocol, scancode, toggle);
  486. return 0;
  487. }
  488. /* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
  489. static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
  490. BAND_UHF | BAND_VHF,
  491. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  492. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  493. (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
  494. | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  495. 712,
  496. 41,
  497. 0,
  498. 118,
  499. 0,
  500. 4095,
  501. 0,
  502. 0,
  503. 42598,
  504. 17694,
  505. 45875,
  506. 2621,
  507. 0,
  508. 76,
  509. 139,
  510. 52,
  511. 59,
  512. 107,
  513. 172,
  514. 57,
  515. 70,
  516. 21,
  517. 25,
  518. 28,
  519. 48,
  520. 1,
  521. { 0,
  522. 107,
  523. 51800,
  524. 24700
  525. },
  526. };
  527. static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
  528. .band_caps = BAND_UHF | BAND_VHF,
  529. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  530. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  531. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  532. .inv_gain = 712,
  533. .time_stabiliz = 41,
  534. .alpha_level = 0,
  535. .thlock = 118,
  536. .wbd_inv = 0,
  537. .wbd_ref = 4095,
  538. .wbd_sel = 0,
  539. .wbd_alpha = 0,
  540. .agc1_max = 42598,
  541. .agc1_min = 16384,
  542. .agc2_max = 42598,
  543. .agc2_min = 0,
  544. .agc1_pt1 = 0,
  545. .agc1_pt2 = 137,
  546. .agc1_pt3 = 255,
  547. .agc1_slope1 = 0,
  548. .agc1_slope2 = 255,
  549. .agc2_pt1 = 0,
  550. .agc2_pt2 = 0,
  551. .agc2_slope1 = 0,
  552. .agc2_slope2 = 41,
  553. .alpha_mant = 15,
  554. .alpha_exp = 25,
  555. .beta_mant = 28,
  556. .beta_exp = 48,
  557. .perform_agc_softsplit = 0,
  558. };
  559. static struct dibx000_bandwidth_config stk7700p_pll_config = {
  560. .internal = 60000,
  561. .sampling = 30000,
  562. .pll_prediv = 1,
  563. .pll_ratio = 8,
  564. .pll_range = 3,
  565. .pll_reset = 1,
  566. .pll_bypass = 0,
  567. .enable_refdiv = 0,
  568. .bypclk_div = 0,
  569. .IO_CLK_en_core = 1,
  570. .ADClkSrc = 1,
  571. .modulo = 0,
  572. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  573. .ifreq = 60258167,
  574. .timf = 20452225,
  575. .xtal_hz = 30000000,
  576. };
  577. static struct dib7000m_config stk7700p_dib7000m_config = {
  578. .dvbt_mode = 1,
  579. .output_mpeg2_in_188_bytes = 1,
  580. .quartz_direct = 1,
  581. .agc_config_count = 1,
  582. .agc = &stk7700p_7000m_mt2060_agc_config,
  583. .bw = &stk7700p_pll_config,
  584. .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
  585. .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
  586. .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
  587. };
  588. static struct dib7000p_config stk7700p_dib7000p_config = {
  589. .output_mpeg2_in_188_bytes = 1,
  590. .agc_config_count = 1,
  591. .agc = &stk7700p_7000p_mt2060_agc_config,
  592. .bw = &stk7700p_pll_config,
  593. .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
  594. .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
  595. .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
  596. };
  597. static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
  598. {
  599. struct dib0700_state *st = adap->dev->priv;
  600. struct dib0700_adapter_state *state = adap->priv;
  601. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  602. return -ENODEV;
  603. /* unless there is no real power management in DVB - we leave the device on GPIO6 */
  604. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  605. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
  606. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
  607. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  608. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
  609. dib0700_ctrl_clock(adap->dev, 72, 1);
  610. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
  611. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  612. st->mt2060_if1[0] = 1220;
  613. if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
  614. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
  615. st->is_dib7000pc = 1;
  616. } else {
  617. memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
  618. adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
  619. }
  620. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  621. }
  622. static struct mt2060_config stk7700p_mt2060_config = {
  623. 0x60
  624. };
  625. static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
  626. {
  627. struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
  628. struct dib0700_state *st = adap->dev->priv;
  629. struct i2c_adapter *tun_i2c;
  630. struct dib0700_adapter_state *state = adap->priv;
  631. s8 a;
  632. int if1=1220;
  633. if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
  634. adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
  635. if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
  636. }
  637. if (st->is_dib7000pc)
  638. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  639. else
  640. tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  641. return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
  642. if1) == NULL ? -ENODEV : 0;
  643. }
  644. /* DIB7070 generic */
  645. static struct dibx000_agc_config dib7070_agc_config = {
  646. .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
  647. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  648. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  649. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  650. .inv_gain = 600,
  651. .time_stabiliz = 10,
  652. .alpha_level = 0,
  653. .thlock = 118,
  654. .wbd_inv = 0,
  655. .wbd_ref = 3530,
  656. .wbd_sel = 1,
  657. .wbd_alpha = 5,
  658. .agc1_max = 65535,
  659. .agc1_min = 0,
  660. .agc2_max = 65535,
  661. .agc2_min = 0,
  662. .agc1_pt1 = 0,
  663. .agc1_pt2 = 40,
  664. .agc1_pt3 = 183,
  665. .agc1_slope1 = 206,
  666. .agc1_slope2 = 255,
  667. .agc2_pt1 = 72,
  668. .agc2_pt2 = 152,
  669. .agc2_slope1 = 88,
  670. .agc2_slope2 = 90,
  671. .alpha_mant = 17,
  672. .alpha_exp = 27,
  673. .beta_mant = 23,
  674. .beta_exp = 51,
  675. .perform_agc_softsplit = 0,
  676. };
  677. static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
  678. {
  679. struct dvb_usb_adapter *adap = fe->dvb->priv;
  680. struct dib0700_adapter_state *state = adap->priv;
  681. deb_info("reset: %d", onoff);
  682. return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
  683. }
  684. static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
  685. {
  686. struct dvb_usb_adapter *adap = fe->dvb->priv;
  687. struct dib0700_adapter_state *state = adap->priv;
  688. deb_info("sleep: %d", onoff);
  689. return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
  690. }
  691. static struct dib0070_config dib7070p_dib0070_config[2] = {
  692. {
  693. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  694. .reset = dib7070_tuner_reset,
  695. .sleep = dib7070_tuner_sleep,
  696. .clock_khz = 12000,
  697. .clock_pad_drive = 4,
  698. .charge_pump = 2,
  699. }, {
  700. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  701. .reset = dib7070_tuner_reset,
  702. .sleep = dib7070_tuner_sleep,
  703. .clock_khz = 12000,
  704. .charge_pump = 2,
  705. }
  706. };
  707. static struct dib0070_config dib7770p_dib0070_config = {
  708. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  709. .reset = dib7070_tuner_reset,
  710. .sleep = dib7070_tuner_sleep,
  711. .clock_khz = 12000,
  712. .clock_pad_drive = 0,
  713. .flip_chip = 1,
  714. .charge_pump = 2,
  715. };
  716. static int dib7070_set_param_override(struct dvb_frontend *fe)
  717. {
  718. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  719. struct dvb_usb_adapter *adap = fe->dvb->priv;
  720. struct dib0700_adapter_state *state = adap->priv;
  721. u16 offset;
  722. u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
  723. switch (band) {
  724. case BAND_VHF: offset = 950; break;
  725. case BAND_UHF:
  726. default: offset = 550; break;
  727. }
  728. deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
  729. state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
  730. return state->set_param_save(fe);
  731. }
  732. static int dib7770_set_param_override(struct dvb_frontend *fe)
  733. {
  734. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  735. struct dvb_usb_adapter *adap = fe->dvb->priv;
  736. struct dib0700_adapter_state *state = adap->priv;
  737. u16 offset;
  738. u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
  739. switch (band) {
  740. case BAND_VHF:
  741. state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
  742. offset = 850;
  743. break;
  744. case BAND_UHF:
  745. default:
  746. state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
  747. offset = 250;
  748. break;
  749. }
  750. deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
  751. state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
  752. return state->set_param_save(fe);
  753. }
  754. static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
  755. {
  756. struct dib0700_adapter_state *st = adap->priv;
  757. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  758. DIBX000_I2C_INTERFACE_TUNER, 1);
  759. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
  760. &dib7770p_dib0070_config) == NULL)
  761. return -ENODEV;
  762. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  763. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
  764. return 0;
  765. }
  766. static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
  767. {
  768. struct dib0700_adapter_state *st = adap->priv;
  769. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  770. if (adap->id == 0) {
  771. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
  772. return -ENODEV;
  773. } else {
  774. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
  775. return -ENODEV;
  776. }
  777. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  778. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
  779. return 0;
  780. }
  781. static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
  782. u16 pid, int onoff)
  783. {
  784. struct dib0700_adapter_state *state = adapter->priv;
  785. struct dib0700_state *st = adapter->dev->priv;
  786. if (st->is_dib7000pc)
  787. return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  788. return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  789. }
  790. static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
  791. {
  792. struct dib0700_state *st = adapter->dev->priv;
  793. struct dib0700_adapter_state *state = adapter->priv;
  794. if (st->is_dib7000pc)
  795. return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  796. return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  797. }
  798. static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
  799. {
  800. struct dib0700_adapter_state *state = adapter->priv;
  801. return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  802. }
  803. static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
  804. {
  805. struct dib0700_adapter_state *state = adapter->priv;
  806. return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  807. }
  808. static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
  809. .internal = 60000,
  810. .sampling = 15000,
  811. .pll_prediv = 1,
  812. .pll_ratio = 20,
  813. .pll_range = 3,
  814. .pll_reset = 1,
  815. .pll_bypass = 0,
  816. .enable_refdiv = 0,
  817. .bypclk_div = 0,
  818. .IO_CLK_en_core = 1,
  819. .ADClkSrc = 1,
  820. .modulo = 2,
  821. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  822. .ifreq = (0 << 25) | 0,
  823. .timf = 20452225,
  824. .xtal_hz = 12000000,
  825. };
  826. static struct dib7000p_config dib7070p_dib7000p_config = {
  827. .output_mpeg2_in_188_bytes = 1,
  828. .agc_config_count = 1,
  829. .agc = &dib7070_agc_config,
  830. .bw = &dib7070_bw_config_12_mhz,
  831. .tuner_is_baseband = 1,
  832. .spur_protect = 1,
  833. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  834. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  835. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  836. .hostbus_diversity = 1,
  837. };
  838. /* STK7070P */
  839. static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
  840. {
  841. struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
  842. struct dib0700_adapter_state *state = adap->priv;
  843. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  844. return -ENODEV;
  845. if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
  846. p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
  847. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  848. else
  849. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  850. msleep(10);
  851. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  852. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  853. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  854. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  855. dib0700_ctrl_clock(adap->dev, 72, 1);
  856. msleep(10);
  857. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  858. msleep(10);
  859. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  860. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  861. &dib7070p_dib7000p_config) != 0) {
  862. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  863. __func__);
  864. dvb_detach(&state->dib7000p_ops);
  865. return -ENODEV;
  866. }
  867. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
  868. &dib7070p_dib7000p_config);
  869. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  870. }
  871. /* STK7770P */
  872. static struct dib7000p_config dib7770p_dib7000p_config = {
  873. .output_mpeg2_in_188_bytes = 1,
  874. .agc_config_count = 1,
  875. .agc = &dib7070_agc_config,
  876. .bw = &dib7070_bw_config_12_mhz,
  877. .tuner_is_baseband = 1,
  878. .spur_protect = 1,
  879. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  880. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  881. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  882. .hostbus_diversity = 1,
  883. .enable_current_mirror = 1,
  884. .disable_sample_and_hold = 0,
  885. };
  886. static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
  887. {
  888. struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
  889. struct dib0700_adapter_state *state = adap->priv;
  890. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  891. return -ENODEV;
  892. if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
  893. p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
  894. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  895. else
  896. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  897. msleep(10);
  898. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  899. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  900. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  901. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  902. dib0700_ctrl_clock(adap->dev, 72, 1);
  903. msleep(10);
  904. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  905. msleep(10);
  906. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  907. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  908. &dib7770p_dib7000p_config) != 0) {
  909. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  910. __func__);
  911. dvb_detach(&state->dib7000p_ops);
  912. return -ENODEV;
  913. }
  914. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
  915. &dib7770p_dib7000p_config);
  916. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  917. }
  918. /* DIB807x generic */
  919. static struct dibx000_agc_config dib807x_agc_config[2] = {
  920. {
  921. BAND_VHF,
  922. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  923. * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  924. * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
  925. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  926. * P_agc_write=0 */
  927. (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
  928. (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
  929. (0 << 0), /* setup*/
  930. 600, /* inv_gain*/
  931. 10, /* time_stabiliz*/
  932. 0, /* alpha_level*/
  933. 118, /* thlock*/
  934. 0, /* wbd_inv*/
  935. 3530, /* wbd_ref*/
  936. 1, /* wbd_sel*/
  937. 5, /* wbd_alpha*/
  938. 65535, /* agc1_max*/
  939. 0, /* agc1_min*/
  940. 65535, /* agc2_max*/
  941. 0, /* agc2_min*/
  942. 0, /* agc1_pt1*/
  943. 40, /* agc1_pt2*/
  944. 183, /* agc1_pt3*/
  945. 206, /* agc1_slope1*/
  946. 255, /* agc1_slope2*/
  947. 72, /* agc2_pt1*/
  948. 152, /* agc2_pt2*/
  949. 88, /* agc2_slope1*/
  950. 90, /* agc2_slope2*/
  951. 17, /* alpha_mant*/
  952. 27, /* alpha_exp*/
  953. 23, /* beta_mant*/
  954. 51, /* beta_exp*/
  955. 0, /* perform_agc_softsplit*/
  956. }, {
  957. BAND_UHF,
  958. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  959. * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  960. * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  961. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  962. * P_agc_write=0 */
  963. (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
  964. (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
  965. (0 << 0), /* setup */
  966. 600, /* inv_gain*/
  967. 10, /* time_stabiliz*/
  968. 0, /* alpha_level*/
  969. 118, /* thlock*/
  970. 0, /* wbd_inv*/
  971. 3530, /* wbd_ref*/
  972. 1, /* wbd_sel*/
  973. 5, /* wbd_alpha*/
  974. 65535, /* agc1_max*/
  975. 0, /* agc1_min*/
  976. 65535, /* agc2_max*/
  977. 0, /* agc2_min*/
  978. 0, /* agc1_pt1*/
  979. 40, /* agc1_pt2*/
  980. 183, /* agc1_pt3*/
  981. 206, /* agc1_slope1*/
  982. 255, /* agc1_slope2*/
  983. 72, /* agc2_pt1*/
  984. 152, /* agc2_pt2*/
  985. 88, /* agc2_slope1*/
  986. 90, /* agc2_slope2*/
  987. 17, /* alpha_mant*/
  988. 27, /* alpha_exp*/
  989. 23, /* beta_mant*/
  990. 51, /* beta_exp*/
  991. 0, /* perform_agc_softsplit*/
  992. }
  993. };
  994. static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
  995. .internal = 60000,
  996. .sampling = 15000,
  997. .pll_prediv = 1,
  998. .pll_ratio = 20,
  999. .pll_range = 3,
  1000. .pll_reset = 1,
  1001. .pll_bypass = 0,
  1002. .enable_refdiv = 0,
  1003. .bypclk_div = 0,
  1004. .IO_CLK_en_core = 1,
  1005. .ADClkSrc = 1,
  1006. .modulo = 2,
  1007. .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
  1008. .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
  1009. .timf = 18179755,
  1010. .xtal_hz = 12000000,
  1011. };
  1012. static struct dib8000_config dib807x_dib8000_config[2] = {
  1013. {
  1014. .output_mpeg2_in_188_bytes = 1,
  1015. .agc_config_count = 2,
  1016. .agc = dib807x_agc_config,
  1017. .pll = &dib807x_bw_config_12_mhz,
  1018. .tuner_is_baseband = 1,
  1019. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1020. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1021. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1022. .hostbus_diversity = 1,
  1023. .div_cfg = 1,
  1024. .agc_control = &dib0070_ctrl_agc_filter,
  1025. .output_mode = OUTMODE_MPEG2_FIFO,
  1026. .drives = 0x2d98,
  1027. }, {
  1028. .output_mpeg2_in_188_bytes = 1,
  1029. .agc_config_count = 2,
  1030. .agc = dib807x_agc_config,
  1031. .pll = &dib807x_bw_config_12_mhz,
  1032. .tuner_is_baseband = 1,
  1033. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1034. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1035. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1036. .hostbus_diversity = 1,
  1037. .agc_control = &dib0070_ctrl_agc_filter,
  1038. .output_mode = OUTMODE_MPEG2_FIFO,
  1039. .drives = 0x2d98,
  1040. }
  1041. };
  1042. static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
  1043. {
  1044. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1045. struct dib0700_adapter_state *state = adap->priv;
  1046. return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
  1047. }
  1048. static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
  1049. {
  1050. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1051. struct dib0700_adapter_state *state = adap->priv;
  1052. return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
  1053. }
  1054. static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
  1055. { 240, 7},
  1056. { 0xffff, 6},
  1057. };
  1058. static struct dib0070_config dib807x_dib0070_config[2] = {
  1059. {
  1060. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  1061. .reset = dib80xx_tuner_reset,
  1062. .sleep = dib80xx_tuner_sleep,
  1063. .clock_khz = 12000,
  1064. .clock_pad_drive = 4,
  1065. .vga_filter = 1,
  1066. .force_crystal_mode = 1,
  1067. .enable_third_order_filter = 1,
  1068. .charge_pump = 0,
  1069. .wbd_gain = dib8070_wbd_gain_cfg,
  1070. .osc_buffer_state = 0,
  1071. .freq_offset_khz_uhf = -100,
  1072. .freq_offset_khz_vhf = -100,
  1073. }, {
  1074. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  1075. .reset = dib80xx_tuner_reset,
  1076. .sleep = dib80xx_tuner_sleep,
  1077. .clock_khz = 12000,
  1078. .clock_pad_drive = 2,
  1079. .vga_filter = 1,
  1080. .force_crystal_mode = 1,
  1081. .enable_third_order_filter = 1,
  1082. .charge_pump = 0,
  1083. .wbd_gain = dib8070_wbd_gain_cfg,
  1084. .osc_buffer_state = 0,
  1085. .freq_offset_khz_uhf = -25,
  1086. .freq_offset_khz_vhf = -25,
  1087. }
  1088. };
  1089. static int dib807x_set_param_override(struct dvb_frontend *fe)
  1090. {
  1091. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1092. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1093. struct dib0700_adapter_state *state = adap->priv;
  1094. u16 offset = dib0070_wbd_offset(fe);
  1095. u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
  1096. switch (band) {
  1097. case BAND_VHF:
  1098. offset += 750;
  1099. break;
  1100. case BAND_UHF: /* fall-thru wanted */
  1101. default:
  1102. offset += 250; break;
  1103. }
  1104. deb_info("WBD for DiB8000: %d\n", offset);
  1105. state->dib8000_ops.set_wbd_ref(fe, offset);
  1106. return state->set_param_save(fe);
  1107. }
  1108. static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
  1109. {
  1110. struct dib0700_adapter_state *st = adap->priv;
  1111. struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
  1112. DIBX000_I2C_INTERFACE_TUNER, 1);
  1113. if (adap->id == 0) {
  1114. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
  1115. &dib807x_dib0070_config[0]) == NULL)
  1116. return -ENODEV;
  1117. } else {
  1118. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
  1119. &dib807x_dib0070_config[1]) == NULL)
  1120. return -ENODEV;
  1121. }
  1122. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1123. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
  1124. return 0;
  1125. }
  1126. static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
  1127. u16 pid, int onoff)
  1128. {
  1129. struct dib0700_adapter_state *state = adapter->priv;
  1130. return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  1131. }
  1132. static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
  1133. int onoff)
  1134. {
  1135. struct dib0700_adapter_state *state = adapter->priv;
  1136. return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  1137. }
  1138. /* STK807x */
  1139. static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
  1140. {
  1141. struct dib0700_adapter_state *state = adap->priv;
  1142. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1143. return -ENODEV;
  1144. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1145. msleep(10);
  1146. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1147. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1148. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1149. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1150. dib0700_ctrl_clock(adap->dev, 72, 1);
  1151. msleep(10);
  1152. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1153. msleep(10);
  1154. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1155. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  1156. 0x80, 0);
  1157. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
  1158. &dib807x_dib8000_config[0]);
  1159. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1160. }
  1161. /* STK807xPVR */
  1162. static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
  1163. {
  1164. struct dib0700_adapter_state *state = adap->priv;
  1165. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1166. return -ENODEV;
  1167. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  1168. msleep(30);
  1169. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1170. msleep(500);
  1171. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1172. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1173. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1174. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1175. dib0700_ctrl_clock(adap->dev, 72, 1);
  1176. msleep(10);
  1177. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1178. msleep(10);
  1179. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1180. /* initialize IC 0 */
  1181. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
  1182. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
  1183. &dib807x_dib8000_config[0]);
  1184. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1185. }
  1186. static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
  1187. {
  1188. struct dib0700_adapter_state *state = adap->priv;
  1189. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1190. return -ENODEV;
  1191. /* initialize IC 1 */
  1192. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
  1193. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
  1194. &dib807x_dib8000_config[1]);
  1195. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1196. }
  1197. /* STK8096GP */
  1198. static struct dibx000_agc_config dib8090_agc_config[2] = {
  1199. {
  1200. .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
  1201. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
  1202. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1203. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  1204. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
  1205. | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  1206. .inv_gain = 787,
  1207. .time_stabiliz = 10,
  1208. .alpha_level = 0,
  1209. .thlock = 118,
  1210. .wbd_inv = 0,
  1211. .wbd_ref = 3530,
  1212. .wbd_sel = 1,
  1213. .wbd_alpha = 5,
  1214. .agc1_max = 65535,
  1215. .agc1_min = 0,
  1216. .agc2_max = 65535,
  1217. .agc2_min = 0,
  1218. .agc1_pt1 = 0,
  1219. .agc1_pt2 = 32,
  1220. .agc1_pt3 = 114,
  1221. .agc1_slope1 = 143,
  1222. .agc1_slope2 = 144,
  1223. .agc2_pt1 = 114,
  1224. .agc2_pt2 = 227,
  1225. .agc2_slope1 = 116,
  1226. .agc2_slope2 = 117,
  1227. .alpha_mant = 28,
  1228. .alpha_exp = 26,
  1229. .beta_mant = 31,
  1230. .beta_exp = 51,
  1231. .perform_agc_softsplit = 0,
  1232. },
  1233. {
  1234. .band_caps = BAND_CBAND,
  1235. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
  1236. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1237. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  1238. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
  1239. | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  1240. .inv_gain = 787,
  1241. .time_stabiliz = 10,
  1242. .alpha_level = 0,
  1243. .thlock = 118,
  1244. .wbd_inv = 0,
  1245. .wbd_ref = 3530,
  1246. .wbd_sel = 1,
  1247. .wbd_alpha = 5,
  1248. .agc1_max = 0,
  1249. .agc1_min = 0,
  1250. .agc2_max = 65535,
  1251. .agc2_min = 0,
  1252. .agc1_pt1 = 0,
  1253. .agc1_pt2 = 32,
  1254. .agc1_pt3 = 114,
  1255. .agc1_slope1 = 143,
  1256. .agc1_slope2 = 144,
  1257. .agc2_pt1 = 114,
  1258. .agc2_pt2 = 227,
  1259. .agc2_slope1 = 116,
  1260. .agc2_slope2 = 117,
  1261. .alpha_mant = 28,
  1262. .alpha_exp = 26,
  1263. .beta_mant = 31,
  1264. .beta_exp = 51,
  1265. .perform_agc_softsplit = 0,
  1266. }
  1267. };
  1268. static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
  1269. .internal = 54000,
  1270. .sampling = 13500,
  1271. .pll_prediv = 1,
  1272. .pll_ratio = 18,
  1273. .pll_range = 3,
  1274. .pll_reset = 1,
  1275. .pll_bypass = 0,
  1276. .enable_refdiv = 0,
  1277. .bypclk_div = 0,
  1278. .IO_CLK_en_core = 1,
  1279. .ADClkSrc = 1,
  1280. .modulo = 2,
  1281. .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
  1282. .ifreq = (0 << 25) | 0,
  1283. .timf = 20199727,
  1284. .xtal_hz = 12000000,
  1285. };
  1286. static int dib8090_get_adc_power(struct dvb_frontend *fe)
  1287. {
  1288. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1289. struct dib0700_adapter_state *state = adap->priv;
  1290. return state->dib8000_ops.get_adc_power(fe, 1);
  1291. }
  1292. static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
  1293. {
  1294. deb_info("AGC control callback: %i\n", restart);
  1295. dib0090_dcc_freq(fe, restart);
  1296. if (restart == 0) /* before AGC startup */
  1297. dib0090_set_dc_servo(fe, 1);
  1298. }
  1299. static struct dib8000_config dib809x_dib8000_config[2] = {
  1300. {
  1301. .output_mpeg2_in_188_bytes = 1,
  1302. .agc_config_count = 2,
  1303. .agc = dib8090_agc_config,
  1304. .agc_control = dib8090_agc_control,
  1305. .pll = &dib8090_pll_config_12mhz,
  1306. .tuner_is_baseband = 1,
  1307. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1308. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1309. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1310. .hostbus_diversity = 1,
  1311. .div_cfg = 0x31,
  1312. .output_mode = OUTMODE_MPEG2_FIFO,
  1313. .drives = 0x2d98,
  1314. .diversity_delay = 48,
  1315. .refclksel = 3,
  1316. }, {
  1317. .output_mpeg2_in_188_bytes = 1,
  1318. .agc_config_count = 2,
  1319. .agc = dib8090_agc_config,
  1320. .agc_control = dib8090_agc_control,
  1321. .pll = &dib8090_pll_config_12mhz,
  1322. .tuner_is_baseband = 1,
  1323. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1324. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1325. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1326. .hostbus_diversity = 1,
  1327. .div_cfg = 0x31,
  1328. .output_mode = OUTMODE_DIVERSITY,
  1329. .drives = 0x2d08,
  1330. .diversity_delay = 1,
  1331. .refclksel = 3,
  1332. }
  1333. };
  1334. static struct dib0090_wbd_slope dib8090_wbd_table[] = {
  1335. /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
  1336. { 120, 0, 500, 0, 500, 4 }, /* CBAND */
  1337. { 170, 0, 450, 0, 450, 4 }, /* CBAND */
  1338. { 380, 48, 373, 28, 259, 6 }, /* VHF */
  1339. { 860, 34, 700, 36, 616, 6 }, /* high UHF */
  1340. { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
  1341. };
  1342. static struct dib0090_config dib809x_dib0090_config = {
  1343. .io.pll_bypass = 1,
  1344. .io.pll_range = 1,
  1345. .io.pll_prediv = 1,
  1346. .io.pll_loopdiv = 20,
  1347. .io.adc_clock_ratio = 8,
  1348. .io.pll_int_loop_filt = 0,
  1349. .io.clock_khz = 12000,
  1350. .reset = dib80xx_tuner_reset,
  1351. .sleep = dib80xx_tuner_sleep,
  1352. .clkouttobamse = 1,
  1353. .analog_output = 1,
  1354. .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
  1355. .use_pwm_agc = 1,
  1356. .clkoutdrive = 1,
  1357. .get_adc_power = dib8090_get_adc_power,
  1358. .freq_offset_khz_uhf = -63,
  1359. .freq_offset_khz_vhf = -143,
  1360. .wbd = dib8090_wbd_table,
  1361. .fref_clock_ratio = 6,
  1362. };
  1363. static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
  1364. {
  1365. u8 optimal_pll_ratio = 20;
  1366. u32 freq_adc, ratio, rest, max = 0;
  1367. u8 pll_ratio;
  1368. for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
  1369. freq_adc = 12 * pll_ratio * (1 << 8) / 16;
  1370. ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
  1371. rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
  1372. if (rest > freq_adc / 2)
  1373. rest = freq_adc - rest;
  1374. deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
  1375. if ((rest > max) && (rest > 717)) {
  1376. optimal_pll_ratio = pll_ratio;
  1377. max = rest;
  1378. }
  1379. }
  1380. deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
  1381. return optimal_pll_ratio;
  1382. }
  1383. static int dib8096_set_param_override(struct dvb_frontend *fe)
  1384. {
  1385. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1386. struct dib0700_adapter_state *state = adap->priv;
  1387. u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
  1388. u16 target, ltgain, rf_gain_limit;
  1389. u32 timf;
  1390. int ret = 0;
  1391. enum frontend_tune_state tune_state = CT_SHUTDOWN;
  1392. switch (band) {
  1393. default:
  1394. deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
  1395. case BAND_VHF:
  1396. state->dib8000_ops.set_gpio(fe, 3, 0, 1);
  1397. break;
  1398. case BAND_UHF:
  1399. state->dib8000_ops.set_gpio(fe, 3, 0, 0);
  1400. break;
  1401. }
  1402. ret = state->set_param_save(fe);
  1403. if (ret < 0)
  1404. return ret;
  1405. if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
  1406. deb_info("only 6MHz bandwidth is supported\n");
  1407. return -EINVAL;
  1408. }
  1409. /** Update PLL if needed ratio **/
  1410. state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
  1411. /** Get optimize PLL ratio to remove spurious **/
  1412. pll_ratio = dib8090_compute_pll_parameters(fe);
  1413. if (pll_ratio == 17)
  1414. timf = 21387946;
  1415. else if (pll_ratio == 18)
  1416. timf = 20199727;
  1417. else if (pll_ratio == 19)
  1418. timf = 19136583;
  1419. else
  1420. timf = 18179756;
  1421. /** Update ratio **/
  1422. state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
  1423. state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
  1424. if (band != BAND_CBAND) {
  1425. /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
  1426. target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
  1427. state->dib8000_ops.set_wbd_ref(fe, target);
  1428. }
  1429. if (band == BAND_CBAND) {
  1430. deb_info("tuning in CBAND - soft-AGC startup\n");
  1431. dib0090_set_tune_state(fe, CT_AGC_START);
  1432. do {
  1433. ret = dib0090_gain_control(fe);
  1434. msleep(ret);
  1435. tune_state = dib0090_get_tune_state(fe);
  1436. if (tune_state == CT_AGC_STEP_0)
  1437. state->dib8000_ops.set_gpio(fe, 6, 0, 1);
  1438. else if (tune_state == CT_AGC_STEP_1) {
  1439. dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
  1440. if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
  1441. state->dib8000_ops.set_gpio(fe, 6, 0, 0);
  1442. }
  1443. } while (tune_state < CT_AGC_STOP);
  1444. deb_info("switching to PWM AGC\n");
  1445. dib0090_pwm_gain_reset(fe);
  1446. state->dib8000_ops.pwm_agc_reset(fe);
  1447. state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
  1448. } else {
  1449. /* for everything else than CBAND we are using standard AGC */
  1450. deb_info("not tuning in CBAND - standard AGC startup\n");
  1451. dib0090_pwm_gain_reset(fe);
  1452. }
  1453. return 0;
  1454. }
  1455. static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
  1456. {
  1457. struct dib0700_adapter_state *st = adap->priv;
  1458. struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  1459. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
  1460. return -ENODEV;
  1461. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1462. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
  1463. return 0;
  1464. }
  1465. static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
  1466. {
  1467. struct dib0700_adapter_state *state = adap->priv;
  1468. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1469. return -ENODEV;
  1470. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1471. msleep(10);
  1472. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1473. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1474. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1475. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1476. dib0700_ctrl_clock(adap->dev, 72, 1);
  1477. msleep(10);
  1478. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1479. msleep(10);
  1480. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1481. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
  1482. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
  1483. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1484. }
  1485. static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
  1486. {
  1487. struct dib0700_adapter_state *st = adap->priv;
  1488. struct i2c_adapter *tun_i2c;
  1489. struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
  1490. if (fe_slave) {
  1491. tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
  1492. if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
  1493. return -ENODEV;
  1494. fe_slave->dvb = adap->fe_adap[0].fe->dvb;
  1495. fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
  1496. }
  1497. tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  1498. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
  1499. return -ENODEV;
  1500. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1501. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
  1502. return 0;
  1503. }
  1504. static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
  1505. {
  1506. struct dvb_frontend *fe_slave;
  1507. struct dib0700_adapter_state *state = adap->priv;
  1508. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1509. return -ENODEV;
  1510. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  1511. msleep(20);
  1512. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1513. msleep(1000);
  1514. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1515. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1516. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1517. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1518. dib0700_ctrl_clock(adap->dev, 72, 1);
  1519. msleep(20);
  1520. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1521. msleep(20);
  1522. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1523. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
  1524. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
  1525. if (adap->fe_adap[0].fe == NULL)
  1526. return -ENODEV;
  1527. /* Needed to increment refcount */
  1528. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1529. return -ENODEV;
  1530. fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
  1531. state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
  1532. return fe_slave == NULL ? -ENODEV : 0;
  1533. }
  1534. /* TFE8096P */
  1535. static struct dibx000_agc_config dib8096p_agc_config[2] = {
  1536. {
  1537. .band_caps = BAND_UHF,
  1538. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  1539. P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  1540. P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1541. P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  1542. P_agc_write=0 */
  1543. .setup = (0 << 15) | (0 << 14) | (5 << 11)
  1544. | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
  1545. | (0 << 4) | (5 << 1) | (0 << 0),
  1546. .inv_gain = 684,
  1547. .time_stabiliz = 10,
  1548. .alpha_level = 0,
  1549. .thlock = 118,
  1550. .wbd_inv = 0,
  1551. .wbd_ref = 1200,
  1552. .wbd_sel = 3,
  1553. .wbd_alpha = 5,
  1554. .agc1_max = 65535,
  1555. .agc1_min = 0,
  1556. .agc2_max = 32767,
  1557. .agc2_min = 0,
  1558. .agc1_pt1 = 0,
  1559. .agc1_pt2 = 0,
  1560. .agc1_pt3 = 105,
  1561. .agc1_slope1 = 0,
  1562. .agc1_slope2 = 156,
  1563. .agc2_pt1 = 105,
  1564. .agc2_pt2 = 255,
  1565. .agc2_slope1 = 54,
  1566. .agc2_slope2 = 0,
  1567. .alpha_mant = 28,
  1568. .alpha_exp = 26,
  1569. .beta_mant = 31,
  1570. .beta_exp = 51,
  1571. .perform_agc_softsplit = 0,
  1572. } , {
  1573. .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
  1574. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  1575. P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  1576. P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1577. P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  1578. P_agc_write=0 */
  1579. .setup = (0 << 15) | (0 << 14) | (5 << 11)
  1580. | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
  1581. | (0 << 4) | (5 << 1) | (0 << 0),
  1582. .inv_gain = 732,
  1583. .time_stabiliz = 10,
  1584. .alpha_level = 0,
  1585. .thlock = 118,
  1586. .wbd_inv = 0,
  1587. .wbd_ref = 1200,
  1588. .wbd_sel = 3,
  1589. .wbd_alpha = 5,
  1590. .agc1_max = 65535,
  1591. .agc1_min = 0,
  1592. .agc2_max = 32767,
  1593. .agc2_min = 0,
  1594. .agc1_pt1 = 0,
  1595. .agc1_pt2 = 0,
  1596. .agc1_pt3 = 98,
  1597. .agc1_slope1 = 0,
  1598. .agc1_slope2 = 167,
  1599. .agc2_pt1 = 98,
  1600. .agc2_pt2 = 255,
  1601. .agc2_slope1 = 52,
  1602. .agc2_slope2 = 0,
  1603. .alpha_mant = 28,
  1604. .alpha_exp = 26,
  1605. .beta_mant = 31,
  1606. .beta_exp = 51,
  1607. .perform_agc_softsplit = 0,
  1608. }
  1609. };
  1610. static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
  1611. .internal = 108000,
  1612. .sampling = 13500,
  1613. .pll_prediv = 1,
  1614. .pll_ratio = 9,
  1615. .pll_range = 1,
  1616. .pll_reset = 0,
  1617. .pll_bypass = 0,
  1618. .enable_refdiv = 0,
  1619. .bypclk_div = 0,
  1620. .IO_CLK_en_core = 0,
  1621. .ADClkSrc = 0,
  1622. .modulo = 2,
  1623. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  1624. .ifreq = (0 << 25) | 0,
  1625. .timf = 20199729,
  1626. .xtal_hz = 12000000,
  1627. };
  1628. static struct dib8000_config tfe8096p_dib8000_config = {
  1629. .output_mpeg2_in_188_bytes = 1,
  1630. .hostbus_diversity = 1,
  1631. .update_lna = NULL,
  1632. .agc_config_count = 2,
  1633. .agc = dib8096p_agc_config,
  1634. .pll = &dib8096p_clock_config_12_mhz,
  1635. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1636. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1637. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1638. .agc_control = NULL,
  1639. .diversity_delay = 48,
  1640. .output_mode = OUTMODE_MPEG2_FIFO,
  1641. .enMpegOutput = 1,
  1642. };
  1643. static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
  1644. { 380, 81, 850, 64, 540, 4},
  1645. { 860, 51, 866, 21, 375, 4},
  1646. {1700, 0, 250, 0, 100, 6},
  1647. {2600, 0, 250, 0, 100, 6},
  1648. { 0xFFFF, 0, 0, 0, 0, 0},
  1649. };
  1650. static struct dib0090_config tfe8096p_dib0090_config = {
  1651. .io.clock_khz = 12000,
  1652. .io.pll_bypass = 0,
  1653. .io.pll_range = 0,
  1654. .io.pll_prediv = 3,
  1655. .io.pll_loopdiv = 6,
  1656. .io.adc_clock_ratio = 0,
  1657. .io.pll_int_loop_filt = 0,
  1658. .freq_offset_khz_uhf = -143,
  1659. .freq_offset_khz_vhf = -143,
  1660. .get_adc_power = dib8090_get_adc_power,
  1661. .clkouttobamse = 1,
  1662. .analog_output = 0,
  1663. .wbd_vhf_offset = 0,
  1664. .wbd_cband_offset = 0,
  1665. .use_pwm_agc = 1,
  1666. .clkoutdrive = 0,
  1667. .fref_clock_ratio = 1,
  1668. .ls_cfg_pad_drv = 0,
  1669. .data_tx_drv = 0,
  1670. .low_if = NULL,
  1671. .in_soc = 1,
  1672. .force_cband_input = 0,
  1673. };
  1674. struct dibx090p_adc {
  1675. u32 freq; /* RF freq MHz */
  1676. u32 timf; /* New Timf */
  1677. u32 pll_loopdiv; /* New prediv */
  1678. u32 pll_prediv; /* New loopdiv */
  1679. };
  1680. struct dibx090p_best_adc {
  1681. u32 timf;
  1682. u32 pll_loopdiv;
  1683. u32 pll_prediv;
  1684. };
  1685. static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
  1686. {
  1687. u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
  1688. u16 xtal = 12000;
  1689. u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
  1690. u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
  1691. u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
  1692. u32 fdem_min = 66000;
  1693. u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
  1694. u32 harmonic_id = 0;
  1695. adc->timf = 0;
  1696. adc->pll_loopdiv = loopdiv;
  1697. adc->pll_prediv = prediv;
  1698. deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
  1699. /* Find Min and Max prediv */
  1700. while ((xtal / max_prediv) >= fcp_min)
  1701. max_prediv++;
  1702. max_prediv--;
  1703. min_prediv = max_prediv;
  1704. while ((xtal / min_prediv) <= fcp_max) {
  1705. min_prediv--;
  1706. if (min_prediv == 1)
  1707. break;
  1708. }
  1709. deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
  1710. min_prediv = 1;
  1711. for (prediv = min_prediv; prediv < max_prediv; prediv++) {
  1712. fcp = xtal / prediv;
  1713. if (fcp > fcp_min && fcp < fcp_max) {
  1714. for (loopdiv = 1; loopdiv < 64; loopdiv++) {
  1715. fmem = ((xtal/prediv) * loopdiv);
  1716. fdem = fmem / 2;
  1717. fs = fdem / 4;
  1718. /* test min/max system restrictions */
  1719. if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
  1720. spur = 0;
  1721. /* test fs harmonics positions */
  1722. for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
  1723. if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
  1724. spur = 1;
  1725. break;
  1726. }
  1727. }
  1728. if (!spur) {
  1729. adc->pll_loopdiv = loopdiv;
  1730. adc->pll_prediv = prediv;
  1731. adc->timf = (4260880253U / fdem) * (1 << 8);
  1732. adc->timf += ((4260880253U % fdem) << 8) / fdem;
  1733. deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
  1734. break;
  1735. }
  1736. }
  1737. }
  1738. }
  1739. if (!spur)
  1740. break;
  1741. }
  1742. if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
  1743. return -EINVAL;
  1744. return 0;
  1745. }
  1746. static int dib8096p_agc_startup(struct dvb_frontend *fe)
  1747. {
  1748. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1749. struct dib0700_adapter_state *state = adap->priv;
  1750. struct dibx000_bandwidth_config pll;
  1751. struct dibx090p_best_adc adc;
  1752. u16 target;
  1753. int ret;
  1754. ret = state->set_param_save(fe);
  1755. if (ret < 0)
  1756. return ret;
  1757. memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
  1758. dib0090_pwm_gain_reset(fe);
  1759. /* dib0090_get_wbd_target is returning any possible
  1760. temperature compensated wbd-target */
  1761. target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
  1762. state->dib8000_ops.set_wbd_ref(fe, target);
  1763. if (dib8096p_get_best_sampling(fe, &adc) == 0) {
  1764. pll.pll_ratio = adc.pll_loopdiv;
  1765. pll.pll_prediv = adc.pll_prediv;
  1766. dib0700_set_i2c_speed(adap->dev, 200);
  1767. state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
  1768. state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
  1769. dib0700_set_i2c_speed(adap->dev, 1000);
  1770. }
  1771. return 0;
  1772. }
  1773. static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
  1774. {
  1775. struct dib0700_state *st = adap->dev->priv;
  1776. u32 fw_version;
  1777. struct dib0700_adapter_state *state = adap->priv;
  1778. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1779. return -ENODEV;
  1780. dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
  1781. if (fw_version >= 0x10200)
  1782. st->fw_use_new_i2c_api = 1;
  1783. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1784. msleep(20);
  1785. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1786. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1787. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1788. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1789. dib0700_ctrl_clock(adap->dev, 72, 1);
  1790. msleep(20);
  1791. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1792. msleep(20);
  1793. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1794. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
  1795. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
  1796. 0x80, &tfe8096p_dib8000_config);
  1797. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1798. }
  1799. static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
  1800. {
  1801. struct dib0700_adapter_state *st = adap->priv;
  1802. struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  1803. tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
  1804. tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
  1805. tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
  1806. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
  1807. &tfe8096p_dib0090_config) == NULL)
  1808. return -ENODEV;
  1809. st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  1810. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1811. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
  1812. return 0;
  1813. }
  1814. /* STK9090M */
  1815. static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
  1816. {
  1817. return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  1818. }
  1819. static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
  1820. {
  1821. return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  1822. }
  1823. static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
  1824. {
  1825. return dib9000_set_gpio(fe, 5, 0, !onoff);
  1826. }
  1827. static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
  1828. {
  1829. return dib9000_set_gpio(fe, 0, 0, onoff);
  1830. }
  1831. static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
  1832. {
  1833. u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
  1834. u8 rb[2];
  1835. struct i2c_msg msg[2] = {
  1836. {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
  1837. {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
  1838. };
  1839. u8 index_data;
  1840. dibx000_i2c_set_speed(i2c, 250);
  1841. if (i2c_transfer(i2c, msg, 2) != 2)
  1842. return -EIO;
  1843. switch (rb[0] << 8 | rb[1]) {
  1844. case 0:
  1845. deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
  1846. return -EIO;
  1847. case 1:
  1848. deb_info("Found DiB0170 rev2");
  1849. break;
  1850. case 2:
  1851. deb_info("Found DiB0190 rev2");
  1852. break;
  1853. default:
  1854. deb_info("DiB01x0 not found");
  1855. return -EIO;
  1856. }
  1857. for (index_data = 0; index_data < len; index_data += 2) {
  1858. wb[2] = (data[index_data + 1] >> 8) & 0xff;
  1859. wb[3] = (data[index_data + 1]) & 0xff;
  1860. if (data[index_data] == 0) {
  1861. wb[0] = (data[index_data] >> 8) & 0xff;
  1862. wb[1] = (data[index_data]) & 0xff;
  1863. msg[0].len = 2;
  1864. if (i2c_transfer(i2c, msg, 2) != 2)
  1865. return -EIO;
  1866. wb[2] |= rb[0];
  1867. wb[3] |= rb[1] & ~(3 << 4);
  1868. }
  1869. wb[0] = (data[index_data] >> 8)&0xff;
  1870. wb[1] = (data[index_data])&0xff;
  1871. msg[0].len = 4;
  1872. if (i2c_transfer(i2c, &msg[0], 1) != 1)
  1873. return -EIO;
  1874. }
  1875. return 0;
  1876. }
  1877. static struct dib9000_config stk9090m_config = {
  1878. .output_mpeg2_in_188_bytes = 1,
  1879. .output_mode = OUTMODE_MPEG2_FIFO,
  1880. .vcxo_timer = 279620,
  1881. .timing_frequency = 20452225,
  1882. .demod_clock_khz = 60000,
  1883. .xtal_clock_khz = 30000,
  1884. .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
  1885. .subband = {
  1886. 2,
  1887. {
  1888. { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
  1889. { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
  1890. { 0 },
  1891. },
  1892. },
  1893. .gpio_function = {
  1894. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
  1895. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
  1896. },
  1897. };
  1898. static struct dib9000_config nim9090md_config[2] = {
  1899. {
  1900. .output_mpeg2_in_188_bytes = 1,
  1901. .output_mode = OUTMODE_MPEG2_FIFO,
  1902. .vcxo_timer = 279620,
  1903. .timing_frequency = 20452225,
  1904. .demod_clock_khz = 60000,
  1905. .xtal_clock_khz = 30000,
  1906. .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
  1907. }, {
  1908. .output_mpeg2_in_188_bytes = 1,
  1909. .output_mode = OUTMODE_DIVERSITY,
  1910. .vcxo_timer = 279620,
  1911. .timing_frequency = 20452225,
  1912. .demod_clock_khz = 60000,
  1913. .xtal_clock_khz = 30000,
  1914. .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
  1915. .subband = {
  1916. 2,
  1917. {
  1918. { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
  1919. { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
  1920. { 0 },
  1921. },
  1922. },
  1923. .gpio_function = {
  1924. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
  1925. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
  1926. },
  1927. }
  1928. };
  1929. static struct dib0090_config dib9090_dib0090_config = {
  1930. .io.pll_bypass = 0,
  1931. .io.pll_range = 1,
  1932. .io.pll_prediv = 1,
  1933. .io.pll_loopdiv = 8,
  1934. .io.adc_clock_ratio = 8,
  1935. .io.pll_int_loop_filt = 0,
  1936. .io.clock_khz = 30000,
  1937. .reset = dib90x0_tuner_reset,
  1938. .sleep = dib90x0_tuner_sleep,
  1939. .clkouttobamse = 0,
  1940. .analog_output = 0,
  1941. .use_pwm_agc = 0,
  1942. .clkoutdrive = 0,
  1943. .freq_offset_khz_uhf = 0,
  1944. .freq_offset_khz_vhf = 0,
  1945. };
  1946. static struct dib0090_config nim9090md_dib0090_config[2] = {
  1947. {
  1948. .io.pll_bypass = 0,
  1949. .io.pll_range = 1,
  1950. .io.pll_prediv = 1,
  1951. .io.pll_loopdiv = 8,
  1952. .io.adc_clock_ratio = 8,
  1953. .io.pll_int_loop_filt = 0,
  1954. .io.clock_khz = 30000,
  1955. .reset = dib90x0_tuner_reset,
  1956. .sleep = dib90x0_tuner_sleep,
  1957. .clkouttobamse = 1,
  1958. .analog_output = 0,
  1959. .use_pwm_agc = 0,
  1960. .clkoutdrive = 0,
  1961. .freq_offset_khz_uhf = 0,
  1962. .freq_offset_khz_vhf = 0,
  1963. }, {
  1964. .io.pll_bypass = 0,
  1965. .io.pll_range = 1,
  1966. .io.pll_prediv = 1,
  1967. .io.pll_loopdiv = 8,
  1968. .io.adc_clock_ratio = 8,
  1969. .io.pll_int_loop_filt = 0,
  1970. .io.clock_khz = 30000,
  1971. .reset = dib90x0_tuner_reset,
  1972. .sleep = dib90x0_tuner_sleep,
  1973. .clkouttobamse = 0,
  1974. .analog_output = 0,
  1975. .use_pwm_agc = 0,
  1976. .clkoutdrive = 0,
  1977. .freq_offset_khz_uhf = 0,
  1978. .freq_offset_khz_vhf = 0,
  1979. }
  1980. };
  1981. static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
  1982. {
  1983. struct dib0700_adapter_state *state = adap->priv;
  1984. struct dib0700_state *st = adap->dev->priv;
  1985. u32 fw_version;
  1986. /* Make use of the new i2c functions from FW 1.20 */
  1987. dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
  1988. if (fw_version >= 0x10200)
  1989. st->fw_use_new_i2c_api = 1;
  1990. dib0700_set_i2c_speed(adap->dev, 340);
  1991. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1992. msleep(20);
  1993. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1994. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1995. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1996. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1997. dib0700_ctrl_clock(adap->dev, 72, 1);
  1998. msleep(20);
  1999. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2000. msleep(20);
  2001. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2002. dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
  2003. if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
  2004. deb_info("%s: Upload failed. (file not found?)\n", __func__);
  2005. return -ENODEV;
  2006. } else {
  2007. deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
  2008. }
  2009. stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
  2010. stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
  2011. adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
  2012. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2013. }
  2014. static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
  2015. {
  2016. struct dib0700_adapter_state *state = adap->priv;
  2017. struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
  2018. u16 data_dib190[10] = {
  2019. 1, 0x1374,
  2020. 2, 0x01a2,
  2021. 7, 0x0020,
  2022. 0, 0x00ef,
  2023. 8, 0x0486,
  2024. };
  2025. if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
  2026. return -ENODEV;
  2027. i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
  2028. if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
  2029. return -ENODEV;
  2030. dib0700_set_i2c_speed(adap->dev, 1500);
  2031. if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
  2032. return -ENODEV;
  2033. release_firmware(state->frontend_firmware);
  2034. return 0;
  2035. }
  2036. static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
  2037. {
  2038. struct dib0700_adapter_state *state = adap->priv;
  2039. struct dib0700_state *st = adap->dev->priv;
  2040. struct i2c_adapter *i2c;
  2041. struct dvb_frontend *fe_slave;
  2042. u32 fw_version;
  2043. /* Make use of the new i2c functions from FW 1.20 */
  2044. dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
  2045. if (fw_version >= 0x10200)
  2046. st->fw_use_new_i2c_api = 1;
  2047. dib0700_set_i2c_speed(adap->dev, 340);
  2048. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2049. msleep(20);
  2050. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2051. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2052. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2053. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2054. dib0700_ctrl_clock(adap->dev, 72, 1);
  2055. msleep(20);
  2056. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2057. msleep(20);
  2058. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2059. if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
  2060. deb_info("%s: Upload failed. (file not found?)\n", __func__);
  2061. return -EIO;
  2062. } else {
  2063. deb_info("%s: firmware read %Zu bytes.\n", __func__, state->frontend_firmware->size);
  2064. }
  2065. nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
  2066. nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
  2067. nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
  2068. nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
  2069. dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
  2070. adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
  2071. if (adap->fe_adap[0].fe == NULL)
  2072. return -ENODEV;
  2073. i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
  2074. dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
  2075. fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
  2076. dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
  2077. return fe_slave == NULL ? -ENODEV : 0;
  2078. }
  2079. static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
  2080. {
  2081. struct dib0700_adapter_state *state = adap->priv;
  2082. struct i2c_adapter *i2c;
  2083. struct dvb_frontend *fe_slave;
  2084. u16 data_dib190[10] = {
  2085. 1, 0x5374,
  2086. 2, 0x01ae,
  2087. 7, 0x0020,
  2088. 0, 0x00ef,
  2089. 8, 0x0406,
  2090. };
  2091. i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
  2092. if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
  2093. return -ENODEV;
  2094. i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
  2095. if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
  2096. return -ENODEV;
  2097. dib0700_set_i2c_speed(adap->dev, 1500);
  2098. if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
  2099. return -ENODEV;
  2100. fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
  2101. if (fe_slave != NULL) {
  2102. i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
  2103. dib9000_set_i2c_adapter(fe_slave, i2c);
  2104. i2c = dib9000_get_tuner_interface(fe_slave);
  2105. if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
  2106. return -ENODEV;
  2107. fe_slave->dvb = adap->fe_adap[0].fe->dvb;
  2108. dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
  2109. if (dib9000_firmware_post_pll_init(fe_slave) < 0)
  2110. return -ENODEV;
  2111. }
  2112. release_firmware(state->frontend_firmware);
  2113. return 0;
  2114. }
  2115. /* NIM7090 */
  2116. static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
  2117. {
  2118. u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
  2119. u16 xtal = 12000;
  2120. u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
  2121. u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
  2122. u32 fdem_max = 76000;
  2123. u32 fdem_min = 69500;
  2124. u32 fcp = 0, fs = 0, fdem = 0;
  2125. u32 harmonic_id = 0;
  2126. adc->pll_loopdiv = loopdiv;
  2127. adc->pll_prediv = prediv;
  2128. adc->timf = 0;
  2129. deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
  2130. /* Find Min and Max prediv */
  2131. while ((xtal/max_prediv) >= fcp_min)
  2132. max_prediv++;
  2133. max_prediv--;
  2134. min_prediv = max_prediv;
  2135. while ((xtal/min_prediv) <= fcp_max) {
  2136. min_prediv--;
  2137. if (min_prediv == 1)
  2138. break;
  2139. }
  2140. deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
  2141. min_prediv = 2;
  2142. for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
  2143. fcp = xtal / prediv;
  2144. if (fcp > fcp_min && fcp < fcp_max) {
  2145. for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
  2146. fdem = ((xtal/prediv) * loopdiv);
  2147. fs = fdem / 4;
  2148. /* test min/max system restrictions */
  2149. if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
  2150. spur = 0;
  2151. /* test fs harmonics positions */
  2152. for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
  2153. if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
  2154. spur = 1;
  2155. break;
  2156. }
  2157. }
  2158. if (!spur) {
  2159. adc->pll_loopdiv = loopdiv;
  2160. adc->pll_prediv = prediv;
  2161. adc->timf = 2396745143UL/fdem*(1 << 9);
  2162. adc->timf += ((2396745143UL%fdem) << 9)/fdem;
  2163. deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
  2164. break;
  2165. }
  2166. }
  2167. }
  2168. }
  2169. if (!spur)
  2170. break;
  2171. }
  2172. if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
  2173. return -EINVAL;
  2174. else
  2175. return 0;
  2176. }
  2177. static int dib7090_agc_startup(struct dvb_frontend *fe)
  2178. {
  2179. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2180. struct dib0700_adapter_state *state = adap->priv;
  2181. struct dibx000_bandwidth_config pll;
  2182. u16 target;
  2183. struct dibx090p_best_adc adc;
  2184. int ret;
  2185. ret = state->set_param_save(fe);
  2186. if (ret < 0)
  2187. return ret;
  2188. memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
  2189. dib0090_pwm_gain_reset(fe);
  2190. target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
  2191. state->dib7000p_ops.set_wbd_ref(fe, target);
  2192. if (dib7090p_get_best_sampling(fe, &adc) == 0) {
  2193. pll.pll_ratio = adc.pll_loopdiv;
  2194. pll.pll_prediv = adc.pll_prediv;
  2195. state->dib7000p_ops.update_pll(fe, &pll);
  2196. state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
  2197. }
  2198. return 0;
  2199. }
  2200. static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
  2201. {
  2202. deb_info("AGC restart callback: %d", restart);
  2203. if (restart == 0) /* before AGC startup */
  2204. dib0090_set_dc_servo(fe, 1);
  2205. return 0;
  2206. }
  2207. static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
  2208. {
  2209. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2210. struct dib0700_adapter_state *state = adap->priv;
  2211. deb_info("update LNA: agc global=%i", agc_global);
  2212. if (agc_global < 25000) {
  2213. state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
  2214. state->dib7000p_ops.set_agc1_min(fe, 0);
  2215. } else {
  2216. state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
  2217. state->dib7000p_ops.set_agc1_min(fe, 32768);
  2218. }
  2219. return 0;
  2220. }
  2221. static struct dib0090_wbd_slope dib7090_wbd_table[] = {
  2222. { 380, 81, 850, 64, 540, 4},
  2223. { 860, 51, 866, 21, 375, 4},
  2224. {1700, 0, 250, 0, 100, 6},
  2225. {2600, 0, 250, 0, 100, 6},
  2226. { 0xFFFF, 0, 0, 0, 0, 0},
  2227. };
  2228. static struct dibx000_agc_config dib7090_agc_config[2] = {
  2229. {
  2230. .band_caps = BAND_UHF,
  2231. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  2232. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  2233. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  2234. .inv_gain = 687,
  2235. .time_stabiliz = 10,
  2236. .alpha_level = 0,
  2237. .thlock = 118,
  2238. .wbd_inv = 0,
  2239. .wbd_ref = 1200,
  2240. .wbd_sel = 3,
  2241. .wbd_alpha = 5,
  2242. .agc1_max = 65535,
  2243. .agc1_min = 32768,
  2244. .agc2_max = 65535,
  2245. .agc2_min = 0,
  2246. .agc1_pt1 = 0,
  2247. .agc1_pt2 = 32,
  2248. .agc1_pt3 = 114,
  2249. .agc1_slope1 = 143,
  2250. .agc1_slope2 = 144,
  2251. .agc2_pt1 = 114,
  2252. .agc2_pt2 = 227,
  2253. .agc2_slope1 = 116,
  2254. .agc2_slope2 = 117,
  2255. .alpha_mant = 18,
  2256. .alpha_exp = 0,
  2257. .beta_mant = 20,
  2258. .beta_exp = 59,
  2259. .perform_agc_softsplit = 0,
  2260. } , {
  2261. .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
  2262. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  2263. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  2264. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  2265. .inv_gain = 732,
  2266. .time_stabiliz = 10,
  2267. .alpha_level = 0,
  2268. .thlock = 118,
  2269. .wbd_inv = 0,
  2270. .wbd_ref = 1200,
  2271. .wbd_sel = 3,
  2272. .wbd_alpha = 5,
  2273. .agc1_max = 65535,
  2274. .agc1_min = 0,
  2275. .agc2_max = 65535,
  2276. .agc2_min = 0,
  2277. .agc1_pt1 = 0,
  2278. .agc1_pt2 = 0,
  2279. .agc1_pt3 = 98,
  2280. .agc1_slope1 = 0,
  2281. .agc1_slope2 = 167,
  2282. .agc2_pt1 = 98,
  2283. .agc2_pt2 = 255,
  2284. .agc2_slope1 = 104,
  2285. .agc2_slope2 = 0,
  2286. .alpha_mant = 18,
  2287. .alpha_exp = 0,
  2288. .beta_mant = 20,
  2289. .beta_exp = 59,
  2290. .perform_agc_softsplit = 0,
  2291. }
  2292. };
  2293. static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
  2294. .internal = 60000,
  2295. .sampling = 15000,
  2296. .pll_prediv = 1,
  2297. .pll_ratio = 5,
  2298. .pll_range = 0,
  2299. .pll_reset = 0,
  2300. .pll_bypass = 0,
  2301. .enable_refdiv = 0,
  2302. .bypclk_div = 0,
  2303. .IO_CLK_en_core = 1,
  2304. .ADClkSrc = 1,
  2305. .modulo = 2,
  2306. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  2307. .ifreq = (0 << 25) | 0,
  2308. .timf = 20452225,
  2309. .xtal_hz = 15000000,
  2310. };
  2311. static struct dib7000p_config nim7090_dib7000p_config = {
  2312. .output_mpeg2_in_188_bytes = 1,
  2313. .hostbus_diversity = 1,
  2314. .tuner_is_baseband = 1,
  2315. .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
  2316. .agc_config_count = 2,
  2317. .agc = dib7090_agc_config,
  2318. .bw = &dib7090_clock_config_12_mhz,
  2319. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2320. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2321. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2322. .pwm_freq_div = 0,
  2323. .agc_control = dib7090_agc_restart,
  2324. .spur_protect = 0,
  2325. .disable_sample_and_hold = 0,
  2326. .enable_current_mirror = 0,
  2327. .diversity_delay = 0,
  2328. .output_mode = OUTMODE_MPEG2_FIFO,
  2329. .enMpegOutput = 1,
  2330. };
  2331. static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
  2332. {
  2333. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2334. struct dib0700_adapter_state *state = adap->priv;
  2335. deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
  2336. if (agc_global < 25000) {
  2337. state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
  2338. state->dib7000p_ops.set_agc1_min(fe, 0);
  2339. } else {
  2340. state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
  2341. state->dib7000p_ops.set_agc1_min(fe, 32768);
  2342. }
  2343. return 0;
  2344. }
  2345. static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
  2346. {
  2347. .output_mpeg2_in_188_bytes = 1,
  2348. .hostbus_diversity = 1,
  2349. .tuner_is_baseband = 1,
  2350. .update_lna = tfe7090p_pvr_update_lna,
  2351. .agc_config_count = 2,
  2352. .agc = dib7090_agc_config,
  2353. .bw = &dib7090_clock_config_12_mhz,
  2354. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2355. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2356. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2357. .pwm_freq_div = 0,
  2358. .agc_control = dib7090_agc_restart,
  2359. .spur_protect = 0,
  2360. .disable_sample_and_hold = 0,
  2361. .enable_current_mirror = 0,
  2362. .diversity_delay = 0,
  2363. .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
  2364. .default_i2c_addr = 0x90,
  2365. .enMpegOutput = 1,
  2366. }, {
  2367. .output_mpeg2_in_188_bytes = 1,
  2368. .hostbus_diversity = 1,
  2369. .tuner_is_baseband = 1,
  2370. .update_lna = tfe7090p_pvr_update_lna,
  2371. .agc_config_count = 2,
  2372. .agc = dib7090_agc_config,
  2373. .bw = &dib7090_clock_config_12_mhz,
  2374. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2375. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2376. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2377. .pwm_freq_div = 0,
  2378. .agc_control = dib7090_agc_restart,
  2379. .spur_protect = 0,
  2380. .disable_sample_and_hold = 0,
  2381. .enable_current_mirror = 0,
  2382. .diversity_delay = 0,
  2383. .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
  2384. .default_i2c_addr = 0x92,
  2385. .enMpegOutput = 0,
  2386. }
  2387. };
  2388. static struct dib0090_config nim7090_dib0090_config = {
  2389. .io.clock_khz = 12000,
  2390. .io.pll_bypass = 0,
  2391. .io.pll_range = 0,
  2392. .io.pll_prediv = 3,
  2393. .io.pll_loopdiv = 6,
  2394. .io.adc_clock_ratio = 0,
  2395. .io.pll_int_loop_filt = 0,
  2396. .freq_offset_khz_uhf = 0,
  2397. .freq_offset_khz_vhf = 0,
  2398. .clkouttobamse = 1,
  2399. .analog_output = 0,
  2400. .wbd_vhf_offset = 0,
  2401. .wbd_cband_offset = 0,
  2402. .use_pwm_agc = 1,
  2403. .clkoutdrive = 0,
  2404. .fref_clock_ratio = 0,
  2405. .wbd = dib7090_wbd_table,
  2406. .ls_cfg_pad_drv = 0,
  2407. .data_tx_drv = 0,
  2408. .low_if = NULL,
  2409. .in_soc = 1,
  2410. };
  2411. static struct dib7000p_config tfe7790p_dib7000p_config = {
  2412. .output_mpeg2_in_188_bytes = 1,
  2413. .hostbus_diversity = 1,
  2414. .tuner_is_baseband = 1,
  2415. .update_lna = tfe7790p_update_lna,
  2416. .agc_config_count = 2,
  2417. .agc = dib7090_agc_config,
  2418. .bw = &dib7090_clock_config_12_mhz,
  2419. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2420. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2421. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2422. .pwm_freq_div = 0,
  2423. .agc_control = dib7090_agc_restart,
  2424. .spur_protect = 0,
  2425. .disable_sample_and_hold = 0,
  2426. .enable_current_mirror = 0,
  2427. .diversity_delay = 0,
  2428. .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
  2429. .enMpegOutput = 1,
  2430. };
  2431. static struct dib0090_config tfe7790p_dib0090_config = {
  2432. .io.clock_khz = 12000,
  2433. .io.pll_bypass = 0,
  2434. .io.pll_range = 0,
  2435. .io.pll_prediv = 3,
  2436. .io.pll_loopdiv = 6,
  2437. .io.adc_clock_ratio = 0,
  2438. .io.pll_int_loop_filt = 0,
  2439. .freq_offset_khz_uhf = 0,
  2440. .freq_offset_khz_vhf = 0,
  2441. .clkouttobamse = 1,
  2442. .analog_output = 0,
  2443. .wbd_vhf_offset = 0,
  2444. .wbd_cband_offset = 0,
  2445. .use_pwm_agc = 1,
  2446. .clkoutdrive = 0,
  2447. .fref_clock_ratio = 0,
  2448. .wbd = dib7090_wbd_table,
  2449. .ls_cfg_pad_drv = 0,
  2450. .data_tx_drv = 0,
  2451. .low_if = NULL,
  2452. .in_soc = 1,
  2453. .force_cband_input = 0,
  2454. .is_dib7090e = 0,
  2455. .force_crystal_mode = 1,
  2456. };
  2457. static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
  2458. {
  2459. .io.clock_khz = 12000,
  2460. .io.pll_bypass = 0,
  2461. .io.pll_range = 0,
  2462. .io.pll_prediv = 3,
  2463. .io.pll_loopdiv = 6,
  2464. .io.adc_clock_ratio = 0,
  2465. .io.pll_int_loop_filt = 0,
  2466. .freq_offset_khz_uhf = 50,
  2467. .freq_offset_khz_vhf = 70,
  2468. .clkouttobamse = 1,
  2469. .analog_output = 0,
  2470. .wbd_vhf_offset = 0,
  2471. .wbd_cband_offset = 0,
  2472. .use_pwm_agc = 1,
  2473. .clkoutdrive = 0,
  2474. .fref_clock_ratio = 0,
  2475. .wbd = dib7090_wbd_table,
  2476. .ls_cfg_pad_drv = 0,
  2477. .data_tx_drv = 0,
  2478. .low_if = NULL,
  2479. .in_soc = 1,
  2480. }, {
  2481. .io.clock_khz = 12000,
  2482. .io.pll_bypass = 0,
  2483. .io.pll_range = 0,
  2484. .io.pll_prediv = 3,
  2485. .io.pll_loopdiv = 6,
  2486. .io.adc_clock_ratio = 0,
  2487. .io.pll_int_loop_filt = 0,
  2488. .freq_offset_khz_uhf = -50,
  2489. .freq_offset_khz_vhf = -70,
  2490. .clkouttobamse = 1,
  2491. .analog_output = 0,
  2492. .wbd_vhf_offset = 0,
  2493. .wbd_cband_offset = 0,
  2494. .use_pwm_agc = 1,
  2495. .clkoutdrive = 0,
  2496. .fref_clock_ratio = 0,
  2497. .wbd = dib7090_wbd_table,
  2498. .ls_cfg_pad_drv = 0,
  2499. .data_tx_drv = 0,
  2500. .low_if = NULL,
  2501. .in_soc = 1,
  2502. }
  2503. };
  2504. static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
  2505. {
  2506. struct dib0700_adapter_state *state = adap->priv;
  2507. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2508. return -ENODEV;
  2509. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2510. msleep(20);
  2511. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2512. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2513. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2514. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2515. msleep(20);
  2516. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2517. msleep(20);
  2518. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2519. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
  2520. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  2521. dvb_detach(&state->dib7000p_ops);
  2522. return -ENODEV;
  2523. }
  2524. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
  2525. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2526. }
  2527. static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
  2528. {
  2529. struct dib0700_adapter_state *st = adap->priv;
  2530. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2531. nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep,
  2532. nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep,
  2533. nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
  2534. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
  2535. return -ENODEV;
  2536. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2537. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2538. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2539. return 0;
  2540. }
  2541. static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
  2542. {
  2543. struct dib0700_state *st = adap->dev->priv;
  2544. struct dib0700_adapter_state *state = adap->priv;
  2545. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2546. return -ENODEV;
  2547. /* The TFE7090 requires the dib0700 to not be in master mode */
  2548. st->disable_streaming_master_mode = 1;
  2549. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2550. msleep(20);
  2551. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2552. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2553. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2554. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2555. msleep(20);
  2556. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2557. msleep(20);
  2558. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2559. /* initialize IC 0 */
  2560. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
  2561. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  2562. dvb_detach(&state->dib7000p_ops);
  2563. return -ENODEV;
  2564. }
  2565. dib0700_set_i2c_speed(adap->dev, 340);
  2566. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
  2567. if (adap->fe_adap[0].fe == NULL)
  2568. return -ENODEV;
  2569. state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
  2570. return 0;
  2571. }
  2572. static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
  2573. {
  2574. struct i2c_adapter *i2c;
  2575. struct dib0700_adapter_state *state = adap->priv;
  2576. if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
  2577. err("the master dib7090 has to be initialized first");
  2578. return -ENODEV; /* the master device has not been initialized */
  2579. }
  2580. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2581. return -ENODEV;
  2582. i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
  2583. if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
  2584. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  2585. dvb_detach(&state->dib7000p_ops);
  2586. return -ENODEV;
  2587. }
  2588. adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
  2589. dib0700_set_i2c_speed(adap->dev, 200);
  2590. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2591. }
  2592. static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
  2593. {
  2594. struct dib0700_adapter_state *st = adap->priv;
  2595. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2596. tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
  2597. tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
  2598. tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
  2599. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
  2600. return -ENODEV;
  2601. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2602. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2603. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2604. return 0;
  2605. }
  2606. static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
  2607. {
  2608. struct dib0700_adapter_state *st = adap->priv;
  2609. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2610. tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
  2611. tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
  2612. tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
  2613. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
  2614. return -ENODEV;
  2615. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2616. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2617. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2618. return 0;
  2619. }
  2620. static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
  2621. {
  2622. struct dib0700_state *st = adap->dev->priv;
  2623. struct dib0700_adapter_state *state = adap->priv;
  2624. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2625. return -ENODEV;
  2626. /* The TFE7790P requires the dib0700 to not be in master mode */
  2627. st->disable_streaming_master_mode = 1;
  2628. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2629. msleep(20);
  2630. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2631. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2632. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2633. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2634. msleep(20);
  2635. dib0700_ctrl_clock(adap->dev, 72, 1);
  2636. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2637. msleep(20);
  2638. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2639. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
  2640. 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
  2641. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  2642. __func__);
  2643. dvb_detach(&state->dib7000p_ops);
  2644. return -ENODEV;
  2645. }
  2646. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
  2647. 0x80, &tfe7790p_dib7000p_config);
  2648. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2649. }
  2650. static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
  2651. {
  2652. struct dib0700_adapter_state *st = adap->priv;
  2653. struct i2c_adapter *tun_i2c =
  2654. st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2655. tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
  2656. tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
  2657. tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
  2658. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
  2659. &tfe7790p_dib0090_config) == NULL)
  2660. return -ENODEV;
  2661. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2662. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2663. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2664. return 0;
  2665. }
  2666. /* STK7070PD */
  2667. static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
  2668. {
  2669. .output_mpeg2_in_188_bytes = 1,
  2670. .agc_config_count = 1,
  2671. .agc = &dib7070_agc_config,
  2672. .bw = &dib7070_bw_config_12_mhz,
  2673. .tuner_is_baseband = 1,
  2674. .spur_protect = 1,
  2675. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2676. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2677. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2678. .hostbus_diversity = 1,
  2679. }, {
  2680. .output_mpeg2_in_188_bytes = 1,
  2681. .agc_config_count = 1,
  2682. .agc = &dib7070_agc_config,
  2683. .bw = &dib7070_bw_config_12_mhz,
  2684. .tuner_is_baseband = 1,
  2685. .spur_protect = 1,
  2686. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2687. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2688. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2689. .hostbus_diversity = 1,
  2690. }
  2691. };
  2692. static void stk7070pd_init(struct dvb_usb_device *dev)
  2693. {
  2694. dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
  2695. msleep(10);
  2696. dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
  2697. dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
  2698. dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
  2699. dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
  2700. dib0700_ctrl_clock(dev, 72, 1);
  2701. msleep(10);
  2702. dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
  2703. }
  2704. static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
  2705. {
  2706. struct dib0700_adapter_state *state = adap->priv;
  2707. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2708. return -ENODEV;
  2709. stk7070pd_init(adap->dev);
  2710. msleep(10);
  2711. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2712. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
  2713. stk7070pd_dib7000p_config) != 0) {
  2714. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  2715. __func__);
  2716. dvb_detach(&state->dib7000p_ops);
  2717. return -ENODEV;
  2718. }
  2719. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
  2720. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2721. }
  2722. static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
  2723. {
  2724. struct dib0700_adapter_state *state = adap->priv;
  2725. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2726. return -ENODEV;
  2727. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
  2728. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2729. }
  2730. static int novatd_read_status_override(struct dvb_frontend *fe,
  2731. fe_status_t *stat)
  2732. {
  2733. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2734. struct dvb_usb_device *dev = adap->dev;
  2735. struct dib0700_state *state = dev->priv;
  2736. int ret;
  2737. ret = state->read_status(fe, stat);
  2738. if (!ret)
  2739. dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
  2740. !!(*stat & FE_HAS_LOCK));
  2741. return ret;
  2742. }
  2743. static int novatd_sleep_override(struct dvb_frontend* fe)
  2744. {
  2745. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2746. struct dvb_usb_device *dev = adap->dev;
  2747. struct dib0700_state *state = dev->priv;
  2748. /* turn off LED */
  2749. dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
  2750. return state->sleep(fe);
  2751. }
  2752. /**
  2753. * novatd_frontend_attach - Nova-TD specific attach
  2754. *
  2755. * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
  2756. * information purposes.
  2757. */
  2758. static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
  2759. {
  2760. struct dvb_usb_device *dev = adap->dev;
  2761. struct dib0700_state *st = dev->priv;
  2762. struct dib0700_adapter_state *state = adap->priv;
  2763. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2764. return -ENODEV;
  2765. if (adap->id == 0) {
  2766. stk7070pd_init(dev);
  2767. /* turn the power LED on, the other two off (just in case) */
  2768. dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
  2769. dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
  2770. dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
  2771. if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
  2772. stk7070pd_dib7000p_config) != 0) {
  2773. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  2774. __func__);
  2775. dvb_detach(&state->dib7000p_ops);
  2776. return -ENODEV;
  2777. }
  2778. }
  2779. adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
  2780. adap->id == 0 ? 0x80 : 0x82,
  2781. &stk7070pd_dib7000p_config[adap->id]);
  2782. if (adap->fe_adap[0].fe == NULL)
  2783. return -ENODEV;
  2784. st->read_status = adap->fe_adap[0].fe->ops.read_status;
  2785. adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
  2786. st->sleep = adap->fe_adap[0].fe->ops.sleep;
  2787. adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
  2788. return 0;
  2789. }
  2790. /* S5H1411 */
  2791. static struct s5h1411_config pinnacle_801e_config = {
  2792. .output_mode = S5H1411_PARALLEL_OUTPUT,
  2793. .gpio = S5H1411_GPIO_OFF,
  2794. .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  2795. .qam_if = S5H1411_IF_44000,
  2796. .vsb_if = S5H1411_IF_44000,
  2797. .inversion = S5H1411_INVERSION_OFF,
  2798. .status_mode = S5H1411_DEMODLOCKING
  2799. };
  2800. /* Pinnacle PCTV HD Pro 801e GPIOs map:
  2801. GPIO0 - currently unknown
  2802. GPIO1 - xc5000 tuner reset
  2803. GPIO2 - CX25843 sleep
  2804. GPIO3 - currently unknown
  2805. GPIO4 - currently unknown
  2806. GPIO6 - currently unknown
  2807. GPIO7 - currently unknown
  2808. GPIO9 - currently unknown
  2809. GPIO10 - CX25843 reset
  2810. */
  2811. static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
  2812. {
  2813. struct dib0700_state *st = adap->dev->priv;
  2814. /* Make use of the new i2c functions from FW 1.20 */
  2815. st->fw_use_new_i2c_api = 1;
  2816. /* The s5h1411 requires the dib0700 to not be in master mode */
  2817. st->disable_streaming_master_mode = 1;
  2818. /* All msleep values taken from Windows USB trace */
  2819. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
  2820. dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
  2821. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2822. msleep(400);
  2823. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2824. msleep(60);
  2825. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2826. msleep(30);
  2827. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2828. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2829. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2830. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2831. dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
  2832. msleep(30);
  2833. /* Put the CX25843 to sleep for now since we're in digital mode */
  2834. dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
  2835. /* GPIOs are initialized, do the attach */
  2836. adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
  2837. &adap->dev->i2c_adap);
  2838. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2839. }
  2840. static int dib0700_xc5000_tuner_callback(void *priv, int component,
  2841. int command, int arg)
  2842. {
  2843. struct dvb_usb_adapter *adap = priv;
  2844. if (command == XC5000_TUNER_RESET) {
  2845. /* Reset the tuner */
  2846. dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
  2847. msleep(10);
  2848. dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
  2849. msleep(10);
  2850. } else {
  2851. err("xc5000: unknown tuner callback command: %d\n", command);
  2852. return -EINVAL;
  2853. }
  2854. return 0;
  2855. }
  2856. static struct xc5000_config s5h1411_xc5000_tunerconfig = {
  2857. .i2c_address = 0x64,
  2858. .if_khz = 5380,
  2859. };
  2860. static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
  2861. {
  2862. /* FIXME: generalize & move to common area */
  2863. adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
  2864. return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
  2865. &s5h1411_xc5000_tunerconfig)
  2866. == NULL ? -ENODEV : 0;
  2867. }
  2868. static int dib0700_xc4000_tuner_callback(void *priv, int component,
  2869. int command, int arg)
  2870. {
  2871. struct dvb_usb_adapter *adap = priv;
  2872. struct dib0700_adapter_state *state = adap->priv;
  2873. if (command == XC4000_TUNER_RESET) {
  2874. /* Reset the tuner */
  2875. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
  2876. msleep(10);
  2877. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2878. } else {
  2879. err("xc4000: unknown tuner callback command: %d\n", command);
  2880. return -EINVAL;
  2881. }
  2882. return 0;
  2883. }
  2884. static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
  2885. .band_caps = BAND_UHF | BAND_VHF,
  2886. .setup = 0x64,
  2887. .inv_gain = 0x02c8,
  2888. .time_stabiliz = 0x15,
  2889. .alpha_level = 0x00,
  2890. .thlock = 0x76,
  2891. .wbd_inv = 0x01,
  2892. .wbd_ref = 0x0b33,
  2893. .wbd_sel = 0x00,
  2894. .wbd_alpha = 0x02,
  2895. .agc1_max = 0x00,
  2896. .agc1_min = 0x00,
  2897. .agc2_max = 0x9b26,
  2898. .agc2_min = 0x26ca,
  2899. .agc1_pt1 = 0x00,
  2900. .agc1_pt2 = 0x00,
  2901. .agc1_pt3 = 0x00,
  2902. .agc1_slope1 = 0x00,
  2903. .agc1_slope2 = 0x00,
  2904. .agc2_pt1 = 0x00,
  2905. .agc2_pt2 = 0x80,
  2906. .agc2_slope1 = 0x1d,
  2907. .agc2_slope2 = 0x1d,
  2908. .alpha_mant = 0x11,
  2909. .alpha_exp = 0x1b,
  2910. .beta_mant = 0x17,
  2911. .beta_exp = 0x33,
  2912. .perform_agc_softsplit = 0x00,
  2913. };
  2914. static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
  2915. .internal = 60000,
  2916. .sampling = 30000,
  2917. .pll_prediv = 1,
  2918. .pll_ratio = 8,
  2919. .pll_range = 3,
  2920. .pll_reset = 1,
  2921. .pll_bypass = 0,
  2922. .enable_refdiv = 0,
  2923. .bypclk_div = 0,
  2924. .IO_CLK_en_core = 1,
  2925. .ADClkSrc = 1,
  2926. .modulo = 0,
  2927. .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
  2928. .ifreq = 39370534,
  2929. .timf = 20452225,
  2930. .xtal_hz = 30000000
  2931. };
  2932. /* FIXME: none of these inputs are validated yet */
  2933. static struct dib7000p_config pctv_340e_config = {
  2934. .output_mpeg2_in_188_bytes = 1,
  2935. .agc_config_count = 1,
  2936. .agc = &stk7700p_7000p_xc4000_agc_config,
  2937. .bw = &stk7700p_xc4000_pll_config,
  2938. .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
  2939. .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
  2940. .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
  2941. };
  2942. /* PCTV 340e GPIOs map:
  2943. dib0700:
  2944. GPIO2 - CX25843 sleep
  2945. GPIO3 - CS5340 reset
  2946. GPIO5 - IRD
  2947. GPIO6 - Power Supply
  2948. GPIO8 - LNA (1=off 0=on)
  2949. GPIO10 - CX25843 reset
  2950. dib7000:
  2951. GPIO8 - xc4000 reset
  2952. */
  2953. static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
  2954. {
  2955. struct dib0700_state *st = adap->dev->priv;
  2956. struct dib0700_adapter_state *state = adap->priv;
  2957. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2958. return -ENODEV;
  2959. /* Power Supply on */
  2960. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  2961. msleep(50);
  2962. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2963. msleep(100); /* Allow power supply to settle before probing */
  2964. /* cx25843 reset */
  2965. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2966. msleep(1); /* cx25843 datasheet say 350us required */
  2967. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2968. /* LNA off for now */
  2969. dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
  2970. /* Put the CX25843 to sleep for now since we're in digital mode */
  2971. dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
  2972. /* FIXME: not verified yet */
  2973. dib0700_ctrl_clock(adap->dev, 72, 1);
  2974. msleep(500);
  2975. if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
  2976. /* Demodulator not found for some reason? */
  2977. dvb_detach(&state->dib7000p_ops);
  2978. return -ENODEV;
  2979. }
  2980. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
  2981. &pctv_340e_config);
  2982. st->is_dib7000pc = 1;
  2983. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2984. }
  2985. static struct xc4000_config dib7000p_xc4000_tunerconfig = {
  2986. .i2c_address = 0x61,
  2987. .default_pm = 1,
  2988. .dvb_amplitude = 0,
  2989. .set_smoothedcvbs = 0,
  2990. .if_khz = 5400
  2991. };
  2992. static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
  2993. {
  2994. struct i2c_adapter *tun_i2c;
  2995. struct dib0700_adapter_state *state = adap->priv;
  2996. /* The xc4000 is not on the main i2c bus */
  2997. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  2998. DIBX000_I2C_INTERFACE_TUNER, 1);
  2999. if (tun_i2c == NULL) {
  3000. printk(KERN_ERR "Could not reach tuner i2c bus\n");
  3001. return 0;
  3002. }
  3003. /* Setup the reset callback */
  3004. adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
  3005. return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
  3006. &dib7000p_xc4000_tunerconfig)
  3007. == NULL ? -ENODEV : 0;
  3008. }
  3009. static struct lgdt3305_config hcw_lgdt3305_config = {
  3010. .i2c_addr = 0x0e,
  3011. .mpeg_mode = LGDT3305_MPEG_PARALLEL,
  3012. .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
  3013. .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
  3014. .deny_i2c_rptr = 0,
  3015. .spectral_inversion = 1,
  3016. .qam_if_khz = 6000,
  3017. .vsb_if_khz = 6000,
  3018. .usref_8vsb = 0x0500,
  3019. };
  3020. static struct mxl5007t_config hcw_mxl5007t_config = {
  3021. .xtal_freq_hz = MxL_XTAL_25_MHZ,
  3022. .if_freq_hz = MxL_IF_6_MHZ,
  3023. .invert_if = 1,
  3024. };
  3025. /* TIGER-ATSC map:
  3026. GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
  3027. GPIO1 - ANT_SEL (H: VPA, L: MCX)
  3028. GPIO4 - SCL2
  3029. GPIO6 - EN_TUNER
  3030. GPIO7 - SDA2
  3031. GPIO10 - DEM_RST
  3032. MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
  3033. */
  3034. static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
  3035. {
  3036. struct dib0700_state *st = adap->dev->priv;
  3037. /* Make use of the new i2c functions from FW 1.20 */
  3038. st->fw_use_new_i2c_api = 1;
  3039. st->disable_streaming_master_mode = 1;
  3040. /* fe power enable */
  3041. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  3042. msleep(30);
  3043. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  3044. msleep(30);
  3045. /* demod reset */
  3046. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  3047. msleep(30);
  3048. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  3049. msleep(30);
  3050. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  3051. msleep(30);
  3052. adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
  3053. &hcw_lgdt3305_config,
  3054. &adap->dev->i2c_adap);
  3055. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  3056. }
  3057. static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
  3058. {
  3059. return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
  3060. &adap->dev->i2c_adap, 0x60,
  3061. &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
  3062. }
  3063. /* DVB-USB and USB stuff follows */
  3064. struct usb_device_id dib0700_usb_id_table[] = {
  3065. /* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
  3066. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
  3067. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
  3068. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
  3069. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
  3070. /* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
  3071. { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
  3072. { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
  3073. { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
  3074. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
  3075. /* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
  3076. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
  3077. { USB_DEVICE(USB_VID_TERRATEC,
  3078. USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
  3079. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
  3080. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
  3081. /* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
  3082. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
  3083. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
  3084. { USB_DEVICE(USB_VID_PINNACLE,
  3085. USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
  3086. { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
  3087. /* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
  3088. { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
  3089. { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
  3090. { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
  3091. { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
  3092. /* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
  3093. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
  3094. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
  3095. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
  3096. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
  3097. /* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
  3098. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
  3099. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
  3100. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
  3101. { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
  3102. /* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
  3103. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
  3104. { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
  3105. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
  3106. { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
  3107. /* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
  3108. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
  3109. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
  3110. { USB_DEVICE(USB_VID_TERRATEC,
  3111. USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
  3112. { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
  3113. /* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
  3114. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
  3115. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
  3116. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
  3117. { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
  3118. /* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
  3119. { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
  3120. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
  3121. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
  3122. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
  3123. /* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
  3124. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
  3125. { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
  3126. { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
  3127. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
  3128. /* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
  3129. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
  3130. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
  3131. { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
  3132. { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
  3133. /* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
  3134. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
  3135. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
  3136. { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
  3137. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
  3138. /* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
  3139. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
  3140. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
  3141. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
  3142. { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
  3143. /* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
  3144. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
  3145. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
  3146. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
  3147. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
  3148. /* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
  3149. { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
  3150. { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
  3151. { 0 } /* Terminating entry */
  3152. };
  3153. MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
  3154. #define DIB0700_DEFAULT_DEVICE_PROPERTIES \
  3155. .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
  3156. .usb_ctrl = DEVICE_SPECIFIC, \
  3157. .firmware = "dvb-usb-dib0700-1.20.fw", \
  3158. .download_firmware = dib0700_download_firmware, \
  3159. .no_reconnect = 1, \
  3160. .size_of_priv = sizeof(struct dib0700_state), \
  3161. .i2c_algo = &dib0700_i2c_algo, \
  3162. .identify_state = dib0700_identify_state
  3163. #define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
  3164. .streaming_ctrl = dib0700_streaming_ctrl, \
  3165. .stream = { \
  3166. .type = USB_BULK, \
  3167. .count = 4, \
  3168. .endpoint = ep, \
  3169. .u = { \
  3170. .bulk = { \
  3171. .buffersize = 39480, \
  3172. } \
  3173. } \
  3174. }
  3175. struct dvb_usb_device_properties dib0700_devices[] = {
  3176. {
  3177. DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3178. .num_adapters = 1,
  3179. .adapter = {
  3180. {
  3181. .num_frontends = 1,
  3182. .fe = {{
  3183. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3184. .pid_filter_count = 32,
  3185. .pid_filter = stk7700p_pid_filter,
  3186. .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
  3187. .frontend_attach = stk7700p_frontend_attach,
  3188. .tuner_attach = stk7700p_tuner_attach,
  3189. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3190. }},
  3191. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3192. },
  3193. },
  3194. .num_device_descs = 8,
  3195. .devices = {
  3196. { "DiBcom STK7700P reference design",
  3197. { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
  3198. { NULL },
  3199. },
  3200. { "Hauppauge Nova-T Stick",
  3201. { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
  3202. { NULL },
  3203. },
  3204. { "AVerMedia AVerTV DVB-T Volar",
  3205. { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
  3206. { NULL },
  3207. },
  3208. { "Compro Videomate U500",
  3209. { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
  3210. { NULL },
  3211. },
  3212. { "Uniwill STK7700P based (Hama and others)",
  3213. { &dib0700_usb_id_table[7], NULL },
  3214. { NULL },
  3215. },
  3216. { "Leadtek Winfast DTV Dongle (STK7700P based)",
  3217. { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
  3218. { NULL },
  3219. },
  3220. { "AVerMedia AVerTV DVB-T Express",
  3221. { &dib0700_usb_id_table[20] },
  3222. { NULL },
  3223. },
  3224. { "Gigabyte U7000",
  3225. { &dib0700_usb_id_table[21], NULL },
  3226. { NULL },
  3227. }
  3228. },
  3229. .rc.core = {
  3230. .rc_interval = DEFAULT_RC_INTERVAL,
  3231. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3232. .rc_query = dib0700_rc_query_old_firmware,
  3233. .allowed_protos = RC_BIT_RC5 |
  3234. RC_BIT_RC6_MCE |
  3235. RC_BIT_NEC,
  3236. .change_protocol = dib0700_change_protocol,
  3237. },
  3238. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3239. .num_adapters = 2,
  3240. .adapter = {
  3241. {
  3242. .num_frontends = 1,
  3243. .fe = {{
  3244. .frontend_attach = bristol_frontend_attach,
  3245. .tuner_attach = bristol_tuner_attach,
  3246. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3247. }},
  3248. }, {
  3249. .num_frontends = 1,
  3250. .fe = {{
  3251. .frontend_attach = bristol_frontend_attach,
  3252. .tuner_attach = bristol_tuner_attach,
  3253. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3254. }},
  3255. }
  3256. },
  3257. .num_device_descs = 1,
  3258. .devices = {
  3259. { "Hauppauge Nova-T 500 Dual DVB-T",
  3260. { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
  3261. { NULL },
  3262. },
  3263. },
  3264. .rc.core = {
  3265. .rc_interval = DEFAULT_RC_INTERVAL,
  3266. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3267. .rc_query = dib0700_rc_query_old_firmware,
  3268. .allowed_protos = RC_BIT_RC5 |
  3269. RC_BIT_RC6_MCE |
  3270. RC_BIT_NEC,
  3271. .change_protocol = dib0700_change_protocol,
  3272. },
  3273. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3274. .num_adapters = 2,
  3275. .adapter = {
  3276. {
  3277. .num_frontends = 1,
  3278. .fe = {{
  3279. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3280. .pid_filter_count = 32,
  3281. .pid_filter = stk70x0p_pid_filter,
  3282. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3283. .frontend_attach = stk7700d_frontend_attach,
  3284. .tuner_attach = stk7700d_tuner_attach,
  3285. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3286. }},
  3287. }, {
  3288. .num_frontends = 1,
  3289. .fe = {{
  3290. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3291. .pid_filter_count = 32,
  3292. .pid_filter = stk70x0p_pid_filter,
  3293. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3294. .frontend_attach = stk7700d_frontend_attach,
  3295. .tuner_attach = stk7700d_tuner_attach,
  3296. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3297. }},
  3298. }
  3299. },
  3300. .num_device_descs = 5,
  3301. .devices = {
  3302. { "Pinnacle PCTV 2000e",
  3303. { &dib0700_usb_id_table[11], NULL },
  3304. { NULL },
  3305. },
  3306. { "Terratec Cinergy DT XS Diversity",
  3307. { &dib0700_usb_id_table[12], NULL },
  3308. { NULL },
  3309. },
  3310. { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
  3311. { &dib0700_usb_id_table[13], NULL },
  3312. { NULL },
  3313. },
  3314. { "DiBcom STK7700D reference design",
  3315. { &dib0700_usb_id_table[14], NULL },
  3316. { NULL },
  3317. },
  3318. { "YUAN High-Tech DiBcom STK7700D",
  3319. { &dib0700_usb_id_table[55], NULL },
  3320. { NULL },
  3321. },
  3322. },
  3323. .rc.core = {
  3324. .rc_interval = DEFAULT_RC_INTERVAL,
  3325. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3326. .rc_query = dib0700_rc_query_old_firmware,
  3327. .allowed_protos = RC_BIT_RC5 |
  3328. RC_BIT_RC6_MCE |
  3329. RC_BIT_NEC,
  3330. .change_protocol = dib0700_change_protocol,
  3331. },
  3332. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3333. .num_adapters = 1,
  3334. .adapter = {
  3335. {
  3336. .num_frontends = 1,
  3337. .fe = {{
  3338. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3339. .pid_filter_count = 32,
  3340. .pid_filter = stk70x0p_pid_filter,
  3341. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3342. .frontend_attach = stk7700P2_frontend_attach,
  3343. .tuner_attach = stk7700d_tuner_attach,
  3344. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3345. }},
  3346. },
  3347. },
  3348. .num_device_descs = 3,
  3349. .devices = {
  3350. { "ASUS My Cinema U3000 Mini DVBT Tuner",
  3351. { &dib0700_usb_id_table[23], NULL },
  3352. { NULL },
  3353. },
  3354. { "Yuan EC372S",
  3355. { &dib0700_usb_id_table[31], NULL },
  3356. { NULL },
  3357. },
  3358. { "Terratec Cinergy T Express",
  3359. { &dib0700_usb_id_table[42], NULL },
  3360. { NULL },
  3361. }
  3362. },
  3363. .rc.core = {
  3364. .rc_interval = DEFAULT_RC_INTERVAL,
  3365. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3366. .module_name = "dib0700",
  3367. .rc_query = dib0700_rc_query_old_firmware,
  3368. .allowed_protos = RC_BIT_RC5 |
  3369. RC_BIT_RC6_MCE |
  3370. RC_BIT_NEC,
  3371. .change_protocol = dib0700_change_protocol,
  3372. },
  3373. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3374. .num_adapters = 1,
  3375. .adapter = {
  3376. {
  3377. .num_frontends = 1,
  3378. .fe = {{
  3379. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3380. .pid_filter_count = 32,
  3381. .pid_filter = stk70x0p_pid_filter,
  3382. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3383. .frontend_attach = stk7070p_frontend_attach,
  3384. .tuner_attach = dib7070p_tuner_attach,
  3385. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3386. }},
  3387. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3388. },
  3389. },
  3390. .num_device_descs = 12,
  3391. .devices = {
  3392. { "DiBcom STK7070P reference design",
  3393. { &dib0700_usb_id_table[15], NULL },
  3394. { NULL },
  3395. },
  3396. { "Pinnacle PCTV DVB-T Flash Stick",
  3397. { &dib0700_usb_id_table[16], NULL },
  3398. { NULL },
  3399. },
  3400. { "Artec T14BR DVB-T",
  3401. { &dib0700_usb_id_table[22], NULL },
  3402. { NULL },
  3403. },
  3404. { "ASUS My Cinema U3100 Mini DVBT Tuner",
  3405. { &dib0700_usb_id_table[24], NULL },
  3406. { NULL },
  3407. },
  3408. { "Hauppauge Nova-T Stick",
  3409. { &dib0700_usb_id_table[25], NULL },
  3410. { NULL },
  3411. },
  3412. { "Hauppauge Nova-T MyTV.t",
  3413. { &dib0700_usb_id_table[26], NULL },
  3414. { NULL },
  3415. },
  3416. { "Pinnacle PCTV 72e",
  3417. { &dib0700_usb_id_table[29], NULL },
  3418. { NULL },
  3419. },
  3420. { "Pinnacle PCTV 73e",
  3421. { &dib0700_usb_id_table[30], NULL },
  3422. { NULL },
  3423. },
  3424. { "Elgato EyeTV DTT",
  3425. { &dib0700_usb_id_table[49], NULL },
  3426. { NULL },
  3427. },
  3428. { "Yuan PD378S",
  3429. { &dib0700_usb_id_table[45], NULL },
  3430. { NULL },
  3431. },
  3432. { "Elgato EyeTV Dtt Dlx PD378S",
  3433. { &dib0700_usb_id_table[50], NULL },
  3434. { NULL },
  3435. },
  3436. { "Elgato EyeTV DTT rev. 2",
  3437. { &dib0700_usb_id_table[80], NULL },
  3438. { NULL },
  3439. },
  3440. },
  3441. .rc.core = {
  3442. .rc_interval = DEFAULT_RC_INTERVAL,
  3443. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3444. .module_name = "dib0700",
  3445. .rc_query = dib0700_rc_query_old_firmware,
  3446. .allowed_protos = RC_BIT_RC5 |
  3447. RC_BIT_RC6_MCE |
  3448. RC_BIT_NEC,
  3449. .change_protocol = dib0700_change_protocol,
  3450. },
  3451. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3452. .num_adapters = 1,
  3453. .adapter = {
  3454. {
  3455. .num_frontends = 1,
  3456. .fe = {{
  3457. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3458. .pid_filter_count = 32,
  3459. .pid_filter = stk70x0p_pid_filter,
  3460. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3461. .frontend_attach = stk7070p_frontend_attach,
  3462. .tuner_attach = dib7070p_tuner_attach,
  3463. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3464. }},
  3465. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3466. },
  3467. },
  3468. .num_device_descs = 3,
  3469. .devices = {
  3470. { "Pinnacle PCTV 73A",
  3471. { &dib0700_usb_id_table[56], NULL },
  3472. { NULL },
  3473. },
  3474. { "Pinnacle PCTV 73e SE",
  3475. { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
  3476. { NULL },
  3477. },
  3478. { "Pinnacle PCTV 282e",
  3479. { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
  3480. { NULL },
  3481. },
  3482. },
  3483. .rc.core = {
  3484. .rc_interval = DEFAULT_RC_INTERVAL,
  3485. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3486. .module_name = "dib0700",
  3487. .rc_query = dib0700_rc_query_old_firmware,
  3488. .allowed_protos = RC_BIT_RC5 |
  3489. RC_BIT_RC6_MCE |
  3490. RC_BIT_NEC,
  3491. .change_protocol = dib0700_change_protocol,
  3492. },
  3493. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3494. .num_adapters = 2,
  3495. .adapter = {
  3496. {
  3497. .num_frontends = 1,
  3498. .fe = {{
  3499. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3500. .pid_filter_count = 32,
  3501. .pid_filter = stk70x0p_pid_filter,
  3502. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3503. .frontend_attach = novatd_frontend_attach,
  3504. .tuner_attach = dib7070p_tuner_attach,
  3505. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3506. }},
  3507. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3508. }, {
  3509. .num_frontends = 1,
  3510. .fe = {{
  3511. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3512. .pid_filter_count = 32,
  3513. .pid_filter = stk70x0p_pid_filter,
  3514. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3515. .frontend_attach = novatd_frontend_attach,
  3516. .tuner_attach = dib7070p_tuner_attach,
  3517. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3518. }},
  3519. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3520. }
  3521. },
  3522. .num_device_descs = 3,
  3523. .devices = {
  3524. { "Hauppauge Nova-TD Stick (52009)",
  3525. { &dib0700_usb_id_table[35], NULL },
  3526. { NULL },
  3527. },
  3528. { "PCTV 2002e",
  3529. { &dib0700_usb_id_table[81], NULL },
  3530. { NULL },
  3531. },
  3532. { "PCTV 2002e SE",
  3533. { &dib0700_usb_id_table[82], NULL },
  3534. { NULL },
  3535. },
  3536. },
  3537. .rc.core = {
  3538. .rc_interval = DEFAULT_RC_INTERVAL,
  3539. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3540. .module_name = "dib0700",
  3541. .rc_query = dib0700_rc_query_old_firmware,
  3542. .allowed_protos = RC_BIT_RC5 |
  3543. RC_BIT_RC6_MCE |
  3544. RC_BIT_NEC,
  3545. .change_protocol = dib0700_change_protocol,
  3546. },
  3547. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3548. .num_adapters = 2,
  3549. .adapter = {
  3550. {
  3551. .num_frontends = 1,
  3552. .fe = {{
  3553. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3554. .pid_filter_count = 32,
  3555. .pid_filter = stk70x0p_pid_filter,
  3556. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3557. .frontend_attach = stk7070pd_frontend_attach0,
  3558. .tuner_attach = dib7070p_tuner_attach,
  3559. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3560. }},
  3561. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3562. }, {
  3563. .num_frontends = 1,
  3564. .fe = {{
  3565. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3566. .pid_filter_count = 32,
  3567. .pid_filter = stk70x0p_pid_filter,
  3568. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3569. .frontend_attach = stk7070pd_frontend_attach1,
  3570. .tuner_attach = dib7070p_tuner_attach,
  3571. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3572. }},
  3573. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3574. }
  3575. },
  3576. .num_device_descs = 5,
  3577. .devices = {
  3578. { "DiBcom STK7070PD reference design",
  3579. { &dib0700_usb_id_table[17], NULL },
  3580. { NULL },
  3581. },
  3582. { "Pinnacle PCTV Dual DVB-T Diversity Stick",
  3583. { &dib0700_usb_id_table[18], NULL },
  3584. { NULL },
  3585. },
  3586. { "Hauppauge Nova-TD-500 (84xxx)",
  3587. { &dib0700_usb_id_table[36], NULL },
  3588. { NULL },
  3589. },
  3590. { "Terratec Cinergy DT USB XS Diversity/ T5",
  3591. { &dib0700_usb_id_table[43],
  3592. &dib0700_usb_id_table[53], NULL},
  3593. { NULL },
  3594. },
  3595. { "Sony PlayTV",
  3596. { &dib0700_usb_id_table[44], NULL },
  3597. { NULL },
  3598. },
  3599. },
  3600. .rc.core = {
  3601. .rc_interval = DEFAULT_RC_INTERVAL,
  3602. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3603. .module_name = "dib0700",
  3604. .rc_query = dib0700_rc_query_old_firmware,
  3605. .allowed_protos = RC_BIT_RC5 |
  3606. RC_BIT_RC6_MCE |
  3607. RC_BIT_NEC,
  3608. .change_protocol = dib0700_change_protocol,
  3609. },
  3610. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3611. .num_adapters = 2,
  3612. .adapter = {
  3613. {
  3614. .num_frontends = 1,
  3615. .fe = {{
  3616. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3617. .pid_filter_count = 32,
  3618. .pid_filter = stk70x0p_pid_filter,
  3619. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3620. .frontend_attach = stk7070pd_frontend_attach0,
  3621. .tuner_attach = dib7070p_tuner_attach,
  3622. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3623. }},
  3624. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3625. }, {
  3626. .num_frontends = 1,
  3627. .fe = {{
  3628. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3629. .pid_filter_count = 32,
  3630. .pid_filter = stk70x0p_pid_filter,
  3631. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3632. .frontend_attach = stk7070pd_frontend_attach1,
  3633. .tuner_attach = dib7070p_tuner_attach,
  3634. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3635. }},
  3636. .size_of_priv = sizeof(struct dib0700_adapter_state),
  3637. }
  3638. },
  3639. .num_device_descs = 1,
  3640. .devices = {
  3641. { "Elgato EyeTV Diversity",
  3642. { &dib0700_usb_id_table[68], NULL },
  3643. { NULL },
  3644. },
  3645. },
  3646. .rc.core = {
  3647. .rc_interval = DEFAULT_RC_INTERVAL,
  3648. .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
  3649. .module_name = "dib0700",
  3650. .rc_query = dib0700_rc_query_old_firmware,
  3651. .allowed_protos = RC_BIT_RC5 |
  3652. RC_BIT_RC6_MCE |
  3653. RC_BIT_NEC,
  3654. .change_protocol = dib0700_change_protocol,
  3655. },
  3656. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3657. .num_adapters = 1,
  3658. .adapter = {
  3659. {
  3660. .num_frontends = 1,
  3661. .fe = {{
  3662. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3663. .pid_filter_count = 32,
  3664. .pid_filter = stk70x0p_pid_filter,
  3665. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3666. .frontend_attach = stk7700ph_frontend_attach,
  3667. .tuner_attach = stk7700ph_tuner_attach,
  3668. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3669. }},
  3670. .size_of_priv = sizeof(struct
  3671. dib0700_adapter_state),
  3672. },
  3673. },
  3674. .num_device_descs = 9,
  3675. .devices = {
  3676. { "Terratec Cinergy HT USB XE",
  3677. { &dib0700_usb_id_table[27], NULL },
  3678. { NULL },
  3679. },
  3680. { "Pinnacle Expresscard 320cx",
  3681. { &dib0700_usb_id_table[28], NULL },
  3682. { NULL },
  3683. },
  3684. { "Terratec Cinergy HT Express",
  3685. { &dib0700_usb_id_table[32], NULL },
  3686. { NULL },
  3687. },
  3688. { "Gigabyte U8000-RH",
  3689. { &dib0700_usb_id_table[37], NULL },
  3690. { NULL },
  3691. },
  3692. { "YUAN High-Tech STK7700PH",
  3693. { &dib0700_usb_id_table[38], NULL },
  3694. { NULL },
  3695. },
  3696. { "Asus My Cinema-U3000Hybrid",
  3697. { &dib0700_usb_id_table[39], NULL },
  3698. { NULL },
  3699. },
  3700. { "YUAN High-Tech MC770",
  3701. { &dib0700_usb_id_table[48], NULL },
  3702. { NULL },
  3703. },
  3704. { "Leadtek WinFast DTV Dongle H",
  3705. { &dib0700_usb_id_table[51], NULL },
  3706. { NULL },
  3707. },
  3708. { "YUAN High-Tech STK7700D",
  3709. { &dib0700_usb_id_table[54], NULL },
  3710. { NULL },
  3711. },
  3712. },
  3713. .rc.core = {
  3714. .rc_interval = DEFAULT_RC_INTERVAL,
  3715. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3716. .module_name = "dib0700",
  3717. .rc_query = dib0700_rc_query_old_firmware,
  3718. .allowed_protos = RC_BIT_RC5 |
  3719. RC_BIT_RC6_MCE |
  3720. RC_BIT_NEC,
  3721. .change_protocol = dib0700_change_protocol,
  3722. },
  3723. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3724. .num_adapters = 1,
  3725. .adapter = {
  3726. {
  3727. .num_frontends = 1,
  3728. .fe = {{
  3729. .frontend_attach = s5h1411_frontend_attach,
  3730. .tuner_attach = xc5000_tuner_attach,
  3731. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3732. }},
  3733. .size_of_priv = sizeof(struct
  3734. dib0700_adapter_state),
  3735. },
  3736. },
  3737. .num_device_descs = 2,
  3738. .devices = {
  3739. { "Pinnacle PCTV HD Pro USB Stick",
  3740. { &dib0700_usb_id_table[40], NULL },
  3741. { NULL },
  3742. },
  3743. { "Pinnacle PCTV HD USB Stick",
  3744. { &dib0700_usb_id_table[41], NULL },
  3745. { NULL },
  3746. },
  3747. },
  3748. .rc.core = {
  3749. .rc_interval = DEFAULT_RC_INTERVAL,
  3750. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3751. .module_name = "dib0700",
  3752. .rc_query = dib0700_rc_query_old_firmware,
  3753. .allowed_protos = RC_BIT_RC5 |
  3754. RC_BIT_RC6_MCE |
  3755. RC_BIT_NEC,
  3756. .change_protocol = dib0700_change_protocol,
  3757. },
  3758. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3759. .num_adapters = 1,
  3760. .adapter = {
  3761. {
  3762. .num_frontends = 1,
  3763. .fe = {{
  3764. .frontend_attach = lgdt3305_frontend_attach,
  3765. .tuner_attach = mxl5007t_tuner_attach,
  3766. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3767. }},
  3768. .size_of_priv = sizeof(struct
  3769. dib0700_adapter_state),
  3770. },
  3771. },
  3772. .num_device_descs = 2,
  3773. .devices = {
  3774. { "Hauppauge ATSC MiniCard (B200)",
  3775. { &dib0700_usb_id_table[46], NULL },
  3776. { NULL },
  3777. },
  3778. { "Hauppauge ATSC MiniCard (B210)",
  3779. { &dib0700_usb_id_table[47], NULL },
  3780. { NULL },
  3781. },
  3782. },
  3783. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3784. .num_adapters = 1,
  3785. .adapter = {
  3786. {
  3787. .num_frontends = 1,
  3788. .fe = {{
  3789. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3790. .pid_filter_count = 32,
  3791. .pid_filter = stk70x0p_pid_filter,
  3792. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3793. .frontend_attach = stk7770p_frontend_attach,
  3794. .tuner_attach = dib7770p_tuner_attach,
  3795. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3796. }},
  3797. .size_of_priv =
  3798. sizeof(struct dib0700_adapter_state),
  3799. },
  3800. },
  3801. .num_device_descs = 4,
  3802. .devices = {
  3803. { "DiBcom STK7770P reference design",
  3804. { &dib0700_usb_id_table[59], NULL },
  3805. { NULL },
  3806. },
  3807. { "Terratec Cinergy T USB XXS (HD)/ T3",
  3808. { &dib0700_usb_id_table[33],
  3809. &dib0700_usb_id_table[52],
  3810. &dib0700_usb_id_table[60], NULL},
  3811. { NULL },
  3812. },
  3813. { "TechniSat AirStar TeleStick 2",
  3814. { &dib0700_usb_id_table[74], NULL },
  3815. { NULL },
  3816. },
  3817. { "Medion CTX1921 DVB-T USB",
  3818. { &dib0700_usb_id_table[75], NULL },
  3819. { NULL },
  3820. },
  3821. },
  3822. .rc.core = {
  3823. .rc_interval = DEFAULT_RC_INTERVAL,
  3824. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3825. .module_name = "dib0700",
  3826. .rc_query = dib0700_rc_query_old_firmware,
  3827. .allowed_protos = RC_BIT_RC5 |
  3828. RC_BIT_RC6_MCE |
  3829. RC_BIT_NEC,
  3830. .change_protocol = dib0700_change_protocol,
  3831. },
  3832. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3833. .num_adapters = 1,
  3834. .adapter = {
  3835. {
  3836. .num_frontends = 1,
  3837. .fe = {{
  3838. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3839. .pid_filter_count = 32,
  3840. .pid_filter = stk80xx_pid_filter,
  3841. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3842. .frontend_attach = stk807x_frontend_attach,
  3843. .tuner_attach = dib807x_tuner_attach,
  3844. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3845. }},
  3846. .size_of_priv =
  3847. sizeof(struct dib0700_adapter_state),
  3848. },
  3849. },
  3850. .num_device_descs = 3,
  3851. .devices = {
  3852. { "DiBcom STK807xP reference design",
  3853. { &dib0700_usb_id_table[62], NULL },
  3854. { NULL },
  3855. },
  3856. { "Prolink Pixelview SBTVD",
  3857. { &dib0700_usb_id_table[63], NULL },
  3858. { NULL },
  3859. },
  3860. { "EvolutePC TVWay+",
  3861. { &dib0700_usb_id_table[64], NULL },
  3862. { NULL },
  3863. },
  3864. },
  3865. .rc.core = {
  3866. .rc_interval = DEFAULT_RC_INTERVAL,
  3867. .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
  3868. .module_name = "dib0700",
  3869. .rc_query = dib0700_rc_query_old_firmware,
  3870. .allowed_protos = RC_BIT_RC5 |
  3871. RC_BIT_RC6_MCE |
  3872. RC_BIT_NEC,
  3873. .change_protocol = dib0700_change_protocol,
  3874. },
  3875. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3876. .num_adapters = 2,
  3877. .adapter = {
  3878. {
  3879. .num_frontends = 1,
  3880. .fe = {{
  3881. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3882. .pid_filter_count = 32,
  3883. .pid_filter = stk80xx_pid_filter,
  3884. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3885. .frontend_attach = stk807xpvr_frontend_attach0,
  3886. .tuner_attach = dib807x_tuner_attach,
  3887. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3888. }},
  3889. .size_of_priv =
  3890. sizeof(struct dib0700_adapter_state),
  3891. },
  3892. {
  3893. .num_frontends = 1,
  3894. .fe = {{
  3895. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3896. .pid_filter_count = 32,
  3897. .pid_filter = stk80xx_pid_filter,
  3898. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3899. .frontend_attach = stk807xpvr_frontend_attach1,
  3900. .tuner_attach = dib807x_tuner_attach,
  3901. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3902. }},
  3903. .size_of_priv =
  3904. sizeof(struct dib0700_adapter_state),
  3905. },
  3906. },
  3907. .num_device_descs = 1,
  3908. .devices = {
  3909. { "DiBcom STK807xPVR reference design",
  3910. { &dib0700_usb_id_table[61], NULL },
  3911. { NULL },
  3912. },
  3913. },
  3914. .rc.core = {
  3915. .rc_interval = DEFAULT_RC_INTERVAL,
  3916. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3917. .module_name = "dib0700",
  3918. .rc_query = dib0700_rc_query_old_firmware,
  3919. .allowed_protos = RC_BIT_RC5 |
  3920. RC_BIT_RC6_MCE |
  3921. RC_BIT_NEC,
  3922. .change_protocol = dib0700_change_protocol,
  3923. },
  3924. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3925. .num_adapters = 1,
  3926. .adapter = {
  3927. {
  3928. .num_frontends = 1,
  3929. .fe = {{
  3930. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  3931. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3932. .pid_filter_count = 32,
  3933. .pid_filter = stk80xx_pid_filter,
  3934. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3935. .frontend_attach = stk809x_frontend_attach,
  3936. .tuner_attach = dib809x_tuner_attach,
  3937. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3938. }},
  3939. .size_of_priv =
  3940. sizeof(struct dib0700_adapter_state),
  3941. },
  3942. },
  3943. .num_device_descs = 1,
  3944. .devices = {
  3945. { "DiBcom STK8096GP reference design",
  3946. { &dib0700_usb_id_table[67], NULL },
  3947. { NULL },
  3948. },
  3949. },
  3950. .rc.core = {
  3951. .rc_interval = DEFAULT_RC_INTERVAL,
  3952. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3953. .module_name = "dib0700",
  3954. .rc_query = dib0700_rc_query_old_firmware,
  3955. .allowed_protos = RC_BIT_RC5 |
  3956. RC_BIT_RC6_MCE |
  3957. RC_BIT_NEC,
  3958. .change_protocol = dib0700_change_protocol,
  3959. },
  3960. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3961. .num_adapters = 1,
  3962. .adapter = {
  3963. {
  3964. .num_frontends = 1,
  3965. .fe = {{
  3966. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  3967. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3968. .pid_filter_count = 32,
  3969. .pid_filter = dib90x0_pid_filter,
  3970. .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
  3971. .frontend_attach = stk9090m_frontend_attach,
  3972. .tuner_attach = dib9090_tuner_attach,
  3973. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3974. }},
  3975. .size_of_priv =
  3976. sizeof(struct dib0700_adapter_state),
  3977. },
  3978. },
  3979. .num_device_descs = 1,
  3980. .devices = {
  3981. { "DiBcom STK9090M reference design",
  3982. { &dib0700_usb_id_table[69], NULL },
  3983. { NULL },
  3984. },
  3985. },
  3986. .rc.core = {
  3987. .rc_interval = DEFAULT_RC_INTERVAL,
  3988. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3989. .module_name = "dib0700",
  3990. .rc_query = dib0700_rc_query_old_firmware,
  3991. .allowed_protos = RC_BIT_RC5 |
  3992. RC_BIT_RC6_MCE |
  3993. RC_BIT_NEC,
  3994. .change_protocol = dib0700_change_protocol,
  3995. },
  3996. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3997. .num_adapters = 1,
  3998. .adapter = {
  3999. {
  4000. .num_frontends = 1,
  4001. .fe = {{
  4002. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4003. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4004. .pid_filter_count = 32,
  4005. .pid_filter = stk80xx_pid_filter,
  4006. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  4007. .frontend_attach = nim8096md_frontend_attach,
  4008. .tuner_attach = nim8096md_tuner_attach,
  4009. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4010. }},
  4011. .size_of_priv =
  4012. sizeof(struct dib0700_adapter_state),
  4013. },
  4014. },
  4015. .num_device_descs = 1,
  4016. .devices = {
  4017. { "DiBcom NIM8096MD reference design",
  4018. { &dib0700_usb_id_table[70], NULL },
  4019. { NULL },
  4020. },
  4021. },
  4022. .rc.core = {
  4023. .rc_interval = DEFAULT_RC_INTERVAL,
  4024. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4025. .module_name = "dib0700",
  4026. .rc_query = dib0700_rc_query_old_firmware,
  4027. .allowed_protos = RC_BIT_RC5 |
  4028. RC_BIT_RC6_MCE |
  4029. RC_BIT_NEC,
  4030. .change_protocol = dib0700_change_protocol,
  4031. },
  4032. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4033. .num_adapters = 1,
  4034. .adapter = {
  4035. {
  4036. .num_frontends = 1,
  4037. .fe = {{
  4038. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4039. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4040. .pid_filter_count = 32,
  4041. .pid_filter = dib90x0_pid_filter,
  4042. .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
  4043. .frontend_attach = nim9090md_frontend_attach,
  4044. .tuner_attach = nim9090md_tuner_attach,
  4045. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4046. }},
  4047. .size_of_priv =
  4048. sizeof(struct dib0700_adapter_state),
  4049. },
  4050. },
  4051. .num_device_descs = 1,
  4052. .devices = {
  4053. { "DiBcom NIM9090MD reference design",
  4054. { &dib0700_usb_id_table[71], NULL },
  4055. { NULL },
  4056. },
  4057. },
  4058. .rc.core = {
  4059. .rc_interval = DEFAULT_RC_INTERVAL,
  4060. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4061. .module_name = "dib0700",
  4062. .rc_query = dib0700_rc_query_old_firmware,
  4063. .allowed_protos = RC_BIT_RC5 |
  4064. RC_BIT_RC6_MCE |
  4065. RC_BIT_NEC,
  4066. .change_protocol = dib0700_change_protocol,
  4067. },
  4068. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4069. .num_adapters = 1,
  4070. .adapter = {
  4071. {
  4072. .num_frontends = 1,
  4073. .fe = {{
  4074. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4075. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4076. .pid_filter_count = 32,
  4077. .pid_filter = stk70x0p_pid_filter,
  4078. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4079. .frontend_attach = nim7090_frontend_attach,
  4080. .tuner_attach = nim7090_tuner_attach,
  4081. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4082. }},
  4083. .size_of_priv =
  4084. sizeof(struct dib0700_adapter_state),
  4085. },
  4086. },
  4087. .num_device_descs = 1,
  4088. .devices = {
  4089. { "DiBcom NIM7090 reference design",
  4090. { &dib0700_usb_id_table[72], NULL },
  4091. { NULL },
  4092. },
  4093. },
  4094. .rc.core = {
  4095. .rc_interval = DEFAULT_RC_INTERVAL,
  4096. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4097. .module_name = "dib0700",
  4098. .rc_query = dib0700_rc_query_old_firmware,
  4099. .allowed_protos = RC_BIT_RC5 |
  4100. RC_BIT_RC6_MCE |
  4101. RC_BIT_NEC,
  4102. .change_protocol = dib0700_change_protocol,
  4103. },
  4104. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4105. .num_adapters = 2,
  4106. .adapter = {
  4107. {
  4108. .num_frontends = 1,
  4109. .fe = {{
  4110. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4111. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4112. .pid_filter_count = 32,
  4113. .pid_filter = stk70x0p_pid_filter,
  4114. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4115. .frontend_attach = tfe7090pvr_frontend0_attach,
  4116. .tuner_attach = tfe7090pvr_tuner0_attach,
  4117. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  4118. }},
  4119. .size_of_priv =
  4120. sizeof(struct dib0700_adapter_state),
  4121. },
  4122. {
  4123. .num_frontends = 1,
  4124. .fe = {{
  4125. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4126. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4127. .pid_filter_count = 32,
  4128. .pid_filter = stk70x0p_pid_filter,
  4129. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4130. .frontend_attach = tfe7090pvr_frontend1_attach,
  4131. .tuner_attach = tfe7090pvr_tuner1_attach,
  4132. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4133. }},
  4134. .size_of_priv =
  4135. sizeof(struct dib0700_adapter_state),
  4136. },
  4137. },
  4138. .num_device_descs = 1,
  4139. .devices = {
  4140. { "DiBcom TFE7090PVR reference design",
  4141. { &dib0700_usb_id_table[73], NULL },
  4142. { NULL },
  4143. },
  4144. },
  4145. .rc.core = {
  4146. .rc_interval = DEFAULT_RC_INTERVAL,
  4147. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4148. .module_name = "dib0700",
  4149. .rc_query = dib0700_rc_query_old_firmware,
  4150. .allowed_protos = RC_BIT_RC5 |
  4151. RC_BIT_RC6_MCE |
  4152. RC_BIT_NEC,
  4153. .change_protocol = dib0700_change_protocol,
  4154. },
  4155. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4156. .num_adapters = 1,
  4157. .adapter = {
  4158. {
  4159. .num_frontends = 1,
  4160. .fe = {{
  4161. .frontend_attach = pctv340e_frontend_attach,
  4162. .tuner_attach = xc4000_tuner_attach,
  4163. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4164. }},
  4165. .size_of_priv = sizeof(struct
  4166. dib0700_adapter_state),
  4167. },
  4168. },
  4169. .num_device_descs = 2,
  4170. .devices = {
  4171. { "Pinnacle PCTV 340e HD Pro USB Stick",
  4172. { &dib0700_usb_id_table[76], NULL },
  4173. { NULL },
  4174. },
  4175. { "Pinnacle PCTV Hybrid Stick Solo",
  4176. { &dib0700_usb_id_table[77], NULL },
  4177. { NULL },
  4178. },
  4179. },
  4180. .rc.core = {
  4181. .rc_interval = DEFAULT_RC_INTERVAL,
  4182. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4183. .module_name = "dib0700",
  4184. .rc_query = dib0700_rc_query_old_firmware,
  4185. .allowed_protos = RC_BIT_RC5 |
  4186. RC_BIT_RC6_MCE |
  4187. RC_BIT_NEC,
  4188. .change_protocol = dib0700_change_protocol,
  4189. },
  4190. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4191. .num_adapters = 1,
  4192. .adapter = {
  4193. {
  4194. .num_frontends = 1,
  4195. .fe = {{
  4196. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4197. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4198. .pid_filter_count = 32,
  4199. .pid_filter = stk70x0p_pid_filter,
  4200. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4201. .frontend_attach = tfe7790p_frontend_attach,
  4202. .tuner_attach = tfe7790p_tuner_attach,
  4203. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  4204. } },
  4205. .size_of_priv =
  4206. sizeof(struct dib0700_adapter_state),
  4207. },
  4208. },
  4209. .num_device_descs = 1,
  4210. .devices = {
  4211. { "DiBcom TFE7790P reference design",
  4212. { &dib0700_usb_id_table[78], NULL },
  4213. { NULL },
  4214. },
  4215. },
  4216. .rc.core = {
  4217. .rc_interval = DEFAULT_RC_INTERVAL,
  4218. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4219. .module_name = "dib0700",
  4220. .rc_query = dib0700_rc_query_old_firmware,
  4221. .allowed_protos = RC_BIT_RC5 |
  4222. RC_BIT_RC6_MCE |
  4223. RC_BIT_NEC,
  4224. .change_protocol = dib0700_change_protocol,
  4225. },
  4226. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4227. .num_adapters = 1,
  4228. .adapter = {
  4229. {
  4230. .num_frontends = 1,
  4231. .fe = {{
  4232. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4233. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4234. .pid_filter_count = 32,
  4235. .pid_filter = stk80xx_pid_filter,
  4236. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  4237. .frontend_attach = tfe8096p_frontend_attach,
  4238. .tuner_attach = tfe8096p_tuner_attach,
  4239. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4240. } },
  4241. .size_of_priv =
  4242. sizeof(struct dib0700_adapter_state),
  4243. },
  4244. },
  4245. .num_device_descs = 1,
  4246. .devices = {
  4247. { "DiBcom TFE8096P reference design",
  4248. { &dib0700_usb_id_table[79], NULL },
  4249. { NULL },
  4250. },
  4251. },
  4252. .rc.core = {
  4253. .rc_interval = DEFAULT_RC_INTERVAL,
  4254. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4255. .module_name = "dib0700",
  4256. .rc_query = dib0700_rc_query_old_firmware,
  4257. .allowed_protos = RC_BIT_RC5 |
  4258. RC_BIT_RC6_MCE |
  4259. RC_BIT_NEC,
  4260. .change_protocol = dib0700_change_protocol,
  4261. },
  4262. },
  4263. };
  4264. int dib0700_device_count = ARRAY_SIZE(dib0700_devices);