rcar_vin.c 54 KB

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  1. /*
  2. * SoC-camera host driver for Renesas R-Car VIN unit
  3. *
  4. * Copyright (C) 2011-2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Cogent Embedded, Inc., <source@cogentembedded.com>
  6. *
  7. * Based on V4L2 Driver for SuperH Mobile CEU interface "sh_mobile_ceu_camera.c"
  8. *
  9. * Copyright (C) 2008 Magnus Damm
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/of.h>
  22. #include <linux/of_device.h>
  23. #include <linux/platform_data/camera-rcar.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/slab.h>
  27. #include <linux/videodev2.h>
  28. #include <media/soc_camera.h>
  29. #include <media/soc_mediabus.h>
  30. #include <media/v4l2-common.h>
  31. #include <media/v4l2-dev.h>
  32. #include <media/v4l2-device.h>
  33. #include <media/v4l2-mediabus.h>
  34. #include <media/v4l2-of.h>
  35. #include <media/v4l2-subdev.h>
  36. #include <media/videobuf2-dma-contig.h>
  37. #include "soc_scale_crop.h"
  38. #define DRV_NAME "rcar_vin"
  39. /* Register offsets for R-Car VIN */
  40. #define VNMC_REG 0x00 /* Video n Main Control Register */
  41. #define VNMS_REG 0x04 /* Video n Module Status Register */
  42. #define VNFC_REG 0x08 /* Video n Frame Capture Register */
  43. #define VNSLPRC_REG 0x0C /* Video n Start Line Pre-Clip Register */
  44. #define VNELPRC_REG 0x10 /* Video n End Line Pre-Clip Register */
  45. #define VNSPPRC_REG 0x14 /* Video n Start Pixel Pre-Clip Register */
  46. #define VNEPPRC_REG 0x18 /* Video n End Pixel Pre-Clip Register */
  47. #define VNSLPOC_REG 0x1C /* Video n Start Line Post-Clip Register */
  48. #define VNELPOC_REG 0x20 /* Video n End Line Post-Clip Register */
  49. #define VNSPPOC_REG 0x24 /* Video n Start Pixel Post-Clip Register */
  50. #define VNEPPOC_REG 0x28 /* Video n End Pixel Post-Clip Register */
  51. #define VNIS_REG 0x2C /* Video n Image Stride Register */
  52. #define VNMB_REG(m) (0x30 + ((m) << 2)) /* Video n Memory Base m Register */
  53. #define VNIE_REG 0x40 /* Video n Interrupt Enable Register */
  54. #define VNINTS_REG 0x44 /* Video n Interrupt Status Register */
  55. #define VNSI_REG 0x48 /* Video n Scanline Interrupt Register */
  56. #define VNMTC_REG 0x4C /* Video n Memory Transfer Control Register */
  57. #define VNYS_REG 0x50 /* Video n Y Scale Register */
  58. #define VNXS_REG 0x54 /* Video n X Scale Register */
  59. #define VNDMR_REG 0x58 /* Video n Data Mode Register */
  60. #define VNDMR2_REG 0x5C /* Video n Data Mode Register 2 */
  61. #define VNUVAOF_REG 0x60 /* Video n UV Address Offset Register */
  62. #define VNC1A_REG 0x80 /* Video n Coefficient Set C1A Register */
  63. #define VNC1B_REG 0x84 /* Video n Coefficient Set C1B Register */
  64. #define VNC1C_REG 0x88 /* Video n Coefficient Set C1C Register */
  65. #define VNC2A_REG 0x90 /* Video n Coefficient Set C2A Register */
  66. #define VNC2B_REG 0x94 /* Video n Coefficient Set C2B Register */
  67. #define VNC2C_REG 0x98 /* Video n Coefficient Set C2C Register */
  68. #define VNC3A_REG 0xA0 /* Video n Coefficient Set C3A Register */
  69. #define VNC3B_REG 0xA4 /* Video n Coefficient Set C3B Register */
  70. #define VNC3C_REG 0xA8 /* Video n Coefficient Set C3C Register */
  71. #define VNC4A_REG 0xB0 /* Video n Coefficient Set C4A Register */
  72. #define VNC4B_REG 0xB4 /* Video n Coefficient Set C4B Register */
  73. #define VNC4C_REG 0xB8 /* Video n Coefficient Set C4C Register */
  74. #define VNC5A_REG 0xC0 /* Video n Coefficient Set C5A Register */
  75. #define VNC5B_REG 0xC4 /* Video n Coefficient Set C5B Register */
  76. #define VNC5C_REG 0xC8 /* Video n Coefficient Set C5C Register */
  77. #define VNC6A_REG 0xD0 /* Video n Coefficient Set C6A Register */
  78. #define VNC6B_REG 0xD4 /* Video n Coefficient Set C6B Register */
  79. #define VNC6C_REG 0xD8 /* Video n Coefficient Set C6C Register */
  80. #define VNC7A_REG 0xE0 /* Video n Coefficient Set C7A Register */
  81. #define VNC7B_REG 0xE4 /* Video n Coefficient Set C7B Register */
  82. #define VNC7C_REG 0xE8 /* Video n Coefficient Set C7C Register */
  83. #define VNC8A_REG 0xF0 /* Video n Coefficient Set C8A Register */
  84. #define VNC8B_REG 0xF4 /* Video n Coefficient Set C8B Register */
  85. #define VNC8C_REG 0xF8 /* Video n Coefficient Set C8C Register */
  86. /* Register bit fields for R-Car VIN */
  87. /* Video n Main Control Register bits */
  88. #define VNMC_FOC (1 << 21)
  89. #define VNMC_YCAL (1 << 19)
  90. #define VNMC_INF_YUV8_BT656 (0 << 16)
  91. #define VNMC_INF_YUV8_BT601 (1 << 16)
  92. #define VNMC_INF_YUV10_BT656 (2 << 16)
  93. #define VNMC_INF_YUV10_BT601 (3 << 16)
  94. #define VNMC_INF_YUV16 (5 << 16)
  95. #define VNMC_VUP (1 << 10)
  96. #define VNMC_IM_ODD (0 << 3)
  97. #define VNMC_IM_ODD_EVEN (1 << 3)
  98. #define VNMC_IM_EVEN (2 << 3)
  99. #define VNMC_IM_FULL (3 << 3)
  100. #define VNMC_BPS (1 << 1)
  101. #define VNMC_ME (1 << 0)
  102. /* Video n Module Status Register bits */
  103. #define VNMS_FBS_MASK (3 << 3)
  104. #define VNMS_FBS_SHIFT 3
  105. #define VNMS_AV (1 << 1)
  106. #define VNMS_CA (1 << 0)
  107. /* Video n Frame Capture Register bits */
  108. #define VNFC_C_FRAME (1 << 1)
  109. #define VNFC_S_FRAME (1 << 0)
  110. /* Video n Interrupt Enable Register bits */
  111. #define VNIE_FIE (1 << 4)
  112. #define VNIE_EFE (1 << 1)
  113. /* Video n Data Mode Register bits */
  114. #define VNDMR_EXRGB (1 << 8)
  115. #define VNDMR_BPSM (1 << 4)
  116. #define VNDMR_DTMD_YCSEP (1 << 1)
  117. #define VNDMR_DTMD_ARGB1555 (1 << 0)
  118. /* Video n Data Mode Register 2 bits */
  119. #define VNDMR2_VPS (1 << 30)
  120. #define VNDMR2_HPS (1 << 29)
  121. #define VNDMR2_FTEV (1 << 17)
  122. #define VNDMR2_VLV(n) ((n & 0xf) << 12)
  123. #define VIN_MAX_WIDTH 2048
  124. #define VIN_MAX_HEIGHT 2048
  125. #define TIMEOUT_MS 100
  126. enum chip_id {
  127. RCAR_GEN2,
  128. RCAR_H1,
  129. RCAR_M1,
  130. RCAR_E1,
  131. };
  132. struct vin_coeff {
  133. unsigned short xs_value;
  134. u32 coeff_set[24];
  135. };
  136. static const struct vin_coeff vin_coeff_set[] = {
  137. { 0x0000, {
  138. 0x00000000, 0x00000000, 0x00000000,
  139. 0x00000000, 0x00000000, 0x00000000,
  140. 0x00000000, 0x00000000, 0x00000000,
  141. 0x00000000, 0x00000000, 0x00000000,
  142. 0x00000000, 0x00000000, 0x00000000,
  143. 0x00000000, 0x00000000, 0x00000000,
  144. 0x00000000, 0x00000000, 0x00000000,
  145. 0x00000000, 0x00000000, 0x00000000 },
  146. },
  147. { 0x1000, {
  148. 0x000fa400, 0x000fa400, 0x09625902,
  149. 0x000003f8, 0x00000403, 0x3de0d9f0,
  150. 0x001fffed, 0x00000804, 0x3cc1f9c3,
  151. 0x001003de, 0x00000c01, 0x3cb34d7f,
  152. 0x002003d2, 0x00000c00, 0x3d24a92d,
  153. 0x00200bca, 0x00000bff, 0x3df600d2,
  154. 0x002013cc, 0x000007ff, 0x3ed70c7e,
  155. 0x00100fde, 0x00000000, 0x3f87c036 },
  156. },
  157. { 0x1200, {
  158. 0x002ffff1, 0x002ffff1, 0x02a0a9c8,
  159. 0x002003e7, 0x001ffffa, 0x000185bc,
  160. 0x002007dc, 0x000003ff, 0x3e52859c,
  161. 0x00200bd4, 0x00000002, 0x3d53996b,
  162. 0x00100fd0, 0x00000403, 0x3d04ad2d,
  163. 0x00000bd5, 0x00000403, 0x3d35ace7,
  164. 0x3ff003e4, 0x00000801, 0x3dc674a1,
  165. 0x3fffe800, 0x00000800, 0x3e76f461 },
  166. },
  167. { 0x1400, {
  168. 0x00100be3, 0x00100be3, 0x04d1359a,
  169. 0x00000fdb, 0x002003ed, 0x0211fd93,
  170. 0x00000fd6, 0x002003f4, 0x0002d97b,
  171. 0x000007d6, 0x002ffffb, 0x3e93b956,
  172. 0x3ff003da, 0x001003ff, 0x3db49926,
  173. 0x3fffefe9, 0x00100001, 0x3d655cee,
  174. 0x3fffd400, 0x00000003, 0x3d65f4b6,
  175. 0x000fb421, 0x00000402, 0x3dc6547e },
  176. },
  177. { 0x1600, {
  178. 0x00000bdd, 0x00000bdd, 0x06519578,
  179. 0x3ff007da, 0x00000be3, 0x03c24973,
  180. 0x3ff003d9, 0x00000be9, 0x01b30d5f,
  181. 0x3ffff7df, 0x001003f1, 0x0003c542,
  182. 0x000fdfec, 0x001003f7, 0x3ec4711d,
  183. 0x000fc400, 0x002ffffd, 0x3df504f1,
  184. 0x001fa81a, 0x002ffc00, 0x3d957cc2,
  185. 0x002f8c3c, 0x00100000, 0x3db5c891 },
  186. },
  187. { 0x1800, {
  188. 0x3ff003dc, 0x3ff003dc, 0x0791e558,
  189. 0x000ff7dd, 0x3ff007de, 0x05328554,
  190. 0x000fe7e3, 0x3ff00be2, 0x03232546,
  191. 0x000fd7ee, 0x000007e9, 0x0143bd30,
  192. 0x001fb800, 0x000007ee, 0x00044511,
  193. 0x002fa015, 0x000007f4, 0x3ef4bcee,
  194. 0x002f8832, 0x001003f9, 0x3e4514c7,
  195. 0x001f7853, 0x001003fd, 0x3de54c9f },
  196. },
  197. { 0x1a00, {
  198. 0x000fefe0, 0x000fefe0, 0x08721d3c,
  199. 0x001fdbe7, 0x000ffbde, 0x0652a139,
  200. 0x001fcbf0, 0x000003df, 0x0463292e,
  201. 0x002fb3ff, 0x3ff007e3, 0x0293a91d,
  202. 0x002f9c12, 0x3ff00be7, 0x01241905,
  203. 0x001f8c29, 0x000007ed, 0x3fe470eb,
  204. 0x000f7c46, 0x000007f2, 0x3f04b8ca,
  205. 0x3fef7865, 0x000007f6, 0x3e74e4a8 },
  206. },
  207. { 0x1c00, {
  208. 0x001fd3e9, 0x001fd3e9, 0x08f23d26,
  209. 0x002fbff3, 0x001fe3e4, 0x0712ad23,
  210. 0x002fa800, 0x000ff3e0, 0x05631d1b,
  211. 0x001f9810, 0x000ffbe1, 0x03b3890d,
  212. 0x000f8c23, 0x000003e3, 0x0233e8fa,
  213. 0x3fef843b, 0x000003e7, 0x00f430e4,
  214. 0x3fbf8456, 0x3ff00bea, 0x00046cc8,
  215. 0x3f8f8c72, 0x3ff00bef, 0x3f3490ac },
  216. },
  217. { 0x1e00, {
  218. 0x001fbbf4, 0x001fbbf4, 0x09425112,
  219. 0x001fa800, 0x002fc7ed, 0x0792b110,
  220. 0x000f980e, 0x001fdbe6, 0x0613110a,
  221. 0x3fff8c20, 0x001fe7e3, 0x04a368fd,
  222. 0x3fcf8c33, 0x000ff7e2, 0x0343b8ed,
  223. 0x3f9f8c4a, 0x000fffe3, 0x0203f8da,
  224. 0x3f5f9c61, 0x000003e6, 0x00e428c5,
  225. 0x3f1fb07b, 0x000003eb, 0x3fe440af },
  226. },
  227. { 0x2000, {
  228. 0x000fa400, 0x000fa400, 0x09625902,
  229. 0x3fff980c, 0x001fb7f5, 0x0812b0ff,
  230. 0x3fdf901c, 0x001fc7ed, 0x06b2fcfa,
  231. 0x3faf902d, 0x001fd3e8, 0x055348f1,
  232. 0x3f7f983f, 0x001fe3e5, 0x04038ce3,
  233. 0x3f3fa454, 0x001fefe3, 0x02e3c8d1,
  234. 0x3f0fb86a, 0x001ff7e4, 0x01c3e8c0,
  235. 0x3ecfd880, 0x000fffe6, 0x00c404ac },
  236. },
  237. { 0x2200, {
  238. 0x3fdf9c0b, 0x3fdf9c0b, 0x09725cf4,
  239. 0x3fbf9818, 0x3fffa400, 0x0842a8f1,
  240. 0x3f8f9827, 0x000fb3f7, 0x0702f0ec,
  241. 0x3f5fa037, 0x000fc3ef, 0x05d330e4,
  242. 0x3f2fac49, 0x001fcfea, 0x04a364d9,
  243. 0x3effc05c, 0x001fdbe7, 0x038394ca,
  244. 0x3ecfdc6f, 0x001fe7e6, 0x0273b0bb,
  245. 0x3ea00083, 0x001fefe6, 0x0183c0a9 },
  246. },
  247. { 0x2400, {
  248. 0x3f9fa014, 0x3f9fa014, 0x098260e6,
  249. 0x3f7f9c23, 0x3fcf9c0a, 0x08629ce5,
  250. 0x3f4fa431, 0x3fefa400, 0x0742d8e1,
  251. 0x3f1fb440, 0x3fffb3f8, 0x062310d9,
  252. 0x3eefc850, 0x000fbbf2, 0x050340d0,
  253. 0x3ecfe062, 0x000fcbec, 0x041364c2,
  254. 0x3ea00073, 0x001fd3ea, 0x03037cb5,
  255. 0x3e902086, 0x001fdfe8, 0x022388a5 },
  256. },
  257. { 0x2600, {
  258. 0x3f5fa81e, 0x3f5fa81e, 0x096258da,
  259. 0x3f3fac2b, 0x3f8fa412, 0x088290d8,
  260. 0x3f0fbc38, 0x3fafa408, 0x0772c8d5,
  261. 0x3eefcc47, 0x3fcfa800, 0x0672f4ce,
  262. 0x3ecfe456, 0x3fefaffa, 0x05531cc6,
  263. 0x3eb00066, 0x3fffbbf3, 0x047334bb,
  264. 0x3ea01c77, 0x000fc7ee, 0x039348ae,
  265. 0x3ea04486, 0x000fd3eb, 0x02b350a1 },
  266. },
  267. { 0x2800, {
  268. 0x3f2fb426, 0x3f2fb426, 0x094250ce,
  269. 0x3f0fc032, 0x3f4fac1b, 0x086284cd,
  270. 0x3eefd040, 0x3f7fa811, 0x0782acc9,
  271. 0x3ecfe84c, 0x3f9fa807, 0x06a2d8c4,
  272. 0x3eb0005b, 0x3fbfac00, 0x05b2f4bc,
  273. 0x3eb0186a, 0x3fdfb3fa, 0x04c308b4,
  274. 0x3eb04077, 0x3fefbbf4, 0x03f31ca8,
  275. 0x3ec06884, 0x000fbff2, 0x03031c9e },
  276. },
  277. { 0x2a00, {
  278. 0x3f0fc42d, 0x3f0fc42d, 0x090240c4,
  279. 0x3eefd439, 0x3f2fb822, 0x08526cc2,
  280. 0x3edfe845, 0x3f4fb018, 0x078294bf,
  281. 0x3ec00051, 0x3f6fac0f, 0x06b2b4bb,
  282. 0x3ec0185f, 0x3f8fac07, 0x05e2ccb4,
  283. 0x3ec0386b, 0x3fafac00, 0x0502e8ac,
  284. 0x3ed05c77, 0x3fcfb3fb, 0x0432f0a3,
  285. 0x3ef08482, 0x3fdfbbf6, 0x0372f898 },
  286. },
  287. { 0x2c00, {
  288. 0x3eefdc31, 0x3eefdc31, 0x08e238b8,
  289. 0x3edfec3d, 0x3f0fc828, 0x082258b9,
  290. 0x3ed00049, 0x3f1fc01e, 0x077278b6,
  291. 0x3ed01455, 0x3f3fb815, 0x06c294b2,
  292. 0x3ed03460, 0x3f5fb40d, 0x0602acac,
  293. 0x3ef0506c, 0x3f7fb006, 0x0542c0a4,
  294. 0x3f107476, 0x3f9fb400, 0x0472c89d,
  295. 0x3f309c80, 0x3fbfb7fc, 0x03b2cc94 },
  296. },
  297. { 0x2e00, {
  298. 0x3eefec37, 0x3eefec37, 0x088220b0,
  299. 0x3ee00041, 0x3effdc2d, 0x07f244ae,
  300. 0x3ee0144c, 0x3f0fd023, 0x07625cad,
  301. 0x3ef02c57, 0x3f1fc81a, 0x06c274a9,
  302. 0x3f004861, 0x3f3fbc13, 0x060288a6,
  303. 0x3f20686b, 0x3f5fb80c, 0x05529c9e,
  304. 0x3f408c74, 0x3f6fb805, 0x04b2ac96,
  305. 0x3f80ac7e, 0x3f8fb800, 0x0402ac8e },
  306. },
  307. { 0x3000, {
  308. 0x3ef0003a, 0x3ef0003a, 0x084210a6,
  309. 0x3ef01045, 0x3effec32, 0x07b228a7,
  310. 0x3f00284e, 0x3f0fdc29, 0x073244a4,
  311. 0x3f104058, 0x3f0fd420, 0x06a258a2,
  312. 0x3f305c62, 0x3f2fc818, 0x0612689d,
  313. 0x3f508069, 0x3f3fc011, 0x05728496,
  314. 0x3f80a072, 0x3f4fc00a, 0x04d28c90,
  315. 0x3fc0c07b, 0x3f6fbc04, 0x04429088 },
  316. },
  317. { 0x3200, {
  318. 0x3f00103e, 0x3f00103e, 0x07f1fc9e,
  319. 0x3f102447, 0x3f000035, 0x0782149d,
  320. 0x3f203c4f, 0x3f0ff02c, 0x07122c9c,
  321. 0x3f405458, 0x3f0fe424, 0x06924099,
  322. 0x3f607061, 0x3f1fd41d, 0x06024c97,
  323. 0x3f909068, 0x3f2fcc16, 0x05726490,
  324. 0x3fc0b070, 0x3f3fc80f, 0x04f26c8a,
  325. 0x0000d077, 0x3f4fc409, 0x04627484 },
  326. },
  327. { 0x3400, {
  328. 0x3f202040, 0x3f202040, 0x07a1e898,
  329. 0x3f303449, 0x3f100c38, 0x0741fc98,
  330. 0x3f504c50, 0x3f10002f, 0x06e21495,
  331. 0x3f706459, 0x3f1ff028, 0x06722492,
  332. 0x3fa08060, 0x3f1fe421, 0x05f2348f,
  333. 0x3fd09c67, 0x3f1fdc19, 0x05824c89,
  334. 0x0000bc6e, 0x3f2fd014, 0x04f25086,
  335. 0x0040dc74, 0x3f3fcc0d, 0x04825c7f },
  336. },
  337. { 0x3600, {
  338. 0x3f403042, 0x3f403042, 0x0761d890,
  339. 0x3f504848, 0x3f301c3b, 0x0701f090,
  340. 0x3f805c50, 0x3f200c33, 0x06a2008f,
  341. 0x3fa07458, 0x3f10002b, 0x06520c8d,
  342. 0x3fd0905e, 0x3f1ff424, 0x05e22089,
  343. 0x0000ac65, 0x3f1fe81d, 0x05823483,
  344. 0x0030cc6a, 0x3f2fdc18, 0x04f23c81,
  345. 0x0080e871, 0x3f2fd412, 0x0482407c },
  346. },
  347. { 0x3800, {
  348. 0x3f604043, 0x3f604043, 0x0721c88a,
  349. 0x3f80544a, 0x3f502c3c, 0x06d1d88a,
  350. 0x3fb06851, 0x3f301c35, 0x0681e889,
  351. 0x3fd08456, 0x3f30082f, 0x0611fc88,
  352. 0x00009c5d, 0x3f200027, 0x05d20884,
  353. 0x0030b863, 0x3f2ff421, 0x05621880,
  354. 0x0070d468, 0x3f2fe81b, 0x0502247c,
  355. 0x00c0ec6f, 0x3f2fe015, 0x04a22877 },
  356. },
  357. { 0x3a00, {
  358. 0x3f904c44, 0x3f904c44, 0x06e1b884,
  359. 0x3fb0604a, 0x3f70383e, 0x0691c885,
  360. 0x3fe07451, 0x3f502c36, 0x0661d483,
  361. 0x00009055, 0x3f401831, 0x0601ec81,
  362. 0x0030a85b, 0x3f300c2a, 0x05b1f480,
  363. 0x0070c061, 0x3f300024, 0x0562047a,
  364. 0x00b0d867, 0x3f3ff41e, 0x05020c77,
  365. 0x00f0f46b, 0x3f2fec19, 0x04a21474 },
  366. },
  367. { 0x3c00, {
  368. 0x3fb05c43, 0x3fb05c43, 0x06c1b07e,
  369. 0x3fe06c4b, 0x3f902c3f, 0x0681c081,
  370. 0x0000844f, 0x3f703838, 0x0631cc7d,
  371. 0x00309855, 0x3f602433, 0x05d1d47e,
  372. 0x0060b459, 0x3f50142e, 0x0581e47b,
  373. 0x00a0c85f, 0x3f400828, 0x0531f078,
  374. 0x00e0e064, 0x3f300021, 0x0501fc73,
  375. 0x00b0fc6a, 0x3f3ff41d, 0x04a20873 },
  376. },
  377. { 0x3e00, {
  378. 0x3fe06444, 0x3fe06444, 0x0681a07a,
  379. 0x00007849, 0x3fc0503f, 0x0641b07a,
  380. 0x0020904d, 0x3fa0403a, 0x05f1c07a,
  381. 0x0060a453, 0x3f803034, 0x05c1c878,
  382. 0x0090b858, 0x3f70202f, 0x0571d477,
  383. 0x00d0d05d, 0x3f501829, 0x0531e073,
  384. 0x0110e462, 0x3f500825, 0x04e1e471,
  385. 0x01510065, 0x3f40001f, 0x04a1f06d },
  386. },
  387. { 0x4000, {
  388. 0x00007044, 0x00007044, 0x06519476,
  389. 0x00208448, 0x3fe05c3f, 0x0621a476,
  390. 0x0050984d, 0x3fc04c3a, 0x05e1b075,
  391. 0x0080ac52, 0x3fa03c35, 0x05a1b875,
  392. 0x00c0c056, 0x3f803030, 0x0561c473,
  393. 0x0100d45b, 0x3f70202b, 0x0521d46f,
  394. 0x0140e860, 0x3f601427, 0x04d1d46e,
  395. 0x01810064, 0x3f500822, 0x0491dc6b },
  396. },
  397. { 0x5000, {
  398. 0x0110a442, 0x0110a442, 0x0551545e,
  399. 0x0140b045, 0x00e0983f, 0x0531585f,
  400. 0x0160c047, 0x00c08c3c, 0x0511645e,
  401. 0x0190cc4a, 0x00908039, 0x04f1685f,
  402. 0x01c0dc4c, 0x00707436, 0x04d1705e,
  403. 0x0200e850, 0x00506833, 0x04b1785b,
  404. 0x0230f453, 0x00305c30, 0x0491805a,
  405. 0x02710056, 0x0010542d, 0x04718059 },
  406. },
  407. { 0x6000, {
  408. 0x01c0bc40, 0x01c0bc40, 0x04c13052,
  409. 0x01e0c841, 0x01a0b43d, 0x04c13851,
  410. 0x0210cc44, 0x0180a83c, 0x04a13453,
  411. 0x0230d845, 0x0160a03a, 0x04913c52,
  412. 0x0260e047, 0x01409838, 0x04714052,
  413. 0x0280ec49, 0x01208c37, 0x04514c50,
  414. 0x02b0f44b, 0x01008435, 0x04414c50,
  415. 0x02d1004c, 0x00e07c33, 0x0431544f },
  416. },
  417. { 0x7000, {
  418. 0x0230c83e, 0x0230c83e, 0x04711c4c,
  419. 0x0250d03f, 0x0210c43c, 0x0471204b,
  420. 0x0270d840, 0x0200b83c, 0x0451244b,
  421. 0x0290dc42, 0x01e0b43a, 0x0441244c,
  422. 0x02b0e443, 0x01c0b038, 0x0441284b,
  423. 0x02d0ec44, 0x01b0a438, 0x0421304a,
  424. 0x02f0f445, 0x0190a036, 0x04213449,
  425. 0x0310f847, 0x01709c34, 0x04213848 },
  426. },
  427. { 0x8000, {
  428. 0x0280d03d, 0x0280d03d, 0x04310c48,
  429. 0x02a0d43e, 0x0270c83c, 0x04311047,
  430. 0x02b0dc3e, 0x0250c83a, 0x04311447,
  431. 0x02d0e040, 0x0240c03a, 0x04211446,
  432. 0x02e0e840, 0x0220bc39, 0x04111847,
  433. 0x0300e842, 0x0210b438, 0x04012445,
  434. 0x0310f043, 0x0200b037, 0x04012045,
  435. 0x0330f444, 0x01e0ac36, 0x03f12445 },
  436. },
  437. { 0xefff, {
  438. 0x0340dc3a, 0x0340dc3a, 0x03b0ec40,
  439. 0x0340e03a, 0x0330e039, 0x03c0f03e,
  440. 0x0350e03b, 0x0330dc39, 0x03c0ec3e,
  441. 0x0350e43a, 0x0320dc38, 0x03c0f43e,
  442. 0x0360e43b, 0x0320d839, 0x03b0f03e,
  443. 0x0360e83b, 0x0310d838, 0x03c0fc3b,
  444. 0x0370e83b, 0x0310d439, 0x03a0f83d,
  445. 0x0370e83c, 0x0300d438, 0x03b0fc3c },
  446. }
  447. };
  448. enum rcar_vin_state {
  449. STOPPED = 0,
  450. RUNNING,
  451. STOPPING,
  452. };
  453. struct rcar_vin_priv {
  454. void __iomem *base;
  455. spinlock_t lock;
  456. int sequence;
  457. /* State of the VIN module in capturing mode */
  458. enum rcar_vin_state state;
  459. struct soc_camera_host ici;
  460. struct list_head capture;
  461. #define MAX_BUFFER_NUM 3
  462. struct vb2_buffer *queue_buf[MAX_BUFFER_NUM];
  463. struct vb2_alloc_ctx *alloc_ctx;
  464. enum v4l2_field field;
  465. unsigned int pdata_flags;
  466. unsigned int vb_count;
  467. unsigned int nr_hw_slots;
  468. bool request_to_stop;
  469. struct completion capture_stop;
  470. enum chip_id chip;
  471. };
  472. #define is_continuous_transfer(priv) (priv->vb_count > MAX_BUFFER_NUM)
  473. struct rcar_vin_buffer {
  474. struct vb2_buffer vb;
  475. struct list_head list;
  476. };
  477. #define to_buf_list(vb2_buffer) (&container_of(vb2_buffer, \
  478. struct rcar_vin_buffer, \
  479. vb)->list)
  480. struct rcar_vin_cam {
  481. /* VIN offsets within the camera output, before the VIN scaler */
  482. unsigned int vin_left;
  483. unsigned int vin_top;
  484. /* Client output, as seen by the VIN */
  485. unsigned int width;
  486. unsigned int height;
  487. /* User window from S_FMT */
  488. unsigned int out_width;
  489. unsigned int out_height;
  490. /*
  491. * User window from S_CROP / G_CROP, produced by client cropping and
  492. * scaling, VIN scaling and VIN cropping, mapped back onto the client
  493. * input window
  494. */
  495. struct v4l2_rect subrect;
  496. /* Camera cropping rectangle */
  497. struct v4l2_rect rect;
  498. const struct soc_mbus_pixelfmt *extra_fmt;
  499. };
  500. /*
  501. * .queue_setup() is called to check whether the driver can accept the requested
  502. * number of buffers and to fill in plane sizes for the current frame format if
  503. * required
  504. */
  505. static int rcar_vin_videobuf_setup(struct vb2_queue *vq,
  506. const struct v4l2_format *fmt,
  507. unsigned int *count,
  508. unsigned int *num_planes,
  509. unsigned int sizes[], void *alloc_ctxs[])
  510. {
  511. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  512. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  513. struct rcar_vin_priv *priv = ici->priv;
  514. if (fmt) {
  515. const struct soc_camera_format_xlate *xlate;
  516. unsigned int bytes_per_line;
  517. int ret;
  518. xlate = soc_camera_xlate_by_fourcc(icd,
  519. fmt->fmt.pix.pixelformat);
  520. if (!xlate)
  521. return -EINVAL;
  522. ret = soc_mbus_bytes_per_line(fmt->fmt.pix.width,
  523. xlate->host_fmt);
  524. if (ret < 0)
  525. return ret;
  526. bytes_per_line = max_t(u32, fmt->fmt.pix.bytesperline, ret);
  527. ret = soc_mbus_image_size(xlate->host_fmt, bytes_per_line,
  528. fmt->fmt.pix.height);
  529. if (ret < 0)
  530. return ret;
  531. sizes[0] = max_t(u32, fmt->fmt.pix.sizeimage, ret);
  532. } else {
  533. /* Called from VIDIOC_REQBUFS or in compatibility mode */
  534. sizes[0] = icd->sizeimage;
  535. }
  536. alloc_ctxs[0] = priv->alloc_ctx;
  537. if (!vq->num_buffers)
  538. priv->sequence = 0;
  539. if (!*count)
  540. *count = 2;
  541. priv->vb_count = *count;
  542. *num_planes = 1;
  543. /* Number of hardware slots */
  544. if (is_continuous_transfer(priv))
  545. priv->nr_hw_slots = MAX_BUFFER_NUM;
  546. else
  547. priv->nr_hw_slots = 1;
  548. dev_dbg(icd->parent, "count=%d, size=%u\n", *count, sizes[0]);
  549. return 0;
  550. }
  551. static int rcar_vin_setup(struct rcar_vin_priv *priv)
  552. {
  553. struct soc_camera_device *icd = priv->ici.icd;
  554. struct rcar_vin_cam *cam = icd->host_priv;
  555. u32 vnmc, dmr, interrupts;
  556. bool progressive = false, output_is_yuv = false;
  557. switch (priv->field) {
  558. case V4L2_FIELD_TOP:
  559. vnmc = VNMC_IM_ODD;
  560. break;
  561. case V4L2_FIELD_BOTTOM:
  562. vnmc = VNMC_IM_EVEN;
  563. break;
  564. case V4L2_FIELD_INTERLACED:
  565. case V4L2_FIELD_INTERLACED_TB:
  566. vnmc = VNMC_IM_FULL;
  567. break;
  568. case V4L2_FIELD_INTERLACED_BT:
  569. vnmc = VNMC_IM_FULL | VNMC_FOC;
  570. break;
  571. case V4L2_FIELD_NONE:
  572. if (is_continuous_transfer(priv)) {
  573. vnmc = VNMC_IM_ODD_EVEN;
  574. progressive = true;
  575. } else {
  576. vnmc = VNMC_IM_ODD;
  577. }
  578. break;
  579. default:
  580. vnmc = VNMC_IM_ODD;
  581. break;
  582. }
  583. /* input interface */
  584. switch (icd->current_fmt->code) {
  585. case MEDIA_BUS_FMT_YUYV8_1X16:
  586. /* BT.601/BT.1358 16bit YCbCr422 */
  587. vnmc |= VNMC_INF_YUV16;
  588. break;
  589. case MEDIA_BUS_FMT_YUYV8_2X8:
  590. /* BT.656 8bit YCbCr422 or BT.601 8bit YCbCr422 */
  591. vnmc |= priv->pdata_flags & RCAR_VIN_BT656 ?
  592. VNMC_INF_YUV8_BT656 : VNMC_INF_YUV8_BT601;
  593. break;
  594. case MEDIA_BUS_FMT_YUYV10_2X10:
  595. /* BT.656 10bit YCbCr422 or BT.601 10bit YCbCr422 */
  596. vnmc |= priv->pdata_flags & RCAR_VIN_BT656 ?
  597. VNMC_INF_YUV10_BT656 : VNMC_INF_YUV10_BT601;
  598. break;
  599. default:
  600. break;
  601. }
  602. /* output format */
  603. switch (icd->current_fmt->host_fmt->fourcc) {
  604. case V4L2_PIX_FMT_NV16:
  605. iowrite32(ALIGN(cam->width * cam->height, 0x80),
  606. priv->base + VNUVAOF_REG);
  607. dmr = VNDMR_DTMD_YCSEP;
  608. output_is_yuv = true;
  609. break;
  610. case V4L2_PIX_FMT_YUYV:
  611. dmr = VNDMR_BPSM;
  612. output_is_yuv = true;
  613. break;
  614. case V4L2_PIX_FMT_UYVY:
  615. dmr = 0;
  616. output_is_yuv = true;
  617. break;
  618. case V4L2_PIX_FMT_RGB555X:
  619. dmr = VNDMR_DTMD_ARGB1555;
  620. break;
  621. case V4L2_PIX_FMT_RGB565:
  622. dmr = 0;
  623. break;
  624. case V4L2_PIX_FMT_RGB32:
  625. if (priv->chip == RCAR_GEN2 || priv->chip == RCAR_H1 ||
  626. priv->chip == RCAR_E1) {
  627. dmr = VNDMR_EXRGB;
  628. break;
  629. }
  630. default:
  631. dev_warn(icd->parent, "Invalid fourcc format (0x%x)\n",
  632. icd->current_fmt->host_fmt->fourcc);
  633. return -EINVAL;
  634. }
  635. /* Always update on field change */
  636. vnmc |= VNMC_VUP;
  637. /* If input and output use the same colorspace, use bypass mode */
  638. if (output_is_yuv)
  639. vnmc |= VNMC_BPS;
  640. /* progressive or interlaced mode */
  641. interrupts = progressive ? VNIE_FIE : VNIE_EFE;
  642. /* ack interrupts */
  643. iowrite32(interrupts, priv->base + VNINTS_REG);
  644. /* enable interrupts */
  645. iowrite32(interrupts, priv->base + VNIE_REG);
  646. /* start capturing */
  647. iowrite32(dmr, priv->base + VNDMR_REG);
  648. iowrite32(vnmc | VNMC_ME, priv->base + VNMC_REG);
  649. return 0;
  650. }
  651. static void rcar_vin_capture(struct rcar_vin_priv *priv)
  652. {
  653. if (is_continuous_transfer(priv))
  654. /* Continuous Frame Capture Mode */
  655. iowrite32(VNFC_C_FRAME, priv->base + VNFC_REG);
  656. else
  657. /* Single Frame Capture Mode */
  658. iowrite32(VNFC_S_FRAME, priv->base + VNFC_REG);
  659. }
  660. static void rcar_vin_request_capture_stop(struct rcar_vin_priv *priv)
  661. {
  662. priv->state = STOPPING;
  663. /* set continuous & single transfer off */
  664. iowrite32(0, priv->base + VNFC_REG);
  665. /* disable capture (release DMA buffer), reset */
  666. iowrite32(ioread32(priv->base + VNMC_REG) & ~VNMC_ME,
  667. priv->base + VNMC_REG);
  668. /* update the status if stopped already */
  669. if (!(ioread32(priv->base + VNMS_REG) & VNMS_CA))
  670. priv->state = STOPPED;
  671. }
  672. static int rcar_vin_get_free_hw_slot(struct rcar_vin_priv *priv)
  673. {
  674. int slot;
  675. for (slot = 0; slot < priv->nr_hw_slots; slot++)
  676. if (priv->queue_buf[slot] == NULL)
  677. return slot;
  678. return -1;
  679. }
  680. static int rcar_vin_hw_ready(struct rcar_vin_priv *priv)
  681. {
  682. /* Ensure all HW slots are filled */
  683. return rcar_vin_get_free_hw_slot(priv) < 0 ? 1 : 0;
  684. }
  685. /* Moves a buffer from the queue to the HW slots */
  686. static int rcar_vin_fill_hw_slot(struct rcar_vin_priv *priv)
  687. {
  688. struct vb2_buffer *vb;
  689. dma_addr_t phys_addr_top;
  690. int slot;
  691. if (list_empty(&priv->capture))
  692. return 0;
  693. /* Find a free HW slot */
  694. slot = rcar_vin_get_free_hw_slot(priv);
  695. if (slot < 0)
  696. return 0;
  697. vb = &list_entry(priv->capture.next, struct rcar_vin_buffer, list)->vb;
  698. list_del_init(to_buf_list(vb));
  699. priv->queue_buf[slot] = vb;
  700. phys_addr_top = vb2_dma_contig_plane_dma_addr(vb, 0);
  701. iowrite32(phys_addr_top, priv->base + VNMB_REG(slot));
  702. return 1;
  703. }
  704. static void rcar_vin_videobuf_queue(struct vb2_buffer *vb)
  705. {
  706. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  707. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  708. struct rcar_vin_priv *priv = ici->priv;
  709. unsigned long size;
  710. size = icd->sizeimage;
  711. if (vb2_plane_size(vb, 0) < size) {
  712. dev_err(icd->parent, "Buffer #%d too small (%lu < %lu)\n",
  713. vb->v4l2_buf.index, vb2_plane_size(vb, 0), size);
  714. goto error;
  715. }
  716. vb2_set_plane_payload(vb, 0, size);
  717. dev_dbg(icd->parent, "%s (vb=0x%p) 0x%p %lu\n", __func__,
  718. vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0));
  719. spin_lock_irq(&priv->lock);
  720. list_add_tail(to_buf_list(vb), &priv->capture);
  721. rcar_vin_fill_hw_slot(priv);
  722. /* If we weren't running, and have enough buffers, start capturing! */
  723. if (priv->state != RUNNING && rcar_vin_hw_ready(priv)) {
  724. if (rcar_vin_setup(priv)) {
  725. /* Submit error */
  726. list_del_init(to_buf_list(vb));
  727. spin_unlock_irq(&priv->lock);
  728. goto error;
  729. }
  730. priv->request_to_stop = false;
  731. init_completion(&priv->capture_stop);
  732. priv->state = RUNNING;
  733. rcar_vin_capture(priv);
  734. }
  735. spin_unlock_irq(&priv->lock);
  736. return;
  737. error:
  738. vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
  739. }
  740. /*
  741. * Wait for capture to stop and all in-flight buffers to be finished with by
  742. * the video hardware. This must be called under &priv->lock
  743. *
  744. */
  745. static void rcar_vin_wait_stop_streaming(struct rcar_vin_priv *priv)
  746. {
  747. while (priv->state != STOPPED) {
  748. /* issue stop if running */
  749. if (priv->state == RUNNING)
  750. rcar_vin_request_capture_stop(priv);
  751. /* wait until capturing has been stopped */
  752. if (priv->state == STOPPING) {
  753. priv->request_to_stop = true;
  754. spin_unlock_irq(&priv->lock);
  755. if (!wait_for_completion_timeout(
  756. &priv->capture_stop,
  757. msecs_to_jiffies(TIMEOUT_MS)))
  758. priv->state = STOPPED;
  759. spin_lock_irq(&priv->lock);
  760. }
  761. }
  762. }
  763. static void rcar_vin_stop_streaming(struct vb2_queue *vq)
  764. {
  765. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  766. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  767. struct rcar_vin_priv *priv = ici->priv;
  768. struct list_head *buf_head, *tmp;
  769. int i;
  770. spin_lock_irq(&priv->lock);
  771. rcar_vin_wait_stop_streaming(priv);
  772. for (i = 0; i < MAX_BUFFER_NUM; i++) {
  773. if (priv->queue_buf[i]) {
  774. vb2_buffer_done(priv->queue_buf[i],
  775. VB2_BUF_STATE_ERROR);
  776. priv->queue_buf[i] = NULL;
  777. }
  778. }
  779. list_for_each_safe(buf_head, tmp, &priv->capture) {
  780. vb2_buffer_done(&list_entry(buf_head,
  781. struct rcar_vin_buffer, list)->vb,
  782. VB2_BUF_STATE_ERROR);
  783. list_del_init(buf_head);
  784. }
  785. spin_unlock_irq(&priv->lock);
  786. }
  787. static struct vb2_ops rcar_vin_vb2_ops = {
  788. .queue_setup = rcar_vin_videobuf_setup,
  789. .buf_queue = rcar_vin_videobuf_queue,
  790. .stop_streaming = rcar_vin_stop_streaming,
  791. .wait_prepare = vb2_ops_wait_prepare,
  792. .wait_finish = vb2_ops_wait_finish,
  793. };
  794. static irqreturn_t rcar_vin_irq(int irq, void *data)
  795. {
  796. struct rcar_vin_priv *priv = data;
  797. u32 int_status;
  798. bool can_run = false, hw_stopped;
  799. int slot;
  800. unsigned int handled = 0;
  801. spin_lock(&priv->lock);
  802. int_status = ioread32(priv->base + VNINTS_REG);
  803. if (!int_status)
  804. goto done;
  805. /* ack interrupts */
  806. iowrite32(int_status, priv->base + VNINTS_REG);
  807. handled = 1;
  808. /* nothing to do if capture status is 'STOPPED' */
  809. if (priv->state == STOPPED)
  810. goto done;
  811. hw_stopped = !(ioread32(priv->base + VNMS_REG) & VNMS_CA);
  812. if (!priv->request_to_stop) {
  813. if (is_continuous_transfer(priv))
  814. slot = (ioread32(priv->base + VNMS_REG) &
  815. VNMS_FBS_MASK) >> VNMS_FBS_SHIFT;
  816. else
  817. slot = 0;
  818. priv->queue_buf[slot]->v4l2_buf.field = priv->field;
  819. priv->queue_buf[slot]->v4l2_buf.sequence = priv->sequence++;
  820. do_gettimeofday(&priv->queue_buf[slot]->v4l2_buf.timestamp);
  821. vb2_buffer_done(priv->queue_buf[slot], VB2_BUF_STATE_DONE);
  822. priv->queue_buf[slot] = NULL;
  823. if (priv->state != STOPPING)
  824. can_run = rcar_vin_fill_hw_slot(priv);
  825. if (hw_stopped || !can_run) {
  826. priv->state = STOPPED;
  827. } else if (is_continuous_transfer(priv) &&
  828. list_empty(&priv->capture) &&
  829. priv->state == RUNNING) {
  830. /*
  831. * The continuous capturing requires an explicit stop
  832. * operation when there is no buffer to be set into
  833. * the VnMBm registers.
  834. */
  835. rcar_vin_request_capture_stop(priv);
  836. } else {
  837. rcar_vin_capture(priv);
  838. }
  839. } else if (hw_stopped) {
  840. priv->state = STOPPED;
  841. priv->request_to_stop = false;
  842. complete(&priv->capture_stop);
  843. }
  844. done:
  845. spin_unlock(&priv->lock);
  846. return IRQ_RETVAL(handled);
  847. }
  848. static int rcar_vin_add_device(struct soc_camera_device *icd)
  849. {
  850. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  851. struct rcar_vin_priv *priv = ici->priv;
  852. int i;
  853. for (i = 0; i < MAX_BUFFER_NUM; i++)
  854. priv->queue_buf[i] = NULL;
  855. pm_runtime_get_sync(ici->v4l2_dev.dev);
  856. dev_dbg(icd->parent, "R-Car VIN driver attached to camera %d\n",
  857. icd->devnum);
  858. return 0;
  859. }
  860. static void rcar_vin_remove_device(struct soc_camera_device *icd)
  861. {
  862. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  863. struct rcar_vin_priv *priv = ici->priv;
  864. struct vb2_buffer *vb;
  865. int i;
  866. /* disable capture, disable interrupts */
  867. iowrite32(ioread32(priv->base + VNMC_REG) & ~VNMC_ME,
  868. priv->base + VNMC_REG);
  869. iowrite32(0, priv->base + VNIE_REG);
  870. priv->state = STOPPED;
  871. priv->request_to_stop = false;
  872. /* make sure active buffer is cancelled */
  873. spin_lock_irq(&priv->lock);
  874. for (i = 0; i < MAX_BUFFER_NUM; i++) {
  875. vb = priv->queue_buf[i];
  876. if (vb) {
  877. list_del_init(to_buf_list(vb));
  878. vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
  879. }
  880. }
  881. spin_unlock_irq(&priv->lock);
  882. pm_runtime_put(ici->v4l2_dev.dev);
  883. dev_dbg(icd->parent, "R-Car VIN driver detached from camera %d\n",
  884. icd->devnum);
  885. }
  886. static void set_coeff(struct rcar_vin_priv *priv, unsigned short xs)
  887. {
  888. int i;
  889. const struct vin_coeff *p_prev_set = NULL;
  890. const struct vin_coeff *p_set = NULL;
  891. /* Look for suitable coefficient values */
  892. for (i = 0; i < ARRAY_SIZE(vin_coeff_set); i++) {
  893. p_prev_set = p_set;
  894. p_set = &vin_coeff_set[i];
  895. if (xs < p_set->xs_value)
  896. break;
  897. }
  898. /* Use previous value if its XS value is closer */
  899. if (p_prev_set && p_set &&
  900. xs - p_prev_set->xs_value < p_set->xs_value - xs)
  901. p_set = p_prev_set;
  902. /* Set coefficient registers */
  903. iowrite32(p_set->coeff_set[0], priv->base + VNC1A_REG);
  904. iowrite32(p_set->coeff_set[1], priv->base + VNC1B_REG);
  905. iowrite32(p_set->coeff_set[2], priv->base + VNC1C_REG);
  906. iowrite32(p_set->coeff_set[3], priv->base + VNC2A_REG);
  907. iowrite32(p_set->coeff_set[4], priv->base + VNC2B_REG);
  908. iowrite32(p_set->coeff_set[5], priv->base + VNC2C_REG);
  909. iowrite32(p_set->coeff_set[6], priv->base + VNC3A_REG);
  910. iowrite32(p_set->coeff_set[7], priv->base + VNC3B_REG);
  911. iowrite32(p_set->coeff_set[8], priv->base + VNC3C_REG);
  912. iowrite32(p_set->coeff_set[9], priv->base + VNC4A_REG);
  913. iowrite32(p_set->coeff_set[10], priv->base + VNC4B_REG);
  914. iowrite32(p_set->coeff_set[11], priv->base + VNC4C_REG);
  915. iowrite32(p_set->coeff_set[12], priv->base + VNC5A_REG);
  916. iowrite32(p_set->coeff_set[13], priv->base + VNC5B_REG);
  917. iowrite32(p_set->coeff_set[14], priv->base + VNC5C_REG);
  918. iowrite32(p_set->coeff_set[15], priv->base + VNC6A_REG);
  919. iowrite32(p_set->coeff_set[16], priv->base + VNC6B_REG);
  920. iowrite32(p_set->coeff_set[17], priv->base + VNC6C_REG);
  921. iowrite32(p_set->coeff_set[18], priv->base + VNC7A_REG);
  922. iowrite32(p_set->coeff_set[19], priv->base + VNC7B_REG);
  923. iowrite32(p_set->coeff_set[20], priv->base + VNC7C_REG);
  924. iowrite32(p_set->coeff_set[21], priv->base + VNC8A_REG);
  925. iowrite32(p_set->coeff_set[22], priv->base + VNC8B_REG);
  926. iowrite32(p_set->coeff_set[23], priv->base + VNC8C_REG);
  927. }
  928. /* rect is guaranteed to not exceed the scaled camera rectangle */
  929. static int rcar_vin_set_rect(struct soc_camera_device *icd)
  930. {
  931. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  932. struct rcar_vin_cam *cam = icd->host_priv;
  933. struct rcar_vin_priv *priv = ici->priv;
  934. unsigned int left_offset, top_offset;
  935. unsigned char dsize = 0;
  936. struct v4l2_rect *cam_subrect = &cam->subrect;
  937. u32 value;
  938. dev_dbg(icd->parent, "Crop %ux%u@%u:%u\n",
  939. icd->user_width, icd->user_height, cam->vin_left, cam->vin_top);
  940. left_offset = cam->vin_left;
  941. top_offset = cam->vin_top;
  942. if (icd->current_fmt->host_fmt->fourcc == V4L2_PIX_FMT_RGB32 &&
  943. priv->chip == RCAR_E1)
  944. dsize = 1;
  945. dev_dbg(icd->parent, "Cam %ux%u@%u:%u\n",
  946. cam->width, cam->height, cam->vin_left, cam->vin_top);
  947. dev_dbg(icd->parent, "Cam subrect %ux%u@%u:%u\n",
  948. cam_subrect->width, cam_subrect->height,
  949. cam_subrect->left, cam_subrect->top);
  950. /* Set Start/End Pixel/Line Pre-Clip */
  951. iowrite32(left_offset << dsize, priv->base + VNSPPRC_REG);
  952. iowrite32((left_offset + cam_subrect->width - 1) << dsize,
  953. priv->base + VNEPPRC_REG);
  954. switch (priv->field) {
  955. case V4L2_FIELD_INTERLACED:
  956. case V4L2_FIELD_INTERLACED_TB:
  957. case V4L2_FIELD_INTERLACED_BT:
  958. iowrite32(top_offset / 2, priv->base + VNSLPRC_REG);
  959. iowrite32((top_offset + cam_subrect->height) / 2 - 1,
  960. priv->base + VNELPRC_REG);
  961. break;
  962. default:
  963. iowrite32(top_offset, priv->base + VNSLPRC_REG);
  964. iowrite32(top_offset + cam_subrect->height - 1,
  965. priv->base + VNELPRC_REG);
  966. break;
  967. }
  968. /* Set scaling coefficient */
  969. value = 0;
  970. if (cam_subrect->height != cam->out_height)
  971. value = (4096 * cam_subrect->height) / cam->out_height;
  972. dev_dbg(icd->parent, "YS Value: %x\n", value);
  973. iowrite32(value, priv->base + VNYS_REG);
  974. value = 0;
  975. if (cam_subrect->width != cam->out_width)
  976. value = (4096 * cam_subrect->width) / cam->out_width;
  977. /* Horizontal upscaling is up to double size */
  978. if (0 < value && value < 2048)
  979. value = 2048;
  980. dev_dbg(icd->parent, "XS Value: %x\n", value);
  981. iowrite32(value, priv->base + VNXS_REG);
  982. /* Horizontal upscaling is carried out by scaling down from double size */
  983. if (value < 4096)
  984. value *= 2;
  985. set_coeff(priv, value);
  986. /* Set Start/End Pixel/Line Post-Clip */
  987. iowrite32(0, priv->base + VNSPPOC_REG);
  988. iowrite32(0, priv->base + VNSLPOC_REG);
  989. iowrite32((cam->out_width - 1) << dsize, priv->base + VNEPPOC_REG);
  990. switch (priv->field) {
  991. case V4L2_FIELD_INTERLACED:
  992. case V4L2_FIELD_INTERLACED_TB:
  993. case V4L2_FIELD_INTERLACED_BT:
  994. iowrite32(cam->out_height / 2 - 1,
  995. priv->base + VNELPOC_REG);
  996. break;
  997. default:
  998. iowrite32(cam->out_height - 1, priv->base + VNELPOC_REG);
  999. break;
  1000. }
  1001. iowrite32(ALIGN(cam->out_width, 0x10), priv->base + VNIS_REG);
  1002. return 0;
  1003. }
  1004. static void capture_stop_preserve(struct rcar_vin_priv *priv, u32 *vnmc)
  1005. {
  1006. *vnmc = ioread32(priv->base + VNMC_REG);
  1007. /* module disable */
  1008. iowrite32(*vnmc & ~VNMC_ME, priv->base + VNMC_REG);
  1009. }
  1010. static void capture_restore(struct rcar_vin_priv *priv, u32 vnmc)
  1011. {
  1012. unsigned long timeout = jiffies + 10 * HZ;
  1013. /*
  1014. * Wait until the end of the current frame. It can take a long time,
  1015. * but if it has been aborted by a MRST1 reset, it should exit sooner.
  1016. */
  1017. while ((ioread32(priv->base + VNMS_REG) & VNMS_AV) &&
  1018. time_before(jiffies, timeout))
  1019. msleep(1);
  1020. if (time_after(jiffies, timeout)) {
  1021. dev_err(priv->ici.v4l2_dev.dev,
  1022. "Timeout waiting for frame end! Interface problem?\n");
  1023. return;
  1024. }
  1025. iowrite32(vnmc, priv->base + VNMC_REG);
  1026. }
  1027. #define VIN_MBUS_FLAGS (V4L2_MBUS_MASTER | \
  1028. V4L2_MBUS_PCLK_SAMPLE_RISING | \
  1029. V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  1030. V4L2_MBUS_HSYNC_ACTIVE_LOW | \
  1031. V4L2_MBUS_VSYNC_ACTIVE_HIGH | \
  1032. V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  1033. V4L2_MBUS_DATA_ACTIVE_HIGH)
  1034. static int rcar_vin_set_bus_param(struct soc_camera_device *icd)
  1035. {
  1036. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  1037. struct rcar_vin_priv *priv = ici->priv;
  1038. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  1039. struct v4l2_mbus_config cfg;
  1040. unsigned long common_flags;
  1041. u32 vnmc;
  1042. u32 val;
  1043. int ret;
  1044. capture_stop_preserve(priv, &vnmc);
  1045. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  1046. if (!ret) {
  1047. common_flags = soc_mbus_config_compatible(&cfg, VIN_MBUS_FLAGS);
  1048. if (!common_flags) {
  1049. dev_warn(icd->parent,
  1050. "MBUS flags incompatible: camera 0x%x, host 0x%x\n",
  1051. cfg.flags, VIN_MBUS_FLAGS);
  1052. return -EINVAL;
  1053. }
  1054. } else if (ret != -ENOIOCTLCMD) {
  1055. return ret;
  1056. } else {
  1057. common_flags = VIN_MBUS_FLAGS;
  1058. }
  1059. /* Make choises, based on platform preferences */
  1060. if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
  1061. (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
  1062. if (priv->pdata_flags & RCAR_VIN_HSYNC_ACTIVE_LOW)
  1063. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
  1064. else
  1065. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
  1066. }
  1067. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  1068. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  1069. if (priv->pdata_flags & RCAR_VIN_VSYNC_ACTIVE_LOW)
  1070. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  1071. else
  1072. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  1073. }
  1074. cfg.flags = common_flags;
  1075. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  1076. if (ret < 0 && ret != -ENOIOCTLCMD)
  1077. return ret;
  1078. val = VNDMR2_FTEV | VNDMR2_VLV(1);
  1079. if (!(common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW))
  1080. val |= VNDMR2_VPS;
  1081. if (!(common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW))
  1082. val |= VNDMR2_HPS;
  1083. iowrite32(val, priv->base + VNDMR2_REG);
  1084. ret = rcar_vin_set_rect(icd);
  1085. if (ret < 0)
  1086. return ret;
  1087. capture_restore(priv, vnmc);
  1088. return 0;
  1089. }
  1090. static int rcar_vin_try_bus_param(struct soc_camera_device *icd,
  1091. unsigned char buswidth)
  1092. {
  1093. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  1094. struct v4l2_mbus_config cfg;
  1095. int ret;
  1096. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  1097. if (ret == -ENOIOCTLCMD)
  1098. return 0;
  1099. else if (ret)
  1100. return ret;
  1101. if (buswidth > 24)
  1102. return -EINVAL;
  1103. /* check is there common mbus flags */
  1104. ret = soc_mbus_config_compatible(&cfg, VIN_MBUS_FLAGS);
  1105. if (ret)
  1106. return 0;
  1107. dev_warn(icd->parent,
  1108. "MBUS flags incompatible: camera 0x%x, host 0x%x\n",
  1109. cfg.flags, VIN_MBUS_FLAGS);
  1110. return -EINVAL;
  1111. }
  1112. static bool rcar_vin_packing_supported(const struct soc_mbus_pixelfmt *fmt)
  1113. {
  1114. return fmt->packing == SOC_MBUS_PACKING_NONE ||
  1115. (fmt->bits_per_sample > 8 &&
  1116. fmt->packing == SOC_MBUS_PACKING_EXTEND16);
  1117. }
  1118. static const struct soc_mbus_pixelfmt rcar_vin_formats[] = {
  1119. {
  1120. .fourcc = V4L2_PIX_FMT_NV16,
  1121. .name = "NV16",
  1122. .bits_per_sample = 8,
  1123. .packing = SOC_MBUS_PACKING_2X8_PADHI,
  1124. .order = SOC_MBUS_ORDER_LE,
  1125. .layout = SOC_MBUS_LAYOUT_PLANAR_Y_C,
  1126. },
  1127. {
  1128. .fourcc = V4L2_PIX_FMT_YUYV,
  1129. .name = "YUYV",
  1130. .bits_per_sample = 16,
  1131. .packing = SOC_MBUS_PACKING_NONE,
  1132. .order = SOC_MBUS_ORDER_LE,
  1133. .layout = SOC_MBUS_LAYOUT_PACKED,
  1134. },
  1135. {
  1136. .fourcc = V4L2_PIX_FMT_UYVY,
  1137. .name = "UYVY",
  1138. .bits_per_sample = 16,
  1139. .packing = SOC_MBUS_PACKING_NONE,
  1140. .order = SOC_MBUS_ORDER_LE,
  1141. .layout = SOC_MBUS_LAYOUT_PACKED,
  1142. },
  1143. {
  1144. .fourcc = V4L2_PIX_FMT_RGB565,
  1145. .name = "RGB565",
  1146. .bits_per_sample = 16,
  1147. .packing = SOC_MBUS_PACKING_NONE,
  1148. .order = SOC_MBUS_ORDER_LE,
  1149. .layout = SOC_MBUS_LAYOUT_PACKED,
  1150. },
  1151. {
  1152. .fourcc = V4L2_PIX_FMT_RGB555X,
  1153. .name = "ARGB1555",
  1154. .bits_per_sample = 16,
  1155. .packing = SOC_MBUS_PACKING_NONE,
  1156. .order = SOC_MBUS_ORDER_LE,
  1157. .layout = SOC_MBUS_LAYOUT_PACKED,
  1158. },
  1159. {
  1160. .fourcc = V4L2_PIX_FMT_RGB32,
  1161. .name = "RGB888",
  1162. .bits_per_sample = 32,
  1163. .packing = SOC_MBUS_PACKING_NONE,
  1164. .order = SOC_MBUS_ORDER_LE,
  1165. .layout = SOC_MBUS_LAYOUT_PACKED,
  1166. },
  1167. };
  1168. static int rcar_vin_get_formats(struct soc_camera_device *icd, unsigned int idx,
  1169. struct soc_camera_format_xlate *xlate)
  1170. {
  1171. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  1172. struct device *dev = icd->parent;
  1173. int ret, k, n;
  1174. int formats = 0;
  1175. struct rcar_vin_cam *cam;
  1176. u32 code;
  1177. const struct soc_mbus_pixelfmt *fmt;
  1178. ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
  1179. if (ret < 0)
  1180. return 0;
  1181. fmt = soc_mbus_get_fmtdesc(code);
  1182. if (!fmt) {
  1183. dev_warn(dev, "unsupported format code #%u: %d\n", idx, code);
  1184. return 0;
  1185. }
  1186. ret = rcar_vin_try_bus_param(icd, fmt->bits_per_sample);
  1187. if (ret < 0)
  1188. return 0;
  1189. if (!icd->host_priv) {
  1190. struct v4l2_mbus_framefmt mf;
  1191. struct v4l2_rect rect;
  1192. struct device *dev = icd->parent;
  1193. int shift;
  1194. ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
  1195. if (ret < 0)
  1196. return ret;
  1197. /* Cache current client geometry */
  1198. ret = soc_camera_client_g_rect(sd, &rect);
  1199. if (ret == -ENOIOCTLCMD) {
  1200. /* Sensor driver doesn't support cropping */
  1201. rect.left = 0;
  1202. rect.top = 0;
  1203. rect.width = mf.width;
  1204. rect.height = mf.height;
  1205. } else if (ret < 0) {
  1206. return ret;
  1207. }
  1208. /*
  1209. * If sensor proposes too large format then try smaller ones:
  1210. * 1280x960, 640x480, 320x240
  1211. */
  1212. for (shift = 0; shift < 3; shift++) {
  1213. if (mf.width <= VIN_MAX_WIDTH &&
  1214. mf.height <= VIN_MAX_HEIGHT)
  1215. break;
  1216. mf.width = 1280 >> shift;
  1217. mf.height = 960 >> shift;
  1218. ret = v4l2_device_call_until_err(sd->v4l2_dev,
  1219. soc_camera_grp_id(icd),
  1220. video, s_mbus_fmt,
  1221. &mf);
  1222. if (ret < 0)
  1223. return ret;
  1224. }
  1225. if (shift == 3) {
  1226. dev_err(dev,
  1227. "Failed to configure the client below %ux%u\n",
  1228. mf.width, mf.height);
  1229. return -EIO;
  1230. }
  1231. dev_dbg(dev, "camera fmt %ux%u\n", mf.width, mf.height);
  1232. cam = kzalloc(sizeof(*cam), GFP_KERNEL);
  1233. if (!cam)
  1234. return -ENOMEM;
  1235. /*
  1236. * We are called with current camera crop,
  1237. * initialise subrect with it
  1238. */
  1239. cam->rect = rect;
  1240. cam->subrect = rect;
  1241. cam->width = mf.width;
  1242. cam->height = mf.height;
  1243. cam->out_width = mf.width;
  1244. cam->out_height = mf.height;
  1245. icd->host_priv = cam;
  1246. } else {
  1247. cam = icd->host_priv;
  1248. }
  1249. /* Beginning of a pass */
  1250. if (!idx)
  1251. cam->extra_fmt = NULL;
  1252. switch (code) {
  1253. case MEDIA_BUS_FMT_YUYV8_1X16:
  1254. case MEDIA_BUS_FMT_YUYV8_2X8:
  1255. case MEDIA_BUS_FMT_YUYV10_2X10:
  1256. if (cam->extra_fmt)
  1257. break;
  1258. /* Add all our formats that can be generated by VIN */
  1259. cam->extra_fmt = rcar_vin_formats;
  1260. n = ARRAY_SIZE(rcar_vin_formats);
  1261. formats += n;
  1262. for (k = 0; xlate && k < n; k++, xlate++) {
  1263. xlate->host_fmt = &rcar_vin_formats[k];
  1264. xlate->code = code;
  1265. dev_dbg(dev, "Providing format %s using code %d\n",
  1266. rcar_vin_formats[k].name, code);
  1267. }
  1268. break;
  1269. default:
  1270. if (!rcar_vin_packing_supported(fmt))
  1271. return 0;
  1272. dev_dbg(dev, "Providing format %s in pass-through mode\n",
  1273. fmt->name);
  1274. break;
  1275. }
  1276. /* Generic pass-through */
  1277. formats++;
  1278. if (xlate) {
  1279. xlate->host_fmt = fmt;
  1280. xlate->code = code;
  1281. xlate++;
  1282. }
  1283. return formats;
  1284. }
  1285. static void rcar_vin_put_formats(struct soc_camera_device *icd)
  1286. {
  1287. kfree(icd->host_priv);
  1288. icd->host_priv = NULL;
  1289. }
  1290. static int rcar_vin_set_crop(struct soc_camera_device *icd,
  1291. const struct v4l2_crop *a)
  1292. {
  1293. struct v4l2_crop a_writable = *a;
  1294. const struct v4l2_rect *rect = &a_writable.c;
  1295. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  1296. struct rcar_vin_priv *priv = ici->priv;
  1297. struct v4l2_crop cam_crop;
  1298. struct rcar_vin_cam *cam = icd->host_priv;
  1299. struct v4l2_rect *cam_rect = &cam_crop.c;
  1300. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  1301. struct device *dev = icd->parent;
  1302. struct v4l2_mbus_framefmt mf;
  1303. u32 vnmc;
  1304. int ret, i;
  1305. dev_dbg(dev, "S_CROP(%ux%u@%u:%u)\n", rect->width, rect->height,
  1306. rect->left, rect->top);
  1307. /* During camera cropping its output window can change too, stop VIN */
  1308. capture_stop_preserve(priv, &vnmc);
  1309. dev_dbg(dev, "VNMC_REG 0x%x\n", vnmc);
  1310. /* Apply iterative camera S_CROP for new input window. */
  1311. ret = soc_camera_client_s_crop(sd, &a_writable, &cam_crop,
  1312. &cam->rect, &cam->subrect);
  1313. if (ret < 0)
  1314. return ret;
  1315. dev_dbg(dev, "camera cropped to %ux%u@%u:%u\n",
  1316. cam_rect->width, cam_rect->height,
  1317. cam_rect->left, cam_rect->top);
  1318. /* On success cam_crop contains current camera crop */
  1319. /* Retrieve camera output window */
  1320. ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
  1321. if (ret < 0)
  1322. return ret;
  1323. if (mf.width > VIN_MAX_WIDTH || mf.height > VIN_MAX_HEIGHT)
  1324. return -EINVAL;
  1325. /* Cache camera output window */
  1326. cam->width = mf.width;
  1327. cam->height = mf.height;
  1328. icd->user_width = cam->width;
  1329. icd->user_height = cam->height;
  1330. cam->vin_left = rect->left & ~1;
  1331. cam->vin_top = rect->top & ~1;
  1332. /* Use VIN cropping to crop to the new window. */
  1333. ret = rcar_vin_set_rect(icd);
  1334. if (ret < 0)
  1335. return ret;
  1336. cam->subrect = *rect;
  1337. dev_dbg(dev, "VIN cropped to %ux%u@%u:%u\n",
  1338. icd->user_width, icd->user_height,
  1339. cam->vin_left, cam->vin_top);
  1340. /* Restore capture */
  1341. for (i = 0; i < MAX_BUFFER_NUM; i++) {
  1342. if (priv->queue_buf[i] && priv->state == STOPPED) {
  1343. vnmc |= VNMC_ME;
  1344. break;
  1345. }
  1346. }
  1347. capture_restore(priv, vnmc);
  1348. /* Even if only camera cropping succeeded */
  1349. return ret;
  1350. }
  1351. static int rcar_vin_get_crop(struct soc_camera_device *icd,
  1352. struct v4l2_crop *a)
  1353. {
  1354. struct rcar_vin_cam *cam = icd->host_priv;
  1355. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1356. a->c = cam->subrect;
  1357. return 0;
  1358. }
  1359. /* Similar to set_crop multistage iterative algorithm */
  1360. static int rcar_vin_set_fmt(struct soc_camera_device *icd,
  1361. struct v4l2_format *f)
  1362. {
  1363. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  1364. struct rcar_vin_priv *priv = ici->priv;
  1365. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  1366. struct rcar_vin_cam *cam = icd->host_priv;
  1367. struct v4l2_pix_format *pix = &f->fmt.pix;
  1368. struct v4l2_mbus_framefmt mf;
  1369. struct device *dev = icd->parent;
  1370. __u32 pixfmt = pix->pixelformat;
  1371. const struct soc_camera_format_xlate *xlate;
  1372. unsigned int vin_sub_width = 0, vin_sub_height = 0;
  1373. int ret;
  1374. bool can_scale;
  1375. enum v4l2_field field;
  1376. v4l2_std_id std;
  1377. dev_dbg(dev, "S_FMT(pix=0x%x, %ux%u)\n",
  1378. pixfmt, pix->width, pix->height);
  1379. switch (pix->field) {
  1380. default:
  1381. pix->field = V4L2_FIELD_NONE;
  1382. /* fall-through */
  1383. case V4L2_FIELD_NONE:
  1384. case V4L2_FIELD_TOP:
  1385. case V4L2_FIELD_BOTTOM:
  1386. case V4L2_FIELD_INTERLACED_TB:
  1387. case V4L2_FIELD_INTERLACED_BT:
  1388. field = pix->field;
  1389. break;
  1390. case V4L2_FIELD_INTERLACED:
  1391. /* Query for standard if not explicitly mentioned _TB/_BT */
  1392. ret = v4l2_subdev_call(sd, video, querystd, &std);
  1393. if (ret < 0)
  1394. std = V4L2_STD_625_50;
  1395. field = std & V4L2_STD_625_50 ? V4L2_FIELD_INTERLACED_TB :
  1396. V4L2_FIELD_INTERLACED_BT;
  1397. break;
  1398. }
  1399. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  1400. if (!xlate) {
  1401. dev_warn(dev, "Format %x not found\n", pixfmt);
  1402. return -EINVAL;
  1403. }
  1404. /* Calculate client output geometry */
  1405. soc_camera_calc_client_output(icd, &cam->rect, &cam->subrect, pix, &mf,
  1406. 12);
  1407. mf.field = pix->field;
  1408. mf.colorspace = pix->colorspace;
  1409. mf.code = xlate->code;
  1410. switch (pixfmt) {
  1411. case V4L2_PIX_FMT_RGB32:
  1412. can_scale = priv->chip != RCAR_E1;
  1413. break;
  1414. case V4L2_PIX_FMT_UYVY:
  1415. case V4L2_PIX_FMT_YUYV:
  1416. case V4L2_PIX_FMT_RGB565:
  1417. case V4L2_PIX_FMT_RGB555X:
  1418. can_scale = true;
  1419. break;
  1420. default:
  1421. can_scale = false;
  1422. break;
  1423. }
  1424. dev_dbg(dev, "request camera output %ux%u\n", mf.width, mf.height);
  1425. ret = soc_camera_client_scale(icd, &cam->rect, &cam->subrect,
  1426. &mf, &vin_sub_width, &vin_sub_height,
  1427. can_scale, 12);
  1428. /* Done with the camera. Now see if we can improve the result */
  1429. dev_dbg(dev, "Camera %d fmt %ux%u, requested %ux%u\n",
  1430. ret, mf.width, mf.height, pix->width, pix->height);
  1431. if (ret == -ENOIOCTLCMD)
  1432. dev_dbg(dev, "Sensor doesn't support scaling\n");
  1433. else if (ret < 0)
  1434. return ret;
  1435. if (mf.code != xlate->code)
  1436. return -EINVAL;
  1437. /* Prepare VIN crop */
  1438. cam->width = mf.width;
  1439. cam->height = mf.height;
  1440. /* Use VIN scaling to scale to the requested user window. */
  1441. /* We cannot scale up */
  1442. if (pix->width > vin_sub_width)
  1443. vin_sub_width = pix->width;
  1444. if (pix->height > vin_sub_height)
  1445. vin_sub_height = pix->height;
  1446. pix->colorspace = mf.colorspace;
  1447. if (!can_scale) {
  1448. pix->width = vin_sub_width;
  1449. pix->height = vin_sub_height;
  1450. }
  1451. /*
  1452. * We have calculated CFLCR, the actual configuration will be performed
  1453. * in rcar_vin_set_bus_param()
  1454. */
  1455. dev_dbg(dev, "W: %u : %u, H: %u : %u\n",
  1456. vin_sub_width, pix->width, vin_sub_height, pix->height);
  1457. cam->out_width = pix->width;
  1458. cam->out_height = pix->height;
  1459. icd->current_fmt = xlate;
  1460. priv->field = field;
  1461. return 0;
  1462. }
  1463. static int rcar_vin_try_fmt(struct soc_camera_device *icd,
  1464. struct v4l2_format *f)
  1465. {
  1466. const struct soc_camera_format_xlate *xlate;
  1467. struct v4l2_pix_format *pix = &f->fmt.pix;
  1468. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  1469. struct v4l2_mbus_framefmt mf;
  1470. __u32 pixfmt = pix->pixelformat;
  1471. int width, height;
  1472. int ret;
  1473. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  1474. if (!xlate) {
  1475. xlate = icd->current_fmt;
  1476. dev_dbg(icd->parent, "Format %x not found, keeping %x\n",
  1477. pixfmt, xlate->host_fmt->fourcc);
  1478. pixfmt = xlate->host_fmt->fourcc;
  1479. pix->pixelformat = pixfmt;
  1480. pix->colorspace = icd->colorspace;
  1481. }
  1482. /* FIXME: calculate using depth and bus width */
  1483. v4l_bound_align_image(&pix->width, 2, VIN_MAX_WIDTH, 1,
  1484. &pix->height, 4, VIN_MAX_HEIGHT, 2, 0);
  1485. width = pix->width;
  1486. height = pix->height;
  1487. /* let soc-camera calculate these values */
  1488. pix->bytesperline = 0;
  1489. pix->sizeimage = 0;
  1490. /* limit to sensor capabilities */
  1491. mf.width = pix->width;
  1492. mf.height = pix->height;
  1493. mf.field = pix->field;
  1494. mf.code = xlate->code;
  1495. mf.colorspace = pix->colorspace;
  1496. ret = v4l2_device_call_until_err(sd->v4l2_dev, soc_camera_grp_id(icd),
  1497. video, try_mbus_fmt, &mf);
  1498. if (ret < 0)
  1499. return ret;
  1500. /* Adjust only if VIN cannot scale */
  1501. if (pix->width > mf.width * 2)
  1502. pix->width = mf.width * 2;
  1503. if (pix->height > mf.height * 3)
  1504. pix->height = mf.height * 3;
  1505. pix->field = mf.field;
  1506. pix->colorspace = mf.colorspace;
  1507. if (pixfmt == V4L2_PIX_FMT_NV16) {
  1508. /* FIXME: check against rect_max after converting soc-camera */
  1509. /* We can scale precisely, need a bigger image from camera */
  1510. if (pix->width < width || pix->height < height) {
  1511. /*
  1512. * We presume, the sensor behaves sanely, i.e. if
  1513. * requested a bigger rectangle, it will not return a
  1514. * smaller one.
  1515. */
  1516. mf.width = VIN_MAX_WIDTH;
  1517. mf.height = VIN_MAX_HEIGHT;
  1518. ret = v4l2_device_call_until_err(sd->v4l2_dev,
  1519. soc_camera_grp_id(icd),
  1520. video, try_mbus_fmt,
  1521. &mf);
  1522. if (ret < 0) {
  1523. dev_err(icd->parent,
  1524. "client try_fmt() = %d\n", ret);
  1525. return ret;
  1526. }
  1527. }
  1528. /* We will scale exactly */
  1529. if (mf.width > width)
  1530. pix->width = width;
  1531. if (mf.height > height)
  1532. pix->height = height;
  1533. }
  1534. return ret;
  1535. }
  1536. static unsigned int rcar_vin_poll(struct file *file, poll_table *pt)
  1537. {
  1538. struct soc_camera_device *icd = file->private_data;
  1539. return vb2_poll(&icd->vb2_vidq, file, pt);
  1540. }
  1541. static int rcar_vin_querycap(struct soc_camera_host *ici,
  1542. struct v4l2_capability *cap)
  1543. {
  1544. strlcpy(cap->card, "R_Car_VIN", sizeof(cap->card));
  1545. cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  1546. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  1547. return 0;
  1548. }
  1549. static int rcar_vin_init_videobuf2(struct vb2_queue *vq,
  1550. struct soc_camera_device *icd)
  1551. {
  1552. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  1553. vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1554. vq->io_modes = VB2_MMAP | VB2_USERPTR;
  1555. vq->drv_priv = icd;
  1556. vq->ops = &rcar_vin_vb2_ops;
  1557. vq->mem_ops = &vb2_dma_contig_memops;
  1558. vq->buf_struct_size = sizeof(struct rcar_vin_buffer);
  1559. vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1560. vq->lock = &ici->host_lock;
  1561. return vb2_queue_init(vq);
  1562. }
  1563. static struct soc_camera_host_ops rcar_vin_host_ops = {
  1564. .owner = THIS_MODULE,
  1565. .add = rcar_vin_add_device,
  1566. .remove = rcar_vin_remove_device,
  1567. .get_formats = rcar_vin_get_formats,
  1568. .put_formats = rcar_vin_put_formats,
  1569. .get_crop = rcar_vin_get_crop,
  1570. .set_crop = rcar_vin_set_crop,
  1571. .try_fmt = rcar_vin_try_fmt,
  1572. .set_fmt = rcar_vin_set_fmt,
  1573. .poll = rcar_vin_poll,
  1574. .querycap = rcar_vin_querycap,
  1575. .set_bus_param = rcar_vin_set_bus_param,
  1576. .init_videobuf2 = rcar_vin_init_videobuf2,
  1577. };
  1578. #ifdef CONFIG_OF
  1579. static struct of_device_id rcar_vin_of_table[] = {
  1580. { .compatible = "renesas,vin-r8a7794", .data = (void *)RCAR_GEN2 },
  1581. { .compatible = "renesas,vin-r8a7793", .data = (void *)RCAR_GEN2 },
  1582. { .compatible = "renesas,vin-r8a7791", .data = (void *)RCAR_GEN2 },
  1583. { .compatible = "renesas,vin-r8a7790", .data = (void *)RCAR_GEN2 },
  1584. { .compatible = "renesas,vin-r8a7779", .data = (void *)RCAR_H1 },
  1585. { .compatible = "renesas,vin-r8a7778", .data = (void *)RCAR_M1 },
  1586. { },
  1587. };
  1588. MODULE_DEVICE_TABLE(of, rcar_vin_of_table);
  1589. #endif
  1590. static struct platform_device_id rcar_vin_id_table[] = {
  1591. { "r8a7791-vin", RCAR_GEN2 },
  1592. { "r8a7790-vin", RCAR_GEN2 },
  1593. { "r8a7779-vin", RCAR_H1 },
  1594. { "r8a7778-vin", RCAR_M1 },
  1595. { "uPD35004-vin", RCAR_E1 },
  1596. {},
  1597. };
  1598. MODULE_DEVICE_TABLE(platform, rcar_vin_id_table);
  1599. static int rcar_vin_probe(struct platform_device *pdev)
  1600. {
  1601. const struct of_device_id *match = NULL;
  1602. struct rcar_vin_priv *priv;
  1603. struct resource *mem;
  1604. struct rcar_vin_platform_data *pdata;
  1605. unsigned int pdata_flags;
  1606. int irq, ret;
  1607. if (pdev->dev.of_node) {
  1608. struct v4l2_of_endpoint ep;
  1609. struct device_node *np;
  1610. match = of_match_device(of_match_ptr(rcar_vin_of_table),
  1611. &pdev->dev);
  1612. np = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
  1613. if (!np) {
  1614. dev_err(&pdev->dev, "could not find endpoint\n");
  1615. return -EINVAL;
  1616. }
  1617. ret = v4l2_of_parse_endpoint(np, &ep);
  1618. if (ret) {
  1619. dev_err(&pdev->dev, "could not parse endpoint\n");
  1620. return ret;
  1621. }
  1622. if (ep.bus_type == V4L2_MBUS_BT656)
  1623. pdata_flags = RCAR_VIN_BT656;
  1624. else {
  1625. pdata_flags = 0;
  1626. if (ep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
  1627. pdata_flags |= RCAR_VIN_HSYNC_ACTIVE_LOW;
  1628. if (ep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
  1629. pdata_flags |= RCAR_VIN_VSYNC_ACTIVE_LOW;
  1630. }
  1631. of_node_put(np);
  1632. dev_dbg(&pdev->dev, "pdata_flags = %08x\n", pdata_flags);
  1633. } else {
  1634. pdata = pdev->dev.platform_data;
  1635. if (!pdata || !pdata->flags) {
  1636. dev_err(&pdev->dev, "platform data not set\n");
  1637. return -EINVAL;
  1638. }
  1639. pdata_flags = pdata->flags;
  1640. }
  1641. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1642. if (mem == NULL)
  1643. return -EINVAL;
  1644. irq = platform_get_irq(pdev, 0);
  1645. if (irq <= 0)
  1646. return -EINVAL;
  1647. priv = devm_kzalloc(&pdev->dev, sizeof(struct rcar_vin_priv),
  1648. GFP_KERNEL);
  1649. if (!priv)
  1650. return -ENOMEM;
  1651. priv->base = devm_ioremap_resource(&pdev->dev, mem);
  1652. if (IS_ERR(priv->base))
  1653. return PTR_ERR(priv->base);
  1654. ret = devm_request_irq(&pdev->dev, irq, rcar_vin_irq, IRQF_SHARED,
  1655. dev_name(&pdev->dev), priv);
  1656. if (ret)
  1657. return ret;
  1658. priv->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  1659. if (IS_ERR(priv->alloc_ctx))
  1660. return PTR_ERR(priv->alloc_ctx);
  1661. priv->ici.priv = priv;
  1662. priv->ici.v4l2_dev.dev = &pdev->dev;
  1663. priv->ici.drv_name = dev_name(&pdev->dev);
  1664. priv->ici.ops = &rcar_vin_host_ops;
  1665. priv->pdata_flags = pdata_flags;
  1666. if (!match) {
  1667. priv->ici.nr = pdev->id;
  1668. priv->chip = pdev->id_entry->driver_data;
  1669. } else {
  1670. priv->ici.nr = of_alias_get_id(pdev->dev.of_node, "vin");
  1671. priv->chip = (enum chip_id)match->data;
  1672. }
  1673. spin_lock_init(&priv->lock);
  1674. INIT_LIST_HEAD(&priv->capture);
  1675. priv->state = STOPPED;
  1676. pm_suspend_ignore_children(&pdev->dev, true);
  1677. pm_runtime_enable(&pdev->dev);
  1678. ret = soc_camera_host_register(&priv->ici);
  1679. if (ret)
  1680. goto cleanup;
  1681. return 0;
  1682. cleanup:
  1683. pm_runtime_disable(&pdev->dev);
  1684. vb2_dma_contig_cleanup_ctx(priv->alloc_ctx);
  1685. return ret;
  1686. }
  1687. static int rcar_vin_remove(struct platform_device *pdev)
  1688. {
  1689. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  1690. struct rcar_vin_priv *priv = container_of(soc_host,
  1691. struct rcar_vin_priv, ici);
  1692. soc_camera_host_unregister(soc_host);
  1693. pm_runtime_disable(&pdev->dev);
  1694. vb2_dma_contig_cleanup_ctx(priv->alloc_ctx);
  1695. return 0;
  1696. }
  1697. static struct platform_driver rcar_vin_driver = {
  1698. .probe = rcar_vin_probe,
  1699. .remove = rcar_vin_remove,
  1700. .driver = {
  1701. .name = DRV_NAME,
  1702. .of_match_table = of_match_ptr(rcar_vin_of_table),
  1703. },
  1704. .id_table = rcar_vin_id_table,
  1705. };
  1706. module_platform_driver(rcar_vin_driver);
  1707. MODULE_LICENSE("GPL");
  1708. MODULE_ALIAS("platform:rcar_vin");
  1709. MODULE_DESCRIPTION("Renesas R-Car VIN camera host driver");