isp.c 68 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  14. * Sakari Ailus <sakari.ailus@iki.fi>
  15. * David Cohen <dacohen@gmail.com>
  16. * Stanimir Varbanov <svarbanov@mm-sol.com>
  17. * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
  18. * Tuukka Toivonen <tuukkat76@gmail.com>
  19. * Sergio Aguirre <saaguirre@ti.com>
  20. * Antti Koskipaa <akoskipa@gmail.com>
  21. * Ivan T. Ivanov <iivanov@mm-sol.com>
  22. * RaniSuneela <r-m@ti.com>
  23. * Atanas Filipov <afilipov@mm-sol.com>
  24. * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
  25. * Hiroshi DOYU <hiroshi.doyu@nokia.com>
  26. * Nayden Kanchev <nkanchev@mm-sol.com>
  27. * Phil Carmody <ext-phil.2.carmody@nokia.com>
  28. * Artem Bityutskiy <artem.bityutskiy@nokia.com>
  29. * Dominic Curran <dcurran@ti.com>
  30. * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
  31. * Pallavi Kulkarni <p-kulkarni@ti.com>
  32. * Vaibhav Hiremath <hvaibhav@ti.com>
  33. * Mohit Jalori <mjalori@ti.com>
  34. * Sameer Venkatraman <sameerv@ti.com>
  35. * Senthilvadivu Guruswamy <svadivu@ti.com>
  36. * Thara Gopinath <thara@ti.com>
  37. * Toni Leinonen <toni.leinonen@nokia.com>
  38. * Troy Laramy <t-laramy@ti.com>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. */
  44. #include <asm/cacheflush.h>
  45. #include <linux/clk.h>
  46. #include <linux/clkdev.h>
  47. #include <linux/delay.h>
  48. #include <linux/device.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/i2c.h>
  51. #include <linux/interrupt.h>
  52. #include <linux/mfd/syscon.h>
  53. #include <linux/module.h>
  54. #include <linux/omap-iommu.h>
  55. #include <linux/platform_device.h>
  56. #include <linux/regulator/consumer.h>
  57. #include <linux/slab.h>
  58. #include <linux/sched.h>
  59. #include <linux/vmalloc.h>
  60. #include <asm/dma-iommu.h>
  61. #include <media/v4l2-common.h>
  62. #include <media/v4l2-device.h>
  63. #include <media/v4l2-of.h>
  64. #include "isp.h"
  65. #include "ispreg.h"
  66. #include "ispccdc.h"
  67. #include "isppreview.h"
  68. #include "ispresizer.h"
  69. #include "ispcsi2.h"
  70. #include "ispccp2.h"
  71. #include "isph3a.h"
  72. #include "isphist.h"
  73. static unsigned int autoidle;
  74. module_param(autoidle, int, 0444);
  75. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  76. static void isp_save_ctx(struct isp_device *isp);
  77. static void isp_restore_ctx(struct isp_device *isp);
  78. static const struct isp_res_mapping isp_res_maps[] = {
  79. {
  80. .isp_rev = ISP_REVISION_2_0,
  81. .offset = {
  82. /* first MMIO area */
  83. 0x0000, /* base, len 0x0070 */
  84. 0x0400, /* ccp2, len 0x01f0 */
  85. 0x0600, /* ccdc, len 0x00a8 */
  86. 0x0a00, /* hist, len 0x0048 */
  87. 0x0c00, /* h3a, len 0x0060 */
  88. 0x0e00, /* preview, len 0x00a0 */
  89. 0x1000, /* resizer, len 0x00ac */
  90. 0x1200, /* sbl, len 0x00fc */
  91. /* second MMIO area */
  92. 0x0000, /* csi2a, len 0x0170 */
  93. 0x0170, /* csiphy2, len 0x000c */
  94. },
  95. .syscon_offset = 0xdc,
  96. .phy_type = ISP_PHY_TYPE_3430,
  97. },
  98. {
  99. .isp_rev = ISP_REVISION_15_0,
  100. .offset = {
  101. /* first MMIO area */
  102. 0x0000, /* base, len 0x0070 */
  103. 0x0400, /* ccp2, len 0x01f0 */
  104. 0x0600, /* ccdc, len 0x00a8 */
  105. 0x0a00, /* hist, len 0x0048 */
  106. 0x0c00, /* h3a, len 0x0060 */
  107. 0x0e00, /* preview, len 0x00a0 */
  108. 0x1000, /* resizer, len 0x00ac */
  109. 0x1200, /* sbl, len 0x00fc */
  110. /* second MMIO area */
  111. 0x0000, /* csi2a, len 0x0170 (1st area) */
  112. 0x0170, /* csiphy2, len 0x000c */
  113. 0x01c0, /* csi2a, len 0x0040 (2nd area) */
  114. 0x0400, /* csi2c, len 0x0170 (1st area) */
  115. 0x0570, /* csiphy1, len 0x000c */
  116. 0x05c0, /* csi2c, len 0x0040 (2nd area) */
  117. },
  118. .syscon_offset = 0x2f0,
  119. .phy_type = ISP_PHY_TYPE_3630,
  120. },
  121. };
  122. /* Structure for saving/restoring ISP module registers */
  123. static struct isp_reg isp_reg_list[] = {
  124. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  125. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  126. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  127. {0, ISP_TOK_TERM, 0}
  128. };
  129. /*
  130. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  131. * @isp: OMAP3 ISP device
  132. *
  133. * In order to force posting of pending writes, we need to write and
  134. * readback the same register, in this case the revision register.
  135. *
  136. * See this link for reference:
  137. * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
  138. */
  139. void omap3isp_flush(struct isp_device *isp)
  140. {
  141. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  142. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  143. }
  144. /* -----------------------------------------------------------------------------
  145. * XCLK
  146. */
  147. #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
  148. static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
  149. {
  150. switch (xclk->id) {
  151. case ISP_XCLK_A:
  152. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  153. ISPTCTRL_CTRL_DIVA_MASK,
  154. divider << ISPTCTRL_CTRL_DIVA_SHIFT);
  155. break;
  156. case ISP_XCLK_B:
  157. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  158. ISPTCTRL_CTRL_DIVB_MASK,
  159. divider << ISPTCTRL_CTRL_DIVB_SHIFT);
  160. break;
  161. }
  162. }
  163. static int isp_xclk_prepare(struct clk_hw *hw)
  164. {
  165. struct isp_xclk *xclk = to_isp_xclk(hw);
  166. omap3isp_get(xclk->isp);
  167. return 0;
  168. }
  169. static void isp_xclk_unprepare(struct clk_hw *hw)
  170. {
  171. struct isp_xclk *xclk = to_isp_xclk(hw);
  172. omap3isp_put(xclk->isp);
  173. }
  174. static int isp_xclk_enable(struct clk_hw *hw)
  175. {
  176. struct isp_xclk *xclk = to_isp_xclk(hw);
  177. unsigned long flags;
  178. spin_lock_irqsave(&xclk->lock, flags);
  179. isp_xclk_update(xclk, xclk->divider);
  180. xclk->enabled = true;
  181. spin_unlock_irqrestore(&xclk->lock, flags);
  182. return 0;
  183. }
  184. static void isp_xclk_disable(struct clk_hw *hw)
  185. {
  186. struct isp_xclk *xclk = to_isp_xclk(hw);
  187. unsigned long flags;
  188. spin_lock_irqsave(&xclk->lock, flags);
  189. isp_xclk_update(xclk, 0);
  190. xclk->enabled = false;
  191. spin_unlock_irqrestore(&xclk->lock, flags);
  192. }
  193. static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
  194. unsigned long parent_rate)
  195. {
  196. struct isp_xclk *xclk = to_isp_xclk(hw);
  197. return parent_rate / xclk->divider;
  198. }
  199. static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
  200. {
  201. u32 divider;
  202. if (*rate >= parent_rate) {
  203. *rate = parent_rate;
  204. return ISPTCTRL_CTRL_DIV_BYPASS;
  205. }
  206. if (*rate == 0)
  207. *rate = 1;
  208. divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
  209. if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
  210. divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  211. *rate = parent_rate / divider;
  212. return divider;
  213. }
  214. static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
  215. unsigned long *parent_rate)
  216. {
  217. isp_xclk_calc_divider(&rate, *parent_rate);
  218. return rate;
  219. }
  220. static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
  221. unsigned long parent_rate)
  222. {
  223. struct isp_xclk *xclk = to_isp_xclk(hw);
  224. unsigned long flags;
  225. u32 divider;
  226. divider = isp_xclk_calc_divider(&rate, parent_rate);
  227. spin_lock_irqsave(&xclk->lock, flags);
  228. xclk->divider = divider;
  229. if (xclk->enabled)
  230. isp_xclk_update(xclk, divider);
  231. spin_unlock_irqrestore(&xclk->lock, flags);
  232. dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
  233. __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
  234. return 0;
  235. }
  236. static const struct clk_ops isp_xclk_ops = {
  237. .prepare = isp_xclk_prepare,
  238. .unprepare = isp_xclk_unprepare,
  239. .enable = isp_xclk_enable,
  240. .disable = isp_xclk_disable,
  241. .recalc_rate = isp_xclk_recalc_rate,
  242. .round_rate = isp_xclk_round_rate,
  243. .set_rate = isp_xclk_set_rate,
  244. };
  245. static const char *isp_xclk_parent_name = "cam_mclk";
  246. static const struct clk_init_data isp_xclk_init_data = {
  247. .name = "cam_xclk",
  248. .ops = &isp_xclk_ops,
  249. .parent_names = &isp_xclk_parent_name,
  250. .num_parents = 1,
  251. };
  252. static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
  253. {
  254. unsigned int idx = clkspec->args[0];
  255. struct isp_device *isp = data;
  256. if (idx >= ARRAY_SIZE(isp->xclks))
  257. return ERR_PTR(-ENOENT);
  258. return isp->xclks[idx].clk;
  259. }
  260. static int isp_xclk_init(struct isp_device *isp)
  261. {
  262. struct device_node *np = isp->dev->of_node;
  263. struct clk_init_data init;
  264. unsigned int i;
  265. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
  266. isp->xclks[i].clk = ERR_PTR(-EINVAL);
  267. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  268. struct isp_xclk *xclk = &isp->xclks[i];
  269. xclk->isp = isp;
  270. xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
  271. xclk->divider = 1;
  272. spin_lock_init(&xclk->lock);
  273. init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
  274. init.ops = &isp_xclk_ops;
  275. init.parent_names = &isp_xclk_parent_name;
  276. init.num_parents = 1;
  277. xclk->hw.init = &init;
  278. /*
  279. * The first argument is NULL in order to avoid circular
  280. * reference, as this driver takes reference on the
  281. * sensor subdevice modules and the sensors would take
  282. * reference on this module through clk_get().
  283. */
  284. xclk->clk = clk_register(NULL, &xclk->hw);
  285. if (IS_ERR(xclk->clk))
  286. return PTR_ERR(xclk->clk);
  287. }
  288. if (np)
  289. of_clk_add_provider(np, isp_xclk_src_get, isp);
  290. return 0;
  291. }
  292. static void isp_xclk_cleanup(struct isp_device *isp)
  293. {
  294. struct device_node *np = isp->dev->of_node;
  295. unsigned int i;
  296. if (np)
  297. of_clk_del_provider(np);
  298. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  299. struct isp_xclk *xclk = &isp->xclks[i];
  300. if (!IS_ERR(xclk->clk))
  301. clk_unregister(xclk->clk);
  302. }
  303. }
  304. /* -----------------------------------------------------------------------------
  305. * Interrupts
  306. */
  307. /*
  308. * isp_enable_interrupts - Enable ISP interrupts.
  309. * @isp: OMAP3 ISP device
  310. */
  311. static void isp_enable_interrupts(struct isp_device *isp)
  312. {
  313. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  314. | IRQ0ENABLE_CSIB_IRQ
  315. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  316. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  317. | IRQ0ENABLE_CCDC_VD0_IRQ
  318. | IRQ0ENABLE_CCDC_VD1_IRQ
  319. | IRQ0ENABLE_HS_VS_IRQ
  320. | IRQ0ENABLE_HIST_DONE_IRQ
  321. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  322. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  323. | IRQ0ENABLE_PRV_DONE_IRQ
  324. | IRQ0ENABLE_RSZ_DONE_IRQ;
  325. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  326. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  327. }
  328. /*
  329. * isp_disable_interrupts - Disable ISP interrupts.
  330. * @isp: OMAP3 ISP device
  331. */
  332. static void isp_disable_interrupts(struct isp_device *isp)
  333. {
  334. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  335. }
  336. /*
  337. * isp_core_init - ISP core settings
  338. * @isp: OMAP3 ISP device
  339. * @idle: Consider idle state.
  340. *
  341. * Set the power settings for the ISP and SBL bus and configure the HS/VS
  342. * interrupt source.
  343. *
  344. * We need to configure the HS/VS interrupt source before interrupts get
  345. * enabled, as the sensor might be free-running and the ISP default setting
  346. * (HS edge) would put an unnecessary burden on the CPU.
  347. */
  348. static void isp_core_init(struct isp_device *isp, int idle)
  349. {
  350. isp_reg_writel(isp,
  351. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  352. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  353. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  354. ((isp->revision == ISP_REVISION_15_0) ?
  355. ISP_SYSCONFIG_AUTOIDLE : 0),
  356. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  357. isp_reg_writel(isp,
  358. (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
  359. ISPCTRL_SYNC_DETECT_VSRISE,
  360. OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  361. }
  362. /*
  363. * Configure the bridge and lane shifter. Valid inputs are
  364. *
  365. * CCDC_INPUT_PARALLEL: Parallel interface
  366. * CCDC_INPUT_CSI2A: CSI2a receiver
  367. * CCDC_INPUT_CCP2B: CCP2b receiver
  368. * CCDC_INPUT_CSI2C: CSI2c receiver
  369. *
  370. * The bridge and lane shifter are configured according to the selected input
  371. * and the ISP platform data.
  372. */
  373. void omap3isp_configure_bridge(struct isp_device *isp,
  374. enum ccdc_input_entity input,
  375. const struct isp_parallel_cfg *parcfg,
  376. unsigned int shift, unsigned int bridge)
  377. {
  378. u32 ispctrl_val;
  379. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  380. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  381. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  382. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  383. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  384. ispctrl_val |= bridge;
  385. switch (input) {
  386. case CCDC_INPUT_PARALLEL:
  387. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  388. ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  389. shift += parcfg->data_lane_shift * 2;
  390. break;
  391. case CCDC_INPUT_CSI2A:
  392. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  393. break;
  394. case CCDC_INPUT_CCP2B:
  395. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  396. break;
  397. case CCDC_INPUT_CSI2C:
  398. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  399. break;
  400. default:
  401. return;
  402. }
  403. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  404. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  405. }
  406. void omap3isp_hist_dma_done(struct isp_device *isp)
  407. {
  408. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  409. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  410. /* Histogram cannot be enabled in this frame anymore */
  411. atomic_set(&isp->isp_hist.buf_err, 1);
  412. dev_dbg(isp->dev, "hist: Out of synchronization with "
  413. "CCDC. Ignoring next buffer.\n");
  414. }
  415. }
  416. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  417. {
  418. static const char *name[] = {
  419. "CSIA_IRQ",
  420. "res1",
  421. "res2",
  422. "CSIB_LCM_IRQ",
  423. "CSIB_IRQ",
  424. "res5",
  425. "res6",
  426. "res7",
  427. "CCDC_VD0_IRQ",
  428. "CCDC_VD1_IRQ",
  429. "CCDC_VD2_IRQ",
  430. "CCDC_ERR_IRQ",
  431. "H3A_AF_DONE_IRQ",
  432. "H3A_AWB_DONE_IRQ",
  433. "res14",
  434. "res15",
  435. "HIST_DONE_IRQ",
  436. "CCDC_LSC_DONE",
  437. "CCDC_LSC_PREFETCH_COMPLETED",
  438. "CCDC_LSC_PREFETCH_ERROR",
  439. "PRV_DONE_IRQ",
  440. "CBUFF_IRQ",
  441. "res22",
  442. "res23",
  443. "RSZ_DONE_IRQ",
  444. "OVF_IRQ",
  445. "res26",
  446. "res27",
  447. "MMU_ERR_IRQ",
  448. "OCP_ERR_IRQ",
  449. "SEC_ERR_IRQ",
  450. "HS_VS_IRQ",
  451. };
  452. int i;
  453. dev_dbg(isp->dev, "ISP IRQ: ");
  454. for (i = 0; i < ARRAY_SIZE(name); i++) {
  455. if ((1 << i) & irqstatus)
  456. printk(KERN_CONT "%s ", name[i]);
  457. }
  458. printk(KERN_CONT "\n");
  459. }
  460. static void isp_isr_sbl(struct isp_device *isp)
  461. {
  462. struct device *dev = isp->dev;
  463. struct isp_pipeline *pipe;
  464. u32 sbl_pcr;
  465. /*
  466. * Handle shared buffer logic overflows for video buffers.
  467. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  468. */
  469. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  470. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  471. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  472. if (sbl_pcr)
  473. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  474. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  475. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  476. if (pipe != NULL)
  477. pipe->error = true;
  478. }
  479. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  480. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  481. if (pipe != NULL)
  482. pipe->error = true;
  483. }
  484. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  485. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  486. if (pipe != NULL)
  487. pipe->error = true;
  488. }
  489. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  490. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  491. if (pipe != NULL)
  492. pipe->error = true;
  493. }
  494. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  495. | ISPSBL_PCR_RSZ2_WBL_OVF
  496. | ISPSBL_PCR_RSZ3_WBL_OVF
  497. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  498. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  499. if (pipe != NULL)
  500. pipe->error = true;
  501. }
  502. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  503. omap3isp_stat_sbl_overflow(&isp->isp_af);
  504. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  505. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  506. }
  507. /*
  508. * isp_isr - Interrupt Service Routine for Camera ISP module.
  509. * @irq: Not used currently.
  510. * @_isp: Pointer to the OMAP3 ISP device
  511. *
  512. * Handles the corresponding callback if plugged in.
  513. */
  514. static irqreturn_t isp_isr(int irq, void *_isp)
  515. {
  516. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  517. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  518. IRQ0STATUS_CCDC_VD0_IRQ |
  519. IRQ0STATUS_CCDC_VD1_IRQ |
  520. IRQ0STATUS_HS_VS_IRQ;
  521. struct isp_device *isp = _isp;
  522. u32 irqstatus;
  523. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  524. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  525. isp_isr_sbl(isp);
  526. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  527. omap3isp_csi2_isr(&isp->isp_csi2a);
  528. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  529. omap3isp_ccp2_isr(&isp->isp_ccp2);
  530. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  531. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  532. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  533. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  534. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  535. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  536. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  537. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  538. }
  539. if (irqstatus & ccdc_events)
  540. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  541. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  542. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  543. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  544. omap3isp_preview_isr(&isp->isp_prev);
  545. }
  546. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  547. omap3isp_resizer_isr(&isp->isp_res);
  548. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  549. omap3isp_stat_isr(&isp->isp_aewb);
  550. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  551. omap3isp_stat_isr(&isp->isp_af);
  552. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  553. omap3isp_stat_isr(&isp->isp_hist);
  554. omap3isp_flush(isp);
  555. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  556. isp_isr_dbg(isp, irqstatus);
  557. #endif
  558. return IRQ_HANDLED;
  559. }
  560. /* -----------------------------------------------------------------------------
  561. * Pipeline power management
  562. *
  563. * Entities must be powered up when part of a pipeline that contains at least
  564. * one open video device node.
  565. *
  566. * To achieve this use the entity use_count field to track the number of users.
  567. * For entities corresponding to video device nodes the use_count field stores
  568. * the users count of the node. For entities corresponding to subdevs the
  569. * use_count field stores the total number of users of all video device nodes
  570. * in the pipeline.
  571. *
  572. * The omap3isp_pipeline_pm_use() function must be called in the open() and
  573. * close() handlers of video device nodes. It increments or decrements the use
  574. * count of all subdev entities in the pipeline.
  575. *
  576. * To react to link management on powered pipelines, the link setup notification
  577. * callback updates the use count of all entities in the source and sink sides
  578. * of the link.
  579. */
  580. /*
  581. * isp_pipeline_pm_use_count - Count the number of users of a pipeline
  582. * @entity: The entity
  583. *
  584. * Return the total number of users of all video device nodes in the pipeline.
  585. */
  586. static int isp_pipeline_pm_use_count(struct media_entity *entity)
  587. {
  588. struct media_entity_graph graph;
  589. int use = 0;
  590. media_entity_graph_walk_start(&graph, entity);
  591. while ((entity = media_entity_graph_walk_next(&graph))) {
  592. if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
  593. use += entity->use_count;
  594. }
  595. return use;
  596. }
  597. /*
  598. * isp_pipeline_pm_power_one - Apply power change to an entity
  599. * @entity: The entity
  600. * @change: Use count change
  601. *
  602. * Change the entity use count by @change. If the entity is a subdev update its
  603. * power state by calling the core::s_power operation when the use count goes
  604. * from 0 to != 0 or from != 0 to 0.
  605. *
  606. * Return 0 on success or a negative error code on failure.
  607. */
  608. static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
  609. {
  610. struct v4l2_subdev *subdev;
  611. int ret;
  612. subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
  613. ? media_entity_to_v4l2_subdev(entity) : NULL;
  614. if (entity->use_count == 0 && change > 0 && subdev != NULL) {
  615. ret = v4l2_subdev_call(subdev, core, s_power, 1);
  616. if (ret < 0 && ret != -ENOIOCTLCMD)
  617. return ret;
  618. }
  619. entity->use_count += change;
  620. WARN_ON(entity->use_count < 0);
  621. if (entity->use_count == 0 && change < 0 && subdev != NULL)
  622. v4l2_subdev_call(subdev, core, s_power, 0);
  623. return 0;
  624. }
  625. /*
  626. * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
  627. * @entity: The entity
  628. * @change: Use count change
  629. *
  630. * Walk the pipeline to update the use count and the power state of all non-node
  631. * entities.
  632. *
  633. * Return 0 on success or a negative error code on failure.
  634. */
  635. static int isp_pipeline_pm_power(struct media_entity *entity, int change)
  636. {
  637. struct media_entity_graph graph;
  638. struct media_entity *first = entity;
  639. int ret = 0;
  640. if (!change)
  641. return 0;
  642. media_entity_graph_walk_start(&graph, entity);
  643. while (!ret && (entity = media_entity_graph_walk_next(&graph)))
  644. if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
  645. ret = isp_pipeline_pm_power_one(entity, change);
  646. if (!ret)
  647. return 0;
  648. media_entity_graph_walk_start(&graph, first);
  649. while ((first = media_entity_graph_walk_next(&graph))
  650. && first != entity)
  651. if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
  652. isp_pipeline_pm_power_one(first, -change);
  653. return ret;
  654. }
  655. /*
  656. * omap3isp_pipeline_pm_use - Update the use count of an entity
  657. * @entity: The entity
  658. * @use: Use (1) or stop using (0) the entity
  659. *
  660. * Update the use count of all entities in the pipeline and power entities on or
  661. * off accordingly.
  662. *
  663. * Return 0 on success or a negative error code on failure. Powering entities
  664. * off is assumed to never fail. No failure can occur when the use parameter is
  665. * set to 0.
  666. */
  667. int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
  668. {
  669. int change = use ? 1 : -1;
  670. int ret;
  671. mutex_lock(&entity->parent->graph_mutex);
  672. /* Apply use count to node. */
  673. entity->use_count += change;
  674. WARN_ON(entity->use_count < 0);
  675. /* Apply power change to connected non-nodes. */
  676. ret = isp_pipeline_pm_power(entity, change);
  677. if (ret < 0)
  678. entity->use_count -= change;
  679. mutex_unlock(&entity->parent->graph_mutex);
  680. return ret;
  681. }
  682. /*
  683. * isp_pipeline_link_notify - Link management notification callback
  684. * @link: The link
  685. * @flags: New link flags that will be applied
  686. * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
  687. *
  688. * React to link management on powered pipelines by updating the use count of
  689. * all entities in the source and sink sides of the link. Entities are powered
  690. * on or off accordingly.
  691. *
  692. * Return 0 on success or a negative error code on failure. Powering entities
  693. * off is assumed to never fail. This function will not fail for disconnection
  694. * events.
  695. */
  696. static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
  697. unsigned int notification)
  698. {
  699. struct media_entity *source = link->source->entity;
  700. struct media_entity *sink = link->sink->entity;
  701. int source_use = isp_pipeline_pm_use_count(source);
  702. int sink_use = isp_pipeline_pm_use_count(sink);
  703. int ret;
  704. if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
  705. !(link->flags & MEDIA_LNK_FL_ENABLED)) {
  706. /* Powering off entities is assumed to never fail. */
  707. isp_pipeline_pm_power(source, -sink_use);
  708. isp_pipeline_pm_power(sink, -source_use);
  709. return 0;
  710. }
  711. if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
  712. (flags & MEDIA_LNK_FL_ENABLED)) {
  713. ret = isp_pipeline_pm_power(source, sink_use);
  714. if (ret < 0)
  715. return ret;
  716. ret = isp_pipeline_pm_power(sink, source_use);
  717. if (ret < 0)
  718. isp_pipeline_pm_power(source, -sink_use);
  719. return ret;
  720. }
  721. return 0;
  722. }
  723. /* -----------------------------------------------------------------------------
  724. * Pipeline stream management
  725. */
  726. /*
  727. * isp_pipeline_enable - Enable streaming on a pipeline
  728. * @pipe: ISP pipeline
  729. * @mode: Stream mode (single shot or continuous)
  730. *
  731. * Walk the entities chain starting at the pipeline output video node and start
  732. * all modules in the chain in the given mode.
  733. *
  734. * Return 0 if successful, or the return value of the failed video::s_stream
  735. * operation otherwise.
  736. */
  737. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  738. enum isp_pipeline_stream_state mode)
  739. {
  740. struct isp_device *isp = pipe->output->isp;
  741. struct media_entity *entity;
  742. struct media_pad *pad;
  743. struct v4l2_subdev *subdev;
  744. unsigned long flags;
  745. int ret;
  746. /* Refuse to start streaming if an entity included in the pipeline has
  747. * crashed. This check must be performed before the loop below to avoid
  748. * starting entities if the pipeline won't start anyway (those entities
  749. * would then likely fail to stop, making the problem worse).
  750. */
  751. if (pipe->entities & isp->crashed)
  752. return -EIO;
  753. spin_lock_irqsave(&pipe->lock, flags);
  754. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  755. spin_unlock_irqrestore(&pipe->lock, flags);
  756. pipe->do_propagation = false;
  757. entity = &pipe->output->video.entity;
  758. while (1) {
  759. pad = &entity->pads[0];
  760. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  761. break;
  762. pad = media_entity_remote_pad(pad);
  763. if (pad == NULL ||
  764. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  765. break;
  766. entity = pad->entity;
  767. subdev = media_entity_to_v4l2_subdev(entity);
  768. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  769. if (ret < 0 && ret != -ENOIOCTLCMD)
  770. return ret;
  771. if (subdev == &isp->isp_ccdc.subdev) {
  772. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  773. s_stream, mode);
  774. v4l2_subdev_call(&isp->isp_af.subdev, video,
  775. s_stream, mode);
  776. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  777. s_stream, mode);
  778. pipe->do_propagation = true;
  779. }
  780. }
  781. return 0;
  782. }
  783. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  784. {
  785. return omap3isp_resizer_busy(&isp->isp_res);
  786. }
  787. static int isp_pipeline_wait_preview(struct isp_device *isp)
  788. {
  789. return omap3isp_preview_busy(&isp->isp_prev);
  790. }
  791. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  792. {
  793. return omap3isp_stat_busy(&isp->isp_af)
  794. || omap3isp_stat_busy(&isp->isp_aewb)
  795. || omap3isp_stat_busy(&isp->isp_hist)
  796. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  797. }
  798. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  799. static int isp_pipeline_wait(struct isp_device *isp,
  800. int(*busy)(struct isp_device *isp))
  801. {
  802. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  803. while (!time_after(jiffies, timeout)) {
  804. if (!busy(isp))
  805. return 0;
  806. }
  807. return 1;
  808. }
  809. /*
  810. * isp_pipeline_disable - Disable streaming on a pipeline
  811. * @pipe: ISP pipeline
  812. *
  813. * Walk the entities chain starting at the pipeline output video node and stop
  814. * all modules in the chain. Wait synchronously for the modules to be stopped if
  815. * necessary.
  816. *
  817. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  818. * can't be stopped (in which case a software reset of the ISP is probably
  819. * necessary).
  820. */
  821. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  822. {
  823. struct isp_device *isp = pipe->output->isp;
  824. struct media_entity *entity;
  825. struct media_pad *pad;
  826. struct v4l2_subdev *subdev;
  827. int failure = 0;
  828. int ret;
  829. /*
  830. * We need to stop all the modules after CCDC first or they'll
  831. * never stop since they may not get a full frame from CCDC.
  832. */
  833. entity = &pipe->output->video.entity;
  834. while (1) {
  835. pad = &entity->pads[0];
  836. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  837. break;
  838. pad = media_entity_remote_pad(pad);
  839. if (pad == NULL ||
  840. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  841. break;
  842. entity = pad->entity;
  843. subdev = media_entity_to_v4l2_subdev(entity);
  844. if (subdev == &isp->isp_ccdc.subdev) {
  845. v4l2_subdev_call(&isp->isp_aewb.subdev,
  846. video, s_stream, 0);
  847. v4l2_subdev_call(&isp->isp_af.subdev,
  848. video, s_stream, 0);
  849. v4l2_subdev_call(&isp->isp_hist.subdev,
  850. video, s_stream, 0);
  851. }
  852. ret = v4l2_subdev_call(subdev, video, s_stream, 0);
  853. if (subdev == &isp->isp_res.subdev)
  854. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  855. else if (subdev == &isp->isp_prev.subdev)
  856. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  857. else if (subdev == &isp->isp_ccdc.subdev)
  858. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  859. /* Handle stop failures. An entity that fails to stop can
  860. * usually just be restarted. Flag the stop failure nonetheless
  861. * to trigger an ISP reset the next time the device is released,
  862. * just in case.
  863. *
  864. * The preview engine is a special case. A failure to stop can
  865. * mean a hardware crash. When that happens the preview engine
  866. * won't respond to read/write operations on the L4 bus anymore,
  867. * resulting in a bus fault and a kernel oops next time it gets
  868. * accessed. Mark it as crashed to prevent pipelines including
  869. * it from being started.
  870. */
  871. if (ret) {
  872. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  873. isp->stop_failure = true;
  874. if (subdev == &isp->isp_prev.subdev)
  875. isp->crashed |= 1U << subdev->entity.id;
  876. failure = -ETIMEDOUT;
  877. }
  878. }
  879. return failure;
  880. }
  881. /*
  882. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  883. * @pipe: ISP pipeline
  884. * @state: Stream state (stopped, single shot or continuous)
  885. *
  886. * Set the pipeline to the given stream state. Pipelines can be started in
  887. * single-shot or continuous mode.
  888. *
  889. * Return 0 if successful, or the return value of the failed video::s_stream
  890. * operation otherwise. The pipeline state is not updated when the operation
  891. * fails, except when stopping the pipeline.
  892. */
  893. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  894. enum isp_pipeline_stream_state state)
  895. {
  896. int ret;
  897. if (state == ISP_PIPELINE_STREAM_STOPPED)
  898. ret = isp_pipeline_disable(pipe);
  899. else
  900. ret = isp_pipeline_enable(pipe, state);
  901. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  902. pipe->stream_state = state;
  903. return ret;
  904. }
  905. /*
  906. * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
  907. * @pipe: ISP pipeline
  908. *
  909. * Cancelling a stream mark all buffers on all video nodes in the pipeline as
  910. * erroneous and makes sure no new buffer can be queued. This function is called
  911. * when a fatal error that prevents any further operation on the pipeline
  912. * occurs.
  913. */
  914. void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
  915. {
  916. if (pipe->input)
  917. omap3isp_video_cancel_stream(pipe->input);
  918. if (pipe->output)
  919. omap3isp_video_cancel_stream(pipe->output);
  920. }
  921. /*
  922. * isp_pipeline_resume - Resume streaming on a pipeline
  923. * @pipe: ISP pipeline
  924. *
  925. * Resume video output and input and re-enable pipeline.
  926. */
  927. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  928. {
  929. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  930. omap3isp_video_resume(pipe->output, !singleshot);
  931. if (singleshot)
  932. omap3isp_video_resume(pipe->input, 0);
  933. isp_pipeline_enable(pipe, pipe->stream_state);
  934. }
  935. /*
  936. * isp_pipeline_suspend - Suspend streaming on a pipeline
  937. * @pipe: ISP pipeline
  938. *
  939. * Suspend pipeline.
  940. */
  941. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  942. {
  943. isp_pipeline_disable(pipe);
  944. }
  945. /*
  946. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  947. * video node
  948. * @me: ISP module's media entity
  949. *
  950. * Returns 1 if the entity has an enabled link to the output video node or 0
  951. * otherwise. It's true only while pipeline can have no more than one output
  952. * node.
  953. */
  954. static int isp_pipeline_is_last(struct media_entity *me)
  955. {
  956. struct isp_pipeline *pipe;
  957. struct media_pad *pad;
  958. if (!me->pipe)
  959. return 0;
  960. pipe = to_isp_pipeline(me);
  961. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  962. return 0;
  963. pad = media_entity_remote_pad(&pipe->output->pad);
  964. return pad->entity == me;
  965. }
  966. /*
  967. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  968. * @me: ISP module's media entity
  969. *
  970. * Suspend the whole pipeline if module's entity has an enabled link to the
  971. * output video node. It works only while pipeline can have no more than one
  972. * output node.
  973. */
  974. static void isp_suspend_module_pipeline(struct media_entity *me)
  975. {
  976. if (isp_pipeline_is_last(me))
  977. isp_pipeline_suspend(to_isp_pipeline(me));
  978. }
  979. /*
  980. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  981. * @me: ISP module's media entity
  982. *
  983. * Resume the whole pipeline if module's entity has an enabled link to the
  984. * output video node. It works only while pipeline can have no more than one
  985. * output node.
  986. */
  987. static void isp_resume_module_pipeline(struct media_entity *me)
  988. {
  989. if (isp_pipeline_is_last(me))
  990. isp_pipeline_resume(to_isp_pipeline(me));
  991. }
  992. /*
  993. * isp_suspend_modules - Suspend ISP submodules.
  994. * @isp: OMAP3 ISP device
  995. *
  996. * Returns 0 if suspend left in idle state all the submodules properly,
  997. * or returns 1 if a general Reset is required to suspend the submodules.
  998. */
  999. static int isp_suspend_modules(struct isp_device *isp)
  1000. {
  1001. unsigned long timeout;
  1002. omap3isp_stat_suspend(&isp->isp_aewb);
  1003. omap3isp_stat_suspend(&isp->isp_af);
  1004. omap3isp_stat_suspend(&isp->isp_hist);
  1005. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  1006. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  1007. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  1008. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  1009. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  1010. timeout = jiffies + ISP_STOP_TIMEOUT;
  1011. while (omap3isp_stat_busy(&isp->isp_af)
  1012. || omap3isp_stat_busy(&isp->isp_aewb)
  1013. || omap3isp_stat_busy(&isp->isp_hist)
  1014. || omap3isp_preview_busy(&isp->isp_prev)
  1015. || omap3isp_resizer_busy(&isp->isp_res)
  1016. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  1017. if (time_after(jiffies, timeout)) {
  1018. dev_info(isp->dev, "can't stop modules.\n");
  1019. return 1;
  1020. }
  1021. msleep(1);
  1022. }
  1023. return 0;
  1024. }
  1025. /*
  1026. * isp_resume_modules - Resume ISP submodules.
  1027. * @isp: OMAP3 ISP device
  1028. */
  1029. static void isp_resume_modules(struct isp_device *isp)
  1030. {
  1031. omap3isp_stat_resume(&isp->isp_aewb);
  1032. omap3isp_stat_resume(&isp->isp_af);
  1033. omap3isp_stat_resume(&isp->isp_hist);
  1034. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  1035. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  1036. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  1037. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  1038. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  1039. }
  1040. /*
  1041. * isp_reset - Reset ISP with a timeout wait for idle.
  1042. * @isp: OMAP3 ISP device
  1043. */
  1044. static int isp_reset(struct isp_device *isp)
  1045. {
  1046. unsigned long timeout = 0;
  1047. isp_reg_writel(isp,
  1048. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  1049. | ISP_SYSCONFIG_SOFTRESET,
  1050. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  1051. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  1052. ISP_SYSSTATUS) & 0x1)) {
  1053. if (timeout++ > 10000) {
  1054. dev_alert(isp->dev, "cannot reset ISP\n");
  1055. return -ETIMEDOUT;
  1056. }
  1057. udelay(1);
  1058. }
  1059. isp->stop_failure = false;
  1060. isp->crashed = 0;
  1061. return 0;
  1062. }
  1063. /*
  1064. * isp_save_context - Saves the values of the ISP module registers.
  1065. * @isp: OMAP3 ISP device
  1066. * @reg_list: Structure containing pairs of register address and value to
  1067. * modify on OMAP.
  1068. */
  1069. static void
  1070. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  1071. {
  1072. struct isp_reg *next = reg_list;
  1073. for (; next->reg != ISP_TOK_TERM; next++)
  1074. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  1075. }
  1076. /*
  1077. * isp_restore_context - Restores the values of the ISP module registers.
  1078. * @isp: OMAP3 ISP device
  1079. * @reg_list: Structure containing pairs of register address and value to
  1080. * modify on OMAP.
  1081. */
  1082. static void
  1083. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  1084. {
  1085. struct isp_reg *next = reg_list;
  1086. for (; next->reg != ISP_TOK_TERM; next++)
  1087. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  1088. }
  1089. /*
  1090. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1091. * @isp: OMAP3 ISP device
  1092. *
  1093. * Routine for saving the context of each module in the ISP.
  1094. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1095. */
  1096. static void isp_save_ctx(struct isp_device *isp)
  1097. {
  1098. isp_save_context(isp, isp_reg_list);
  1099. omap_iommu_save_ctx(isp->dev);
  1100. }
  1101. /*
  1102. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1103. * @isp: OMAP3 ISP device
  1104. *
  1105. * Routine for restoring the context of each module in the ISP.
  1106. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1107. */
  1108. static void isp_restore_ctx(struct isp_device *isp)
  1109. {
  1110. isp_restore_context(isp, isp_reg_list);
  1111. omap_iommu_restore_ctx(isp->dev);
  1112. omap3isp_ccdc_restore_context(isp);
  1113. omap3isp_preview_restore_context(isp);
  1114. }
  1115. /* -----------------------------------------------------------------------------
  1116. * SBL resources management
  1117. */
  1118. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  1119. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  1120. OMAP3_ISP_SBL_PREVIEW_READ | \
  1121. OMAP3_ISP_SBL_RESIZER_READ)
  1122. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  1123. OMAP3_ISP_SBL_CSI2A_WRITE | \
  1124. OMAP3_ISP_SBL_CSI2C_WRITE | \
  1125. OMAP3_ISP_SBL_CCDC_WRITE | \
  1126. OMAP3_ISP_SBL_PREVIEW_WRITE)
  1127. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  1128. {
  1129. u32 sbl = 0;
  1130. isp->sbl_resources |= res;
  1131. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  1132. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1133. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  1134. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1135. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  1136. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1137. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  1138. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1139. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  1140. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1141. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  1142. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1143. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1144. }
  1145. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  1146. {
  1147. u32 sbl = 0;
  1148. isp->sbl_resources &= ~res;
  1149. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  1150. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1151. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  1152. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1153. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  1154. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1155. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  1156. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1157. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  1158. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1159. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  1160. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1161. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1162. }
  1163. /*
  1164. * isp_module_sync_idle - Helper to sync module with its idle state
  1165. * @me: ISP submodule's media entity
  1166. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1167. * @stopping: flag which tells module wants to stop
  1168. *
  1169. * This function checks if ISP submodule needs to wait for next interrupt. If
  1170. * yes, makes the caller to sleep while waiting for such event.
  1171. */
  1172. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1173. atomic_t *stopping)
  1174. {
  1175. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1176. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1177. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1178. !isp_pipeline_ready(pipe)))
  1179. return 0;
  1180. /*
  1181. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1182. * scenario. We'll call it here to avoid race conditions.
  1183. */
  1184. atomic_set(stopping, 1);
  1185. smp_mb();
  1186. /*
  1187. * If module is the last one, it's writing to memory. In this case,
  1188. * it's necessary to check if the module is already paused due to
  1189. * DMA queue underrun or if it has to wait for next interrupt to be
  1190. * idle.
  1191. * If it isn't the last one, the function won't sleep but *stopping
  1192. * will still be set to warn next submodule caller's interrupt the
  1193. * module wants to be idle.
  1194. */
  1195. if (isp_pipeline_is_last(me)) {
  1196. struct isp_video *video = pipe->output;
  1197. unsigned long flags;
  1198. spin_lock_irqsave(&video->irqlock, flags);
  1199. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1200. spin_unlock_irqrestore(&video->irqlock, flags);
  1201. atomic_set(stopping, 0);
  1202. smp_mb();
  1203. return 0;
  1204. }
  1205. spin_unlock_irqrestore(&video->irqlock, flags);
  1206. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1207. msecs_to_jiffies(1000))) {
  1208. atomic_set(stopping, 0);
  1209. smp_mb();
  1210. return -ETIMEDOUT;
  1211. }
  1212. }
  1213. return 0;
  1214. }
  1215. /*
  1216. * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
  1217. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1218. * @stopping: flag which tells module wants to stop
  1219. *
  1220. * This function checks if ISP submodule was stopping. In case of yes, it
  1221. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1222. * Returns 1 if it was stopping or 0 otherwise.
  1223. */
  1224. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1225. atomic_t *stopping)
  1226. {
  1227. if (atomic_cmpxchg(stopping, 1, 0)) {
  1228. wake_up(wait);
  1229. return 1;
  1230. }
  1231. return 0;
  1232. }
  1233. /* --------------------------------------------------------------------------
  1234. * Clock management
  1235. */
  1236. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1237. ISPCTRL_HIST_CLK_EN | \
  1238. ISPCTRL_RSZ_CLK_EN | \
  1239. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1240. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1241. static void __isp_subclk_update(struct isp_device *isp)
  1242. {
  1243. u32 clk = 0;
  1244. /* AEWB and AF share the same clock. */
  1245. if (isp->subclk_resources &
  1246. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1247. clk |= ISPCTRL_H3A_CLK_EN;
  1248. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1249. clk |= ISPCTRL_HIST_CLK_EN;
  1250. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1251. clk |= ISPCTRL_RSZ_CLK_EN;
  1252. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1253. * RAM as well.
  1254. */
  1255. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1256. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1257. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1258. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1259. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1260. ISPCTRL_CLKS_MASK, clk);
  1261. }
  1262. void omap3isp_subclk_enable(struct isp_device *isp,
  1263. enum isp_subclk_resource res)
  1264. {
  1265. isp->subclk_resources |= res;
  1266. __isp_subclk_update(isp);
  1267. }
  1268. void omap3isp_subclk_disable(struct isp_device *isp,
  1269. enum isp_subclk_resource res)
  1270. {
  1271. isp->subclk_resources &= ~res;
  1272. __isp_subclk_update(isp);
  1273. }
  1274. /*
  1275. * isp_enable_clocks - Enable ISP clocks
  1276. * @isp: OMAP3 ISP device
  1277. *
  1278. * Return 0 if successful, or clk_prepare_enable return value if any of them
  1279. * fails.
  1280. */
  1281. static int isp_enable_clocks(struct isp_device *isp)
  1282. {
  1283. int r;
  1284. unsigned long rate;
  1285. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1286. if (r) {
  1287. dev_err(isp->dev, "failed to enable cam_ick clock\n");
  1288. goto out_clk_enable_ick;
  1289. }
  1290. r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
  1291. if (r) {
  1292. dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
  1293. goto out_clk_enable_mclk;
  1294. }
  1295. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1296. if (r) {
  1297. dev_err(isp->dev, "failed to enable cam_mclk clock\n");
  1298. goto out_clk_enable_mclk;
  1299. }
  1300. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1301. if (rate != CM_CAM_MCLK_HZ)
  1302. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1303. " expected : %d\n"
  1304. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1305. r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1306. if (r) {
  1307. dev_err(isp->dev, "failed to enable csi2_fck clock\n");
  1308. goto out_clk_enable_csi2_fclk;
  1309. }
  1310. return 0;
  1311. out_clk_enable_csi2_fclk:
  1312. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1313. out_clk_enable_mclk:
  1314. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1315. out_clk_enable_ick:
  1316. return r;
  1317. }
  1318. /*
  1319. * isp_disable_clocks - Disable ISP clocks
  1320. * @isp: OMAP3 ISP device
  1321. */
  1322. static void isp_disable_clocks(struct isp_device *isp)
  1323. {
  1324. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1325. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1326. clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
  1327. }
  1328. static const char *isp_clocks[] = {
  1329. "cam_ick",
  1330. "cam_mclk",
  1331. "csi2_96m_fck",
  1332. "l3_ick",
  1333. };
  1334. static int isp_get_clocks(struct isp_device *isp)
  1335. {
  1336. struct clk *clk;
  1337. unsigned int i;
  1338. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1339. clk = devm_clk_get(isp->dev, isp_clocks[i]);
  1340. if (IS_ERR(clk)) {
  1341. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1342. return PTR_ERR(clk);
  1343. }
  1344. isp->clock[i] = clk;
  1345. }
  1346. return 0;
  1347. }
  1348. /*
  1349. * omap3isp_get - Acquire the ISP resource.
  1350. *
  1351. * Initializes the clocks for the first acquire.
  1352. *
  1353. * Increment the reference count on the ISP. If the first reference is taken,
  1354. * enable clocks and power-up all submodules.
  1355. *
  1356. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1357. */
  1358. static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
  1359. {
  1360. struct isp_device *__isp = isp;
  1361. if (isp == NULL)
  1362. return NULL;
  1363. mutex_lock(&isp->isp_mutex);
  1364. if (isp->ref_count > 0)
  1365. goto out;
  1366. if (isp_enable_clocks(isp) < 0) {
  1367. __isp = NULL;
  1368. goto out;
  1369. }
  1370. /* We don't want to restore context before saving it! */
  1371. if (isp->has_context)
  1372. isp_restore_ctx(isp);
  1373. if (irq)
  1374. isp_enable_interrupts(isp);
  1375. out:
  1376. if (__isp != NULL)
  1377. isp->ref_count++;
  1378. mutex_unlock(&isp->isp_mutex);
  1379. return __isp;
  1380. }
  1381. struct isp_device *omap3isp_get(struct isp_device *isp)
  1382. {
  1383. return __omap3isp_get(isp, true);
  1384. }
  1385. /*
  1386. * omap3isp_put - Release the ISP
  1387. *
  1388. * Decrement the reference count on the ISP. If the last reference is released,
  1389. * power-down all submodules, disable clocks and free temporary buffers.
  1390. */
  1391. static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
  1392. {
  1393. if (isp == NULL)
  1394. return;
  1395. mutex_lock(&isp->isp_mutex);
  1396. BUG_ON(isp->ref_count == 0);
  1397. if (--isp->ref_count == 0) {
  1398. isp_disable_interrupts(isp);
  1399. if (save_ctx) {
  1400. isp_save_ctx(isp);
  1401. isp->has_context = 1;
  1402. }
  1403. /* Reset the ISP if an entity has failed to stop. This is the
  1404. * only way to recover from such conditions.
  1405. */
  1406. if (isp->crashed || isp->stop_failure)
  1407. isp_reset(isp);
  1408. isp_disable_clocks(isp);
  1409. }
  1410. mutex_unlock(&isp->isp_mutex);
  1411. }
  1412. void omap3isp_put(struct isp_device *isp)
  1413. {
  1414. __omap3isp_put(isp, true);
  1415. }
  1416. /* --------------------------------------------------------------------------
  1417. * Platform device driver
  1418. */
  1419. /*
  1420. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1421. * @isp: OMAP3 ISP device
  1422. */
  1423. #define ISP_PRINT_REGISTER(isp, name)\
  1424. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1425. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1426. #define SBL_PRINT_REGISTER(isp, name)\
  1427. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1428. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1429. void omap3isp_print_status(struct isp_device *isp)
  1430. {
  1431. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1432. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1433. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1434. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1435. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1436. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1437. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1438. ISP_PRINT_REGISTER(isp, CTRL);
  1439. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1440. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1441. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1442. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1443. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1444. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1445. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1446. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1447. SBL_PRINT_REGISTER(isp, PCR);
  1448. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1449. dev_dbg(isp->dev, "--------------------------------------------\n");
  1450. }
  1451. #ifdef CONFIG_PM
  1452. /*
  1453. * Power management support.
  1454. *
  1455. * As the ISP can't properly handle an input video stream interruption on a non
  1456. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1457. * suspended. However, as suspending the sensors can require a running clock,
  1458. * which can be provided by the ISP, the ISP can't be completely suspended
  1459. * before the sensor.
  1460. *
  1461. * To solve this problem power management support is split into prepare/complete
  1462. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1463. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1464. * resume(), and the the pipelines are restarted in complete().
  1465. *
  1466. * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
  1467. * yet.
  1468. */
  1469. static int isp_pm_prepare(struct device *dev)
  1470. {
  1471. struct isp_device *isp = dev_get_drvdata(dev);
  1472. int reset;
  1473. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1474. if (isp->ref_count == 0)
  1475. return 0;
  1476. reset = isp_suspend_modules(isp);
  1477. isp_disable_interrupts(isp);
  1478. isp_save_ctx(isp);
  1479. if (reset)
  1480. isp_reset(isp);
  1481. return 0;
  1482. }
  1483. static int isp_pm_suspend(struct device *dev)
  1484. {
  1485. struct isp_device *isp = dev_get_drvdata(dev);
  1486. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1487. if (isp->ref_count)
  1488. isp_disable_clocks(isp);
  1489. return 0;
  1490. }
  1491. static int isp_pm_resume(struct device *dev)
  1492. {
  1493. struct isp_device *isp = dev_get_drvdata(dev);
  1494. if (isp->ref_count == 0)
  1495. return 0;
  1496. return isp_enable_clocks(isp);
  1497. }
  1498. static void isp_pm_complete(struct device *dev)
  1499. {
  1500. struct isp_device *isp = dev_get_drvdata(dev);
  1501. if (isp->ref_count == 0)
  1502. return;
  1503. isp_restore_ctx(isp);
  1504. isp_enable_interrupts(isp);
  1505. isp_resume_modules(isp);
  1506. }
  1507. #else
  1508. #define isp_pm_prepare NULL
  1509. #define isp_pm_suspend NULL
  1510. #define isp_pm_resume NULL
  1511. #define isp_pm_complete NULL
  1512. #endif /* CONFIG_PM */
  1513. static void isp_unregister_entities(struct isp_device *isp)
  1514. {
  1515. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1516. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1517. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1518. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1519. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1520. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1521. omap3isp_stat_unregister_entities(&isp->isp_af);
  1522. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1523. v4l2_device_unregister(&isp->v4l2_dev);
  1524. media_device_unregister(&isp->media_dev);
  1525. }
  1526. /*
  1527. * isp_register_subdev - Register a sub-device
  1528. * @isp: OMAP3 ISP device
  1529. * @isp_subdev: platform data related to a sub-device
  1530. *
  1531. * Register an I2C sub-device which has not been registered by other
  1532. * means (such as the Device Tree).
  1533. *
  1534. * Return a pointer to the sub-device if it has been successfully
  1535. * registered, or NULL otherwise.
  1536. */
  1537. static struct v4l2_subdev *
  1538. isp_register_subdev(struct isp_device *isp,
  1539. struct isp_platform_subdev *isp_subdev)
  1540. {
  1541. struct i2c_adapter *adapter;
  1542. struct v4l2_subdev *sd;
  1543. if (isp_subdev->board_info == NULL)
  1544. return NULL;
  1545. adapter = i2c_get_adapter(isp_subdev->i2c_adapter_id);
  1546. if (adapter == NULL) {
  1547. dev_err(isp->dev,
  1548. "%s: Unable to get I2C adapter %d for device %s\n",
  1549. __func__, isp_subdev->i2c_adapter_id,
  1550. isp_subdev->board_info->type);
  1551. return NULL;
  1552. }
  1553. sd = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
  1554. isp_subdev->board_info, NULL);
  1555. if (sd == NULL) {
  1556. dev_err(isp->dev, "%s: Unable to register subdev %s\n",
  1557. __func__, isp_subdev->board_info->type);
  1558. return NULL;
  1559. }
  1560. return sd;
  1561. }
  1562. static int isp_link_entity(
  1563. struct isp_device *isp, struct media_entity *entity,
  1564. enum isp_interface_type interface)
  1565. {
  1566. struct media_entity *input;
  1567. unsigned int flags;
  1568. unsigned int pad;
  1569. unsigned int i;
  1570. /* Connect the sensor to the correct interface module.
  1571. * Parallel sensors are connected directly to the CCDC, while
  1572. * serial sensors are connected to the CSI2a, CCP2b or CSI2c
  1573. * receiver through CSIPHY1 or CSIPHY2.
  1574. */
  1575. switch (interface) {
  1576. case ISP_INTERFACE_PARALLEL:
  1577. input = &isp->isp_ccdc.subdev.entity;
  1578. pad = CCDC_PAD_SINK;
  1579. flags = 0;
  1580. break;
  1581. case ISP_INTERFACE_CSI2A_PHY2:
  1582. input = &isp->isp_csi2a.subdev.entity;
  1583. pad = CSI2_PAD_SINK;
  1584. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1585. break;
  1586. case ISP_INTERFACE_CCP2B_PHY1:
  1587. case ISP_INTERFACE_CCP2B_PHY2:
  1588. input = &isp->isp_ccp2.subdev.entity;
  1589. pad = CCP2_PAD_SINK;
  1590. flags = 0;
  1591. break;
  1592. case ISP_INTERFACE_CSI2C_PHY1:
  1593. input = &isp->isp_csi2c.subdev.entity;
  1594. pad = CSI2_PAD_SINK;
  1595. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1596. break;
  1597. default:
  1598. dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
  1599. interface);
  1600. return -EINVAL;
  1601. }
  1602. /*
  1603. * Not all interfaces are available on all revisions of the
  1604. * ISP. The sub-devices of those interfaces aren't initialised
  1605. * in such a case. Check this by ensuring the num_pads is
  1606. * non-zero.
  1607. */
  1608. if (!input->num_pads) {
  1609. dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
  1610. interface);
  1611. return -EINVAL;
  1612. }
  1613. for (i = 0; i < entity->num_pads; i++) {
  1614. if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
  1615. break;
  1616. }
  1617. if (i == entity->num_pads) {
  1618. dev_err(isp->dev, "%s: no source pad in external entity\n",
  1619. __func__);
  1620. return -EINVAL;
  1621. }
  1622. return media_entity_create_link(entity, i, input, pad, flags);
  1623. }
  1624. static int isp_register_entities(struct isp_device *isp)
  1625. {
  1626. struct isp_platform_data *pdata = isp->pdata;
  1627. struct isp_platform_subdev *isp_subdev;
  1628. int ret;
  1629. isp->media_dev.dev = isp->dev;
  1630. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1631. sizeof(isp->media_dev.model));
  1632. isp->media_dev.hw_revision = isp->revision;
  1633. isp->media_dev.link_notify = isp_pipeline_link_notify;
  1634. ret = media_device_register(&isp->media_dev);
  1635. if (ret < 0) {
  1636. dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
  1637. __func__, ret);
  1638. return ret;
  1639. }
  1640. isp->v4l2_dev.mdev = &isp->media_dev;
  1641. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1642. if (ret < 0) {
  1643. dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
  1644. __func__, ret);
  1645. goto done;
  1646. }
  1647. /* Register internal entities */
  1648. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1649. if (ret < 0)
  1650. goto done;
  1651. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1652. if (ret < 0)
  1653. goto done;
  1654. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1655. if (ret < 0)
  1656. goto done;
  1657. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1658. &isp->v4l2_dev);
  1659. if (ret < 0)
  1660. goto done;
  1661. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1662. if (ret < 0)
  1663. goto done;
  1664. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1665. if (ret < 0)
  1666. goto done;
  1667. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1668. if (ret < 0)
  1669. goto done;
  1670. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1671. if (ret < 0)
  1672. goto done;
  1673. /*
  1674. * Device Tree --- the external sub-devices will be registered
  1675. * later. The same goes for the sub-device node registration.
  1676. */
  1677. if (isp->dev->of_node)
  1678. return 0;
  1679. /* Register external entities */
  1680. for (isp_subdev = pdata ? pdata->subdevs : NULL;
  1681. isp_subdev && isp_subdev->board_info; isp_subdev++) {
  1682. struct v4l2_subdev *sd;
  1683. sd = isp_register_subdev(isp, isp_subdev);
  1684. /*
  1685. * No bus information --- this is either a flash or a
  1686. * lens subdev.
  1687. */
  1688. if (!sd || !isp_subdev->bus)
  1689. continue;
  1690. sd->host_priv = isp_subdev->bus;
  1691. ret = isp_link_entity(isp, &sd->entity,
  1692. isp_subdev->bus->interface);
  1693. if (ret < 0)
  1694. goto done;
  1695. }
  1696. ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1697. done:
  1698. if (ret < 0) {
  1699. isp_unregister_entities(isp);
  1700. v4l2_async_notifier_unregister(&isp->notifier);
  1701. }
  1702. return ret;
  1703. }
  1704. static void isp_cleanup_modules(struct isp_device *isp)
  1705. {
  1706. omap3isp_h3a_aewb_cleanup(isp);
  1707. omap3isp_h3a_af_cleanup(isp);
  1708. omap3isp_hist_cleanup(isp);
  1709. omap3isp_resizer_cleanup(isp);
  1710. omap3isp_preview_cleanup(isp);
  1711. omap3isp_ccdc_cleanup(isp);
  1712. omap3isp_ccp2_cleanup(isp);
  1713. omap3isp_csi2_cleanup(isp);
  1714. }
  1715. static int isp_initialize_modules(struct isp_device *isp)
  1716. {
  1717. int ret;
  1718. ret = omap3isp_csiphy_init(isp);
  1719. if (ret < 0) {
  1720. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1721. goto error_csiphy;
  1722. }
  1723. ret = omap3isp_csi2_init(isp);
  1724. if (ret < 0) {
  1725. dev_err(isp->dev, "CSI2 initialization failed\n");
  1726. goto error_csi2;
  1727. }
  1728. ret = omap3isp_ccp2_init(isp);
  1729. if (ret < 0) {
  1730. dev_err(isp->dev, "CCP2 initialization failed\n");
  1731. goto error_ccp2;
  1732. }
  1733. ret = omap3isp_ccdc_init(isp);
  1734. if (ret < 0) {
  1735. dev_err(isp->dev, "CCDC initialization failed\n");
  1736. goto error_ccdc;
  1737. }
  1738. ret = omap3isp_preview_init(isp);
  1739. if (ret < 0) {
  1740. dev_err(isp->dev, "Preview initialization failed\n");
  1741. goto error_preview;
  1742. }
  1743. ret = omap3isp_resizer_init(isp);
  1744. if (ret < 0) {
  1745. dev_err(isp->dev, "Resizer initialization failed\n");
  1746. goto error_resizer;
  1747. }
  1748. ret = omap3isp_hist_init(isp);
  1749. if (ret < 0) {
  1750. dev_err(isp->dev, "Histogram initialization failed\n");
  1751. goto error_hist;
  1752. }
  1753. ret = omap3isp_h3a_aewb_init(isp);
  1754. if (ret < 0) {
  1755. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1756. goto error_h3a_aewb;
  1757. }
  1758. ret = omap3isp_h3a_af_init(isp);
  1759. if (ret < 0) {
  1760. dev_err(isp->dev, "H3A AF initialization failed\n");
  1761. goto error_h3a_af;
  1762. }
  1763. /* Connect the submodules. */
  1764. ret = media_entity_create_link(
  1765. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1766. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1767. if (ret < 0)
  1768. goto error_link;
  1769. ret = media_entity_create_link(
  1770. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1771. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1772. if (ret < 0)
  1773. goto error_link;
  1774. ret = media_entity_create_link(
  1775. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1776. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1777. if (ret < 0)
  1778. goto error_link;
  1779. ret = media_entity_create_link(
  1780. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1781. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1782. if (ret < 0)
  1783. goto error_link;
  1784. ret = media_entity_create_link(
  1785. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1786. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1787. if (ret < 0)
  1788. goto error_link;
  1789. ret = media_entity_create_link(
  1790. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1791. &isp->isp_aewb.subdev.entity, 0,
  1792. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1793. if (ret < 0)
  1794. goto error_link;
  1795. ret = media_entity_create_link(
  1796. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1797. &isp->isp_af.subdev.entity, 0,
  1798. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1799. if (ret < 0)
  1800. goto error_link;
  1801. ret = media_entity_create_link(
  1802. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1803. &isp->isp_hist.subdev.entity, 0,
  1804. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1805. if (ret < 0)
  1806. goto error_link;
  1807. return 0;
  1808. error_link:
  1809. omap3isp_h3a_af_cleanup(isp);
  1810. error_h3a_af:
  1811. omap3isp_h3a_aewb_cleanup(isp);
  1812. error_h3a_aewb:
  1813. omap3isp_hist_cleanup(isp);
  1814. error_hist:
  1815. omap3isp_resizer_cleanup(isp);
  1816. error_resizer:
  1817. omap3isp_preview_cleanup(isp);
  1818. error_preview:
  1819. omap3isp_ccdc_cleanup(isp);
  1820. error_ccdc:
  1821. omap3isp_ccp2_cleanup(isp);
  1822. error_ccp2:
  1823. omap3isp_csi2_cleanup(isp);
  1824. error_csi2:
  1825. error_csiphy:
  1826. return ret;
  1827. }
  1828. static void isp_detach_iommu(struct isp_device *isp)
  1829. {
  1830. arm_iommu_release_mapping(isp->mapping);
  1831. isp->mapping = NULL;
  1832. iommu_group_remove_device(isp->dev);
  1833. }
  1834. static int isp_attach_iommu(struct isp_device *isp)
  1835. {
  1836. struct dma_iommu_mapping *mapping;
  1837. struct iommu_group *group;
  1838. int ret;
  1839. /* Create a device group and add the device to it. */
  1840. group = iommu_group_alloc();
  1841. if (IS_ERR(group)) {
  1842. dev_err(isp->dev, "failed to allocate IOMMU group\n");
  1843. return PTR_ERR(group);
  1844. }
  1845. ret = iommu_group_add_device(group, isp->dev);
  1846. iommu_group_put(group);
  1847. if (ret < 0) {
  1848. dev_err(isp->dev, "failed to add device to IPMMU group\n");
  1849. return ret;
  1850. }
  1851. /*
  1852. * Create the ARM mapping, used by the ARM DMA mapping core to allocate
  1853. * VAs. This will allocate a corresponding IOMMU domain.
  1854. */
  1855. mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
  1856. if (IS_ERR(mapping)) {
  1857. dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
  1858. ret = PTR_ERR(mapping);
  1859. goto error;
  1860. }
  1861. isp->mapping = mapping;
  1862. /* Attach the ARM VA mapping to the device. */
  1863. ret = arm_iommu_attach_device(isp->dev, mapping);
  1864. if (ret < 0) {
  1865. dev_err(isp->dev, "failed to attach device to VA mapping\n");
  1866. goto error;
  1867. }
  1868. return 0;
  1869. error:
  1870. isp_detach_iommu(isp);
  1871. return ret;
  1872. }
  1873. /*
  1874. * isp_remove - Remove ISP platform device
  1875. * @pdev: Pointer to ISP platform device
  1876. *
  1877. * Always returns 0.
  1878. */
  1879. static int isp_remove(struct platform_device *pdev)
  1880. {
  1881. struct isp_device *isp = platform_get_drvdata(pdev);
  1882. v4l2_async_notifier_unregister(&isp->notifier);
  1883. isp_unregister_entities(isp);
  1884. isp_cleanup_modules(isp);
  1885. isp_xclk_cleanup(isp);
  1886. __omap3isp_get(isp, false);
  1887. isp_detach_iommu(isp);
  1888. __omap3isp_put(isp, false);
  1889. return 0;
  1890. }
  1891. enum isp_of_phy {
  1892. ISP_OF_PHY_PARALLEL = 0,
  1893. ISP_OF_PHY_CSIPHY1,
  1894. ISP_OF_PHY_CSIPHY2,
  1895. };
  1896. static int isp_of_parse_node(struct device *dev, struct device_node *node,
  1897. struct isp_async_subdev *isd)
  1898. {
  1899. struct isp_bus_cfg *buscfg = &isd->bus;
  1900. struct v4l2_of_endpoint vep;
  1901. unsigned int i;
  1902. v4l2_of_parse_endpoint(node, &vep);
  1903. dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
  1904. vep.base.port);
  1905. switch (vep.base.port) {
  1906. case ISP_OF_PHY_PARALLEL:
  1907. buscfg->interface = ISP_INTERFACE_PARALLEL;
  1908. buscfg->bus.parallel.data_lane_shift =
  1909. vep.bus.parallel.data_shift;
  1910. buscfg->bus.parallel.clk_pol =
  1911. !!(vep.bus.parallel.flags
  1912. & V4L2_MBUS_PCLK_SAMPLE_FALLING);
  1913. buscfg->bus.parallel.hs_pol =
  1914. !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
  1915. buscfg->bus.parallel.vs_pol =
  1916. !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
  1917. buscfg->bus.parallel.fld_pol =
  1918. !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
  1919. buscfg->bus.parallel.data_pol =
  1920. !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
  1921. break;
  1922. case ISP_OF_PHY_CSIPHY1:
  1923. case ISP_OF_PHY_CSIPHY2:
  1924. /* FIXME: always assume CSI-2 for now. */
  1925. switch (vep.base.port) {
  1926. case ISP_OF_PHY_CSIPHY1:
  1927. buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
  1928. break;
  1929. case ISP_OF_PHY_CSIPHY2:
  1930. buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
  1931. break;
  1932. }
  1933. buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
  1934. buscfg->bus.csi2.lanecfg.clk.pol =
  1935. vep.bus.mipi_csi2.lane_polarities[0];
  1936. dev_dbg(dev, "clock lane polarity %u, pos %u\n",
  1937. buscfg->bus.csi2.lanecfg.clk.pol,
  1938. buscfg->bus.csi2.lanecfg.clk.pos);
  1939. for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
  1940. buscfg->bus.csi2.lanecfg.data[i].pos =
  1941. vep.bus.mipi_csi2.data_lanes[i];
  1942. buscfg->bus.csi2.lanecfg.data[i].pol =
  1943. vep.bus.mipi_csi2.lane_polarities[i + 1];
  1944. dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
  1945. buscfg->bus.csi2.lanecfg.data[i].pol,
  1946. buscfg->bus.csi2.lanecfg.data[i].pos);
  1947. }
  1948. /*
  1949. * FIXME: now we assume the CRC is always there.
  1950. * Implement a way to obtain this information from the
  1951. * sensor. Frame descriptors, perhaps?
  1952. */
  1953. buscfg->bus.csi2.crc = 1;
  1954. break;
  1955. default:
  1956. dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
  1957. vep.base.port);
  1958. break;
  1959. }
  1960. return 0;
  1961. }
  1962. static int isp_of_parse_nodes(struct device *dev,
  1963. struct v4l2_async_notifier *notifier)
  1964. {
  1965. struct device_node *node = NULL;
  1966. notifier->subdevs = devm_kcalloc(
  1967. dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
  1968. if (!notifier->subdevs)
  1969. return -ENOMEM;
  1970. while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
  1971. (node = of_graph_get_next_endpoint(dev->of_node, node))) {
  1972. struct isp_async_subdev *isd;
  1973. isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
  1974. if (!isd) {
  1975. of_node_put(node);
  1976. return -ENOMEM;
  1977. }
  1978. notifier->subdevs[notifier->num_subdevs] = &isd->asd;
  1979. if (isp_of_parse_node(dev, node, isd)) {
  1980. of_node_put(node);
  1981. return -EINVAL;
  1982. }
  1983. isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
  1984. of_node_put(node);
  1985. if (!isd->asd.match.of.node) {
  1986. dev_warn(dev, "bad remote port parent\n");
  1987. return -EINVAL;
  1988. }
  1989. isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
  1990. notifier->num_subdevs++;
  1991. }
  1992. return notifier->num_subdevs;
  1993. }
  1994. static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
  1995. struct v4l2_subdev *subdev,
  1996. struct v4l2_async_subdev *asd)
  1997. {
  1998. struct isp_device *isp = container_of(async, struct isp_device,
  1999. notifier);
  2000. struct isp_async_subdev *isd =
  2001. container_of(asd, struct isp_async_subdev, asd);
  2002. int ret;
  2003. ret = isp_link_entity(isp, &subdev->entity, isd->bus.interface);
  2004. if (ret < 0)
  2005. return ret;
  2006. isd->sd = subdev;
  2007. isd->sd->host_priv = &isd->bus;
  2008. return ret;
  2009. }
  2010. static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
  2011. {
  2012. struct isp_device *isp = container_of(async, struct isp_device,
  2013. notifier);
  2014. return v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  2015. }
  2016. /*
  2017. * isp_probe - Probe ISP platform device
  2018. * @pdev: Pointer to ISP platform device
  2019. *
  2020. * Returns 0 if successful,
  2021. * -ENOMEM if no memory available,
  2022. * -ENODEV if no platform device resources found
  2023. * or no space for remapping registers,
  2024. * -EINVAL if couldn't install ISR,
  2025. * or clk_get return error value.
  2026. */
  2027. static int isp_probe(struct platform_device *pdev)
  2028. {
  2029. struct isp_device *isp;
  2030. struct resource *mem;
  2031. int ret;
  2032. int i, m;
  2033. isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
  2034. if (!isp) {
  2035. dev_err(&pdev->dev, "could not allocate memory\n");
  2036. return -ENOMEM;
  2037. }
  2038. if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
  2039. ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
  2040. &isp->phy_type);
  2041. if (ret)
  2042. return ret;
  2043. isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
  2044. "syscon");
  2045. if (IS_ERR(isp->syscon))
  2046. return PTR_ERR(isp->syscon);
  2047. ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
  2048. &isp->syscon_offset);
  2049. if (ret)
  2050. return ret;
  2051. ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
  2052. if (ret < 0)
  2053. return ret;
  2054. ret = v4l2_async_notifier_register(&isp->v4l2_dev,
  2055. &isp->notifier);
  2056. if (ret)
  2057. return ret;
  2058. } else {
  2059. isp->pdata = pdev->dev.platform_data;
  2060. isp->syscon = syscon_regmap_lookup_by_pdevname("syscon.0");
  2061. if (IS_ERR(isp->syscon))
  2062. return PTR_ERR(isp->syscon);
  2063. dev_warn(&pdev->dev,
  2064. "Platform data support is deprecated! Please move to DT now!\n");
  2065. }
  2066. isp->autoidle = autoidle;
  2067. mutex_init(&isp->isp_mutex);
  2068. spin_lock_init(&isp->stat_lock);
  2069. isp->dev = &pdev->dev;
  2070. isp->ref_count = 0;
  2071. ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
  2072. if (ret)
  2073. goto error;
  2074. platform_set_drvdata(pdev, isp);
  2075. /* Regulators */
  2076. isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
  2077. isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
  2078. /* Clocks
  2079. *
  2080. * The ISP clock tree is revision-dependent. We thus need to enable ICLK
  2081. * manually to read the revision before calling __omap3isp_get().
  2082. *
  2083. * Start by mapping the ISP MMIO area, which is in two pieces.
  2084. * The ISP IOMMU is in between. Map both now, and fill in the
  2085. * ISP revision specific portions a little later in the
  2086. * function.
  2087. */
  2088. for (i = 0; i < 2; i++) {
  2089. unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
  2090. mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
  2091. isp->mmio_base[map_idx] =
  2092. devm_ioremap_resource(isp->dev, mem);
  2093. if (IS_ERR(isp->mmio_base[map_idx]))
  2094. return PTR_ERR(isp->mmio_base[map_idx]);
  2095. }
  2096. ret = isp_get_clocks(isp);
  2097. if (ret < 0)
  2098. goto error;
  2099. ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  2100. if (ret < 0)
  2101. goto error;
  2102. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  2103. dev_info(isp->dev, "Revision %d.%d found\n",
  2104. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  2105. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  2106. if (__omap3isp_get(isp, false) == NULL) {
  2107. ret = -ENODEV;
  2108. goto error;
  2109. }
  2110. ret = isp_reset(isp);
  2111. if (ret < 0)
  2112. goto error_isp;
  2113. ret = isp_xclk_init(isp);
  2114. if (ret < 0)
  2115. goto error_isp;
  2116. /* Memory resources */
  2117. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  2118. if (isp->revision == isp_res_maps[m].isp_rev)
  2119. break;
  2120. if (m == ARRAY_SIZE(isp_res_maps)) {
  2121. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  2122. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  2123. ret = -ENODEV;
  2124. goto error_isp;
  2125. }
  2126. if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node) {
  2127. isp->syscon_offset = isp_res_maps[m].syscon_offset;
  2128. isp->phy_type = isp_res_maps[m].phy_type;
  2129. }
  2130. for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
  2131. isp->mmio_base[i] =
  2132. isp->mmio_base[0] + isp_res_maps[m].offset[i];
  2133. for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
  2134. isp->mmio_base[i] =
  2135. isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
  2136. + isp_res_maps[m].offset[i];
  2137. isp->mmio_hist_base_phys =
  2138. mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
  2139. /* IOMMU */
  2140. ret = isp_attach_iommu(isp);
  2141. if (ret < 0) {
  2142. dev_err(&pdev->dev, "unable to attach to IOMMU\n");
  2143. goto error_isp;
  2144. }
  2145. /* Interrupt */
  2146. isp->irq_num = platform_get_irq(pdev, 0);
  2147. if (isp->irq_num <= 0) {
  2148. dev_err(isp->dev, "No IRQ resource\n");
  2149. ret = -ENODEV;
  2150. goto error_iommu;
  2151. }
  2152. if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
  2153. "OMAP3 ISP", isp)) {
  2154. dev_err(isp->dev, "Unable to request IRQ\n");
  2155. ret = -EINVAL;
  2156. goto error_iommu;
  2157. }
  2158. /* Entities */
  2159. ret = isp_initialize_modules(isp);
  2160. if (ret < 0)
  2161. goto error_iommu;
  2162. isp->notifier.bound = isp_subdev_notifier_bound;
  2163. isp->notifier.complete = isp_subdev_notifier_complete;
  2164. ret = isp_register_entities(isp);
  2165. if (ret < 0)
  2166. goto error_modules;
  2167. isp_core_init(isp, 1);
  2168. omap3isp_put(isp);
  2169. return 0;
  2170. error_modules:
  2171. isp_cleanup_modules(isp);
  2172. error_iommu:
  2173. isp_detach_iommu(isp);
  2174. error_isp:
  2175. isp_xclk_cleanup(isp);
  2176. __omap3isp_put(isp, false);
  2177. error:
  2178. mutex_destroy(&isp->isp_mutex);
  2179. return ret;
  2180. }
  2181. static const struct dev_pm_ops omap3isp_pm_ops = {
  2182. .prepare = isp_pm_prepare,
  2183. .suspend = isp_pm_suspend,
  2184. .resume = isp_pm_resume,
  2185. .complete = isp_pm_complete,
  2186. };
  2187. static struct platform_device_id omap3isp_id_table[] = {
  2188. { "omap3isp", 0 },
  2189. { },
  2190. };
  2191. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  2192. static const struct of_device_id omap3isp_of_table[] = {
  2193. { .compatible = "ti,omap3-isp" },
  2194. { },
  2195. };
  2196. static struct platform_driver omap3isp_driver = {
  2197. .probe = isp_probe,
  2198. .remove = isp_remove,
  2199. .id_table = omap3isp_id_table,
  2200. .driver = {
  2201. .name = "omap3isp",
  2202. .pm = &omap3isp_pm_ops,
  2203. .of_match_table = omap3isp_of_table,
  2204. },
  2205. };
  2206. module_platform_driver(omap3isp_driver);
  2207. MODULE_AUTHOR("Nokia Corporation");
  2208. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  2209. MODULE_LICENSE("GPL");
  2210. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);