cx18-streams.c 29 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055
  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. .unlocked_ioctl = video_ioctl2,
  41. .release = cx18_v4l2_close,
  42. .poll = cx18_v4l2_enc_poll,
  43. .mmap = cx18_v4l2_mmap,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. u32 caps;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE,
  62. V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  63. V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  64. },
  65. { /* CX18_ENC_STREAM_TYPE_TS */
  66. "TS",
  67. VFL_TYPE_GRABBER, -1,
  68. PCI_DMA_FROMDEVICE,
  69. },
  70. { /* CX18_ENC_STREAM_TYPE_YUV */
  71. "encoder YUV",
  72. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  73. PCI_DMA_FROMDEVICE,
  74. V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  75. V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  76. },
  77. { /* CX18_ENC_STREAM_TYPE_VBI */
  78. "encoder VBI",
  79. VFL_TYPE_VBI, 0,
  80. PCI_DMA_FROMDEVICE,
  81. V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE |
  82. V4L2_CAP_READWRITE | V4L2_CAP_TUNER
  83. },
  84. { /* CX18_ENC_STREAM_TYPE_PCM */
  85. "encoder PCM audio",
  86. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  87. PCI_DMA_FROMDEVICE,
  88. },
  89. { /* CX18_ENC_STREAM_TYPE_IDX */
  90. "encoder IDX",
  91. VFL_TYPE_GRABBER, -1,
  92. PCI_DMA_FROMDEVICE,
  93. },
  94. { /* CX18_ENC_STREAM_TYPE_RAD */
  95. "encoder radio",
  96. VFL_TYPE_RADIO, 0,
  97. PCI_DMA_NONE,
  98. V4L2_CAP_RADIO | V4L2_CAP_TUNER
  99. },
  100. };
  101. static void cx18_dma_free(struct videobuf_queue *q,
  102. struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
  103. {
  104. videobuf_waiton(q, &buf->vb, 0, 0);
  105. videobuf_vmalloc_free(&buf->vb);
  106. buf->vb.state = VIDEOBUF_NEEDS_INIT;
  107. }
  108. static int cx18_prepare_buffer(struct videobuf_queue *q,
  109. struct cx18_stream *s,
  110. struct cx18_videobuf_buffer *buf,
  111. u32 pixelformat,
  112. unsigned int width, unsigned int height,
  113. enum v4l2_field field)
  114. {
  115. struct cx18 *cx = s->cx;
  116. int rc = 0;
  117. /* check settings */
  118. buf->bytes_used = 0;
  119. if ((width < 48) || (height < 32))
  120. return -EINVAL;
  121. buf->vb.size = (width * height * 2);
  122. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  123. return -EINVAL;
  124. /* alloc + fill struct (if changed) */
  125. if (buf->vb.width != width || buf->vb.height != height ||
  126. buf->vb.field != field || s->pixelformat != pixelformat ||
  127. buf->tvnorm != cx->std) {
  128. buf->vb.width = width;
  129. buf->vb.height = height;
  130. buf->vb.field = field;
  131. buf->tvnorm = cx->std;
  132. s->pixelformat = pixelformat;
  133. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  134. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  135. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  136. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  137. else
  138. s->vb_bytes_per_frame = height * 720 * 2;
  139. cx18_dma_free(q, s, buf);
  140. }
  141. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  142. return -EINVAL;
  143. if (buf->vb.field == 0)
  144. buf->vb.field = V4L2_FIELD_INTERLACED;
  145. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  146. buf->vb.width = width;
  147. buf->vb.height = height;
  148. buf->vb.field = field;
  149. buf->tvnorm = cx->std;
  150. s->pixelformat = pixelformat;
  151. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  152. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  153. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  154. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  155. else
  156. s->vb_bytes_per_frame = height * 720 * 2;
  157. rc = videobuf_iolock(q, &buf->vb, NULL);
  158. if (rc != 0)
  159. goto fail;
  160. }
  161. buf->vb.state = VIDEOBUF_PREPARED;
  162. return 0;
  163. fail:
  164. cx18_dma_free(q, s, buf);
  165. return rc;
  166. }
  167. /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
  168. 1440 is a single line of 4:2:2 YUV at 720 luma samples wide
  169. */
  170. #define VB_MIN_BUFFERS 32
  171. #define VB_MIN_BUFSIZE 4147200
  172. static int buffer_setup(struct videobuf_queue *q,
  173. unsigned int *count, unsigned int *size)
  174. {
  175. struct cx18_stream *s = q->priv_data;
  176. struct cx18 *cx = s->cx;
  177. *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
  178. if (*count == 0)
  179. *count = VB_MIN_BUFFERS;
  180. while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
  181. (*count)--;
  182. q->field = V4L2_FIELD_INTERLACED;
  183. q->last = V4L2_FIELD_INTERLACED;
  184. return 0;
  185. }
  186. static int buffer_prepare(struct videobuf_queue *q,
  187. struct videobuf_buffer *vb,
  188. enum v4l2_field field)
  189. {
  190. struct cx18_videobuf_buffer *buf =
  191. container_of(vb, struct cx18_videobuf_buffer, vb);
  192. struct cx18_stream *s = q->priv_data;
  193. struct cx18 *cx = s->cx;
  194. return cx18_prepare_buffer(q, s, buf, s->pixelformat,
  195. cx->cxhdl.width, cx->cxhdl.height, field);
  196. }
  197. static void buffer_release(struct videobuf_queue *q,
  198. struct videobuf_buffer *vb)
  199. {
  200. struct cx18_videobuf_buffer *buf =
  201. container_of(vb, struct cx18_videobuf_buffer, vb);
  202. struct cx18_stream *s = q->priv_data;
  203. cx18_dma_free(q, s, buf);
  204. }
  205. static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  206. {
  207. struct cx18_videobuf_buffer *buf =
  208. container_of(vb, struct cx18_videobuf_buffer, vb);
  209. struct cx18_stream *s = q->priv_data;
  210. buf->vb.state = VIDEOBUF_QUEUED;
  211. list_add_tail(&buf->vb.queue, &s->vb_capture);
  212. }
  213. static struct videobuf_queue_ops cx18_videobuf_qops = {
  214. .buf_setup = buffer_setup,
  215. .buf_prepare = buffer_prepare,
  216. .buf_queue = buffer_queue,
  217. .buf_release = buffer_release,
  218. };
  219. static void cx18_stream_init(struct cx18 *cx, int type)
  220. {
  221. struct cx18_stream *s = &cx->streams[type];
  222. memset(s, 0, sizeof(*s));
  223. /* initialize cx18_stream fields */
  224. s->dvb = NULL;
  225. s->cx = cx;
  226. s->type = type;
  227. s->name = cx18_stream_info[type].name;
  228. s->handle = CX18_INVALID_TASK_HANDLE;
  229. s->dma = cx18_stream_info[type].dma;
  230. s->v4l2_dev_caps = cx18_stream_info[type].caps;
  231. s->buffers = cx->stream_buffers[type];
  232. s->buf_size = cx->stream_buf_size[type];
  233. INIT_LIST_HEAD(&s->buf_pool);
  234. s->bufs_per_mdl = 1;
  235. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  236. init_waitqueue_head(&s->waitq);
  237. s->id = -1;
  238. spin_lock_init(&s->q_free.lock);
  239. cx18_queue_init(&s->q_free);
  240. spin_lock_init(&s->q_busy.lock);
  241. cx18_queue_init(&s->q_busy);
  242. spin_lock_init(&s->q_full.lock);
  243. cx18_queue_init(&s->q_full);
  244. spin_lock_init(&s->q_idle.lock);
  245. cx18_queue_init(&s->q_idle);
  246. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  247. INIT_LIST_HEAD(&s->vb_capture);
  248. s->vb_timeout.function = cx18_vb_timeout;
  249. s->vb_timeout.data = (unsigned long)s;
  250. init_timer(&s->vb_timeout);
  251. spin_lock_init(&s->vb_lock);
  252. if (type == CX18_ENC_STREAM_TYPE_YUV) {
  253. spin_lock_init(&s->vbuf_q_lock);
  254. s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  255. videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
  256. &cx->pci_dev->dev, &s->vbuf_q_lock,
  257. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  258. V4L2_FIELD_INTERLACED,
  259. sizeof(struct cx18_videobuf_buffer),
  260. s, &cx->serialize_lock);
  261. /* Assume the previous pixel default */
  262. s->pixelformat = V4L2_PIX_FMT_HM12;
  263. s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
  264. s->vb_bytes_per_line = 720;
  265. }
  266. }
  267. static int cx18_prep_dev(struct cx18 *cx, int type)
  268. {
  269. struct cx18_stream *s = &cx->streams[type];
  270. u32 cap = cx->v4l2_cap;
  271. int num_offset = cx18_stream_info[type].num_offset;
  272. int num = cx->instance + cx18_first_minor + num_offset;
  273. /*
  274. * These five fields are always initialized.
  275. * For analog capture related streams, if video_dev.v4l2_dev == NULL then the
  276. * stream is not in use.
  277. * For the TS stream, if dvb == NULL then the stream is not in use.
  278. * In those cases no other fields but these four can be used.
  279. */
  280. s->video_dev.v4l2_dev = NULL;
  281. s->dvb = NULL;
  282. s->cx = cx;
  283. s->type = type;
  284. s->name = cx18_stream_info[type].name;
  285. /* Check whether the radio is supported */
  286. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  287. return 0;
  288. /* Check whether VBI is supported */
  289. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  290. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  291. return 0;
  292. /* User explicitly selected 0 buffers for these streams, so don't
  293. create them. */
  294. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  295. cx->stream_buffers[type] == 0) {
  296. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  297. return 0;
  298. }
  299. cx18_stream_init(cx, type);
  300. /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
  301. if (type == CX18_ENC_STREAM_TYPE_TS) {
  302. if (cx->card->hw_all & CX18_HW_DVB) {
  303. s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
  304. if (s->dvb == NULL) {
  305. CX18_ERR("Couldn't allocate cx18_dvb structure"
  306. " for %s\n", s->name);
  307. return -ENOMEM;
  308. }
  309. } else {
  310. /* Don't need buffers for the TS, if there is no DVB */
  311. s->buffers = 0;
  312. }
  313. }
  314. if (num_offset == -1)
  315. return 0;
  316. /* initialize the v4l2 video device structure */
  317. snprintf(s->video_dev.name, sizeof(s->video_dev.name), "%s %s",
  318. cx->v4l2_dev.name, s->name);
  319. s->video_dev.num = num;
  320. s->video_dev.v4l2_dev = &cx->v4l2_dev;
  321. s->video_dev.fops = &cx18_v4l2_enc_fops;
  322. s->video_dev.release = video_device_release_empty;
  323. if (cx->card->video_inputs->video_type == CX18_CARD_INPUT_VID_TUNER)
  324. s->video_dev.tvnorms = cx->tuner_std;
  325. else
  326. s->video_dev.tvnorms = V4L2_STD_ALL;
  327. s->video_dev.lock = &cx->serialize_lock;
  328. cx18_set_funcs(&s->video_dev);
  329. return 0;
  330. }
  331. /* Initialize v4l2 variables and register v4l2 devices */
  332. int cx18_streams_setup(struct cx18 *cx)
  333. {
  334. int type, ret;
  335. /* Setup V4L2 Devices */
  336. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  337. /* Prepare device */
  338. ret = cx18_prep_dev(cx, type);
  339. if (ret < 0)
  340. break;
  341. /* Allocate Stream */
  342. ret = cx18_stream_alloc(&cx->streams[type]);
  343. if (ret < 0)
  344. break;
  345. }
  346. if (type == CX18_MAX_STREAMS)
  347. return 0;
  348. /* One or more streams could not be initialized. Clean 'em all up. */
  349. cx18_streams_cleanup(cx, 0);
  350. return ret;
  351. }
  352. static int cx18_reg_dev(struct cx18 *cx, int type)
  353. {
  354. struct cx18_stream *s = &cx->streams[type];
  355. int vfl_type = cx18_stream_info[type].vfl_type;
  356. const char *name;
  357. int num, ret;
  358. if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
  359. ret = cx18_dvb_register(s);
  360. if (ret < 0) {
  361. CX18_ERR("DVB failed to register\n");
  362. return ret;
  363. }
  364. }
  365. if (s->video_dev.v4l2_dev == NULL)
  366. return 0;
  367. num = s->video_dev.num;
  368. /* card number + user defined offset + device offset */
  369. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  370. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  371. if (s_mpg->video_dev.v4l2_dev)
  372. num = s_mpg->video_dev.num
  373. + cx18_stream_info[type].num_offset;
  374. }
  375. video_set_drvdata(&s->video_dev, s);
  376. /* Register device. First try the desired minor, then any free one. */
  377. ret = video_register_device_no_warn(&s->video_dev, vfl_type, num);
  378. if (ret < 0) {
  379. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  380. s->name, num);
  381. s->video_dev.v4l2_dev = NULL;
  382. return ret;
  383. }
  384. name = video_device_node_name(&s->video_dev);
  385. switch (vfl_type) {
  386. case VFL_TYPE_GRABBER:
  387. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  388. name, s->name, cx->stream_buffers[type],
  389. cx->stream_buf_size[type] / 1024,
  390. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  391. break;
  392. case VFL_TYPE_RADIO:
  393. CX18_INFO("Registered device %s for %s\n", name, s->name);
  394. break;
  395. case VFL_TYPE_VBI:
  396. if (cx->stream_buffers[type])
  397. CX18_INFO("Registered device %s for %s "
  398. "(%d x %d bytes)\n",
  399. name, s->name, cx->stream_buffers[type],
  400. cx->stream_buf_size[type]);
  401. else
  402. CX18_INFO("Registered device %s for %s\n",
  403. name, s->name);
  404. break;
  405. }
  406. return 0;
  407. }
  408. /* Register v4l2 devices */
  409. int cx18_streams_register(struct cx18 *cx)
  410. {
  411. int type;
  412. int err;
  413. int ret = 0;
  414. /* Register V4L2 devices */
  415. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  416. err = cx18_reg_dev(cx, type);
  417. if (err && ret == 0)
  418. ret = err;
  419. }
  420. if (ret == 0)
  421. return 0;
  422. /* One or more streams could not be initialized. Clean 'em all up. */
  423. cx18_streams_cleanup(cx, 1);
  424. return ret;
  425. }
  426. /* Unregister v4l2 devices */
  427. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  428. {
  429. struct video_device *vdev;
  430. int type;
  431. /* Teardown all streams */
  432. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  433. /* The TS has a cx18_dvb structure, not a video_device */
  434. if (type == CX18_ENC_STREAM_TYPE_TS) {
  435. if (cx->streams[type].dvb != NULL) {
  436. if (unregister)
  437. cx18_dvb_unregister(&cx->streams[type]);
  438. kfree(cx->streams[type].dvb);
  439. cx->streams[type].dvb = NULL;
  440. cx18_stream_free(&cx->streams[type]);
  441. }
  442. continue;
  443. }
  444. /* No struct video_device, but can have buffers allocated */
  445. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  446. /* If the module params didn't inhibit IDX ... */
  447. if (cx->stream_buffers[type] != 0) {
  448. cx->stream_buffers[type] = 0;
  449. /*
  450. * Before calling cx18_stream_free(),
  451. * check if the IDX stream was actually set up.
  452. * Needed, since the cx18_probe() error path
  453. * exits through here as well as normal clean up
  454. */
  455. if (cx->streams[type].buffers != 0)
  456. cx18_stream_free(&cx->streams[type]);
  457. }
  458. continue;
  459. }
  460. /* If struct video_device exists, can have buffers allocated */
  461. vdev = &cx->streams[type].video_dev;
  462. if (vdev->v4l2_dev == NULL)
  463. continue;
  464. if (type == CX18_ENC_STREAM_TYPE_YUV)
  465. videobuf_mmap_free(&cx->streams[type].vbuf_q);
  466. cx18_stream_free(&cx->streams[type]);
  467. video_unregister_device(vdev);
  468. }
  469. }
  470. static void cx18_vbi_setup(struct cx18_stream *s)
  471. {
  472. struct cx18 *cx = s->cx;
  473. int raw = cx18_raw_vbi(cx);
  474. u32 data[CX2341X_MBOX_MAX_DATA];
  475. int lines;
  476. if (cx->is_60hz) {
  477. cx->vbi.count = 12;
  478. cx->vbi.start[0] = 10;
  479. cx->vbi.start[1] = 273;
  480. } else { /* PAL/SECAM */
  481. cx->vbi.count = 18;
  482. cx->vbi.start[0] = 6;
  483. cx->vbi.start[1] = 318;
  484. }
  485. /* setup VBI registers */
  486. if (raw)
  487. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  488. else
  489. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  490. /*
  491. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  492. * VBI when the first analog capture channel starts, as once it starts
  493. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  494. * (i.e. for the VBI capture channels). We also send it for each
  495. * analog capture channel anyway just to make sure we get the proper
  496. * behavior
  497. */
  498. if (raw) {
  499. lines = cx->vbi.count * 2;
  500. } else {
  501. /*
  502. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  503. * The EAV RP code's Field bit toggles on line 4, a few lines
  504. * after the Vertcal Blank bit has already toggled.
  505. * Tell the encoder to capture 21-4+1=18 lines per field,
  506. * since we want lines 10 through 21.
  507. *
  508. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  509. * The EAV RP code's Field bit toggles on line 1, a few lines
  510. * after the Vertcal Blank bit has already toggled.
  511. * (We've actually set the digitizer so that the Field bit
  512. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  513. * lines per field, since we want lines 6 through 23.
  514. */
  515. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  516. }
  517. data[0] = s->handle;
  518. /* Lines per field */
  519. data[1] = (lines / 2) | ((lines / 2) << 16);
  520. /* bytes per line */
  521. data[2] = (raw ? vbi_active_samples
  522. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  523. : vbi_hblank_samples_50Hz));
  524. /* Every X number of frames a VBI interrupt arrives
  525. (frames as in 25 or 30 fps) */
  526. data[3] = 1;
  527. /*
  528. * Set the SAV/EAV RP codes to look for as start/stop points
  529. * when in VIP-1.1 mode
  530. */
  531. if (raw) {
  532. /*
  533. * Start codes for beginning of "active" line in vertical blank
  534. * 0x20 ( VerticalBlank )
  535. * 0x60 ( EvenField VerticalBlank )
  536. */
  537. data[4] = 0x20602060;
  538. /*
  539. * End codes for end of "active" raw lines and regular lines
  540. * 0x30 ( VerticalBlank HorizontalBlank)
  541. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  542. * 0x90 (Task HorizontalBlank)
  543. * 0xd0 (Task EvenField HorizontalBlank)
  544. */
  545. data[5] = 0x307090d0;
  546. } else {
  547. /*
  548. * End codes for active video, we want data in the hblank region
  549. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  550. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  551. *
  552. * Since the V bit is only allowed to toggle in the EAV RP code,
  553. * just before the first active region line, these two
  554. * are problematic:
  555. * 0x90 (Task HorizontalBlank)
  556. * 0xd0 (Task EvenField HorizontalBlank)
  557. *
  558. * We have set the digitzer such that we don't have to worry
  559. * about these problem codes.
  560. */
  561. data[4] = 0xB0F0B0F0;
  562. /*
  563. * Start codes for beginning of active line in vertical blank
  564. * 0xa0 (Task VerticalBlank )
  565. * 0xe0 (Task EvenField VerticalBlank )
  566. */
  567. data[5] = 0xA0E0A0E0;
  568. }
  569. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  570. data[0], data[1], data[2], data[3], data[4], data[5]);
  571. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  572. }
  573. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  574. {
  575. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  576. struct cx18_mdl *mdl;
  577. if (!cx18_stream_enabled(s))
  578. return;
  579. /* Return if the firmware is not running low on MDLs */
  580. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  581. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  582. return;
  583. /* Return if there are no MDLs to rotate back to the firmware */
  584. if (atomic_read(&s->q_full.depth) < 2)
  585. return;
  586. /*
  587. * Take the oldest IDX MDL still holding data, and discard its index
  588. * entries by scheduling the MDL to go back to the firmware
  589. */
  590. mdl = cx18_dequeue(s, &s->q_full);
  591. if (mdl != NULL)
  592. cx18_enqueue(s, mdl, &s->q_free);
  593. }
  594. static
  595. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  596. struct cx18_mdl *mdl)
  597. {
  598. struct cx18 *cx = s->cx;
  599. struct cx18_queue *q;
  600. /* Don't give it to the firmware, if we're not running a capture */
  601. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  602. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  603. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  604. return cx18_enqueue(s, mdl, &s->q_free);
  605. q = cx18_enqueue(s, mdl, &s->q_busy);
  606. if (q != &s->q_busy)
  607. return q; /* The firmware has the max MDLs it can handle */
  608. cx18_mdl_sync_for_device(s, mdl);
  609. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  610. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  611. s->bufs_per_mdl, mdl->id, s->mdl_size);
  612. return q;
  613. }
  614. static
  615. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  616. {
  617. struct cx18_queue *q;
  618. struct cx18_mdl *mdl;
  619. if (atomic_read(&s->q_free.depth) == 0 ||
  620. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  621. return;
  622. /* Move from q_free to q_busy notifying the firmware, until the limit */
  623. do {
  624. mdl = cx18_dequeue(s, &s->q_free);
  625. if (mdl == NULL)
  626. break;
  627. q = _cx18_stream_put_mdl_fw(s, mdl);
  628. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  629. && q == &s->q_busy);
  630. }
  631. void cx18_out_work_handler(struct work_struct *work)
  632. {
  633. struct cx18_stream *s =
  634. container_of(work, struct cx18_stream, out_work_order);
  635. _cx18_stream_load_fw_queue(s);
  636. }
  637. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  638. {
  639. cx18_unload_queues(s);
  640. switch (s->type) {
  641. case CX18_ENC_STREAM_TYPE_YUV:
  642. /*
  643. * Height should be a multiple of 32 lines.
  644. * Set the MDL size to the exact size needed for one frame.
  645. * Use enough buffers per MDL to cover the MDL size
  646. */
  647. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  648. s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
  649. else
  650. s->mdl_size = 720 * s->cx->cxhdl.height * 2;
  651. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  652. if (s->mdl_size % s->buf_size)
  653. s->bufs_per_mdl++;
  654. break;
  655. case CX18_ENC_STREAM_TYPE_VBI:
  656. s->bufs_per_mdl = 1;
  657. if (cx18_raw_vbi(s->cx)) {
  658. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  659. * 2 * vbi_active_samples;
  660. } else {
  661. /*
  662. * See comment in cx18_vbi_setup() below about the
  663. * extra lines we capture in sliced VBI mode due to
  664. * the lines on which EAV RP codes toggle.
  665. */
  666. s->mdl_size = s->cx->is_60hz
  667. ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
  668. : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
  669. }
  670. break;
  671. default:
  672. s->bufs_per_mdl = 1;
  673. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  674. break;
  675. }
  676. cx18_load_queues(s);
  677. }
  678. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  679. {
  680. u32 data[MAX_MB_ARGUMENTS];
  681. struct cx18 *cx = s->cx;
  682. int captype = 0;
  683. struct cx18_stream *s_idx;
  684. if (!cx18_stream_enabled(s))
  685. return -EINVAL;
  686. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  687. switch (s->type) {
  688. case CX18_ENC_STREAM_TYPE_MPG:
  689. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  690. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  691. cx->dualwatch_jiffies = jiffies;
  692. cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
  693. cx->search_pack_header = 0;
  694. break;
  695. case CX18_ENC_STREAM_TYPE_IDX:
  696. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  697. break;
  698. case CX18_ENC_STREAM_TYPE_TS:
  699. captype = CAPTURE_CHANNEL_TYPE_TS;
  700. break;
  701. case CX18_ENC_STREAM_TYPE_YUV:
  702. captype = CAPTURE_CHANNEL_TYPE_YUV;
  703. break;
  704. case CX18_ENC_STREAM_TYPE_PCM:
  705. captype = CAPTURE_CHANNEL_TYPE_PCM;
  706. break;
  707. case CX18_ENC_STREAM_TYPE_VBI:
  708. #ifdef CX18_ENCODER_PARSES_SLICED
  709. captype = cx18_raw_vbi(cx) ?
  710. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  711. #else
  712. /*
  713. * Currently we set things up so that Sliced VBI from the
  714. * digitizer is handled as Raw VBI by the encoder
  715. */
  716. captype = CAPTURE_CHANNEL_TYPE_VBI;
  717. #endif
  718. cx->vbi.frame = 0;
  719. cx->vbi.inserted_frame = 0;
  720. memset(cx->vbi.sliced_mpeg_size,
  721. 0, sizeof(cx->vbi.sliced_mpeg_size));
  722. break;
  723. default:
  724. return -EINVAL;
  725. }
  726. /* Clear Streamoff flags in case left from last capture */
  727. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  728. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  729. s->handle = data[0];
  730. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  731. /*
  732. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  733. * set up all the parameters, as it is not obvious which parameters the
  734. * firmware shares across capture channel types and which it does not.
  735. *
  736. * Some of the cx18_vapi() calls below apply to only certain capture
  737. * channel types. We're hoping there's no harm in calling most of them
  738. * anyway, as long as the values are all consistent. Setting some
  739. * shared parameters will have no effect once an analog capture channel
  740. * has started streaming.
  741. */
  742. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  743. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  744. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  745. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  746. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  747. /*
  748. * Audio related reset according to
  749. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  750. */
  751. if (atomic_read(&cx->ana_capturing) == 0)
  752. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  753. s->handle, 12);
  754. /*
  755. * Number of lines for Field 1 & Field 2 according to
  756. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  757. * Field 1 is 312 for 625 line systems in BT.656
  758. * Field 2 is 313 for 625 line systems in BT.656
  759. */
  760. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  761. s->handle, 312, 313);
  762. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  763. cx18_vbi_setup(s);
  764. /*
  765. * Select to receive I, P, and B frame index entries, if the
  766. * index stream is enabled. Otherwise disable index entry
  767. * generation.
  768. */
  769. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  770. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  771. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  772. /* Call out to the common CX2341x API setup for user controls */
  773. cx->cxhdl.priv = s;
  774. cx2341x_handler_setup(&cx->cxhdl);
  775. /*
  776. * When starting a capture and we're set for radio,
  777. * ensure the video is muted, despite the user control.
  778. */
  779. if (!cx->cxhdl.video_mute &&
  780. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  781. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  782. (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
  783. /* Enable the Video Format Converter for UYVY 4:2:2 support,
  784. * rather than the default HM12 Macroblovk 4:2:0 support.
  785. */
  786. if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
  787. if (s->pixelformat == V4L2_PIX_FMT_UYVY)
  788. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  789. s->handle, 1);
  790. else
  791. /* If in doubt, default to HM12 */
  792. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  793. s->handle, 0);
  794. }
  795. }
  796. if (atomic_read(&cx->tot_capturing) == 0) {
  797. cx2341x_handler_set_busy(&cx->cxhdl, 1);
  798. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  799. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  800. }
  801. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  802. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  803. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  804. /* Init all the cpu_mdls for this stream */
  805. cx18_stream_configure_mdls(s);
  806. _cx18_stream_load_fw_queue(s);
  807. /* begin_capture */
  808. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  809. CX18_DEBUG_WARN("Error starting capture!\n");
  810. /* Ensure we're really not capturing before releasing MDLs */
  811. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  812. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  813. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  814. else
  815. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  816. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  817. /* FIXME - CX18_F_S_STREAMOFF as well? */
  818. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  819. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  820. s->handle = CX18_INVALID_TASK_HANDLE;
  821. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  822. if (atomic_read(&cx->tot_capturing) == 0) {
  823. set_bit(CX18_F_I_EOS, &cx->i_flags);
  824. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  825. }
  826. return -EINVAL;
  827. }
  828. /* you're live! sit back and await interrupts :) */
  829. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  830. atomic_inc(&cx->ana_capturing);
  831. atomic_inc(&cx->tot_capturing);
  832. return 0;
  833. }
  834. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  835. void cx18_stop_all_captures(struct cx18 *cx)
  836. {
  837. int i;
  838. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  839. struct cx18_stream *s = &cx->streams[i];
  840. if (!cx18_stream_enabled(s))
  841. continue;
  842. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  843. cx18_stop_v4l2_encode_stream(s, 0);
  844. }
  845. }
  846. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  847. {
  848. struct cx18 *cx = s->cx;
  849. if (!cx18_stream_enabled(s))
  850. return -EINVAL;
  851. /* This function assumes that you are allowed to stop the capture
  852. and that we are actually capturing */
  853. CX18_DEBUG_INFO("Stop Capture\n");
  854. if (atomic_read(&cx->tot_capturing) == 0)
  855. return 0;
  856. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  857. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  858. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  859. else
  860. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  861. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  862. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  863. }
  864. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  865. atomic_dec(&cx->ana_capturing);
  866. atomic_dec(&cx->tot_capturing);
  867. /* Clear capture and no-read bits */
  868. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  869. /* Tell the CX23418 it can't use our buffers anymore */
  870. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  871. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  872. s->handle = CX18_INVALID_TASK_HANDLE;
  873. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  874. if (atomic_read(&cx->tot_capturing) > 0)
  875. return 0;
  876. cx2341x_handler_set_busy(&cx->cxhdl, 0);
  877. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  878. wake_up(&s->waitq);
  879. return 0;
  880. }
  881. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  882. u32 cx18_find_handle(struct cx18 *cx)
  883. {
  884. int i;
  885. /* find first available handle to be used for global settings */
  886. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  887. struct cx18_stream *s = &cx->streams[i];
  888. if (s->video_dev.v4l2_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  889. return s->handle;
  890. }
  891. return CX18_INVALID_TASK_HANDLE;
  892. }
  893. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  894. {
  895. int i;
  896. struct cx18_stream *s;
  897. if (handle == CX18_INVALID_TASK_HANDLE)
  898. return NULL;
  899. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  900. s = &cx->streams[i];
  901. if (s->handle != handle)
  902. continue;
  903. if (cx18_stream_enabled(s))
  904. return s;
  905. }
  906. return NULL;
  907. }