Kconfig 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160
  1. config IRQCHIP
  2. def_bool y
  3. depends on OF_IRQ
  4. config ARM_GIC
  5. bool
  6. select IRQ_DOMAIN
  7. select IRQ_DOMAIN_HIERARCHY
  8. select MULTI_IRQ_HANDLER
  9. config ARM_GIC_V2M
  10. bool
  11. depends on ARM_GIC
  12. depends on PCI && PCI_MSI
  13. select PCI_MSI_IRQ_DOMAIN
  14. config GIC_NON_BANKED
  15. bool
  16. config ARM_GIC_V3
  17. bool
  18. select IRQ_DOMAIN
  19. select MULTI_IRQ_HANDLER
  20. select IRQ_DOMAIN_HIERARCHY
  21. config ARM_GIC_V3_ITS
  22. bool
  23. select PCI_MSI_IRQ_DOMAIN
  24. config ARM_NVIC
  25. bool
  26. select IRQ_DOMAIN
  27. select GENERIC_IRQ_CHIP
  28. config ARM_VIC
  29. bool
  30. select IRQ_DOMAIN
  31. select MULTI_IRQ_HANDLER
  32. config ARM_VIC_NR
  33. int
  34. default 4 if ARCH_S5PV210
  35. default 2
  36. depends on ARM_VIC
  37. help
  38. The maximum number of VICs available in the system, for
  39. power management.
  40. config ATMEL_AIC_IRQ
  41. bool
  42. select GENERIC_IRQ_CHIP
  43. select IRQ_DOMAIN
  44. select MULTI_IRQ_HANDLER
  45. select SPARSE_IRQ
  46. config ATMEL_AIC5_IRQ
  47. bool
  48. select GENERIC_IRQ_CHIP
  49. select IRQ_DOMAIN
  50. select MULTI_IRQ_HANDLER
  51. select SPARSE_IRQ
  52. config BCM7038_L1_IRQ
  53. bool
  54. select GENERIC_IRQ_CHIP
  55. select IRQ_DOMAIN
  56. config BCM7120_L2_IRQ
  57. bool
  58. select GENERIC_IRQ_CHIP
  59. select IRQ_DOMAIN
  60. config BRCMSTB_L2_IRQ
  61. bool
  62. select GENERIC_IRQ_CHIP
  63. select IRQ_DOMAIN
  64. config DW_APB_ICTL
  65. bool
  66. select GENERIC_IRQ_CHIP
  67. select IRQ_DOMAIN
  68. config IMGPDC_IRQ
  69. bool
  70. select GENERIC_IRQ_CHIP
  71. select IRQ_DOMAIN
  72. config CLPS711X_IRQCHIP
  73. bool
  74. depends on ARCH_CLPS711X
  75. select IRQ_DOMAIN
  76. select MULTI_IRQ_HANDLER
  77. select SPARSE_IRQ
  78. default y
  79. config OR1K_PIC
  80. bool
  81. select IRQ_DOMAIN
  82. config OMAP_IRQCHIP
  83. bool
  84. select GENERIC_IRQ_CHIP
  85. select IRQ_DOMAIN
  86. config ORION_IRQCHIP
  87. bool
  88. select IRQ_DOMAIN
  89. select MULTI_IRQ_HANDLER
  90. config RENESAS_INTC_IRQPIN
  91. bool
  92. select IRQ_DOMAIN
  93. config RENESAS_IRQC
  94. bool
  95. select IRQ_DOMAIN
  96. config ST_IRQCHIP
  97. bool
  98. select REGMAP
  99. select MFD_SYSCON
  100. help
  101. Enables SysCfg Controlled IRQs on STi based platforms.
  102. config TB10X_IRQC
  103. bool
  104. select IRQ_DOMAIN
  105. select GENERIC_IRQ_CHIP
  106. config VERSATILE_FPGA_IRQ
  107. bool
  108. select IRQ_DOMAIN
  109. config VERSATILE_FPGA_IRQ_NR
  110. int
  111. default 4
  112. depends on VERSATILE_FPGA_IRQ
  113. config XTENSA_MX
  114. bool
  115. select IRQ_DOMAIN
  116. config IRQ_CROSSBAR
  117. bool
  118. help
  119. Support for a CROSSBAR ip that precedes the main interrupt controller.
  120. The primary irqchip invokes the crossbar's callback which inturn allocates
  121. a free irq and configures the IP. Thus the peripheral interrupts are
  122. routed to one of the free irqchip interrupt lines.
  123. config KEYSTONE_IRQ
  124. tristate "Keystone 2 IRQ controller IP"
  125. depends on ARCH_KEYSTONE
  126. help
  127. Support for Texas Instruments Keystone 2 IRQ controller IP which
  128. is part of the Keystone 2 IPC mechanism
  129. config MIPS_GIC
  130. bool
  131. select MIPS_CM