cyapa.h 8.4 KB

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  1. /*
  2. * Cypress APA trackpad with I2C interface
  3. *
  4. * Author: Dudley Du <dudl@cypress.com>
  5. *
  6. * Copyright (C) 2014 Cypress Semiconductor, Inc.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file COPYING in the main directory of this archive for
  10. * more details.
  11. */
  12. #ifndef _CYAPA_H
  13. #define _CYAPA_H
  14. #include <linux/firmware.h>
  15. /* APA trackpad firmware generation number. */
  16. #define CYAPA_GEN_UNKNOWN 0x00 /* unknown protocol. */
  17. #define CYAPA_GEN3 0x03 /* support MT-protocol B with tracking ID. */
  18. #define CYAPA_GEN5 0x05 /* support TrueTouch GEN5 trackpad device. */
  19. #define CYAPA_NAME "Cypress APA Trackpad (cyapa)"
  20. /*
  21. * Macros for SMBus communication
  22. */
  23. #define SMBUS_READ 0x01
  24. #define SMBUS_WRITE 0x00
  25. #define SMBUS_ENCODE_IDX(cmd, idx) ((cmd) | (((idx) & 0x03) << 1))
  26. #define SMBUS_ENCODE_RW(cmd, rw) ((cmd) | ((rw) & 0x01))
  27. #define SMBUS_BYTE_BLOCK_CMD_MASK 0x80
  28. #define SMBUS_GROUP_BLOCK_CMD_MASK 0x40
  29. /* Commands for read/write registers of Cypress trackpad */
  30. #define CYAPA_CMD_SOFT_RESET 0x00
  31. #define CYAPA_CMD_POWER_MODE 0x01
  32. #define CYAPA_CMD_DEV_STATUS 0x02
  33. #define CYAPA_CMD_GROUP_DATA 0x03
  34. #define CYAPA_CMD_GROUP_CMD 0x04
  35. #define CYAPA_CMD_GROUP_QUERY 0x05
  36. #define CYAPA_CMD_BL_STATUS 0x06
  37. #define CYAPA_CMD_BL_HEAD 0x07
  38. #define CYAPA_CMD_BL_CMD 0x08
  39. #define CYAPA_CMD_BL_DATA 0x09
  40. #define CYAPA_CMD_BL_ALL 0x0a
  41. #define CYAPA_CMD_BLK_PRODUCT_ID 0x0b
  42. #define CYAPA_CMD_BLK_HEAD 0x0c
  43. #define CYAPA_CMD_MAX_BASELINE 0x0d
  44. #define CYAPA_CMD_MIN_BASELINE 0x0e
  45. #define BL_HEAD_OFFSET 0x00
  46. #define BL_DATA_OFFSET 0x10
  47. #define BL_STATUS_SIZE 3 /* Length of gen3 bootloader status registers */
  48. #define CYAPA_REG_MAP_SIZE 256
  49. /*
  50. * Gen3 Operational Device Status Register
  51. *
  52. * bit 7: Valid interrupt source
  53. * bit 6 - 4: Reserved
  54. * bit 3 - 2: Power status
  55. * bit 1 - 0: Device status
  56. */
  57. #define REG_OP_STATUS 0x00
  58. #define OP_STATUS_SRC 0x80
  59. #define OP_STATUS_POWER 0x0c
  60. #define OP_STATUS_DEV 0x03
  61. #define OP_STATUS_MASK (OP_STATUS_SRC | OP_STATUS_POWER | OP_STATUS_DEV)
  62. /*
  63. * Operational Finger Count/Button Flags Register
  64. *
  65. * bit 7 - 4: Number of touched finger
  66. * bit 3: Valid data
  67. * bit 2: Middle Physical Button
  68. * bit 1: Right Physical Button
  69. * bit 0: Left physical Button
  70. */
  71. #define REG_OP_DATA1 0x01
  72. #define OP_DATA_VALID 0x08
  73. #define OP_DATA_MIDDLE_BTN 0x04
  74. #define OP_DATA_RIGHT_BTN 0x02
  75. #define OP_DATA_LEFT_BTN 0x01
  76. #define OP_DATA_BTN_MASK (OP_DATA_MIDDLE_BTN | OP_DATA_RIGHT_BTN | \
  77. OP_DATA_LEFT_BTN)
  78. /*
  79. * Write-only command file register used to issue commands and
  80. * parameters to the bootloader.
  81. * The default value read from it is always 0x00.
  82. */
  83. #define REG_BL_FILE 0x00
  84. #define BL_FILE 0x00
  85. /*
  86. * Bootloader Status Register
  87. *
  88. * bit 7: Busy
  89. * bit 6 - 5: Reserved
  90. * bit 4: Bootloader running
  91. * bit 3 - 2: Reserved
  92. * bit 1: Watchdog Reset
  93. * bit 0: Checksum valid
  94. */
  95. #define REG_BL_STATUS 0x01
  96. #define BL_STATUS_REV_6_5 0x60
  97. #define BL_STATUS_BUSY 0x80
  98. #define BL_STATUS_RUNNING 0x10
  99. #define BL_STATUS_REV_3_2 0x0c
  100. #define BL_STATUS_WATCHDOG 0x02
  101. #define BL_STATUS_CSUM_VALID 0x01
  102. #define BL_STATUS_REV_MASK (BL_STATUS_WATCHDOG | BL_STATUS_REV_3_2 | \
  103. BL_STATUS_REV_6_5)
  104. /*
  105. * Bootloader Error Register
  106. *
  107. * bit 7: Invalid
  108. * bit 6: Invalid security key
  109. * bit 5: Bootloading
  110. * bit 4: Command checksum
  111. * bit 3: Flash protection error
  112. * bit 2: Flash checksum error
  113. * bit 1 - 0: Reserved
  114. */
  115. #define REG_BL_ERROR 0x02
  116. #define BL_ERROR_INVALID 0x80
  117. #define BL_ERROR_INVALID_KEY 0x40
  118. #define BL_ERROR_BOOTLOADING 0x20
  119. #define BL_ERROR_CMD_CSUM 0x10
  120. #define BL_ERROR_FLASH_PROT 0x08
  121. #define BL_ERROR_FLASH_CSUM 0x04
  122. #define BL_ERROR_RESERVED 0x03
  123. #define BL_ERROR_NO_ERR_IDLE 0x00
  124. #define BL_ERROR_NO_ERR_ACTIVE (BL_ERROR_BOOTLOADING)
  125. #define CAPABILITY_BTN_SHIFT 3
  126. #define CAPABILITY_LEFT_BTN_MASK (0x01 << 3)
  127. #define CAPABILITY_RIGHT_BTN_MASK (0x01 << 4)
  128. #define CAPABILITY_MIDDLE_BTN_MASK (0x01 << 5)
  129. #define CAPABILITY_BTN_MASK (CAPABILITY_LEFT_BTN_MASK | \
  130. CAPABILITY_RIGHT_BTN_MASK | \
  131. CAPABILITY_MIDDLE_BTN_MASK)
  132. #define PWR_MODE_MASK 0xfc
  133. #define PWR_MODE_FULL_ACTIVE (0x3f << 2)
  134. #define PWR_MODE_IDLE (0x03 << 2) /* Default rt suspend scanrate: 30ms */
  135. #define PWR_MODE_SLEEP (0x05 << 2) /* Default suspend scanrate: 50ms */
  136. #define PWR_MODE_BTN_ONLY (0x01 << 2)
  137. #define PWR_MODE_OFF (0x00 << 2)
  138. #define PWR_STATUS_MASK 0x0c
  139. #define PWR_STATUS_ACTIVE (0x03 << 2)
  140. #define PWR_STATUS_IDLE (0x02 << 2)
  141. #define PWR_STATUS_BTN_ONLY (0x01 << 2)
  142. #define PWR_STATUS_OFF (0x00 << 2)
  143. #define AUTOSUSPEND_DELAY 2000 /* unit : ms */
  144. #define UNINIT_SLEEP_TIME 0xFFFF
  145. #define UNINIT_PWR_MODE 0xFF
  146. #define BTN_ONLY_MODE_NAME "buttononly"
  147. #define OFF_MODE_NAME "off"
  148. /* The touch.id is used as the MT slot id, thus max MT slot is 15 */
  149. #define CYAPA_MAX_MT_SLOTS 15
  150. struct cyapa;
  151. typedef bool (*cb_sort)(struct cyapa *, u8 *, int);
  152. struct cyapa_dev_ops {
  153. int (*check_fw)(struct cyapa *, const struct firmware *);
  154. int (*bl_enter)(struct cyapa *);
  155. int (*bl_activate)(struct cyapa *);
  156. int (*bl_initiate)(struct cyapa *, const struct firmware *);
  157. int (*update_fw)(struct cyapa *, const struct firmware *);
  158. int (*bl_deactivate)(struct cyapa *);
  159. ssize_t (*show_baseline)(struct device *,
  160. struct device_attribute *, char *);
  161. ssize_t (*calibrate_store)(struct device *,
  162. struct device_attribute *, const char *, size_t);
  163. int (*initialize)(struct cyapa *cyapa);
  164. int (*state_parse)(struct cyapa *cyapa, u8 *reg_status, int len);
  165. int (*operational_check)(struct cyapa *cyapa);
  166. int (*irq_handler)(struct cyapa *);
  167. bool (*irq_cmd_handler)(struct cyapa *);
  168. int (*sort_empty_output_data)(struct cyapa *,
  169. u8 *, int *, cb_sort);
  170. int (*set_power_mode)(struct cyapa *, u8, u16);
  171. };
  172. struct cyapa_gen5_cmd_states {
  173. struct mutex cmd_lock;
  174. struct completion cmd_ready;
  175. atomic_t cmd_issued;
  176. u8 in_progress_cmd;
  177. bool is_irq_mode;
  178. cb_sort resp_sort_func;
  179. u8 *resp_data;
  180. int *resp_len;
  181. u8 irq_cmd_buf[CYAPA_REG_MAP_SIZE];
  182. u8 empty_buf[CYAPA_REG_MAP_SIZE];
  183. };
  184. union cyapa_cmd_states {
  185. struct cyapa_gen5_cmd_states gen5;
  186. };
  187. enum cyapa_state {
  188. CYAPA_STATE_NO_DEVICE,
  189. CYAPA_STATE_BL_BUSY,
  190. CYAPA_STATE_BL_IDLE,
  191. CYAPA_STATE_BL_ACTIVE,
  192. CYAPA_STATE_OP,
  193. CYAPA_STATE_GEN5_BL,
  194. CYAPA_STATE_GEN5_APP,
  195. };
  196. /* The main device structure */
  197. struct cyapa {
  198. enum cyapa_state state;
  199. u8 status[BL_STATUS_SIZE];
  200. bool operational; /* true: ready for data reporting; false: not. */
  201. struct i2c_client *client;
  202. struct input_dev *input;
  203. char phys[32]; /* Device physical location */
  204. bool irq_wake; /* Irq wake is enabled */
  205. bool smbus;
  206. /* power mode settings */
  207. u8 suspend_power_mode;
  208. u16 suspend_sleep_time;
  209. u8 runtime_suspend_power_mode;
  210. u16 runtime_suspend_sleep_time;
  211. u8 dev_pwr_mode;
  212. u16 dev_sleep_time;
  213. /* Read from query data region. */
  214. char product_id[16];
  215. u8 fw_maj_ver; /* Firmware major version. */
  216. u8 fw_min_ver; /* Firmware minor version. */
  217. u8 btn_capability;
  218. u8 gen;
  219. int max_abs_x;
  220. int max_abs_y;
  221. int physical_size_x;
  222. int physical_size_y;
  223. /* Used in ttsp and truetouch based trackpad devices. */
  224. u8 x_origin; /* X Axis Origin: 0 = left side; 1 = rigth side. */
  225. u8 y_origin; /* Y Axis Origin: 0 = top; 1 = bottom. */
  226. int electrodes_x; /* Number of electrodes on the X Axis*/
  227. int electrodes_y; /* Number of electrodes on the Y Axis*/
  228. int electrodes_rx; /* Number of Rx electrodes */
  229. int aligned_electrodes_rx; /* 4 aligned */
  230. int max_z;
  231. /*
  232. * Used to synchronize the access or update the device state.
  233. * And since update firmware and read firmware image process will take
  234. * quite long time, maybe more than 10 seconds, so use mutex_lock
  235. * to sync and wait other interface and detecting are done or ready.
  236. */
  237. struct mutex state_sync_lock;
  238. const struct cyapa_dev_ops *ops;
  239. union cyapa_cmd_states cmd_states;
  240. };
  241. ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len,
  242. u8 *values);
  243. ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len,
  244. u8 *values);
  245. ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values);
  246. int cyapa_poll_state(struct cyapa *cyapa, unsigned int timeout);
  247. u8 cyapa_sleep_time_to_pwr_cmd(u16 sleep_time);
  248. u16 cyapa_pwr_cmd_to_sleep_time(u8 pwr_mode);
  249. extern const char product_id[];
  250. extern const struct cyapa_dev_ops cyapa_gen3_ops;
  251. extern const struct cyapa_dev_ops cyapa_gen5_ops;
  252. #endif