main.c 36 KB

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  1. /*
  2. * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <asm-generic/kmap_types.h>
  33. #include <linux/module.h>
  34. #include <linux/init.h>
  35. #include <linux/errno.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/slab.h>
  39. #include <linux/io-mapping.h>
  40. #include <linux/sched.h>
  41. #include <rdma/ib_user_verbs.h>
  42. #include <rdma/ib_smi.h>
  43. #include <rdma/ib_umem.h>
  44. #include "user.h"
  45. #include "mlx5_ib.h"
  46. #define DRIVER_NAME "mlx5_ib"
  47. #define DRIVER_VERSION "2.2-1"
  48. #define DRIVER_RELDATE "Feb 2014"
  49. MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
  50. MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
  51. MODULE_LICENSE("Dual BSD/GPL");
  52. MODULE_VERSION(DRIVER_VERSION);
  53. static int deprecated_prof_sel = 2;
  54. module_param_named(prof_sel, deprecated_prof_sel, int, 0444);
  55. MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core");
  56. static char mlx5_version[] =
  57. DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
  58. DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
  59. static int mlx5_ib_query_device(struct ib_device *ibdev,
  60. struct ib_device_attr *props)
  61. {
  62. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  63. struct ib_smp *in_mad = NULL;
  64. struct ib_smp *out_mad = NULL;
  65. struct mlx5_general_caps *gen;
  66. int err = -ENOMEM;
  67. int max_rq_sg;
  68. int max_sq_sg;
  69. u64 flags;
  70. gen = &dev->mdev->caps.gen;
  71. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  72. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  73. if (!in_mad || !out_mad)
  74. goto out;
  75. init_query_mad(in_mad);
  76. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  77. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad);
  78. if (err)
  79. goto out;
  80. memset(props, 0, sizeof(*props));
  81. props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) |
  82. (fw_rev_min(dev->mdev) << 16) |
  83. fw_rev_sub(dev->mdev);
  84. props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  85. IB_DEVICE_PORT_ACTIVE_EVENT |
  86. IB_DEVICE_SYS_IMAGE_GUID |
  87. IB_DEVICE_RC_RNR_NAK_GEN;
  88. flags = gen->flags;
  89. if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR)
  90. props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  91. if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR)
  92. props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  93. if (flags & MLX5_DEV_CAP_FLAG_APM)
  94. props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  95. props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
  96. if (flags & MLX5_DEV_CAP_FLAG_XRC)
  97. props->device_cap_flags |= IB_DEVICE_XRC;
  98. props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
  99. if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) {
  100. props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER;
  101. /* At this stage no support for signature handover */
  102. props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 |
  103. IB_PROT_T10DIF_TYPE_2 |
  104. IB_PROT_T10DIF_TYPE_3;
  105. props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
  106. IB_GUARD_T10DIF_CSUM;
  107. }
  108. if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)
  109. props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
  110. props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
  111. 0xffffff;
  112. props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30));
  113. props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32));
  114. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  115. props->max_mr_size = ~0ull;
  116. props->page_size_cap = gen->min_page_sz;
  117. props->max_qp = 1 << gen->log_max_qp;
  118. props->max_qp_wr = gen->max_wqes;
  119. max_rq_sg = gen->max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg);
  120. max_sq_sg = (gen->max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) /
  121. sizeof(struct mlx5_wqe_data_seg);
  122. props->max_sge = min(max_rq_sg, max_sq_sg);
  123. props->max_cq = 1 << gen->log_max_cq;
  124. props->max_cqe = gen->max_cqes - 1;
  125. props->max_mr = 1 << gen->log_max_mkey;
  126. props->max_pd = 1 << gen->log_max_pd;
  127. props->max_qp_rd_atom = 1 << gen->log_max_ra_req_qp;
  128. props->max_qp_init_rd_atom = 1 << gen->log_max_ra_res_qp;
  129. props->max_srq = 1 << gen->log_max_srq;
  130. props->max_srq_wr = gen->max_srq_wqes - 1;
  131. props->local_ca_ack_delay = gen->local_ca_ack_delay;
  132. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  133. props->max_srq_sge = max_rq_sg - 1;
  134. props->max_fast_reg_page_list_len = (unsigned int)-1;
  135. props->local_ca_ack_delay = gen->local_ca_ack_delay;
  136. props->atomic_cap = IB_ATOMIC_NONE;
  137. props->masked_atomic_cap = IB_ATOMIC_NONE;
  138. props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
  139. props->max_mcast_grp = 1 << gen->log_max_mcg;
  140. props->max_mcast_qp_attach = gen->max_qp_mcg;
  141. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  142. props->max_mcast_grp;
  143. props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
  144. #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
  145. if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG)
  146. props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING;
  147. props->odp_caps = dev->odp_caps;
  148. #endif
  149. out:
  150. kfree(in_mad);
  151. kfree(out_mad);
  152. return err;
  153. }
  154. int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
  155. struct ib_port_attr *props)
  156. {
  157. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  158. struct ib_smp *in_mad = NULL;
  159. struct ib_smp *out_mad = NULL;
  160. struct mlx5_general_caps *gen;
  161. int ext_active_speed;
  162. int err = -ENOMEM;
  163. gen = &dev->mdev->caps.gen;
  164. if (port < 1 || port > gen->num_ports) {
  165. mlx5_ib_warn(dev, "invalid port number %d\n", port);
  166. return -EINVAL;
  167. }
  168. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  169. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  170. if (!in_mad || !out_mad)
  171. goto out;
  172. memset(props, 0, sizeof(*props));
  173. init_query_mad(in_mad);
  174. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  175. in_mad->attr_mod = cpu_to_be32(port);
  176. err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
  177. if (err) {
  178. mlx5_ib_warn(dev, "err %d\n", err);
  179. goto out;
  180. }
  181. props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
  182. props->lmc = out_mad->data[34] & 0x7;
  183. props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
  184. props->sm_sl = out_mad->data[36] & 0xf;
  185. props->state = out_mad->data[32] & 0xf;
  186. props->phys_state = out_mad->data[33] >> 4;
  187. props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
  188. props->gid_tbl_len = out_mad->data[50];
  189. props->max_msg_sz = 1 << gen->log_max_msg;
  190. props->pkey_tbl_len = gen->port[port - 1].pkey_table_len;
  191. props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
  192. props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
  193. props->active_width = out_mad->data[31] & 0xf;
  194. props->active_speed = out_mad->data[35] >> 4;
  195. props->max_mtu = out_mad->data[41] & 0xf;
  196. props->active_mtu = out_mad->data[36] >> 4;
  197. props->subnet_timeout = out_mad->data[51] & 0x1f;
  198. props->max_vl_num = out_mad->data[37] >> 4;
  199. props->init_type_reply = out_mad->data[41] >> 4;
  200. /* Check if extended speeds (EDR/FDR/...) are supported */
  201. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  202. ext_active_speed = out_mad->data[62] >> 4;
  203. switch (ext_active_speed) {
  204. case 1:
  205. props->active_speed = 16; /* FDR */
  206. break;
  207. case 2:
  208. props->active_speed = 32; /* EDR */
  209. break;
  210. }
  211. }
  212. /* If reported active speed is QDR, check if is FDR-10 */
  213. if (props->active_speed == 4) {
  214. if (gen->ext_port_cap[port - 1] &
  215. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
  216. init_query_mad(in_mad);
  217. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  218. in_mad->attr_mod = cpu_to_be32(port);
  219. err = mlx5_MAD_IFC(dev, 1, 1, port,
  220. NULL, NULL, in_mad, out_mad);
  221. if (err)
  222. goto out;
  223. /* Checking LinkSpeedActive for FDR-10 */
  224. if (out_mad->data[15] & 0x1)
  225. props->active_speed = 8;
  226. }
  227. }
  228. out:
  229. kfree(in_mad);
  230. kfree(out_mad);
  231. return err;
  232. }
  233. static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  234. union ib_gid *gid)
  235. {
  236. struct ib_smp *in_mad = NULL;
  237. struct ib_smp *out_mad = NULL;
  238. int err = -ENOMEM;
  239. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  240. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  241. if (!in_mad || !out_mad)
  242. goto out;
  243. init_query_mad(in_mad);
  244. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  245. in_mad->attr_mod = cpu_to_be32(port);
  246. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
  247. if (err)
  248. goto out;
  249. memcpy(gid->raw, out_mad->data + 8, 8);
  250. init_query_mad(in_mad);
  251. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  252. in_mad->attr_mod = cpu_to_be32(index / 8);
  253. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
  254. if (err)
  255. goto out;
  256. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  257. out:
  258. kfree(in_mad);
  259. kfree(out_mad);
  260. return err;
  261. }
  262. static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  263. u16 *pkey)
  264. {
  265. struct ib_smp *in_mad = NULL;
  266. struct ib_smp *out_mad = NULL;
  267. int err = -ENOMEM;
  268. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  269. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  270. if (!in_mad || !out_mad)
  271. goto out;
  272. init_query_mad(in_mad);
  273. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  274. in_mad->attr_mod = cpu_to_be32(index / 32);
  275. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
  276. if (err)
  277. goto out;
  278. *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
  279. out:
  280. kfree(in_mad);
  281. kfree(out_mad);
  282. return err;
  283. }
  284. struct mlx5_reg_node_desc {
  285. u8 desc[64];
  286. };
  287. static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask,
  288. struct ib_device_modify *props)
  289. {
  290. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  291. struct mlx5_reg_node_desc in;
  292. struct mlx5_reg_node_desc out;
  293. int err;
  294. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  295. return -EOPNOTSUPP;
  296. if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
  297. return 0;
  298. /*
  299. * If possible, pass node desc to FW, so it can generate
  300. * a 144 trap. If cmd fails, just ignore.
  301. */
  302. memcpy(&in, props->node_desc, 64);
  303. err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out,
  304. sizeof(out), MLX5_REG_NODE_DESC, 0, 1);
  305. if (err)
  306. return err;
  307. memcpy(ibdev->node_desc, props->node_desc, 64);
  308. return err;
  309. }
  310. static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
  311. struct ib_port_modify *props)
  312. {
  313. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  314. struct ib_port_attr attr;
  315. u32 tmp;
  316. int err;
  317. mutex_lock(&dev->cap_mask_mutex);
  318. err = mlx5_ib_query_port(ibdev, port, &attr);
  319. if (err)
  320. goto out;
  321. tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
  322. ~props->clr_port_cap_mask;
  323. err = mlx5_set_port_caps(dev->mdev, port, tmp);
  324. out:
  325. mutex_unlock(&dev->cap_mask_mutex);
  326. return err;
  327. }
  328. static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
  329. struct ib_udata *udata)
  330. {
  331. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  332. struct mlx5_ib_alloc_ucontext_req_v2 req;
  333. struct mlx5_ib_alloc_ucontext_resp resp;
  334. struct mlx5_ib_ucontext *context;
  335. struct mlx5_general_caps *gen;
  336. struct mlx5_uuar_info *uuari;
  337. struct mlx5_uar *uars;
  338. int gross_uuars;
  339. int num_uars;
  340. int ver;
  341. int uuarn;
  342. int err;
  343. int i;
  344. size_t reqlen;
  345. gen = &dev->mdev->caps.gen;
  346. if (!dev->ib_active)
  347. return ERR_PTR(-EAGAIN);
  348. memset(&req, 0, sizeof(req));
  349. reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr);
  350. if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req))
  351. ver = 0;
  352. else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2))
  353. ver = 2;
  354. else
  355. return ERR_PTR(-EINVAL);
  356. err = ib_copy_from_udata(&req, udata, reqlen);
  357. if (err)
  358. return ERR_PTR(err);
  359. if (req.flags || req.reserved)
  360. return ERR_PTR(-EINVAL);
  361. if (req.total_num_uuars > MLX5_MAX_UUARS)
  362. return ERR_PTR(-ENOMEM);
  363. if (req.total_num_uuars == 0)
  364. return ERR_PTR(-EINVAL);
  365. req.total_num_uuars = ALIGN(req.total_num_uuars,
  366. MLX5_NON_FP_BF_REGS_PER_PAGE);
  367. if (req.num_low_latency_uuars > req.total_num_uuars - 1)
  368. return ERR_PTR(-EINVAL);
  369. num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE;
  370. gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE;
  371. resp.qp_tab_size = 1 << gen->log_max_qp;
  372. resp.bf_reg_size = gen->bf_reg_size;
  373. resp.cache_line_size = L1_CACHE_BYTES;
  374. resp.max_sq_desc_sz = gen->max_sq_desc_sz;
  375. resp.max_rq_desc_sz = gen->max_rq_desc_sz;
  376. resp.max_send_wqebb = gen->max_wqes;
  377. resp.max_recv_wr = gen->max_wqes;
  378. resp.max_srq_recv_wr = gen->max_srq_wqes;
  379. context = kzalloc(sizeof(*context), GFP_KERNEL);
  380. if (!context)
  381. return ERR_PTR(-ENOMEM);
  382. uuari = &context->uuari;
  383. mutex_init(&uuari->lock);
  384. uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL);
  385. if (!uars) {
  386. err = -ENOMEM;
  387. goto out_ctx;
  388. }
  389. uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars),
  390. sizeof(*uuari->bitmap),
  391. GFP_KERNEL);
  392. if (!uuari->bitmap) {
  393. err = -ENOMEM;
  394. goto out_uar_ctx;
  395. }
  396. /*
  397. * clear all fast path uuars
  398. */
  399. for (i = 0; i < gross_uuars; i++) {
  400. uuarn = i & 3;
  401. if (uuarn == 2 || uuarn == 3)
  402. set_bit(i, uuari->bitmap);
  403. }
  404. uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL);
  405. if (!uuari->count) {
  406. err = -ENOMEM;
  407. goto out_bitmap;
  408. }
  409. for (i = 0; i < num_uars; i++) {
  410. err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index);
  411. if (err)
  412. goto out_count;
  413. }
  414. #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
  415. context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range;
  416. #endif
  417. INIT_LIST_HEAD(&context->db_page_list);
  418. mutex_init(&context->db_page_mutex);
  419. resp.tot_uuars = req.total_num_uuars;
  420. resp.num_ports = gen->num_ports;
  421. err = ib_copy_to_udata(udata, &resp,
  422. sizeof(resp) - sizeof(resp.reserved));
  423. if (err)
  424. goto out_uars;
  425. uuari->ver = ver;
  426. uuari->num_low_latency_uuars = req.num_low_latency_uuars;
  427. uuari->uars = uars;
  428. uuari->num_uars = num_uars;
  429. return &context->ibucontext;
  430. out_uars:
  431. for (i--; i >= 0; i--)
  432. mlx5_cmd_free_uar(dev->mdev, uars[i].index);
  433. out_count:
  434. kfree(uuari->count);
  435. out_bitmap:
  436. kfree(uuari->bitmap);
  437. out_uar_ctx:
  438. kfree(uars);
  439. out_ctx:
  440. kfree(context);
  441. return ERR_PTR(err);
  442. }
  443. static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
  444. {
  445. struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
  446. struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
  447. struct mlx5_uuar_info *uuari = &context->uuari;
  448. int i;
  449. for (i = 0; i < uuari->num_uars; i++) {
  450. if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index))
  451. mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
  452. }
  453. kfree(uuari->count);
  454. kfree(uuari->bitmap);
  455. kfree(uuari->uars);
  456. kfree(context);
  457. return 0;
  458. }
  459. static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index)
  460. {
  461. return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index;
  462. }
  463. static int get_command(unsigned long offset)
  464. {
  465. return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK;
  466. }
  467. static int get_arg(unsigned long offset)
  468. {
  469. return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1);
  470. }
  471. static int get_index(unsigned long offset)
  472. {
  473. return get_arg(offset);
  474. }
  475. static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma)
  476. {
  477. struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
  478. struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
  479. struct mlx5_uuar_info *uuari = &context->uuari;
  480. unsigned long command;
  481. unsigned long idx;
  482. phys_addr_t pfn;
  483. command = get_command(vma->vm_pgoff);
  484. switch (command) {
  485. case MLX5_IB_MMAP_REGULAR_PAGE:
  486. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  487. return -EINVAL;
  488. idx = get_index(vma->vm_pgoff);
  489. if (idx >= uuari->num_uars)
  490. return -EINVAL;
  491. pfn = uar_index2pfn(dev, uuari->uars[idx].index);
  492. mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx,
  493. (unsigned long long)pfn);
  494. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  495. if (io_remap_pfn_range(vma, vma->vm_start, pfn,
  496. PAGE_SIZE, vma->vm_page_prot))
  497. return -EAGAIN;
  498. mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n",
  499. vma->vm_start,
  500. (unsigned long long)pfn << PAGE_SHIFT);
  501. break;
  502. case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES:
  503. return -ENOSYS;
  504. default:
  505. return -EINVAL;
  506. }
  507. return 0;
  508. }
  509. static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
  510. {
  511. struct mlx5_create_mkey_mbox_in *in;
  512. struct mlx5_mkey_seg *seg;
  513. struct mlx5_core_mr mr;
  514. int err;
  515. in = kzalloc(sizeof(*in), GFP_KERNEL);
  516. if (!in)
  517. return -ENOMEM;
  518. seg = &in->seg;
  519. seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
  520. seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
  521. seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
  522. seg->start_addr = 0;
  523. err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in),
  524. NULL, NULL, NULL);
  525. if (err) {
  526. mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
  527. goto err_in;
  528. }
  529. kfree(in);
  530. *key = mr.key;
  531. return 0;
  532. err_in:
  533. kfree(in);
  534. return err;
  535. }
  536. static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
  537. {
  538. struct mlx5_core_mr mr;
  539. int err;
  540. memset(&mr, 0, sizeof(mr));
  541. mr.key = key;
  542. err = mlx5_core_destroy_mkey(dev->mdev, &mr);
  543. if (err)
  544. mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
  545. }
  546. static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
  547. struct ib_ucontext *context,
  548. struct ib_udata *udata)
  549. {
  550. struct mlx5_ib_alloc_pd_resp resp;
  551. struct mlx5_ib_pd *pd;
  552. int err;
  553. pd = kmalloc(sizeof(*pd), GFP_KERNEL);
  554. if (!pd)
  555. return ERR_PTR(-ENOMEM);
  556. err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn);
  557. if (err) {
  558. kfree(pd);
  559. return ERR_PTR(err);
  560. }
  561. if (context) {
  562. resp.pdn = pd->pdn;
  563. if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
  564. mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
  565. kfree(pd);
  566. return ERR_PTR(-EFAULT);
  567. }
  568. } else {
  569. err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
  570. if (err) {
  571. mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
  572. kfree(pd);
  573. return ERR_PTR(err);
  574. }
  575. }
  576. return &pd->ibpd;
  577. }
  578. static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
  579. {
  580. struct mlx5_ib_dev *mdev = to_mdev(pd->device);
  581. struct mlx5_ib_pd *mpd = to_mpd(pd);
  582. if (!pd->uobject)
  583. free_pa_mkey(mdev, mpd->pa_lkey);
  584. mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn);
  585. kfree(mpd);
  586. return 0;
  587. }
  588. static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  589. {
  590. struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
  591. int err;
  592. err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num);
  593. if (err)
  594. mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n",
  595. ibqp->qp_num, gid->raw);
  596. return err;
  597. }
  598. static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  599. {
  600. struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
  601. int err;
  602. err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num);
  603. if (err)
  604. mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n",
  605. ibqp->qp_num, gid->raw);
  606. return err;
  607. }
  608. static int init_node_data(struct mlx5_ib_dev *dev)
  609. {
  610. struct ib_smp *in_mad = NULL;
  611. struct ib_smp *out_mad = NULL;
  612. int err = -ENOMEM;
  613. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  614. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  615. if (!in_mad || !out_mad)
  616. goto out;
  617. init_query_mad(in_mad);
  618. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  619. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  620. if (err)
  621. goto out;
  622. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  623. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  624. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  625. if (err)
  626. goto out;
  627. dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32));
  628. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  629. out:
  630. kfree(in_mad);
  631. kfree(out_mad);
  632. return err;
  633. }
  634. static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr,
  635. char *buf)
  636. {
  637. struct mlx5_ib_dev *dev =
  638. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  639. return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages);
  640. }
  641. static ssize_t show_reg_pages(struct device *device,
  642. struct device_attribute *attr, char *buf)
  643. {
  644. struct mlx5_ib_dev *dev =
  645. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  646. return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages));
  647. }
  648. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  649. char *buf)
  650. {
  651. struct mlx5_ib_dev *dev =
  652. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  653. return sprintf(buf, "MT%d\n", dev->mdev->pdev->device);
  654. }
  655. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  656. char *buf)
  657. {
  658. struct mlx5_ib_dev *dev =
  659. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  660. return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev),
  661. fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev));
  662. }
  663. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  664. char *buf)
  665. {
  666. struct mlx5_ib_dev *dev =
  667. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  668. return sprintf(buf, "%x\n", dev->mdev->rev_id);
  669. }
  670. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  671. char *buf)
  672. {
  673. struct mlx5_ib_dev *dev =
  674. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  675. return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
  676. dev->mdev->board_id);
  677. }
  678. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  679. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  680. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  681. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  682. static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL);
  683. static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL);
  684. static struct device_attribute *mlx5_class_attributes[] = {
  685. &dev_attr_hw_rev,
  686. &dev_attr_fw_ver,
  687. &dev_attr_hca_type,
  688. &dev_attr_board_id,
  689. &dev_attr_fw_pages,
  690. &dev_attr_reg_pages,
  691. };
  692. static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context,
  693. enum mlx5_dev_event event, unsigned long param)
  694. {
  695. struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context;
  696. struct ib_event ibev;
  697. u8 port = 0;
  698. switch (event) {
  699. case MLX5_DEV_EVENT_SYS_ERROR:
  700. ibdev->ib_active = false;
  701. ibev.event = IB_EVENT_DEVICE_FATAL;
  702. break;
  703. case MLX5_DEV_EVENT_PORT_UP:
  704. ibev.event = IB_EVENT_PORT_ACTIVE;
  705. port = (u8)param;
  706. break;
  707. case MLX5_DEV_EVENT_PORT_DOWN:
  708. ibev.event = IB_EVENT_PORT_ERR;
  709. port = (u8)param;
  710. break;
  711. case MLX5_DEV_EVENT_PORT_INITIALIZED:
  712. /* not used by ULPs */
  713. return;
  714. case MLX5_DEV_EVENT_LID_CHANGE:
  715. ibev.event = IB_EVENT_LID_CHANGE;
  716. port = (u8)param;
  717. break;
  718. case MLX5_DEV_EVENT_PKEY_CHANGE:
  719. ibev.event = IB_EVENT_PKEY_CHANGE;
  720. port = (u8)param;
  721. break;
  722. case MLX5_DEV_EVENT_GUID_CHANGE:
  723. ibev.event = IB_EVENT_GID_CHANGE;
  724. port = (u8)param;
  725. break;
  726. case MLX5_DEV_EVENT_CLIENT_REREG:
  727. ibev.event = IB_EVENT_CLIENT_REREGISTER;
  728. port = (u8)param;
  729. break;
  730. }
  731. ibev.device = &ibdev->ib_dev;
  732. ibev.element.port_num = port;
  733. if (port < 1 || port > ibdev->num_ports) {
  734. mlx5_ib_warn(ibdev, "warning: event on port %d\n", port);
  735. return;
  736. }
  737. if (ibdev->ib_active)
  738. ib_dispatch_event(&ibev);
  739. }
  740. static void get_ext_port_caps(struct mlx5_ib_dev *dev)
  741. {
  742. struct mlx5_general_caps *gen;
  743. int port;
  744. gen = &dev->mdev->caps.gen;
  745. for (port = 1; port <= gen->num_ports; port++)
  746. mlx5_query_ext_port_caps(dev, port);
  747. }
  748. static int get_port_caps(struct mlx5_ib_dev *dev)
  749. {
  750. struct ib_device_attr *dprops = NULL;
  751. struct ib_port_attr *pprops = NULL;
  752. struct mlx5_general_caps *gen;
  753. int err = -ENOMEM;
  754. int port;
  755. gen = &dev->mdev->caps.gen;
  756. pprops = kmalloc(sizeof(*pprops), GFP_KERNEL);
  757. if (!pprops)
  758. goto out;
  759. dprops = kmalloc(sizeof(*dprops), GFP_KERNEL);
  760. if (!dprops)
  761. goto out;
  762. err = mlx5_ib_query_device(&dev->ib_dev, dprops);
  763. if (err) {
  764. mlx5_ib_warn(dev, "query_device failed %d\n", err);
  765. goto out;
  766. }
  767. for (port = 1; port <= gen->num_ports; port++) {
  768. err = mlx5_ib_query_port(&dev->ib_dev, port, pprops);
  769. if (err) {
  770. mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err);
  771. break;
  772. }
  773. gen->port[port - 1].pkey_table_len = dprops->max_pkeys;
  774. gen->port[port - 1].gid_table_len = pprops->gid_tbl_len;
  775. mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n",
  776. dprops->max_pkeys, pprops->gid_tbl_len);
  777. }
  778. out:
  779. kfree(pprops);
  780. kfree(dprops);
  781. return err;
  782. }
  783. static void destroy_umrc_res(struct mlx5_ib_dev *dev)
  784. {
  785. int err;
  786. err = mlx5_mr_cache_cleanup(dev);
  787. if (err)
  788. mlx5_ib_warn(dev, "mr cache cleanup failed\n");
  789. mlx5_ib_destroy_qp(dev->umrc.qp);
  790. ib_destroy_cq(dev->umrc.cq);
  791. ib_dereg_mr(dev->umrc.mr);
  792. ib_dealloc_pd(dev->umrc.pd);
  793. }
  794. enum {
  795. MAX_UMR_WR = 128,
  796. };
  797. static int create_umr_res(struct mlx5_ib_dev *dev)
  798. {
  799. struct ib_qp_init_attr *init_attr = NULL;
  800. struct ib_qp_attr *attr = NULL;
  801. struct ib_pd *pd;
  802. struct ib_cq *cq;
  803. struct ib_qp *qp;
  804. struct ib_mr *mr;
  805. int ret;
  806. attr = kzalloc(sizeof(*attr), GFP_KERNEL);
  807. init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL);
  808. if (!attr || !init_attr) {
  809. ret = -ENOMEM;
  810. goto error_0;
  811. }
  812. pd = ib_alloc_pd(&dev->ib_dev);
  813. if (IS_ERR(pd)) {
  814. mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n");
  815. ret = PTR_ERR(pd);
  816. goto error_0;
  817. }
  818. mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
  819. if (IS_ERR(mr)) {
  820. mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n");
  821. ret = PTR_ERR(mr);
  822. goto error_1;
  823. }
  824. cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128,
  825. 0);
  826. if (IS_ERR(cq)) {
  827. mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n");
  828. ret = PTR_ERR(cq);
  829. goto error_2;
  830. }
  831. ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
  832. init_attr->send_cq = cq;
  833. init_attr->recv_cq = cq;
  834. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  835. init_attr->cap.max_send_wr = MAX_UMR_WR;
  836. init_attr->cap.max_send_sge = 1;
  837. init_attr->qp_type = MLX5_IB_QPT_REG_UMR;
  838. init_attr->port_num = 1;
  839. qp = mlx5_ib_create_qp(pd, init_attr, NULL);
  840. if (IS_ERR(qp)) {
  841. mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n");
  842. ret = PTR_ERR(qp);
  843. goto error_3;
  844. }
  845. qp->device = &dev->ib_dev;
  846. qp->real_qp = qp;
  847. qp->uobject = NULL;
  848. qp->qp_type = MLX5_IB_QPT_REG_UMR;
  849. attr->qp_state = IB_QPS_INIT;
  850. attr->port_num = 1;
  851. ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX |
  852. IB_QP_PORT, NULL);
  853. if (ret) {
  854. mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n");
  855. goto error_4;
  856. }
  857. memset(attr, 0, sizeof(*attr));
  858. attr->qp_state = IB_QPS_RTR;
  859. attr->path_mtu = IB_MTU_256;
  860. ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
  861. if (ret) {
  862. mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n");
  863. goto error_4;
  864. }
  865. memset(attr, 0, sizeof(*attr));
  866. attr->qp_state = IB_QPS_RTS;
  867. ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
  868. if (ret) {
  869. mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n");
  870. goto error_4;
  871. }
  872. dev->umrc.qp = qp;
  873. dev->umrc.cq = cq;
  874. dev->umrc.mr = mr;
  875. dev->umrc.pd = pd;
  876. sema_init(&dev->umrc.sem, MAX_UMR_WR);
  877. ret = mlx5_mr_cache_init(dev);
  878. if (ret) {
  879. mlx5_ib_warn(dev, "mr cache init failed %d\n", ret);
  880. goto error_4;
  881. }
  882. kfree(attr);
  883. kfree(init_attr);
  884. return 0;
  885. error_4:
  886. mlx5_ib_destroy_qp(qp);
  887. error_3:
  888. ib_destroy_cq(cq);
  889. error_2:
  890. ib_dereg_mr(mr);
  891. error_1:
  892. ib_dealloc_pd(pd);
  893. error_0:
  894. kfree(attr);
  895. kfree(init_attr);
  896. return ret;
  897. }
  898. static int create_dev_resources(struct mlx5_ib_resources *devr)
  899. {
  900. struct ib_srq_init_attr attr;
  901. struct mlx5_ib_dev *dev;
  902. int ret = 0;
  903. dev = container_of(devr, struct mlx5_ib_dev, devr);
  904. devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
  905. if (IS_ERR(devr->p0)) {
  906. ret = PTR_ERR(devr->p0);
  907. goto error0;
  908. }
  909. devr->p0->device = &dev->ib_dev;
  910. devr->p0->uobject = NULL;
  911. atomic_set(&devr->p0->usecnt, 0);
  912. devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL);
  913. if (IS_ERR(devr->c0)) {
  914. ret = PTR_ERR(devr->c0);
  915. goto error1;
  916. }
  917. devr->c0->device = &dev->ib_dev;
  918. devr->c0->uobject = NULL;
  919. devr->c0->comp_handler = NULL;
  920. devr->c0->event_handler = NULL;
  921. devr->c0->cq_context = NULL;
  922. atomic_set(&devr->c0->usecnt, 0);
  923. devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
  924. if (IS_ERR(devr->x0)) {
  925. ret = PTR_ERR(devr->x0);
  926. goto error2;
  927. }
  928. devr->x0->device = &dev->ib_dev;
  929. devr->x0->inode = NULL;
  930. atomic_set(&devr->x0->usecnt, 0);
  931. mutex_init(&devr->x0->tgt_qp_mutex);
  932. INIT_LIST_HEAD(&devr->x0->tgt_qp_list);
  933. devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
  934. if (IS_ERR(devr->x1)) {
  935. ret = PTR_ERR(devr->x1);
  936. goto error3;
  937. }
  938. devr->x1->device = &dev->ib_dev;
  939. devr->x1->inode = NULL;
  940. atomic_set(&devr->x1->usecnt, 0);
  941. mutex_init(&devr->x1->tgt_qp_mutex);
  942. INIT_LIST_HEAD(&devr->x1->tgt_qp_list);
  943. memset(&attr, 0, sizeof(attr));
  944. attr.attr.max_sge = 1;
  945. attr.attr.max_wr = 1;
  946. attr.srq_type = IB_SRQT_XRC;
  947. attr.ext.xrc.cq = devr->c0;
  948. attr.ext.xrc.xrcd = devr->x0;
  949. devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
  950. if (IS_ERR(devr->s0)) {
  951. ret = PTR_ERR(devr->s0);
  952. goto error4;
  953. }
  954. devr->s0->device = &dev->ib_dev;
  955. devr->s0->pd = devr->p0;
  956. devr->s0->uobject = NULL;
  957. devr->s0->event_handler = NULL;
  958. devr->s0->srq_context = NULL;
  959. devr->s0->srq_type = IB_SRQT_XRC;
  960. devr->s0->ext.xrc.xrcd = devr->x0;
  961. devr->s0->ext.xrc.cq = devr->c0;
  962. atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt);
  963. atomic_inc(&devr->s0->ext.xrc.cq->usecnt);
  964. atomic_inc(&devr->p0->usecnt);
  965. atomic_set(&devr->s0->usecnt, 0);
  966. return 0;
  967. error4:
  968. mlx5_ib_dealloc_xrcd(devr->x1);
  969. error3:
  970. mlx5_ib_dealloc_xrcd(devr->x0);
  971. error2:
  972. mlx5_ib_destroy_cq(devr->c0);
  973. error1:
  974. mlx5_ib_dealloc_pd(devr->p0);
  975. error0:
  976. return ret;
  977. }
  978. static void destroy_dev_resources(struct mlx5_ib_resources *devr)
  979. {
  980. mlx5_ib_destroy_srq(devr->s0);
  981. mlx5_ib_dealloc_xrcd(devr->x0);
  982. mlx5_ib_dealloc_xrcd(devr->x1);
  983. mlx5_ib_destroy_cq(devr->c0);
  984. mlx5_ib_dealloc_pd(devr->p0);
  985. }
  986. static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
  987. {
  988. struct mlx5_ib_dev *dev;
  989. int err;
  990. int i;
  991. printk_once(KERN_INFO "%s", mlx5_version);
  992. dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev));
  993. if (!dev)
  994. return NULL;
  995. dev->mdev = mdev;
  996. err = get_port_caps(dev);
  997. if (err)
  998. goto err_dealloc;
  999. get_ext_port_caps(dev);
  1000. MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock);
  1001. strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
  1002. dev->ib_dev.owner = THIS_MODULE;
  1003. dev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1004. dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey;
  1005. dev->num_ports = mdev->caps.gen.num_ports;
  1006. dev->ib_dev.phys_port_cnt = dev->num_ports;
  1007. dev->ib_dev.num_comp_vectors =
  1008. dev->mdev->priv.eq_table.num_comp_vectors;
  1009. dev->ib_dev.dma_device = &mdev->pdev->dev;
  1010. dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION;
  1011. dev->ib_dev.uverbs_cmd_mask =
  1012. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1013. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1014. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1015. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1016. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1017. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1018. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1019. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1020. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1021. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1022. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1023. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1024. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1025. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1026. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1027. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1028. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1029. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1030. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1031. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1032. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1033. (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
  1034. (1ull << IB_USER_VERBS_CMD_OPEN_QP);
  1035. dev->ib_dev.uverbs_ex_cmd_mask =
  1036. (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE);
  1037. dev->ib_dev.query_device = mlx5_ib_query_device;
  1038. dev->ib_dev.query_port = mlx5_ib_query_port;
  1039. dev->ib_dev.query_gid = mlx5_ib_query_gid;
  1040. dev->ib_dev.query_pkey = mlx5_ib_query_pkey;
  1041. dev->ib_dev.modify_device = mlx5_ib_modify_device;
  1042. dev->ib_dev.modify_port = mlx5_ib_modify_port;
  1043. dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext;
  1044. dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext;
  1045. dev->ib_dev.mmap = mlx5_ib_mmap;
  1046. dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd;
  1047. dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd;
  1048. dev->ib_dev.create_ah = mlx5_ib_create_ah;
  1049. dev->ib_dev.query_ah = mlx5_ib_query_ah;
  1050. dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah;
  1051. dev->ib_dev.create_srq = mlx5_ib_create_srq;
  1052. dev->ib_dev.modify_srq = mlx5_ib_modify_srq;
  1053. dev->ib_dev.query_srq = mlx5_ib_query_srq;
  1054. dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq;
  1055. dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv;
  1056. dev->ib_dev.create_qp = mlx5_ib_create_qp;
  1057. dev->ib_dev.modify_qp = mlx5_ib_modify_qp;
  1058. dev->ib_dev.query_qp = mlx5_ib_query_qp;
  1059. dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp;
  1060. dev->ib_dev.post_send = mlx5_ib_post_send;
  1061. dev->ib_dev.post_recv = mlx5_ib_post_recv;
  1062. dev->ib_dev.create_cq = mlx5_ib_create_cq;
  1063. dev->ib_dev.modify_cq = mlx5_ib_modify_cq;
  1064. dev->ib_dev.resize_cq = mlx5_ib_resize_cq;
  1065. dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq;
  1066. dev->ib_dev.poll_cq = mlx5_ib_poll_cq;
  1067. dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq;
  1068. dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr;
  1069. dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr;
  1070. dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr;
  1071. dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr;
  1072. dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach;
  1073. dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach;
  1074. dev->ib_dev.process_mad = mlx5_ib_process_mad;
  1075. dev->ib_dev.create_mr = mlx5_ib_create_mr;
  1076. dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr;
  1077. dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
  1078. dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
  1079. dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status;
  1080. mlx5_ib_internal_query_odp_caps(dev);
  1081. if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) {
  1082. dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd;
  1083. dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd;
  1084. dev->ib_dev.uverbs_cmd_mask |=
  1085. (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
  1086. (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
  1087. }
  1088. err = init_node_data(dev);
  1089. if (err)
  1090. goto err_dealloc;
  1091. mutex_init(&dev->cap_mask_mutex);
  1092. err = create_dev_resources(&dev->devr);
  1093. if (err)
  1094. goto err_dealloc;
  1095. err = mlx5_ib_odp_init_one(dev);
  1096. if (err)
  1097. goto err_rsrc;
  1098. err = ib_register_device(&dev->ib_dev, NULL);
  1099. if (err)
  1100. goto err_odp;
  1101. err = create_umr_res(dev);
  1102. if (err)
  1103. goto err_dev;
  1104. for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) {
  1105. err = device_create_file(&dev->ib_dev.dev,
  1106. mlx5_class_attributes[i]);
  1107. if (err)
  1108. goto err_umrc;
  1109. }
  1110. dev->ib_active = true;
  1111. return dev;
  1112. err_umrc:
  1113. destroy_umrc_res(dev);
  1114. err_dev:
  1115. ib_unregister_device(&dev->ib_dev);
  1116. err_odp:
  1117. mlx5_ib_odp_remove_one(dev);
  1118. err_rsrc:
  1119. destroy_dev_resources(&dev->devr);
  1120. err_dealloc:
  1121. ib_dealloc_device((struct ib_device *)dev);
  1122. return NULL;
  1123. }
  1124. static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context)
  1125. {
  1126. struct mlx5_ib_dev *dev = context;
  1127. ib_unregister_device(&dev->ib_dev);
  1128. destroy_umrc_res(dev);
  1129. mlx5_ib_odp_remove_one(dev);
  1130. destroy_dev_resources(&dev->devr);
  1131. ib_dealloc_device(&dev->ib_dev);
  1132. }
  1133. static struct mlx5_interface mlx5_ib_interface = {
  1134. .add = mlx5_ib_add,
  1135. .remove = mlx5_ib_remove,
  1136. .event = mlx5_ib_event,
  1137. .protocol = MLX5_INTERFACE_PROTOCOL_IB,
  1138. };
  1139. static int __init mlx5_ib_init(void)
  1140. {
  1141. int err;
  1142. if (deprecated_prof_sel != 2)
  1143. pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n");
  1144. err = mlx5_ib_odp_init();
  1145. if (err)
  1146. return err;
  1147. err = mlx5_register_interface(&mlx5_ib_interface);
  1148. if (err)
  1149. goto clean_odp;
  1150. return err;
  1151. clean_odp:
  1152. mlx5_ib_odp_cleanup();
  1153. return err;
  1154. }
  1155. static void __exit mlx5_ib_cleanup(void)
  1156. {
  1157. mlx5_unregister_interface(&mlx5_ib_interface);
  1158. mlx5_ib_odp_cleanup();
  1159. }
  1160. module_init(mlx5_ib_init);
  1161. module_exit(mlx5_ib_cleanup);