adis16480.c 25 KB

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  1. /*
  2. * ADIS16480 and similar IMUs driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/interrupt.h>
  12. #include <linux/delay.h>
  13. #include <linux/mutex.h>
  14. #include <linux/device.h>
  15. #include <linux/kernel.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/slab.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/module.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/buffer.h>
  23. #include <linux/iio/imu/adis.h>
  24. #include <linux/debugfs.h>
  25. #define ADIS16480_PAGE_SIZE 0x80
  26. #define ADIS16480_REG(page, reg) ((page) * ADIS16480_PAGE_SIZE + (reg))
  27. #define ADIS16480_REG_PAGE_ID 0x00 /* Same address on each page */
  28. #define ADIS16480_REG_SEQ_CNT ADIS16480_REG(0x00, 0x06)
  29. #define ADIS16480_REG_SYS_E_FLA ADIS16480_REG(0x00, 0x08)
  30. #define ADIS16480_REG_DIAG_STS ADIS16480_REG(0x00, 0x0A)
  31. #define ADIS16480_REG_ALM_STS ADIS16480_REG(0x00, 0x0C)
  32. #define ADIS16480_REG_TEMP_OUT ADIS16480_REG(0x00, 0x0E)
  33. #define ADIS16480_REG_X_GYRO_OUT ADIS16480_REG(0x00, 0x10)
  34. #define ADIS16480_REG_Y_GYRO_OUT ADIS16480_REG(0x00, 0x14)
  35. #define ADIS16480_REG_Z_GYRO_OUT ADIS16480_REG(0x00, 0x18)
  36. #define ADIS16480_REG_X_ACCEL_OUT ADIS16480_REG(0x00, 0x1C)
  37. #define ADIS16480_REG_Y_ACCEL_OUT ADIS16480_REG(0x00, 0x20)
  38. #define ADIS16480_REG_Z_ACCEL_OUT ADIS16480_REG(0x00, 0x24)
  39. #define ADIS16480_REG_X_MAGN_OUT ADIS16480_REG(0x00, 0x28)
  40. #define ADIS16480_REG_Y_MAGN_OUT ADIS16480_REG(0x00, 0x2A)
  41. #define ADIS16480_REG_Z_MAGN_OUT ADIS16480_REG(0x00, 0x2C)
  42. #define ADIS16480_REG_BAROM_OUT ADIS16480_REG(0x00, 0x2E)
  43. #define ADIS16480_REG_X_DELTAANG_OUT ADIS16480_REG(0x00, 0x40)
  44. #define ADIS16480_REG_Y_DELTAANG_OUT ADIS16480_REG(0x00, 0x44)
  45. #define ADIS16480_REG_Z_DELTAANG_OUT ADIS16480_REG(0x00, 0x48)
  46. #define ADIS16480_REG_X_DELTAVEL_OUT ADIS16480_REG(0x00, 0x4C)
  47. #define ADIS16480_REG_Y_DELTAVEL_OUT ADIS16480_REG(0x00, 0x50)
  48. #define ADIS16480_REG_Z_DELTAVEL_OUT ADIS16480_REG(0x00, 0x54)
  49. #define ADIS16480_REG_PROD_ID ADIS16480_REG(0x00, 0x7E)
  50. #define ADIS16480_REG_X_GYRO_SCALE ADIS16480_REG(0x02, 0x04)
  51. #define ADIS16480_REG_Y_GYRO_SCALE ADIS16480_REG(0x02, 0x06)
  52. #define ADIS16480_REG_Z_GYRO_SCALE ADIS16480_REG(0x02, 0x08)
  53. #define ADIS16480_REG_X_ACCEL_SCALE ADIS16480_REG(0x02, 0x0A)
  54. #define ADIS16480_REG_Y_ACCEL_SCALE ADIS16480_REG(0x02, 0x0C)
  55. #define ADIS16480_REG_Z_ACCEL_SCALE ADIS16480_REG(0x02, 0x0E)
  56. #define ADIS16480_REG_X_GYRO_BIAS ADIS16480_REG(0x02, 0x10)
  57. #define ADIS16480_REG_Y_GYRO_BIAS ADIS16480_REG(0x02, 0x14)
  58. #define ADIS16480_REG_Z_GYRO_BIAS ADIS16480_REG(0x02, 0x18)
  59. #define ADIS16480_REG_X_ACCEL_BIAS ADIS16480_REG(0x02, 0x1C)
  60. #define ADIS16480_REG_Y_ACCEL_BIAS ADIS16480_REG(0x02, 0x20)
  61. #define ADIS16480_REG_Z_ACCEL_BIAS ADIS16480_REG(0x02, 0x24)
  62. #define ADIS16480_REG_X_HARD_IRON ADIS16480_REG(0x02, 0x28)
  63. #define ADIS16480_REG_Y_HARD_IRON ADIS16480_REG(0x02, 0x2A)
  64. #define ADIS16480_REG_Z_HARD_IRON ADIS16480_REG(0x02, 0x2C)
  65. #define ADIS16480_REG_BAROM_BIAS ADIS16480_REG(0x02, 0x40)
  66. #define ADIS16480_REG_FLASH_CNT ADIS16480_REG(0x02, 0x7C)
  67. #define ADIS16480_REG_GLOB_CMD ADIS16480_REG(0x03, 0x02)
  68. #define ADIS16480_REG_FNCTIO_CTRL ADIS16480_REG(0x03, 0x06)
  69. #define ADIS16480_REG_GPIO_CTRL ADIS16480_REG(0x03, 0x08)
  70. #define ADIS16480_REG_CONFIG ADIS16480_REG(0x03, 0x0A)
  71. #define ADIS16480_REG_DEC_RATE ADIS16480_REG(0x03, 0x0C)
  72. #define ADIS16480_REG_SLP_CNT ADIS16480_REG(0x03, 0x10)
  73. #define ADIS16480_REG_FILTER_BNK0 ADIS16480_REG(0x03, 0x16)
  74. #define ADIS16480_REG_FILTER_BNK1 ADIS16480_REG(0x03, 0x18)
  75. #define ADIS16480_REG_ALM_CNFG0 ADIS16480_REG(0x03, 0x20)
  76. #define ADIS16480_REG_ALM_CNFG1 ADIS16480_REG(0x03, 0x22)
  77. #define ADIS16480_REG_ALM_CNFG2 ADIS16480_REG(0x03, 0x24)
  78. #define ADIS16480_REG_XG_ALM_MAGN ADIS16480_REG(0x03, 0x28)
  79. #define ADIS16480_REG_YG_ALM_MAGN ADIS16480_REG(0x03, 0x2A)
  80. #define ADIS16480_REG_ZG_ALM_MAGN ADIS16480_REG(0x03, 0x2C)
  81. #define ADIS16480_REG_XA_ALM_MAGN ADIS16480_REG(0x03, 0x2E)
  82. #define ADIS16480_REG_YA_ALM_MAGN ADIS16480_REG(0x03, 0x30)
  83. #define ADIS16480_REG_ZA_ALM_MAGN ADIS16480_REG(0x03, 0x32)
  84. #define ADIS16480_REG_XM_ALM_MAGN ADIS16480_REG(0x03, 0x34)
  85. #define ADIS16480_REG_YM_ALM_MAGN ADIS16480_REG(0x03, 0x36)
  86. #define ADIS16480_REG_ZM_ALM_MAGN ADIS16480_REG(0x03, 0x38)
  87. #define ADIS16480_REG_BR_ALM_MAGN ADIS16480_REG(0x03, 0x3A)
  88. #define ADIS16480_REG_FIRM_REV ADIS16480_REG(0x03, 0x78)
  89. #define ADIS16480_REG_FIRM_DM ADIS16480_REG(0x03, 0x7A)
  90. #define ADIS16480_REG_FIRM_Y ADIS16480_REG(0x03, 0x7C)
  91. #define ADIS16480_REG_SERIAL_NUM ADIS16480_REG(0x04, 0x20)
  92. /* Each filter coefficent bank spans two pages */
  93. #define ADIS16480_FIR_COEF(page) (x < 60 ? ADIS16480_REG(page, (x) + 8) : \
  94. ADIS16480_REG((page) + 1, (x) - 60 + 8))
  95. #define ADIS16480_FIR_COEF_A(x) ADIS16480_FIR_COEF(0x05, (x))
  96. #define ADIS16480_FIR_COEF_B(x) ADIS16480_FIR_COEF(0x07, (x))
  97. #define ADIS16480_FIR_COEF_C(x) ADIS16480_FIR_COEF(0x09, (x))
  98. #define ADIS16480_FIR_COEF_D(x) ADIS16480_FIR_COEF(0x0B, (x))
  99. struct adis16480_chip_info {
  100. unsigned int num_channels;
  101. const struct iio_chan_spec *channels;
  102. };
  103. struct adis16480 {
  104. const struct adis16480_chip_info *chip_info;
  105. struct adis adis;
  106. };
  107. #ifdef CONFIG_DEBUG_FS
  108. static ssize_t adis16480_show_firmware_revision(struct file *file,
  109. char __user *userbuf, size_t count, loff_t *ppos)
  110. {
  111. struct adis16480 *adis16480 = file->private_data;
  112. char buf[7];
  113. size_t len;
  114. u16 rev;
  115. int ret;
  116. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_REV, &rev);
  117. if (ret < 0)
  118. return ret;
  119. len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
  120. return simple_read_from_buffer(userbuf, count, ppos, buf, len);
  121. }
  122. static const struct file_operations adis16480_firmware_revision_fops = {
  123. .open = simple_open,
  124. .read = adis16480_show_firmware_revision,
  125. .llseek = default_llseek,
  126. .owner = THIS_MODULE,
  127. };
  128. static ssize_t adis16480_show_firmware_date(struct file *file,
  129. char __user *userbuf, size_t count, loff_t *ppos)
  130. {
  131. struct adis16480 *adis16480 = file->private_data;
  132. u16 md, year;
  133. char buf[12];
  134. size_t len;
  135. int ret;
  136. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_Y, &year);
  137. if (ret < 0)
  138. return ret;
  139. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_DM, &md);
  140. if (ret < 0)
  141. return ret;
  142. len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n",
  143. md >> 8, md & 0xff, year);
  144. return simple_read_from_buffer(userbuf, count, ppos, buf, len);
  145. }
  146. static const struct file_operations adis16480_firmware_date_fops = {
  147. .open = simple_open,
  148. .read = adis16480_show_firmware_date,
  149. .llseek = default_llseek,
  150. .owner = THIS_MODULE,
  151. };
  152. static int adis16480_show_serial_number(void *arg, u64 *val)
  153. {
  154. struct adis16480 *adis16480 = arg;
  155. u16 serial;
  156. int ret;
  157. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_SERIAL_NUM,
  158. &serial);
  159. if (ret < 0)
  160. return ret;
  161. *val = serial;
  162. return 0;
  163. }
  164. DEFINE_SIMPLE_ATTRIBUTE(adis16480_serial_number_fops,
  165. adis16480_show_serial_number, NULL, "0x%.4llx\n");
  166. static int adis16480_show_product_id(void *arg, u64 *val)
  167. {
  168. struct adis16480 *adis16480 = arg;
  169. u16 prod_id;
  170. int ret;
  171. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_PROD_ID,
  172. &prod_id);
  173. if (ret < 0)
  174. return ret;
  175. *val = prod_id;
  176. return 0;
  177. }
  178. DEFINE_SIMPLE_ATTRIBUTE(adis16480_product_id_fops,
  179. adis16480_show_product_id, NULL, "%llu\n");
  180. static int adis16480_show_flash_count(void *arg, u64 *val)
  181. {
  182. struct adis16480 *adis16480 = arg;
  183. u32 flash_count;
  184. int ret;
  185. ret = adis_read_reg_32(&adis16480->adis, ADIS16480_REG_FLASH_CNT,
  186. &flash_count);
  187. if (ret < 0)
  188. return ret;
  189. *val = flash_count;
  190. return 0;
  191. }
  192. DEFINE_SIMPLE_ATTRIBUTE(adis16480_flash_count_fops,
  193. adis16480_show_flash_count, NULL, "%lld\n");
  194. static int adis16480_debugfs_init(struct iio_dev *indio_dev)
  195. {
  196. struct adis16480 *adis16480 = iio_priv(indio_dev);
  197. debugfs_create_file("firmware_revision", 0400,
  198. indio_dev->debugfs_dentry, adis16480,
  199. &adis16480_firmware_revision_fops);
  200. debugfs_create_file("firmware_date", 0400, indio_dev->debugfs_dentry,
  201. adis16480, &adis16480_firmware_date_fops);
  202. debugfs_create_file("serial_number", 0400, indio_dev->debugfs_dentry,
  203. adis16480, &adis16480_serial_number_fops);
  204. debugfs_create_file("product_id", 0400, indio_dev->debugfs_dentry,
  205. adis16480, &adis16480_product_id_fops);
  206. debugfs_create_file("flash_count", 0400, indio_dev->debugfs_dentry,
  207. adis16480, &adis16480_flash_count_fops);
  208. return 0;
  209. }
  210. #else
  211. static int adis16480_debugfs_init(struct iio_dev *indio_dev)
  212. {
  213. return 0;
  214. }
  215. #endif
  216. static int adis16480_set_freq(struct iio_dev *indio_dev, int val, int val2)
  217. {
  218. struct adis16480 *st = iio_priv(indio_dev);
  219. unsigned int t;
  220. t = val * 1000 + val2 / 1000;
  221. if (t <= 0)
  222. return -EINVAL;
  223. t = 2460000 / t;
  224. if (t > 2048)
  225. t = 2048;
  226. if (t != 0)
  227. t--;
  228. return adis_write_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, t);
  229. }
  230. static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2)
  231. {
  232. struct adis16480 *st = iio_priv(indio_dev);
  233. uint16_t t;
  234. int ret;
  235. unsigned freq;
  236. ret = adis_read_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, &t);
  237. if (ret < 0)
  238. return ret;
  239. freq = 2460000 / (t + 1);
  240. *val = freq / 1000;
  241. *val2 = (freq % 1000) * 1000;
  242. return IIO_VAL_INT_PLUS_MICRO;
  243. }
  244. enum {
  245. ADIS16480_SCAN_GYRO_X,
  246. ADIS16480_SCAN_GYRO_Y,
  247. ADIS16480_SCAN_GYRO_Z,
  248. ADIS16480_SCAN_ACCEL_X,
  249. ADIS16480_SCAN_ACCEL_Y,
  250. ADIS16480_SCAN_ACCEL_Z,
  251. ADIS16480_SCAN_MAGN_X,
  252. ADIS16480_SCAN_MAGN_Y,
  253. ADIS16480_SCAN_MAGN_Z,
  254. ADIS16480_SCAN_BARO,
  255. ADIS16480_SCAN_TEMP,
  256. };
  257. static const unsigned int adis16480_calibbias_regs[] = {
  258. [ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_BIAS,
  259. [ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_BIAS,
  260. [ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_BIAS,
  261. [ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_BIAS,
  262. [ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_BIAS,
  263. [ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_BIAS,
  264. [ADIS16480_SCAN_MAGN_X] = ADIS16480_REG_X_HARD_IRON,
  265. [ADIS16480_SCAN_MAGN_Y] = ADIS16480_REG_Y_HARD_IRON,
  266. [ADIS16480_SCAN_MAGN_Z] = ADIS16480_REG_Z_HARD_IRON,
  267. [ADIS16480_SCAN_BARO] = ADIS16480_REG_BAROM_BIAS,
  268. };
  269. static const unsigned int adis16480_calibscale_regs[] = {
  270. [ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_SCALE,
  271. [ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_SCALE,
  272. [ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_SCALE,
  273. [ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_SCALE,
  274. [ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_SCALE,
  275. [ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_SCALE,
  276. };
  277. static int adis16480_set_calibbias(struct iio_dev *indio_dev,
  278. const struct iio_chan_spec *chan, int bias)
  279. {
  280. unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
  281. struct adis16480 *st = iio_priv(indio_dev);
  282. switch (chan->type) {
  283. case IIO_MAGN:
  284. case IIO_PRESSURE:
  285. if (bias < -0x8000 || bias >= 0x8000)
  286. return -EINVAL;
  287. return adis_write_reg_16(&st->adis, reg, bias);
  288. case IIO_ANGL_VEL:
  289. case IIO_ACCEL:
  290. return adis_write_reg_32(&st->adis, reg, bias);
  291. default:
  292. break;
  293. }
  294. return -EINVAL;
  295. }
  296. static int adis16480_get_calibbias(struct iio_dev *indio_dev,
  297. const struct iio_chan_spec *chan, int *bias)
  298. {
  299. unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
  300. struct adis16480 *st = iio_priv(indio_dev);
  301. uint16_t val16;
  302. uint32_t val32;
  303. int ret;
  304. switch (chan->type) {
  305. case IIO_MAGN:
  306. case IIO_PRESSURE:
  307. ret = adis_read_reg_16(&st->adis, reg, &val16);
  308. *bias = sign_extend32(val16, 15);
  309. break;
  310. case IIO_ANGL_VEL:
  311. case IIO_ACCEL:
  312. ret = adis_read_reg_32(&st->adis, reg, &val32);
  313. *bias = sign_extend32(val32, 31);
  314. break;
  315. default:
  316. ret = -EINVAL;
  317. }
  318. if (ret < 0)
  319. return ret;
  320. return IIO_VAL_INT;
  321. }
  322. static int adis16480_set_calibscale(struct iio_dev *indio_dev,
  323. const struct iio_chan_spec *chan, int scale)
  324. {
  325. unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
  326. struct adis16480 *st = iio_priv(indio_dev);
  327. if (scale < -0x8000 || scale >= 0x8000)
  328. return -EINVAL;
  329. return adis_write_reg_16(&st->adis, reg, scale);
  330. }
  331. static int adis16480_get_calibscale(struct iio_dev *indio_dev,
  332. const struct iio_chan_spec *chan, int *scale)
  333. {
  334. unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
  335. struct adis16480 *st = iio_priv(indio_dev);
  336. uint16_t val16;
  337. int ret;
  338. ret = adis_read_reg_16(&st->adis, reg, &val16);
  339. if (ret < 0)
  340. return ret;
  341. *scale = sign_extend32(val16, 15);
  342. return IIO_VAL_INT;
  343. }
  344. static const unsigned int adis16480_def_filter_freqs[] = {
  345. 310,
  346. 55,
  347. 275,
  348. 63,
  349. };
  350. static const unsigned int ad16480_filter_data[][2] = {
  351. [ADIS16480_SCAN_GYRO_X] = { ADIS16480_REG_FILTER_BNK0, 0 },
  352. [ADIS16480_SCAN_GYRO_Y] = { ADIS16480_REG_FILTER_BNK0, 3 },
  353. [ADIS16480_SCAN_GYRO_Z] = { ADIS16480_REG_FILTER_BNK0, 6 },
  354. [ADIS16480_SCAN_ACCEL_X] = { ADIS16480_REG_FILTER_BNK0, 9 },
  355. [ADIS16480_SCAN_ACCEL_Y] = { ADIS16480_REG_FILTER_BNK0, 12 },
  356. [ADIS16480_SCAN_ACCEL_Z] = { ADIS16480_REG_FILTER_BNK1, 0 },
  357. [ADIS16480_SCAN_MAGN_X] = { ADIS16480_REG_FILTER_BNK1, 3 },
  358. [ADIS16480_SCAN_MAGN_Y] = { ADIS16480_REG_FILTER_BNK1, 6 },
  359. [ADIS16480_SCAN_MAGN_Z] = { ADIS16480_REG_FILTER_BNK1, 9 },
  360. };
  361. static int adis16480_get_filter_freq(struct iio_dev *indio_dev,
  362. const struct iio_chan_spec *chan, int *freq)
  363. {
  364. struct adis16480 *st = iio_priv(indio_dev);
  365. unsigned int enable_mask, offset, reg;
  366. uint16_t val;
  367. int ret;
  368. reg = ad16480_filter_data[chan->scan_index][0];
  369. offset = ad16480_filter_data[chan->scan_index][1];
  370. enable_mask = BIT(offset + 2);
  371. ret = adis_read_reg_16(&st->adis, reg, &val);
  372. if (ret < 0)
  373. return ret;
  374. if (!(val & enable_mask))
  375. *freq = 0;
  376. else
  377. *freq = adis16480_def_filter_freqs[(val >> offset) & 0x3];
  378. return IIO_VAL_INT;
  379. }
  380. static int adis16480_set_filter_freq(struct iio_dev *indio_dev,
  381. const struct iio_chan_spec *chan, unsigned int freq)
  382. {
  383. struct adis16480 *st = iio_priv(indio_dev);
  384. unsigned int enable_mask, offset, reg;
  385. unsigned int diff, best_diff;
  386. unsigned int i, best_freq;
  387. uint16_t val;
  388. int ret;
  389. reg = ad16480_filter_data[chan->scan_index][0];
  390. offset = ad16480_filter_data[chan->scan_index][1];
  391. enable_mask = BIT(offset + 2);
  392. ret = adis_read_reg_16(&st->adis, reg, &val);
  393. if (ret < 0)
  394. return ret;
  395. if (freq == 0) {
  396. val &= ~enable_mask;
  397. } else {
  398. best_freq = 0;
  399. best_diff = 310;
  400. for (i = 0; i < ARRAY_SIZE(adis16480_def_filter_freqs); i++) {
  401. if (adis16480_def_filter_freqs[i] >= freq) {
  402. diff = adis16480_def_filter_freqs[i] - freq;
  403. if (diff < best_diff) {
  404. best_diff = diff;
  405. best_freq = i;
  406. }
  407. }
  408. }
  409. val &= ~(0x3 << offset);
  410. val |= best_freq << offset;
  411. val |= enable_mask;
  412. }
  413. return adis_write_reg_16(&st->adis, reg, val);
  414. }
  415. static int adis16480_read_raw(struct iio_dev *indio_dev,
  416. const struct iio_chan_spec *chan, int *val, int *val2, long info)
  417. {
  418. switch (info) {
  419. case IIO_CHAN_INFO_RAW:
  420. return adis_single_conversion(indio_dev, chan, 0, val);
  421. case IIO_CHAN_INFO_SCALE:
  422. switch (chan->type) {
  423. case IIO_ANGL_VEL:
  424. *val = 0;
  425. *val2 = IIO_DEGREE_TO_RAD(20000); /* 0.02 degree/sec */
  426. return IIO_VAL_INT_PLUS_MICRO;
  427. case IIO_ACCEL:
  428. *val = 0;
  429. *val2 = IIO_G_TO_M_S_2(800); /* 0.8 mg */
  430. return IIO_VAL_INT_PLUS_MICRO;
  431. case IIO_MAGN:
  432. *val = 0;
  433. *val2 = 100; /* 0.0001 gauss */
  434. return IIO_VAL_INT_PLUS_MICRO;
  435. case IIO_TEMP:
  436. *val = 5;
  437. *val2 = 650000; /* 5.65 milli degree Celsius */
  438. return IIO_VAL_INT_PLUS_MICRO;
  439. case IIO_PRESSURE:
  440. *val = 0;
  441. *val2 = 4000; /* 40ubar = 0.004 kPa */
  442. return IIO_VAL_INT_PLUS_MICRO;
  443. default:
  444. return -EINVAL;
  445. }
  446. case IIO_CHAN_INFO_OFFSET:
  447. /* Only the temperature channel has a offset */
  448. *val = 4425; /* 25 degree Celsius = 0x0000 */
  449. return IIO_VAL_INT;
  450. case IIO_CHAN_INFO_CALIBBIAS:
  451. return adis16480_get_calibbias(indio_dev, chan, val);
  452. case IIO_CHAN_INFO_CALIBSCALE:
  453. return adis16480_get_calibscale(indio_dev, chan, val);
  454. case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
  455. return adis16480_get_filter_freq(indio_dev, chan, val);
  456. case IIO_CHAN_INFO_SAMP_FREQ:
  457. return adis16480_get_freq(indio_dev, val, val2);
  458. default:
  459. return -EINVAL;
  460. }
  461. }
  462. static int adis16480_write_raw(struct iio_dev *indio_dev,
  463. const struct iio_chan_spec *chan, int val, int val2, long info)
  464. {
  465. switch (info) {
  466. case IIO_CHAN_INFO_CALIBBIAS:
  467. return adis16480_set_calibbias(indio_dev, chan, val);
  468. case IIO_CHAN_INFO_CALIBSCALE:
  469. return adis16480_set_calibscale(indio_dev, chan, val);
  470. case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
  471. return adis16480_set_filter_freq(indio_dev, chan, val);
  472. case IIO_CHAN_INFO_SAMP_FREQ:
  473. return adis16480_set_freq(indio_dev, val, val2);
  474. default:
  475. return -EINVAL;
  476. }
  477. }
  478. #define ADIS16480_MOD_CHANNEL(_type, _mod, _address, _si, _info_sep, _bits) \
  479. { \
  480. .type = (_type), \
  481. .modified = 1, \
  482. .channel2 = (_mod), \
  483. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  484. BIT(IIO_CHAN_INFO_CALIBBIAS) | \
  485. _info_sep, \
  486. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  487. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  488. .address = (_address), \
  489. .scan_index = (_si), \
  490. .scan_type = { \
  491. .sign = 's', \
  492. .realbits = (_bits), \
  493. .storagebits = (_bits), \
  494. .endianness = IIO_BE, \
  495. }, \
  496. }
  497. #define ADIS16480_GYRO_CHANNEL(_mod) \
  498. ADIS16480_MOD_CHANNEL(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
  499. ADIS16480_REG_ ## _mod ## _GYRO_OUT, ADIS16480_SCAN_GYRO_ ## _mod, \
  500. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
  501. BIT(IIO_CHAN_INFO_CALIBSCALE), \
  502. 32)
  503. #define ADIS16480_ACCEL_CHANNEL(_mod) \
  504. ADIS16480_MOD_CHANNEL(IIO_ACCEL, IIO_MOD_ ## _mod, \
  505. ADIS16480_REG_ ## _mod ## _ACCEL_OUT, ADIS16480_SCAN_ACCEL_ ## _mod, \
  506. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
  507. BIT(IIO_CHAN_INFO_CALIBSCALE), \
  508. 32)
  509. #define ADIS16480_MAGN_CHANNEL(_mod) \
  510. ADIS16480_MOD_CHANNEL(IIO_MAGN, IIO_MOD_ ## _mod, \
  511. ADIS16480_REG_ ## _mod ## _MAGN_OUT, ADIS16480_SCAN_MAGN_ ## _mod, \
  512. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
  513. 16)
  514. #define ADIS16480_PRESSURE_CHANNEL() \
  515. { \
  516. .type = IIO_PRESSURE, \
  517. .indexed = 1, \
  518. .channel = 0, \
  519. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  520. BIT(IIO_CHAN_INFO_CALIBBIAS) | \
  521. BIT(IIO_CHAN_INFO_SCALE), \
  522. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  523. .address = ADIS16480_REG_BAROM_OUT, \
  524. .scan_index = ADIS16480_SCAN_BARO, \
  525. .scan_type = { \
  526. .sign = 's', \
  527. .realbits = 32, \
  528. .storagebits = 32, \
  529. .endianness = IIO_BE, \
  530. }, \
  531. }
  532. #define ADIS16480_TEMP_CHANNEL() { \
  533. .type = IIO_TEMP, \
  534. .indexed = 1, \
  535. .channel = 0, \
  536. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  537. BIT(IIO_CHAN_INFO_SCALE) | \
  538. BIT(IIO_CHAN_INFO_OFFSET), \
  539. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  540. .address = ADIS16480_REG_TEMP_OUT, \
  541. .scan_index = ADIS16480_SCAN_TEMP, \
  542. .scan_type = { \
  543. .sign = 's', \
  544. .realbits = 16, \
  545. .storagebits = 16, \
  546. .endianness = IIO_BE, \
  547. }, \
  548. }
  549. static const struct iio_chan_spec adis16480_channels[] = {
  550. ADIS16480_GYRO_CHANNEL(X),
  551. ADIS16480_GYRO_CHANNEL(Y),
  552. ADIS16480_GYRO_CHANNEL(Z),
  553. ADIS16480_ACCEL_CHANNEL(X),
  554. ADIS16480_ACCEL_CHANNEL(Y),
  555. ADIS16480_ACCEL_CHANNEL(Z),
  556. ADIS16480_MAGN_CHANNEL(X),
  557. ADIS16480_MAGN_CHANNEL(Y),
  558. ADIS16480_MAGN_CHANNEL(Z),
  559. ADIS16480_PRESSURE_CHANNEL(),
  560. ADIS16480_TEMP_CHANNEL(),
  561. IIO_CHAN_SOFT_TIMESTAMP(11)
  562. };
  563. static const struct iio_chan_spec adis16485_channels[] = {
  564. ADIS16480_GYRO_CHANNEL(X),
  565. ADIS16480_GYRO_CHANNEL(Y),
  566. ADIS16480_GYRO_CHANNEL(Z),
  567. ADIS16480_ACCEL_CHANNEL(X),
  568. ADIS16480_ACCEL_CHANNEL(Y),
  569. ADIS16480_ACCEL_CHANNEL(Z),
  570. ADIS16480_TEMP_CHANNEL(),
  571. IIO_CHAN_SOFT_TIMESTAMP(7)
  572. };
  573. enum adis16480_variant {
  574. ADIS16375,
  575. ADIS16480,
  576. ADIS16485,
  577. ADIS16488,
  578. };
  579. static const struct adis16480_chip_info adis16480_chip_info[] = {
  580. [ADIS16375] = {
  581. .channels = adis16485_channels,
  582. .num_channels = ARRAY_SIZE(adis16485_channels),
  583. },
  584. [ADIS16480] = {
  585. .channels = adis16480_channels,
  586. .num_channels = ARRAY_SIZE(adis16480_channels),
  587. },
  588. [ADIS16485] = {
  589. .channels = adis16485_channels,
  590. .num_channels = ARRAY_SIZE(adis16485_channels),
  591. },
  592. [ADIS16488] = {
  593. .channels = adis16480_channels,
  594. .num_channels = ARRAY_SIZE(adis16480_channels),
  595. },
  596. };
  597. static const struct iio_info adis16480_info = {
  598. .read_raw = &adis16480_read_raw,
  599. .write_raw = &adis16480_write_raw,
  600. .update_scan_mode = adis_update_scan_mode,
  601. .driver_module = THIS_MODULE,
  602. };
  603. static int adis16480_stop_device(struct iio_dev *indio_dev)
  604. {
  605. struct adis16480 *st = iio_priv(indio_dev);
  606. int ret;
  607. ret = adis_write_reg_16(&st->adis, ADIS16480_REG_SLP_CNT, BIT(9));
  608. if (ret)
  609. dev_err(&indio_dev->dev,
  610. "Could not power down device: %d\n", ret);
  611. return ret;
  612. }
  613. static int adis16480_enable_irq(struct adis *adis, bool enable)
  614. {
  615. return adis_write_reg_16(adis, ADIS16480_REG_FNCTIO_CTRL,
  616. enable ? BIT(3) : 0);
  617. }
  618. static int adis16480_initial_setup(struct iio_dev *indio_dev)
  619. {
  620. struct adis16480 *st = iio_priv(indio_dev);
  621. uint16_t prod_id;
  622. unsigned int device_id;
  623. int ret;
  624. adis_reset(&st->adis);
  625. msleep(70);
  626. ret = adis_write_reg_16(&st->adis, ADIS16480_REG_GLOB_CMD, BIT(1));
  627. if (ret)
  628. return ret;
  629. msleep(30);
  630. ret = adis_check_status(&st->adis);
  631. if (ret)
  632. return ret;
  633. ret = adis_read_reg_16(&st->adis, ADIS16480_REG_PROD_ID, &prod_id);
  634. if (ret)
  635. return ret;
  636. sscanf(indio_dev->name, "adis%u\n", &device_id);
  637. if (prod_id != device_id)
  638. dev_warn(&indio_dev->dev, "Device ID(%u) and product ID(%u) do not match.",
  639. device_id, prod_id);
  640. return 0;
  641. }
  642. #define ADIS16480_DIAG_STAT_XGYRO_FAIL 0
  643. #define ADIS16480_DIAG_STAT_YGYRO_FAIL 1
  644. #define ADIS16480_DIAG_STAT_ZGYRO_FAIL 2
  645. #define ADIS16480_DIAG_STAT_XACCL_FAIL 3
  646. #define ADIS16480_DIAG_STAT_YACCL_FAIL 4
  647. #define ADIS16480_DIAG_STAT_ZACCL_FAIL 5
  648. #define ADIS16480_DIAG_STAT_XMAGN_FAIL 8
  649. #define ADIS16480_DIAG_STAT_YMAGN_FAIL 9
  650. #define ADIS16480_DIAG_STAT_ZMAGN_FAIL 10
  651. #define ADIS16480_DIAG_STAT_BARO_FAIL 11
  652. static const char * const adis16480_status_error_msgs[] = {
  653. [ADIS16480_DIAG_STAT_XGYRO_FAIL] = "X-axis gyroscope self-test failure",
  654. [ADIS16480_DIAG_STAT_YGYRO_FAIL] = "Y-axis gyroscope self-test failure",
  655. [ADIS16480_DIAG_STAT_ZGYRO_FAIL] = "Z-axis gyroscope self-test failure",
  656. [ADIS16480_DIAG_STAT_XACCL_FAIL] = "X-axis accelerometer self-test failure",
  657. [ADIS16480_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
  658. [ADIS16480_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
  659. [ADIS16480_DIAG_STAT_XMAGN_FAIL] = "X-axis magnetometer self-test failure",
  660. [ADIS16480_DIAG_STAT_YMAGN_FAIL] = "Y-axis magnetometer self-test failure",
  661. [ADIS16480_DIAG_STAT_ZMAGN_FAIL] = "Z-axis magnetometer self-test failure",
  662. [ADIS16480_DIAG_STAT_BARO_FAIL] = "Barometer self-test failure",
  663. };
  664. static const struct adis_data adis16480_data = {
  665. .diag_stat_reg = ADIS16480_REG_DIAG_STS,
  666. .glob_cmd_reg = ADIS16480_REG_GLOB_CMD,
  667. .has_paging = true,
  668. .read_delay = 5,
  669. .write_delay = 5,
  670. .status_error_msgs = adis16480_status_error_msgs,
  671. .status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) |
  672. BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) |
  673. BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) |
  674. BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) |
  675. BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) |
  676. BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) |
  677. BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) |
  678. BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) |
  679. BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) |
  680. BIT(ADIS16480_DIAG_STAT_BARO_FAIL),
  681. .enable_irq = adis16480_enable_irq,
  682. };
  683. static int adis16480_probe(struct spi_device *spi)
  684. {
  685. const struct spi_device_id *id = spi_get_device_id(spi);
  686. struct iio_dev *indio_dev;
  687. struct adis16480 *st;
  688. int ret;
  689. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  690. if (indio_dev == NULL)
  691. return -ENOMEM;
  692. spi_set_drvdata(spi, indio_dev);
  693. st = iio_priv(indio_dev);
  694. st->chip_info = &adis16480_chip_info[id->driver_data];
  695. indio_dev->dev.parent = &spi->dev;
  696. indio_dev->name = spi_get_device_id(spi)->name;
  697. indio_dev->channels = st->chip_info->channels;
  698. indio_dev->num_channels = st->chip_info->num_channels;
  699. indio_dev->info = &adis16480_info;
  700. indio_dev->modes = INDIO_DIRECT_MODE;
  701. ret = adis_init(&st->adis, indio_dev, spi, &adis16480_data);
  702. if (ret)
  703. return ret;
  704. ret = adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
  705. if (ret)
  706. return ret;
  707. ret = adis16480_initial_setup(indio_dev);
  708. if (ret)
  709. goto error_cleanup_buffer;
  710. ret = iio_device_register(indio_dev);
  711. if (ret)
  712. goto error_stop_device;
  713. adis16480_debugfs_init(indio_dev);
  714. return 0;
  715. error_stop_device:
  716. adis16480_stop_device(indio_dev);
  717. error_cleanup_buffer:
  718. adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
  719. return ret;
  720. }
  721. static int adis16480_remove(struct spi_device *spi)
  722. {
  723. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  724. struct adis16480 *st = iio_priv(indio_dev);
  725. iio_device_unregister(indio_dev);
  726. adis16480_stop_device(indio_dev);
  727. adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
  728. return 0;
  729. }
  730. static const struct spi_device_id adis16480_ids[] = {
  731. { "adis16375", ADIS16375 },
  732. { "adis16480", ADIS16480 },
  733. { "adis16485", ADIS16485 },
  734. { "adis16488", ADIS16488 },
  735. { }
  736. };
  737. MODULE_DEVICE_TABLE(spi, adis16480_ids);
  738. static struct spi_driver adis16480_driver = {
  739. .driver = {
  740. .name = "adis16480",
  741. .owner = THIS_MODULE,
  742. },
  743. .id_table = adis16480_ids,
  744. .probe = adis16480_probe,
  745. .remove = adis16480_remove,
  746. };
  747. module_spi_driver(adis16480_driver);
  748. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  749. MODULE_DESCRIPTION("Analog Devices ADIS16480 IMU driver");
  750. MODULE_LICENSE("GPL v2");