ti_am335x_adc.c 14 KB

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  1. /*
  2. * TI ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/err.h>
  17. #include <linux/module.h>
  18. #include <linux/slab.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/iio/iio.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/iio/machine.h>
  26. #include <linux/iio/driver.h>
  27. #include <linux/mfd/ti_am335x_tscadc.h>
  28. #include <linux/iio/buffer.h>
  29. #include <linux/iio/kfifo_buf.h>
  30. struct tiadc_device {
  31. struct ti_tscadc_dev *mfd_tscadc;
  32. int channels;
  33. u8 channel_line[8];
  34. u8 channel_step[8];
  35. int buffer_en_ch_steps;
  36. u16 data[8];
  37. };
  38. static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
  39. {
  40. return readl(adc->mfd_tscadc->tscadc_base + reg);
  41. }
  42. static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
  43. unsigned int val)
  44. {
  45. writel(val, adc->mfd_tscadc->tscadc_base + reg);
  46. }
  47. static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
  48. {
  49. u32 step_en;
  50. step_en = ((1 << adc_dev->channels) - 1);
  51. step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
  52. return step_en;
  53. }
  54. static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
  55. struct iio_chan_spec const *chan)
  56. {
  57. int i;
  58. for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
  59. if (chan->channel == adc_dev->channel_line[i]) {
  60. u32 step;
  61. step = adc_dev->channel_step[i];
  62. /* +1 for the charger */
  63. return 1 << (step + 1);
  64. }
  65. }
  66. WARN_ON(1);
  67. return 0;
  68. }
  69. static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
  70. {
  71. return 1 << adc_dev->channel_step[chan];
  72. }
  73. static void tiadc_step_config(struct iio_dev *indio_dev)
  74. {
  75. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  76. unsigned int stepconfig;
  77. int i, steps = 0;
  78. /*
  79. * There are 16 configurable steps and 8 analog input
  80. * lines available which are shared between Touchscreen and ADC.
  81. *
  82. * Steps forwards i.e. from 0 towards 16 are used by ADC
  83. * depending on number of input lines needed.
  84. * Channel would represent which analog input
  85. * needs to be given to ADC to digitalize data.
  86. */
  87. if (iio_buffer_enabled(indio_dev))
  88. stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1
  89. | STEPCONFIG_MODE_SWCNT;
  90. else
  91. stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1;
  92. for (i = 0; i < adc_dev->channels; i++) {
  93. int chan;
  94. chan = adc_dev->channel_line[i];
  95. tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
  96. stepconfig | STEPCONFIG_INP(chan));
  97. tiadc_writel(adc_dev, REG_STEPDELAY(steps),
  98. STEPCONFIG_OPENDLY);
  99. adc_dev->channel_step[i] = steps;
  100. steps++;
  101. }
  102. }
  103. static irqreturn_t tiadc_irq_h(int irq, void *private)
  104. {
  105. struct iio_dev *indio_dev = private;
  106. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  107. unsigned int status, config;
  108. status = tiadc_readl(adc_dev, REG_IRQSTATUS);
  109. /*
  110. * ADC and touchscreen share the IRQ line.
  111. * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
  112. */
  113. if (status & IRQENB_FIFO1OVRRUN) {
  114. /* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
  115. config = tiadc_readl(adc_dev, REG_CTRL);
  116. config &= ~(CNTRLREG_TSCSSENB);
  117. tiadc_writel(adc_dev, REG_CTRL, config);
  118. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
  119. | IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
  120. tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
  121. return IRQ_HANDLED;
  122. } else if (status & IRQENB_FIFO1THRES) {
  123. /* Disable irq and wake worker thread */
  124. tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
  125. return IRQ_WAKE_THREAD;
  126. }
  127. return IRQ_NONE;
  128. }
  129. static irqreturn_t tiadc_worker_h(int irq, void *private)
  130. {
  131. struct iio_dev *indio_dev = private;
  132. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  133. int i, k, fifo1count, read;
  134. u16 *data = adc_dev->data;
  135. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  136. for (k = 0; k < fifo1count; k = k + i) {
  137. for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
  138. read = tiadc_readl(adc_dev, REG_FIFO1);
  139. data[i] = read & FIFOREAD_DATA_MASK;
  140. }
  141. iio_push_to_buffers(indio_dev, (u8 *) data);
  142. }
  143. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
  144. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
  145. return IRQ_HANDLED;
  146. }
  147. static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
  148. {
  149. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  150. int i, fifo1count, read;
  151. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  152. IRQENB_FIFO1OVRRUN |
  153. IRQENB_FIFO1UNDRFLW));
  154. /* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
  155. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  156. for (i = 0; i < fifo1count; i++)
  157. read = tiadc_readl(adc_dev, REG_FIFO1);
  158. return 0;
  159. }
  160. static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
  161. {
  162. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  163. unsigned int enb = 0;
  164. u8 bit;
  165. tiadc_step_config(indio_dev);
  166. for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
  167. enb |= (get_adc_step_bit(adc_dev, bit) << 1);
  168. adc_dev->buffer_en_ch_steps = enb;
  169. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
  170. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
  171. | IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
  172. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
  173. | IRQENB_FIFO1OVRRUN);
  174. return 0;
  175. }
  176. static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
  177. {
  178. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  179. int fifo1count, i, read;
  180. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  181. IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
  182. am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
  183. adc_dev->buffer_en_ch_steps = 0;
  184. /* Flush FIFO of leftover data in the time it takes to disable adc */
  185. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  186. for (i = 0; i < fifo1count; i++)
  187. read = tiadc_readl(adc_dev, REG_FIFO1);
  188. return 0;
  189. }
  190. static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
  191. {
  192. tiadc_step_config(indio_dev);
  193. return 0;
  194. }
  195. static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
  196. .preenable = &tiadc_buffer_preenable,
  197. .postenable = &tiadc_buffer_postenable,
  198. .predisable = &tiadc_buffer_predisable,
  199. .postdisable = &tiadc_buffer_postdisable,
  200. };
  201. static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
  202. irqreturn_t (*pollfunc_bh)(int irq, void *p),
  203. irqreturn_t (*pollfunc_th)(int irq, void *p),
  204. int irq,
  205. unsigned long flags,
  206. const struct iio_buffer_setup_ops *setup_ops)
  207. {
  208. struct iio_buffer *buffer;
  209. int ret;
  210. buffer = iio_kfifo_allocate();
  211. if (!buffer)
  212. return -ENOMEM;
  213. iio_device_attach_buffer(indio_dev, buffer);
  214. ret = request_threaded_irq(irq, pollfunc_th, pollfunc_bh,
  215. flags, indio_dev->name, indio_dev);
  216. if (ret)
  217. goto error_kfifo_free;
  218. indio_dev->setup_ops = setup_ops;
  219. indio_dev->modes |= INDIO_BUFFER_HARDWARE;
  220. return 0;
  221. error_kfifo_free:
  222. iio_kfifo_free(indio_dev->buffer);
  223. return ret;
  224. }
  225. static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
  226. {
  227. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  228. free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
  229. iio_kfifo_free(indio_dev->buffer);
  230. }
  231. static const char * const chan_name_ain[] = {
  232. "AIN0",
  233. "AIN1",
  234. "AIN2",
  235. "AIN3",
  236. "AIN4",
  237. "AIN5",
  238. "AIN6",
  239. "AIN7",
  240. };
  241. static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
  242. {
  243. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  244. struct iio_chan_spec *chan_array;
  245. struct iio_chan_spec *chan;
  246. int i;
  247. indio_dev->num_channels = channels;
  248. chan_array = kcalloc(channels,
  249. sizeof(struct iio_chan_spec), GFP_KERNEL);
  250. if (chan_array == NULL)
  251. return -ENOMEM;
  252. chan = chan_array;
  253. for (i = 0; i < channels; i++, chan++) {
  254. chan->type = IIO_VOLTAGE;
  255. chan->indexed = 1;
  256. chan->channel = adc_dev->channel_line[i];
  257. chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
  258. chan->datasheet_name = chan_name_ain[chan->channel];
  259. chan->scan_index = i;
  260. chan->scan_type.sign = 'u';
  261. chan->scan_type.realbits = 12;
  262. chan->scan_type.storagebits = 16;
  263. }
  264. indio_dev->channels = chan_array;
  265. return 0;
  266. }
  267. static void tiadc_channels_remove(struct iio_dev *indio_dev)
  268. {
  269. kfree(indio_dev->channels);
  270. }
  271. static int tiadc_read_raw(struct iio_dev *indio_dev,
  272. struct iio_chan_spec const *chan,
  273. int *val, int *val2, long mask)
  274. {
  275. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  276. int i, map_val;
  277. unsigned int fifo1count, read, stepid;
  278. bool found = false;
  279. u32 step_en;
  280. unsigned long timeout;
  281. if (iio_buffer_enabled(indio_dev))
  282. return -EBUSY;
  283. step_en = get_adc_chan_step_mask(adc_dev, chan);
  284. if (!step_en)
  285. return -EINVAL;
  286. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  287. while (fifo1count--)
  288. tiadc_readl(adc_dev, REG_FIFO1);
  289. am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
  290. timeout = jiffies + usecs_to_jiffies
  291. (IDLE_TIMEOUT * adc_dev->channels);
  292. /* Wait for Fifo threshold interrupt */
  293. while (1) {
  294. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  295. if (fifo1count)
  296. break;
  297. if (time_after(jiffies, timeout)) {
  298. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  299. return -EAGAIN;
  300. }
  301. }
  302. map_val = adc_dev->channel_step[chan->scan_index];
  303. /*
  304. * We check the complete FIFO. We programmed just one entry but in case
  305. * something went wrong we left empty handed (-EAGAIN previously) and
  306. * then the value apeared somehow in the FIFO we would have two entries.
  307. * Therefore we read every item and keep only the latest version of the
  308. * requested channel.
  309. */
  310. for (i = 0; i < fifo1count; i++) {
  311. read = tiadc_readl(adc_dev, REG_FIFO1);
  312. stepid = read & FIFOREAD_CHNLID_MASK;
  313. stepid = stepid >> 0x10;
  314. if (stepid == map_val) {
  315. read = read & FIFOREAD_DATA_MASK;
  316. found = true;
  317. *val = (u16) read;
  318. }
  319. }
  320. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  321. if (found == false)
  322. return -EBUSY;
  323. return IIO_VAL_INT;
  324. }
  325. static const struct iio_info tiadc_info = {
  326. .read_raw = &tiadc_read_raw,
  327. .driver_module = THIS_MODULE,
  328. };
  329. static int tiadc_probe(struct platform_device *pdev)
  330. {
  331. struct iio_dev *indio_dev;
  332. struct tiadc_device *adc_dev;
  333. struct device_node *node = pdev->dev.of_node;
  334. struct property *prop;
  335. const __be32 *cur;
  336. int err;
  337. u32 val;
  338. int channels = 0;
  339. if (!node) {
  340. dev_err(&pdev->dev, "Could not find valid DT data.\n");
  341. return -EINVAL;
  342. }
  343. indio_dev = devm_iio_device_alloc(&pdev->dev,
  344. sizeof(struct tiadc_device));
  345. if (indio_dev == NULL) {
  346. dev_err(&pdev->dev, "failed to allocate iio device\n");
  347. return -ENOMEM;
  348. }
  349. adc_dev = iio_priv(indio_dev);
  350. adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
  351. of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
  352. adc_dev->channel_line[channels] = val;
  353. channels++;
  354. }
  355. adc_dev->channels = channels;
  356. indio_dev->dev.parent = &pdev->dev;
  357. indio_dev->name = dev_name(&pdev->dev);
  358. indio_dev->modes = INDIO_DIRECT_MODE;
  359. indio_dev->info = &tiadc_info;
  360. tiadc_step_config(indio_dev);
  361. tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
  362. err = tiadc_channel_init(indio_dev, adc_dev->channels);
  363. if (err < 0)
  364. return err;
  365. err = tiadc_iio_buffered_hardware_setup(indio_dev,
  366. &tiadc_worker_h,
  367. &tiadc_irq_h,
  368. adc_dev->mfd_tscadc->irq,
  369. IRQF_SHARED,
  370. &tiadc_buffer_setup_ops);
  371. if (err)
  372. goto err_free_channels;
  373. err = iio_device_register(indio_dev);
  374. if (err)
  375. goto err_buffer_unregister;
  376. platform_set_drvdata(pdev, indio_dev);
  377. return 0;
  378. err_buffer_unregister:
  379. tiadc_iio_buffered_hardware_remove(indio_dev);
  380. err_free_channels:
  381. tiadc_channels_remove(indio_dev);
  382. return err;
  383. }
  384. static int tiadc_remove(struct platform_device *pdev)
  385. {
  386. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  387. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  388. u32 step_en;
  389. iio_device_unregister(indio_dev);
  390. tiadc_iio_buffered_hardware_remove(indio_dev);
  391. tiadc_channels_remove(indio_dev);
  392. step_en = get_adc_step_mask(adc_dev);
  393. am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
  394. return 0;
  395. }
  396. #ifdef CONFIG_PM
  397. static int tiadc_suspend(struct device *dev)
  398. {
  399. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  400. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  401. struct ti_tscadc_dev *tscadc_dev;
  402. unsigned int idle;
  403. tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
  404. if (!device_may_wakeup(tscadc_dev->dev)) {
  405. idle = tiadc_readl(adc_dev, REG_CTRL);
  406. idle &= ~(CNTRLREG_TSCSSENB);
  407. tiadc_writel(adc_dev, REG_CTRL, (idle |
  408. CNTRLREG_POWERDOWN));
  409. }
  410. return 0;
  411. }
  412. static int tiadc_resume(struct device *dev)
  413. {
  414. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  415. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  416. unsigned int restore;
  417. /* Make sure ADC is powered up */
  418. restore = tiadc_readl(adc_dev, REG_CTRL);
  419. restore &= ~(CNTRLREG_POWERDOWN);
  420. tiadc_writel(adc_dev, REG_CTRL, restore);
  421. tiadc_step_config(indio_dev);
  422. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
  423. adc_dev->buffer_en_ch_steps);
  424. return 0;
  425. }
  426. static const struct dev_pm_ops tiadc_pm_ops = {
  427. .suspend = tiadc_suspend,
  428. .resume = tiadc_resume,
  429. };
  430. #define TIADC_PM_OPS (&tiadc_pm_ops)
  431. #else
  432. #define TIADC_PM_OPS NULL
  433. #endif
  434. static const struct of_device_id ti_adc_dt_ids[] = {
  435. { .compatible = "ti,am3359-adc", },
  436. { }
  437. };
  438. MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
  439. static struct platform_driver tiadc_driver = {
  440. .driver = {
  441. .name = "TI-am335x-adc",
  442. .pm = TIADC_PM_OPS,
  443. .of_match_table = ti_adc_dt_ids,
  444. },
  445. .probe = tiadc_probe,
  446. .remove = tiadc_remove,
  447. };
  448. module_platform_driver(tiadc_driver);
  449. MODULE_DESCRIPTION("TI ADC controller driver");
  450. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  451. MODULE_LICENSE("GPL");