drm.c 27 KB

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  1. /*
  2. * Copyright (C) 2012 Avionic Design GmbH
  3. * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/host1x.h>
  10. #include <linux/iommu.h>
  11. #include <drm/drm_atomic.h>
  12. #include <drm/drm_atomic_helper.h>
  13. #include "drm.h"
  14. #include "gem.h"
  15. #define DRIVER_NAME "tegra"
  16. #define DRIVER_DESC "NVIDIA Tegra graphics"
  17. #define DRIVER_DATE "20120330"
  18. #define DRIVER_MAJOR 0
  19. #define DRIVER_MINOR 0
  20. #define DRIVER_PATCHLEVEL 0
  21. struct tegra_drm_file {
  22. struct list_head contexts;
  23. };
  24. static void tegra_atomic_schedule(struct tegra_drm *tegra,
  25. struct drm_atomic_state *state)
  26. {
  27. tegra->commit.state = state;
  28. schedule_work(&tegra->commit.work);
  29. }
  30. static void tegra_atomic_complete(struct tegra_drm *tegra,
  31. struct drm_atomic_state *state)
  32. {
  33. struct drm_device *drm = tegra->drm;
  34. /*
  35. * Everything below can be run asynchronously without the need to grab
  36. * any modeset locks at all under one condition: It must be guaranteed
  37. * that the asynchronous work has either been cancelled (if the driver
  38. * supports it, which at least requires that the framebuffers get
  39. * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
  40. * before the new state gets committed on the software side with
  41. * drm_atomic_helper_swap_state().
  42. *
  43. * This scheme allows new atomic state updates to be prepared and
  44. * checked in parallel to the asynchronous completion of the previous
  45. * update. Which is important since compositors need to figure out the
  46. * composition of the next frame right after having submitted the
  47. * current layout.
  48. */
  49. drm_atomic_helper_commit_modeset_disables(drm, state);
  50. drm_atomic_helper_commit_planes(drm, state);
  51. drm_atomic_helper_commit_modeset_enables(drm, state);
  52. drm_atomic_helper_wait_for_vblanks(drm, state);
  53. drm_atomic_helper_cleanup_planes(drm, state);
  54. drm_atomic_state_free(state);
  55. }
  56. static void tegra_atomic_work(struct work_struct *work)
  57. {
  58. struct tegra_drm *tegra = container_of(work, struct tegra_drm,
  59. commit.work);
  60. tegra_atomic_complete(tegra, tegra->commit.state);
  61. }
  62. static int tegra_atomic_commit(struct drm_device *drm,
  63. struct drm_atomic_state *state, bool async)
  64. {
  65. struct tegra_drm *tegra = drm->dev_private;
  66. int err;
  67. err = drm_atomic_helper_prepare_planes(drm, state);
  68. if (err)
  69. return err;
  70. /* serialize outstanding asynchronous commits */
  71. mutex_lock(&tegra->commit.lock);
  72. flush_work(&tegra->commit.work);
  73. /*
  74. * This is the point of no return - everything below never fails except
  75. * when the hw goes bonghits. Which means we can commit the new state on
  76. * the software side now.
  77. */
  78. drm_atomic_helper_swap_state(drm, state);
  79. if (async)
  80. tegra_atomic_schedule(tegra, state);
  81. else
  82. tegra_atomic_complete(tegra, state);
  83. mutex_unlock(&tegra->commit.lock);
  84. return 0;
  85. }
  86. static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
  87. .fb_create = tegra_fb_create,
  88. #ifdef CONFIG_DRM_TEGRA_FBDEV
  89. .output_poll_changed = tegra_fb_output_poll_changed,
  90. #endif
  91. .atomic_check = drm_atomic_helper_check,
  92. .atomic_commit = tegra_atomic_commit,
  93. };
  94. static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
  95. {
  96. struct host1x_device *device = to_host1x_device(drm->dev);
  97. struct tegra_drm *tegra;
  98. int err;
  99. tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
  100. if (!tegra)
  101. return -ENOMEM;
  102. if (iommu_present(&platform_bus_type)) {
  103. tegra->domain = iommu_domain_alloc(&platform_bus_type);
  104. if (!tegra->domain) {
  105. err = -ENOMEM;
  106. goto free;
  107. }
  108. DRM_DEBUG("IOMMU context initialized\n");
  109. drm_mm_init(&tegra->mm, 0, SZ_2G);
  110. }
  111. mutex_init(&tegra->clients_lock);
  112. INIT_LIST_HEAD(&tegra->clients);
  113. mutex_init(&tegra->commit.lock);
  114. INIT_WORK(&tegra->commit.work, tegra_atomic_work);
  115. drm->dev_private = tegra;
  116. tegra->drm = drm;
  117. drm_mode_config_init(drm);
  118. drm->mode_config.min_width = 0;
  119. drm->mode_config.min_height = 0;
  120. drm->mode_config.max_width = 4096;
  121. drm->mode_config.max_height = 4096;
  122. drm->mode_config.funcs = &tegra_drm_mode_funcs;
  123. err = tegra_drm_fb_prepare(drm);
  124. if (err < 0)
  125. goto config;
  126. drm_kms_helper_poll_init(drm);
  127. err = host1x_device_init(device);
  128. if (err < 0)
  129. goto fbdev;
  130. drm_mode_config_reset(drm);
  131. /*
  132. * We don't use the drm_irq_install() helpers provided by the DRM
  133. * core, so we need to set this manually in order to allow the
  134. * DRM_IOCTL_WAIT_VBLANK to operate correctly.
  135. */
  136. drm->irq_enabled = true;
  137. /* syncpoints are used for full 32-bit hardware VBLANK counters */
  138. drm->max_vblank_count = 0xffffffff;
  139. err = drm_vblank_init(drm, drm->mode_config.num_crtc);
  140. if (err < 0)
  141. goto device;
  142. err = tegra_drm_fb_init(drm);
  143. if (err < 0)
  144. goto vblank;
  145. return 0;
  146. vblank:
  147. drm_vblank_cleanup(drm);
  148. device:
  149. host1x_device_exit(device);
  150. fbdev:
  151. drm_kms_helper_poll_fini(drm);
  152. tegra_drm_fb_free(drm);
  153. config:
  154. drm_mode_config_cleanup(drm);
  155. if (tegra->domain) {
  156. iommu_domain_free(tegra->domain);
  157. drm_mm_takedown(&tegra->mm);
  158. }
  159. free:
  160. kfree(tegra);
  161. return err;
  162. }
  163. static int tegra_drm_unload(struct drm_device *drm)
  164. {
  165. struct host1x_device *device = to_host1x_device(drm->dev);
  166. struct tegra_drm *tegra = drm->dev_private;
  167. int err;
  168. drm_kms_helper_poll_fini(drm);
  169. tegra_drm_fb_exit(drm);
  170. drm_mode_config_cleanup(drm);
  171. drm_vblank_cleanup(drm);
  172. err = host1x_device_exit(device);
  173. if (err < 0)
  174. return err;
  175. if (tegra->domain) {
  176. iommu_domain_free(tegra->domain);
  177. drm_mm_takedown(&tegra->mm);
  178. }
  179. kfree(tegra);
  180. return 0;
  181. }
  182. static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
  183. {
  184. struct tegra_drm_file *fpriv;
  185. fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
  186. if (!fpriv)
  187. return -ENOMEM;
  188. INIT_LIST_HEAD(&fpriv->contexts);
  189. filp->driver_priv = fpriv;
  190. return 0;
  191. }
  192. static void tegra_drm_context_free(struct tegra_drm_context *context)
  193. {
  194. context->client->ops->close_channel(context);
  195. kfree(context);
  196. }
  197. static void tegra_drm_lastclose(struct drm_device *drm)
  198. {
  199. #ifdef CONFIG_DRM_TEGRA_FBDEV
  200. struct tegra_drm *tegra = drm->dev_private;
  201. tegra_fbdev_restore_mode(tegra->fbdev);
  202. #endif
  203. }
  204. static struct host1x_bo *
  205. host1x_bo_lookup(struct drm_device *drm, struct drm_file *file, u32 handle)
  206. {
  207. struct drm_gem_object *gem;
  208. struct tegra_bo *bo;
  209. gem = drm_gem_object_lookup(drm, file, handle);
  210. if (!gem)
  211. return NULL;
  212. mutex_lock(&drm->struct_mutex);
  213. drm_gem_object_unreference(gem);
  214. mutex_unlock(&drm->struct_mutex);
  215. bo = to_tegra_bo(gem);
  216. return &bo->base;
  217. }
  218. static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
  219. struct drm_tegra_reloc __user *src,
  220. struct drm_device *drm,
  221. struct drm_file *file)
  222. {
  223. u32 cmdbuf, target;
  224. int err;
  225. err = get_user(cmdbuf, &src->cmdbuf.handle);
  226. if (err < 0)
  227. return err;
  228. err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
  229. if (err < 0)
  230. return err;
  231. err = get_user(target, &src->target.handle);
  232. if (err < 0)
  233. return err;
  234. err = get_user(dest->target.offset, &src->target.offset);
  235. if (err < 0)
  236. return err;
  237. err = get_user(dest->shift, &src->shift);
  238. if (err < 0)
  239. return err;
  240. dest->cmdbuf.bo = host1x_bo_lookup(drm, file, cmdbuf);
  241. if (!dest->cmdbuf.bo)
  242. return -ENOENT;
  243. dest->target.bo = host1x_bo_lookup(drm, file, target);
  244. if (!dest->target.bo)
  245. return -ENOENT;
  246. return 0;
  247. }
  248. int tegra_drm_submit(struct tegra_drm_context *context,
  249. struct drm_tegra_submit *args, struct drm_device *drm,
  250. struct drm_file *file)
  251. {
  252. unsigned int num_cmdbufs = args->num_cmdbufs;
  253. unsigned int num_relocs = args->num_relocs;
  254. unsigned int num_waitchks = args->num_waitchks;
  255. struct drm_tegra_cmdbuf __user *cmdbufs =
  256. (void __user *)(uintptr_t)args->cmdbufs;
  257. struct drm_tegra_reloc __user *relocs =
  258. (void __user *)(uintptr_t)args->relocs;
  259. struct drm_tegra_waitchk __user *waitchks =
  260. (void __user *)(uintptr_t)args->waitchks;
  261. struct drm_tegra_syncpt syncpt;
  262. struct host1x_job *job;
  263. int err;
  264. /* We don't yet support other than one syncpt_incr struct per submit */
  265. if (args->num_syncpts != 1)
  266. return -EINVAL;
  267. job = host1x_job_alloc(context->channel, args->num_cmdbufs,
  268. args->num_relocs, args->num_waitchks);
  269. if (!job)
  270. return -ENOMEM;
  271. job->num_relocs = args->num_relocs;
  272. job->num_waitchk = args->num_waitchks;
  273. job->client = (u32)args->context;
  274. job->class = context->client->base.class;
  275. job->serialize = true;
  276. while (num_cmdbufs) {
  277. struct drm_tegra_cmdbuf cmdbuf;
  278. struct host1x_bo *bo;
  279. if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
  280. err = -EFAULT;
  281. goto fail;
  282. }
  283. bo = host1x_bo_lookup(drm, file, cmdbuf.handle);
  284. if (!bo) {
  285. err = -ENOENT;
  286. goto fail;
  287. }
  288. host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
  289. num_cmdbufs--;
  290. cmdbufs++;
  291. }
  292. /* copy and resolve relocations from submit */
  293. while (num_relocs--) {
  294. err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
  295. &relocs[num_relocs], drm,
  296. file);
  297. if (err < 0)
  298. goto fail;
  299. }
  300. if (copy_from_user(job->waitchk, waitchks,
  301. sizeof(*waitchks) * num_waitchks)) {
  302. err = -EFAULT;
  303. goto fail;
  304. }
  305. if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
  306. sizeof(syncpt))) {
  307. err = -EFAULT;
  308. goto fail;
  309. }
  310. job->is_addr_reg = context->client->ops->is_addr_reg;
  311. job->syncpt_incrs = syncpt.incrs;
  312. job->syncpt_id = syncpt.id;
  313. job->timeout = 10000;
  314. if (args->timeout && args->timeout < 10000)
  315. job->timeout = args->timeout;
  316. err = host1x_job_pin(job, context->client->base.dev);
  317. if (err)
  318. goto fail;
  319. err = host1x_job_submit(job);
  320. if (err)
  321. goto fail_submit;
  322. args->fence = job->syncpt_end;
  323. host1x_job_put(job);
  324. return 0;
  325. fail_submit:
  326. host1x_job_unpin(job);
  327. fail:
  328. host1x_job_put(job);
  329. return err;
  330. }
  331. #ifdef CONFIG_DRM_TEGRA_STAGING
  332. static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
  333. {
  334. return (struct tegra_drm_context *)(uintptr_t)context;
  335. }
  336. static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
  337. struct tegra_drm_context *context)
  338. {
  339. struct tegra_drm_context *ctx;
  340. list_for_each_entry(ctx, &file->contexts, list)
  341. if (ctx == context)
  342. return true;
  343. return false;
  344. }
  345. static int tegra_gem_create(struct drm_device *drm, void *data,
  346. struct drm_file *file)
  347. {
  348. struct drm_tegra_gem_create *args = data;
  349. struct tegra_bo *bo;
  350. bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
  351. &args->handle);
  352. if (IS_ERR(bo))
  353. return PTR_ERR(bo);
  354. return 0;
  355. }
  356. static int tegra_gem_mmap(struct drm_device *drm, void *data,
  357. struct drm_file *file)
  358. {
  359. struct drm_tegra_gem_mmap *args = data;
  360. struct drm_gem_object *gem;
  361. struct tegra_bo *bo;
  362. gem = drm_gem_object_lookup(drm, file, args->handle);
  363. if (!gem)
  364. return -EINVAL;
  365. bo = to_tegra_bo(gem);
  366. args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
  367. drm_gem_object_unreference(gem);
  368. return 0;
  369. }
  370. static int tegra_syncpt_read(struct drm_device *drm, void *data,
  371. struct drm_file *file)
  372. {
  373. struct host1x *host = dev_get_drvdata(drm->dev->parent);
  374. struct drm_tegra_syncpt_read *args = data;
  375. struct host1x_syncpt *sp;
  376. sp = host1x_syncpt_get(host, args->id);
  377. if (!sp)
  378. return -EINVAL;
  379. args->value = host1x_syncpt_read_min(sp);
  380. return 0;
  381. }
  382. static int tegra_syncpt_incr(struct drm_device *drm, void *data,
  383. struct drm_file *file)
  384. {
  385. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  386. struct drm_tegra_syncpt_incr *args = data;
  387. struct host1x_syncpt *sp;
  388. sp = host1x_syncpt_get(host1x, args->id);
  389. if (!sp)
  390. return -EINVAL;
  391. return host1x_syncpt_incr(sp);
  392. }
  393. static int tegra_syncpt_wait(struct drm_device *drm, void *data,
  394. struct drm_file *file)
  395. {
  396. struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
  397. struct drm_tegra_syncpt_wait *args = data;
  398. struct host1x_syncpt *sp;
  399. sp = host1x_syncpt_get(host1x, args->id);
  400. if (!sp)
  401. return -EINVAL;
  402. return host1x_syncpt_wait(sp, args->thresh, args->timeout,
  403. &args->value);
  404. }
  405. static int tegra_open_channel(struct drm_device *drm, void *data,
  406. struct drm_file *file)
  407. {
  408. struct tegra_drm_file *fpriv = file->driver_priv;
  409. struct tegra_drm *tegra = drm->dev_private;
  410. struct drm_tegra_open_channel *args = data;
  411. struct tegra_drm_context *context;
  412. struct tegra_drm_client *client;
  413. int err = -ENODEV;
  414. context = kzalloc(sizeof(*context), GFP_KERNEL);
  415. if (!context)
  416. return -ENOMEM;
  417. list_for_each_entry(client, &tegra->clients, list)
  418. if (client->base.class == args->client) {
  419. err = client->ops->open_channel(client, context);
  420. if (err)
  421. break;
  422. list_add(&context->list, &fpriv->contexts);
  423. args->context = (uintptr_t)context;
  424. context->client = client;
  425. return 0;
  426. }
  427. kfree(context);
  428. return err;
  429. }
  430. static int tegra_close_channel(struct drm_device *drm, void *data,
  431. struct drm_file *file)
  432. {
  433. struct tegra_drm_file *fpriv = file->driver_priv;
  434. struct drm_tegra_close_channel *args = data;
  435. struct tegra_drm_context *context;
  436. context = tegra_drm_get_context(args->context);
  437. if (!tegra_drm_file_owns_context(fpriv, context))
  438. return -EINVAL;
  439. list_del(&context->list);
  440. tegra_drm_context_free(context);
  441. return 0;
  442. }
  443. static int tegra_get_syncpt(struct drm_device *drm, void *data,
  444. struct drm_file *file)
  445. {
  446. struct tegra_drm_file *fpriv = file->driver_priv;
  447. struct drm_tegra_get_syncpt *args = data;
  448. struct tegra_drm_context *context;
  449. struct host1x_syncpt *syncpt;
  450. context = tegra_drm_get_context(args->context);
  451. if (!tegra_drm_file_owns_context(fpriv, context))
  452. return -ENODEV;
  453. if (args->index >= context->client->base.num_syncpts)
  454. return -EINVAL;
  455. syncpt = context->client->base.syncpts[args->index];
  456. args->id = host1x_syncpt_id(syncpt);
  457. return 0;
  458. }
  459. static int tegra_submit(struct drm_device *drm, void *data,
  460. struct drm_file *file)
  461. {
  462. struct tegra_drm_file *fpriv = file->driver_priv;
  463. struct drm_tegra_submit *args = data;
  464. struct tegra_drm_context *context;
  465. context = tegra_drm_get_context(args->context);
  466. if (!tegra_drm_file_owns_context(fpriv, context))
  467. return -ENODEV;
  468. return context->client->ops->submit(context, args, drm, file);
  469. }
  470. static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
  471. struct drm_file *file)
  472. {
  473. struct tegra_drm_file *fpriv = file->driver_priv;
  474. struct drm_tegra_get_syncpt_base *args = data;
  475. struct tegra_drm_context *context;
  476. struct host1x_syncpt_base *base;
  477. struct host1x_syncpt *syncpt;
  478. context = tegra_drm_get_context(args->context);
  479. if (!tegra_drm_file_owns_context(fpriv, context))
  480. return -ENODEV;
  481. if (args->syncpt >= context->client->base.num_syncpts)
  482. return -EINVAL;
  483. syncpt = context->client->base.syncpts[args->syncpt];
  484. base = host1x_syncpt_get_base(syncpt);
  485. if (!base)
  486. return -ENXIO;
  487. args->id = host1x_syncpt_base_id(base);
  488. return 0;
  489. }
  490. static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
  491. struct drm_file *file)
  492. {
  493. struct drm_tegra_gem_set_tiling *args = data;
  494. enum tegra_bo_tiling_mode mode;
  495. struct drm_gem_object *gem;
  496. unsigned long value = 0;
  497. struct tegra_bo *bo;
  498. switch (args->mode) {
  499. case DRM_TEGRA_GEM_TILING_MODE_PITCH:
  500. mode = TEGRA_BO_TILING_MODE_PITCH;
  501. if (args->value != 0)
  502. return -EINVAL;
  503. break;
  504. case DRM_TEGRA_GEM_TILING_MODE_TILED:
  505. mode = TEGRA_BO_TILING_MODE_TILED;
  506. if (args->value != 0)
  507. return -EINVAL;
  508. break;
  509. case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
  510. mode = TEGRA_BO_TILING_MODE_BLOCK;
  511. if (args->value > 5)
  512. return -EINVAL;
  513. value = args->value;
  514. break;
  515. default:
  516. return -EINVAL;
  517. }
  518. gem = drm_gem_object_lookup(drm, file, args->handle);
  519. if (!gem)
  520. return -ENOENT;
  521. bo = to_tegra_bo(gem);
  522. bo->tiling.mode = mode;
  523. bo->tiling.value = value;
  524. drm_gem_object_unreference(gem);
  525. return 0;
  526. }
  527. static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
  528. struct drm_file *file)
  529. {
  530. struct drm_tegra_gem_get_tiling *args = data;
  531. struct drm_gem_object *gem;
  532. struct tegra_bo *bo;
  533. int err = 0;
  534. gem = drm_gem_object_lookup(drm, file, args->handle);
  535. if (!gem)
  536. return -ENOENT;
  537. bo = to_tegra_bo(gem);
  538. switch (bo->tiling.mode) {
  539. case TEGRA_BO_TILING_MODE_PITCH:
  540. args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
  541. args->value = 0;
  542. break;
  543. case TEGRA_BO_TILING_MODE_TILED:
  544. args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
  545. args->value = 0;
  546. break;
  547. case TEGRA_BO_TILING_MODE_BLOCK:
  548. args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
  549. args->value = bo->tiling.value;
  550. break;
  551. default:
  552. err = -EINVAL;
  553. break;
  554. }
  555. drm_gem_object_unreference(gem);
  556. return err;
  557. }
  558. static int tegra_gem_set_flags(struct drm_device *drm, void *data,
  559. struct drm_file *file)
  560. {
  561. struct drm_tegra_gem_set_flags *args = data;
  562. struct drm_gem_object *gem;
  563. struct tegra_bo *bo;
  564. if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
  565. return -EINVAL;
  566. gem = drm_gem_object_lookup(drm, file, args->handle);
  567. if (!gem)
  568. return -ENOENT;
  569. bo = to_tegra_bo(gem);
  570. bo->flags = 0;
  571. if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
  572. bo->flags |= TEGRA_BO_BOTTOM_UP;
  573. drm_gem_object_unreference(gem);
  574. return 0;
  575. }
  576. static int tegra_gem_get_flags(struct drm_device *drm, void *data,
  577. struct drm_file *file)
  578. {
  579. struct drm_tegra_gem_get_flags *args = data;
  580. struct drm_gem_object *gem;
  581. struct tegra_bo *bo;
  582. gem = drm_gem_object_lookup(drm, file, args->handle);
  583. if (!gem)
  584. return -ENOENT;
  585. bo = to_tegra_bo(gem);
  586. args->flags = 0;
  587. if (bo->flags & TEGRA_BO_BOTTOM_UP)
  588. args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
  589. drm_gem_object_unreference(gem);
  590. return 0;
  591. }
  592. #endif
  593. static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
  594. #ifdef CONFIG_DRM_TEGRA_STAGING
  595. DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED),
  596. DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED),
  597. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, DRM_UNLOCKED),
  598. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, DRM_UNLOCKED),
  599. DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, DRM_UNLOCKED),
  600. DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, DRM_UNLOCKED),
  601. DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, DRM_UNLOCKED),
  602. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, DRM_UNLOCKED),
  603. DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, DRM_UNLOCKED),
  604. DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, DRM_UNLOCKED),
  605. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, DRM_UNLOCKED),
  606. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, DRM_UNLOCKED),
  607. DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, DRM_UNLOCKED),
  608. DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, DRM_UNLOCKED),
  609. #endif
  610. };
  611. static const struct file_operations tegra_drm_fops = {
  612. .owner = THIS_MODULE,
  613. .open = drm_open,
  614. .release = drm_release,
  615. .unlocked_ioctl = drm_ioctl,
  616. .mmap = tegra_drm_mmap,
  617. .poll = drm_poll,
  618. .read = drm_read,
  619. #ifdef CONFIG_COMPAT
  620. .compat_ioctl = drm_compat_ioctl,
  621. #endif
  622. .llseek = noop_llseek,
  623. };
  624. static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
  625. unsigned int pipe)
  626. {
  627. struct drm_crtc *crtc;
  628. list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
  629. if (pipe == drm_crtc_index(crtc))
  630. return crtc;
  631. }
  632. return NULL;
  633. }
  634. static u32 tegra_drm_get_vblank_counter(struct drm_device *drm, int pipe)
  635. {
  636. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  637. struct tegra_dc *dc = to_tegra_dc(crtc);
  638. if (!crtc)
  639. return 0;
  640. return tegra_dc_get_vblank_counter(dc);
  641. }
  642. static int tegra_drm_enable_vblank(struct drm_device *drm, int pipe)
  643. {
  644. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  645. struct tegra_dc *dc = to_tegra_dc(crtc);
  646. if (!crtc)
  647. return -ENODEV;
  648. tegra_dc_enable_vblank(dc);
  649. return 0;
  650. }
  651. static void tegra_drm_disable_vblank(struct drm_device *drm, int pipe)
  652. {
  653. struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
  654. struct tegra_dc *dc = to_tegra_dc(crtc);
  655. if (crtc)
  656. tegra_dc_disable_vblank(dc);
  657. }
  658. static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
  659. {
  660. struct tegra_drm_file *fpriv = file->driver_priv;
  661. struct tegra_drm_context *context, *tmp;
  662. struct drm_crtc *crtc;
  663. list_for_each_entry(crtc, &drm->mode_config.crtc_list, head)
  664. tegra_dc_cancel_page_flip(crtc, file);
  665. list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
  666. tegra_drm_context_free(context);
  667. kfree(fpriv);
  668. }
  669. #ifdef CONFIG_DEBUG_FS
  670. static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
  671. {
  672. struct drm_info_node *node = (struct drm_info_node *)s->private;
  673. struct drm_device *drm = node->minor->dev;
  674. struct drm_framebuffer *fb;
  675. mutex_lock(&drm->mode_config.fb_lock);
  676. list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
  677. seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
  678. fb->base.id, fb->width, fb->height, fb->depth,
  679. fb->bits_per_pixel,
  680. atomic_read(&fb->refcount.refcount));
  681. }
  682. mutex_unlock(&drm->mode_config.fb_lock);
  683. return 0;
  684. }
  685. static int tegra_debugfs_iova(struct seq_file *s, void *data)
  686. {
  687. struct drm_info_node *node = (struct drm_info_node *)s->private;
  688. struct drm_device *drm = node->minor->dev;
  689. struct tegra_drm *tegra = drm->dev_private;
  690. return drm_mm_dump_table(s, &tegra->mm);
  691. }
  692. static struct drm_info_list tegra_debugfs_list[] = {
  693. { "framebuffers", tegra_debugfs_framebuffers, 0 },
  694. { "iova", tegra_debugfs_iova, 0 },
  695. };
  696. static int tegra_debugfs_init(struct drm_minor *minor)
  697. {
  698. return drm_debugfs_create_files(tegra_debugfs_list,
  699. ARRAY_SIZE(tegra_debugfs_list),
  700. minor->debugfs_root, minor);
  701. }
  702. static void tegra_debugfs_cleanup(struct drm_minor *minor)
  703. {
  704. drm_debugfs_remove_files(tegra_debugfs_list,
  705. ARRAY_SIZE(tegra_debugfs_list), minor);
  706. }
  707. #endif
  708. static struct drm_driver tegra_drm_driver = {
  709. .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
  710. .load = tegra_drm_load,
  711. .unload = tegra_drm_unload,
  712. .open = tegra_drm_open,
  713. .preclose = tegra_drm_preclose,
  714. .lastclose = tegra_drm_lastclose,
  715. .get_vblank_counter = tegra_drm_get_vblank_counter,
  716. .enable_vblank = tegra_drm_enable_vblank,
  717. .disable_vblank = tegra_drm_disable_vblank,
  718. #if defined(CONFIG_DEBUG_FS)
  719. .debugfs_init = tegra_debugfs_init,
  720. .debugfs_cleanup = tegra_debugfs_cleanup,
  721. #endif
  722. .gem_free_object = tegra_bo_free_object,
  723. .gem_vm_ops = &tegra_bo_vm_ops,
  724. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  725. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  726. .gem_prime_export = tegra_gem_prime_export,
  727. .gem_prime_import = tegra_gem_prime_import,
  728. .dumb_create = tegra_bo_dumb_create,
  729. .dumb_map_offset = tegra_bo_dumb_map_offset,
  730. .dumb_destroy = drm_gem_dumb_destroy,
  731. .ioctls = tegra_drm_ioctls,
  732. .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
  733. .fops = &tegra_drm_fops,
  734. .name = DRIVER_NAME,
  735. .desc = DRIVER_DESC,
  736. .date = DRIVER_DATE,
  737. .major = DRIVER_MAJOR,
  738. .minor = DRIVER_MINOR,
  739. .patchlevel = DRIVER_PATCHLEVEL,
  740. };
  741. int tegra_drm_register_client(struct tegra_drm *tegra,
  742. struct tegra_drm_client *client)
  743. {
  744. mutex_lock(&tegra->clients_lock);
  745. list_add_tail(&client->list, &tegra->clients);
  746. mutex_unlock(&tegra->clients_lock);
  747. return 0;
  748. }
  749. int tegra_drm_unregister_client(struct tegra_drm *tegra,
  750. struct tegra_drm_client *client)
  751. {
  752. mutex_lock(&tegra->clients_lock);
  753. list_del_init(&client->list);
  754. mutex_unlock(&tegra->clients_lock);
  755. return 0;
  756. }
  757. static int host1x_drm_probe(struct host1x_device *dev)
  758. {
  759. struct drm_driver *driver = &tegra_drm_driver;
  760. struct drm_device *drm;
  761. int err;
  762. drm = drm_dev_alloc(driver, &dev->dev);
  763. if (!drm)
  764. return -ENOMEM;
  765. drm_dev_set_unique(drm, dev_name(&dev->dev));
  766. dev_set_drvdata(&dev->dev, drm);
  767. err = drm_dev_register(drm, 0);
  768. if (err < 0)
  769. goto unref;
  770. DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
  771. driver->major, driver->minor, driver->patchlevel,
  772. driver->date, drm->primary->index);
  773. return 0;
  774. unref:
  775. drm_dev_unref(drm);
  776. return err;
  777. }
  778. static int host1x_drm_remove(struct host1x_device *dev)
  779. {
  780. struct drm_device *drm = dev_get_drvdata(&dev->dev);
  781. drm_dev_unregister(drm);
  782. drm_dev_unref(drm);
  783. return 0;
  784. }
  785. #ifdef CONFIG_PM_SLEEP
  786. static int host1x_drm_suspend(struct device *dev)
  787. {
  788. struct drm_device *drm = dev_get_drvdata(dev);
  789. drm_kms_helper_poll_disable(drm);
  790. return 0;
  791. }
  792. static int host1x_drm_resume(struct device *dev)
  793. {
  794. struct drm_device *drm = dev_get_drvdata(dev);
  795. drm_kms_helper_poll_enable(drm);
  796. return 0;
  797. }
  798. #endif
  799. static const struct dev_pm_ops host1x_drm_pm_ops = {
  800. SET_SYSTEM_SLEEP_PM_OPS(host1x_drm_suspend, host1x_drm_resume)
  801. };
  802. static const struct of_device_id host1x_drm_subdevs[] = {
  803. { .compatible = "nvidia,tegra20-dc", },
  804. { .compatible = "nvidia,tegra20-hdmi", },
  805. { .compatible = "nvidia,tegra20-gr2d", },
  806. { .compatible = "nvidia,tegra20-gr3d", },
  807. { .compatible = "nvidia,tegra30-dc", },
  808. { .compatible = "nvidia,tegra30-hdmi", },
  809. { .compatible = "nvidia,tegra30-gr2d", },
  810. { .compatible = "nvidia,tegra30-gr3d", },
  811. { .compatible = "nvidia,tegra114-dsi", },
  812. { .compatible = "nvidia,tegra114-hdmi", },
  813. { .compatible = "nvidia,tegra114-gr3d", },
  814. { .compatible = "nvidia,tegra124-dc", },
  815. { .compatible = "nvidia,tegra124-sor", },
  816. { .compatible = "nvidia,tegra124-hdmi", },
  817. { /* sentinel */ }
  818. };
  819. static struct host1x_driver host1x_drm_driver = {
  820. .driver = {
  821. .name = "drm",
  822. .pm = &host1x_drm_pm_ops,
  823. },
  824. .probe = host1x_drm_probe,
  825. .remove = host1x_drm_remove,
  826. .subdevs = host1x_drm_subdevs,
  827. };
  828. static int __init host1x_drm_init(void)
  829. {
  830. int err;
  831. err = host1x_driver_register(&host1x_drm_driver);
  832. if (err < 0)
  833. return err;
  834. err = platform_driver_register(&tegra_dc_driver);
  835. if (err < 0)
  836. goto unregister_host1x;
  837. err = platform_driver_register(&tegra_dsi_driver);
  838. if (err < 0)
  839. goto unregister_dc;
  840. err = platform_driver_register(&tegra_sor_driver);
  841. if (err < 0)
  842. goto unregister_dsi;
  843. err = platform_driver_register(&tegra_hdmi_driver);
  844. if (err < 0)
  845. goto unregister_sor;
  846. err = platform_driver_register(&tegra_dpaux_driver);
  847. if (err < 0)
  848. goto unregister_hdmi;
  849. err = platform_driver_register(&tegra_gr2d_driver);
  850. if (err < 0)
  851. goto unregister_dpaux;
  852. err = platform_driver_register(&tegra_gr3d_driver);
  853. if (err < 0)
  854. goto unregister_gr2d;
  855. return 0;
  856. unregister_gr2d:
  857. platform_driver_unregister(&tegra_gr2d_driver);
  858. unregister_dpaux:
  859. platform_driver_unregister(&tegra_dpaux_driver);
  860. unregister_hdmi:
  861. platform_driver_unregister(&tegra_hdmi_driver);
  862. unregister_sor:
  863. platform_driver_unregister(&tegra_sor_driver);
  864. unregister_dsi:
  865. platform_driver_unregister(&tegra_dsi_driver);
  866. unregister_dc:
  867. platform_driver_unregister(&tegra_dc_driver);
  868. unregister_host1x:
  869. host1x_driver_unregister(&host1x_drm_driver);
  870. return err;
  871. }
  872. module_init(host1x_drm_init);
  873. static void __exit host1x_drm_exit(void)
  874. {
  875. platform_driver_unregister(&tegra_gr3d_driver);
  876. platform_driver_unregister(&tegra_gr2d_driver);
  877. platform_driver_unregister(&tegra_dpaux_driver);
  878. platform_driver_unregister(&tegra_hdmi_driver);
  879. platform_driver_unregister(&tegra_sor_driver);
  880. platform_driver_unregister(&tegra_dsi_driver);
  881. platform_driver_unregister(&tegra_dc_driver);
  882. host1x_driver_unregister(&host1x_drm_driver);
  883. }
  884. module_exit(host1x_drm_exit);
  885. MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
  886. MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
  887. MODULE_LICENSE("GPL v2");