nouveau_display.c 23 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #include <nvif/class.h>
  29. #include "nouveau_fbcon.h"
  30. #include "dispnv04/hw.h"
  31. #include "nouveau_crtc.h"
  32. #include "nouveau_dma.h"
  33. #include "nouveau_gem.h"
  34. #include "nouveau_connector.h"
  35. #include "nv50_display.h"
  36. #include "nouveau_fence.h"
  37. #include <nvif/event.h>
  38. static int
  39. nouveau_display_vblank_handler(struct nvif_notify *notify)
  40. {
  41. struct nouveau_crtc *nv_crtc =
  42. container_of(notify, typeof(*nv_crtc), vblank);
  43. drm_handle_vblank(nv_crtc->base.dev, nv_crtc->index);
  44. return NVIF_NOTIFY_KEEP;
  45. }
  46. int
  47. nouveau_display_vblank_enable(struct drm_device *dev, int head)
  48. {
  49. struct drm_crtc *crtc;
  50. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  51. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  52. if (nv_crtc->index == head) {
  53. nvif_notify_get(&nv_crtc->vblank);
  54. return 0;
  55. }
  56. }
  57. return -EINVAL;
  58. }
  59. void
  60. nouveau_display_vblank_disable(struct drm_device *dev, int head)
  61. {
  62. struct drm_crtc *crtc;
  63. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  64. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  65. if (nv_crtc->index == head) {
  66. nvif_notify_put(&nv_crtc->vblank);
  67. return;
  68. }
  69. }
  70. }
  71. static inline int
  72. calc(int blanks, int blanke, int total, int line)
  73. {
  74. if (blanke >= blanks) {
  75. if (line >= blanks)
  76. line -= total;
  77. } else {
  78. if (line >= blanks)
  79. line -= total;
  80. line -= blanke + 1;
  81. }
  82. return line;
  83. }
  84. int
  85. nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos,
  86. ktime_t *stime, ktime_t *etime)
  87. {
  88. struct {
  89. struct nv04_disp_mthd_v0 base;
  90. struct nv04_disp_scanoutpos_v0 scan;
  91. } args = {
  92. .base.method = NV04_DISP_SCANOUTPOS,
  93. .base.head = nouveau_crtc(crtc)->index,
  94. };
  95. struct nouveau_display *disp = nouveau_display(crtc->dev);
  96. int ret, retry = 1;
  97. do {
  98. ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args));
  99. if (ret != 0)
  100. return 0;
  101. if (args.scan.vline) {
  102. ret |= DRM_SCANOUTPOS_ACCURATE;
  103. ret |= DRM_SCANOUTPOS_VALID;
  104. break;
  105. }
  106. if (retry) ndelay(crtc->linedur_ns);
  107. } while (retry--);
  108. *hpos = args.scan.hline;
  109. *vpos = calc(args.scan.vblanks, args.scan.vblanke,
  110. args.scan.vtotal, args.scan.vline);
  111. if (stime) *stime = ns_to_ktime(args.scan.time[0]);
  112. if (etime) *etime = ns_to_ktime(args.scan.time[1]);
  113. if (*vpos < 0)
  114. ret |= DRM_SCANOUTPOS_IN_VBLANK;
  115. return ret;
  116. }
  117. int
  118. nouveau_display_scanoutpos(struct drm_device *dev, int head, unsigned int flags,
  119. int *vpos, int *hpos, ktime_t *stime, ktime_t *etime)
  120. {
  121. struct drm_crtc *crtc;
  122. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  123. if (nouveau_crtc(crtc)->index == head) {
  124. return nouveau_display_scanoutpos_head(crtc, vpos, hpos,
  125. stime, etime);
  126. }
  127. }
  128. return 0;
  129. }
  130. int
  131. nouveau_display_vblstamp(struct drm_device *dev, int head, int *max_error,
  132. struct timeval *time, unsigned flags)
  133. {
  134. struct drm_crtc *crtc;
  135. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  136. if (nouveau_crtc(crtc)->index == head) {
  137. return drm_calc_vbltimestamp_from_scanoutpos(dev,
  138. head, max_error, time, flags, crtc,
  139. &crtc->hwmode);
  140. }
  141. }
  142. return -EINVAL;
  143. }
  144. static void
  145. nouveau_display_vblank_fini(struct drm_device *dev)
  146. {
  147. struct drm_crtc *crtc;
  148. drm_vblank_cleanup(dev);
  149. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  150. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  151. nvif_notify_fini(&nv_crtc->vblank);
  152. }
  153. }
  154. static int
  155. nouveau_display_vblank_init(struct drm_device *dev)
  156. {
  157. struct nouveau_display *disp = nouveau_display(dev);
  158. struct drm_crtc *crtc;
  159. int ret;
  160. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  161. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  162. ret = nvif_notify_init(&disp->disp, NULL,
  163. nouveau_display_vblank_handler, false,
  164. NV04_DISP_NTFY_VBLANK,
  165. &(struct nvif_notify_head_req_v0) {
  166. .head = nv_crtc->index,
  167. },
  168. sizeof(struct nvif_notify_head_req_v0),
  169. sizeof(struct nvif_notify_head_rep_v0),
  170. &nv_crtc->vblank);
  171. if (ret) {
  172. nouveau_display_vblank_fini(dev);
  173. return ret;
  174. }
  175. }
  176. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  177. if (ret) {
  178. nouveau_display_vblank_fini(dev);
  179. return ret;
  180. }
  181. return 0;
  182. }
  183. static void
  184. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  185. {
  186. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  187. struct nouveau_display *disp = nouveau_display(drm_fb->dev);
  188. if (disp->fb_dtor)
  189. disp->fb_dtor(drm_fb);
  190. if (fb->nvbo)
  191. drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
  192. drm_framebuffer_cleanup(drm_fb);
  193. kfree(fb);
  194. }
  195. static int
  196. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  197. struct drm_file *file_priv,
  198. unsigned int *handle)
  199. {
  200. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  201. return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
  202. }
  203. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  204. .destroy = nouveau_user_framebuffer_destroy,
  205. .create_handle = nouveau_user_framebuffer_create_handle,
  206. };
  207. int
  208. nouveau_framebuffer_init(struct drm_device *dev,
  209. struct nouveau_framebuffer *nv_fb,
  210. struct drm_mode_fb_cmd2 *mode_cmd,
  211. struct nouveau_bo *nvbo)
  212. {
  213. struct nouveau_display *disp = nouveau_display(dev);
  214. struct drm_framebuffer *fb = &nv_fb->base;
  215. int ret;
  216. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  217. nv_fb->nvbo = nvbo;
  218. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  219. if (ret)
  220. return ret;
  221. if (disp->fb_ctor) {
  222. ret = disp->fb_ctor(fb);
  223. if (ret)
  224. disp->fb_dtor(fb);
  225. }
  226. return ret;
  227. }
  228. static struct drm_framebuffer *
  229. nouveau_user_framebuffer_create(struct drm_device *dev,
  230. struct drm_file *file_priv,
  231. struct drm_mode_fb_cmd2 *mode_cmd)
  232. {
  233. struct nouveau_framebuffer *nouveau_fb;
  234. struct drm_gem_object *gem;
  235. int ret = -ENOMEM;
  236. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  237. if (!gem)
  238. return ERR_PTR(-ENOENT);
  239. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  240. if (!nouveau_fb)
  241. goto err_unref;
  242. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  243. if (ret)
  244. goto err;
  245. return &nouveau_fb->base;
  246. err:
  247. kfree(nouveau_fb);
  248. err_unref:
  249. drm_gem_object_unreference(gem);
  250. return ERR_PTR(ret);
  251. }
  252. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  253. .fb_create = nouveau_user_framebuffer_create,
  254. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  255. };
  256. struct nouveau_drm_prop_enum_list {
  257. u8 gen_mask;
  258. int type;
  259. char *name;
  260. };
  261. static struct nouveau_drm_prop_enum_list underscan[] = {
  262. { 6, UNDERSCAN_AUTO, "auto" },
  263. { 6, UNDERSCAN_OFF, "off" },
  264. { 6, UNDERSCAN_ON, "on" },
  265. {}
  266. };
  267. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  268. { 7, DITHERING_MODE_AUTO, "auto" },
  269. { 7, DITHERING_MODE_OFF, "off" },
  270. { 1, DITHERING_MODE_ON, "on" },
  271. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  272. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  273. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  274. {}
  275. };
  276. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  277. { 6, DITHERING_DEPTH_AUTO, "auto" },
  278. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  279. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  280. {}
  281. };
  282. #define PROP_ENUM(p,gen,n,list) do { \
  283. struct nouveau_drm_prop_enum_list *l = (list); \
  284. int c = 0; \
  285. while (l->gen_mask) { \
  286. if (l->gen_mask & (1 << (gen))) \
  287. c++; \
  288. l++; \
  289. } \
  290. if (c) { \
  291. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  292. l = (list); \
  293. c = 0; \
  294. while (p && l->gen_mask) { \
  295. if (l->gen_mask & (1 << (gen))) { \
  296. drm_property_add_enum(p, c, l->type, l->name); \
  297. c++; \
  298. } \
  299. l++; \
  300. } \
  301. } \
  302. } while(0)
  303. int
  304. nouveau_display_init(struct drm_device *dev)
  305. {
  306. struct nouveau_display *disp = nouveau_display(dev);
  307. struct drm_connector *connector;
  308. int ret;
  309. ret = disp->init(dev);
  310. if (ret)
  311. return ret;
  312. /* enable polling for external displays */
  313. drm_kms_helper_poll_enable(dev);
  314. /* enable hotplug interrupts */
  315. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  316. struct nouveau_connector *conn = nouveau_connector(connector);
  317. nvif_notify_get(&conn->hpd);
  318. }
  319. return ret;
  320. }
  321. void
  322. nouveau_display_fini(struct drm_device *dev)
  323. {
  324. struct nouveau_display *disp = nouveau_display(dev);
  325. struct drm_connector *connector;
  326. int head;
  327. /* Make sure that drm and hw vblank irqs get properly disabled. */
  328. for (head = 0; head < dev->mode_config.num_crtc; head++)
  329. drm_vblank_off(dev, head);
  330. /* disable hotplug interrupts */
  331. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  332. struct nouveau_connector *conn = nouveau_connector(connector);
  333. nvif_notify_put(&conn->hpd);
  334. }
  335. drm_kms_helper_poll_disable(dev);
  336. disp->fini(dev);
  337. }
  338. static void
  339. nouveau_display_create_properties(struct drm_device *dev)
  340. {
  341. struct nouveau_display *disp = nouveau_display(dev);
  342. int gen;
  343. if (disp->disp.oclass < NV50_DISP)
  344. gen = 0;
  345. else
  346. if (disp->disp.oclass < GF110_DISP)
  347. gen = 1;
  348. else
  349. gen = 2;
  350. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  351. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  352. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  353. disp->underscan_hborder_property =
  354. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  355. disp->underscan_vborder_property =
  356. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  357. if (gen < 1)
  358. return;
  359. /* -90..+90 */
  360. disp->vibrant_hue_property =
  361. drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
  362. /* -100..+100 */
  363. disp->color_vibrance_property =
  364. drm_property_create_range(dev, 0, "color vibrance", 0, 200);
  365. }
  366. int
  367. nouveau_display_create(struct drm_device *dev)
  368. {
  369. struct nouveau_drm *drm = nouveau_drm(dev);
  370. struct nouveau_display *disp;
  371. int ret;
  372. disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
  373. if (!disp)
  374. return -ENOMEM;
  375. drm_mode_config_init(dev);
  376. drm_mode_create_scaling_mode_property(dev);
  377. drm_mode_create_dvi_i_properties(dev);
  378. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  379. dev->mode_config.fb_base = nv_device_resource_start(nvxx_device(&drm->device), 1);
  380. dev->mode_config.min_width = 0;
  381. dev->mode_config.min_height = 0;
  382. if (drm->device.info.family < NV_DEVICE_INFO_V0_CELSIUS) {
  383. dev->mode_config.max_width = 2048;
  384. dev->mode_config.max_height = 2048;
  385. } else
  386. if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
  387. dev->mode_config.max_width = 4096;
  388. dev->mode_config.max_height = 4096;
  389. } else {
  390. dev->mode_config.max_width = 8192;
  391. dev->mode_config.max_height = 8192;
  392. }
  393. dev->mode_config.preferred_depth = 24;
  394. dev->mode_config.prefer_shadow = 1;
  395. if (drm->device.info.chipset < 0x11)
  396. dev->mode_config.async_page_flip = false;
  397. else
  398. dev->mode_config.async_page_flip = true;
  399. drm_kms_helper_poll_init(dev);
  400. drm_kms_helper_poll_disable(dev);
  401. if (nouveau_modeset != 2 && drm->vbios.dcb.entries) {
  402. static const u16 oclass[] = {
  403. GM204_DISP,
  404. GM107_DISP,
  405. GK110_DISP,
  406. GK104_DISP,
  407. GF110_DISP,
  408. GT214_DISP,
  409. GT206_DISP,
  410. GT200_DISP,
  411. G82_DISP,
  412. NV50_DISP,
  413. NV04_DISP,
  414. };
  415. int i;
  416. for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) {
  417. ret = nvif_object_init(nvif_object(&drm->device), NULL,
  418. NVDRM_DISPLAY, oclass[i],
  419. NULL, 0, &disp->disp);
  420. }
  421. if (ret == 0) {
  422. nouveau_display_create_properties(dev);
  423. if (disp->disp.oclass < NV50_DISP)
  424. ret = nv04_display_create(dev);
  425. else
  426. ret = nv50_display_create(dev);
  427. }
  428. } else {
  429. ret = 0;
  430. }
  431. if (ret)
  432. goto disp_create_err;
  433. if (dev->mode_config.num_crtc) {
  434. ret = nouveau_display_vblank_init(dev);
  435. if (ret)
  436. goto vblank_err;
  437. }
  438. nouveau_backlight_init(dev);
  439. return 0;
  440. vblank_err:
  441. disp->dtor(dev);
  442. disp_create_err:
  443. drm_kms_helper_poll_fini(dev);
  444. drm_mode_config_cleanup(dev);
  445. return ret;
  446. }
  447. void
  448. nouveau_display_destroy(struct drm_device *dev)
  449. {
  450. struct nouveau_display *disp = nouveau_display(dev);
  451. nouveau_backlight_exit(dev);
  452. nouveau_display_vblank_fini(dev);
  453. drm_kms_helper_poll_fini(dev);
  454. drm_mode_config_cleanup(dev);
  455. if (disp->dtor)
  456. disp->dtor(dev);
  457. nvif_object_fini(&disp->disp);
  458. nouveau_drm(dev)->display = NULL;
  459. kfree(disp);
  460. }
  461. int
  462. nouveau_display_suspend(struct drm_device *dev, bool runtime)
  463. {
  464. struct drm_crtc *crtc;
  465. nouveau_display_fini(dev);
  466. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  467. struct nouveau_framebuffer *nouveau_fb;
  468. nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
  469. if (!nouveau_fb || !nouveau_fb->nvbo)
  470. continue;
  471. nouveau_bo_unpin(nouveau_fb->nvbo);
  472. }
  473. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  474. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  475. if (nv_crtc->cursor.nvbo) {
  476. if (nv_crtc->cursor.set_offset)
  477. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  478. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  479. }
  480. }
  481. return 0;
  482. }
  483. void
  484. nouveau_display_resume(struct drm_device *dev, bool runtime)
  485. {
  486. struct nouveau_drm *drm = nouveau_drm(dev);
  487. struct drm_crtc *crtc;
  488. int ret, head;
  489. /* re-pin fb/cursors */
  490. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  491. struct nouveau_framebuffer *nouveau_fb;
  492. nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
  493. if (!nouveau_fb || !nouveau_fb->nvbo)
  494. continue;
  495. ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM, true);
  496. if (ret)
  497. NV_ERROR(drm, "Could not pin framebuffer\n");
  498. }
  499. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  500. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  501. if (!nv_crtc->cursor.nvbo)
  502. continue;
  503. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, true);
  504. if (!ret && nv_crtc->cursor.set_offset)
  505. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  506. if (ret)
  507. NV_ERROR(drm, "Could not pin/map cursor.\n");
  508. }
  509. nouveau_display_init(dev);
  510. /* Force CLUT to get re-loaded during modeset */
  511. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  512. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  513. nv_crtc->lut.depth = 0;
  514. }
  515. /* Make sure that drm and hw vblank irqs get resumed if needed. */
  516. for (head = 0; head < dev->mode_config.num_crtc; head++)
  517. drm_vblank_on(dev, head);
  518. /* This should ensure we don't hit a locking problem when someone
  519. * wakes us up via a connector. We should never go into suspend
  520. * while the display is on anyways.
  521. */
  522. if (runtime)
  523. return;
  524. drm_helper_resume_force_mode(dev);
  525. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  526. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  527. if (!nv_crtc->cursor.nvbo)
  528. continue;
  529. if (nv_crtc->cursor.set_offset)
  530. nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset);
  531. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  532. nv_crtc->cursor_saved_y);
  533. }
  534. }
  535. static int
  536. nouveau_page_flip_emit(struct nouveau_channel *chan,
  537. struct nouveau_bo *old_bo,
  538. struct nouveau_bo *new_bo,
  539. struct nouveau_page_flip_state *s,
  540. struct nouveau_fence **pfence)
  541. {
  542. struct nouveau_fence_chan *fctx = chan->fence;
  543. struct nouveau_drm *drm = chan->drm;
  544. struct drm_device *dev = drm->dev;
  545. unsigned long flags;
  546. int ret;
  547. /* Queue it to the pending list */
  548. spin_lock_irqsave(&dev->event_lock, flags);
  549. list_add_tail(&s->head, &fctx->flip);
  550. spin_unlock_irqrestore(&dev->event_lock, flags);
  551. /* Synchronize with the old framebuffer */
  552. ret = nouveau_fence_sync(old_bo, chan, false, false);
  553. if (ret)
  554. goto fail;
  555. /* Emit the pageflip */
  556. ret = RING_SPACE(chan, 2);
  557. if (ret)
  558. goto fail;
  559. if (drm->device.info.family < NV_DEVICE_INFO_V0_FERMI)
  560. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  561. else
  562. BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
  563. OUT_RING (chan, 0x00000000);
  564. FIRE_RING (chan);
  565. ret = nouveau_fence_new(chan, false, pfence);
  566. if (ret)
  567. goto fail;
  568. return 0;
  569. fail:
  570. spin_lock_irqsave(&dev->event_lock, flags);
  571. list_del(&s->head);
  572. spin_unlock_irqrestore(&dev->event_lock, flags);
  573. return ret;
  574. }
  575. int
  576. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  577. struct drm_pending_vblank_event *event, u32 flags)
  578. {
  579. const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
  580. struct drm_device *dev = crtc->dev;
  581. struct nouveau_drm *drm = nouveau_drm(dev);
  582. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
  583. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  584. struct nouveau_page_flip_state *s;
  585. struct nouveau_channel *chan;
  586. struct nouveau_cli *cli;
  587. struct nouveau_fence *fence;
  588. int ret;
  589. chan = drm->channel;
  590. if (!chan)
  591. return -ENODEV;
  592. cli = (void *)nvif_client(&chan->device->base);
  593. s = kzalloc(sizeof(*s), GFP_KERNEL);
  594. if (!s)
  595. return -ENOMEM;
  596. if (new_bo != old_bo) {
  597. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM, true);
  598. if (ret)
  599. goto fail_free;
  600. }
  601. mutex_lock(&cli->mutex);
  602. ret = ttm_bo_reserve(&new_bo->bo, true, false, false, NULL);
  603. if (ret)
  604. goto fail_unpin;
  605. /* synchronise rendering channel with the kernel's channel */
  606. ret = nouveau_fence_sync(new_bo, chan, false, true);
  607. if (ret) {
  608. ttm_bo_unreserve(&new_bo->bo);
  609. goto fail_unpin;
  610. }
  611. if (new_bo != old_bo) {
  612. ttm_bo_unreserve(&new_bo->bo);
  613. ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
  614. if (ret)
  615. goto fail_unpin;
  616. }
  617. /* Initialize a page flip struct */
  618. *s = (struct nouveau_page_flip_state)
  619. { { }, event, nouveau_crtc(crtc)->index,
  620. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  621. new_bo->bo.offset };
  622. /* Keep vblanks on during flip, for the target crtc of this flip */
  623. drm_vblank_get(dev, nouveau_crtc(crtc)->index);
  624. /* Emit a page flip */
  625. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  626. ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
  627. if (ret)
  628. goto fail_unreserve;
  629. } else {
  630. struct nv04_display *dispnv04 = nv04_display(dev);
  631. int head = nouveau_crtc(crtc)->index;
  632. if (swap_interval) {
  633. ret = RING_SPACE(chan, 8);
  634. if (ret)
  635. goto fail_unreserve;
  636. BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
  637. OUT_RING (chan, 0);
  638. BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
  639. OUT_RING (chan, head);
  640. BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
  641. OUT_RING (chan, 0);
  642. BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
  643. OUT_RING (chan, 0);
  644. }
  645. nouveau_bo_ref(new_bo, &dispnv04->image[head]);
  646. }
  647. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  648. if (ret)
  649. goto fail_unreserve;
  650. mutex_unlock(&cli->mutex);
  651. /* Update the crtc struct and cleanup */
  652. crtc->primary->fb = fb;
  653. nouveau_bo_fence(old_bo, fence, false);
  654. ttm_bo_unreserve(&old_bo->bo);
  655. if (old_bo != new_bo)
  656. nouveau_bo_unpin(old_bo);
  657. nouveau_fence_unref(&fence);
  658. return 0;
  659. fail_unreserve:
  660. drm_vblank_put(dev, nouveau_crtc(crtc)->index);
  661. ttm_bo_unreserve(&old_bo->bo);
  662. fail_unpin:
  663. mutex_unlock(&cli->mutex);
  664. if (old_bo != new_bo)
  665. nouveau_bo_unpin(new_bo);
  666. fail_free:
  667. kfree(s);
  668. return ret;
  669. }
  670. int
  671. nouveau_finish_page_flip(struct nouveau_channel *chan,
  672. struct nouveau_page_flip_state *ps)
  673. {
  674. struct nouveau_fence_chan *fctx = chan->fence;
  675. struct nouveau_drm *drm = chan->drm;
  676. struct drm_device *dev = drm->dev;
  677. struct nouveau_page_flip_state *s;
  678. unsigned long flags;
  679. int crtcid = -1;
  680. spin_lock_irqsave(&dev->event_lock, flags);
  681. if (list_empty(&fctx->flip)) {
  682. NV_ERROR(drm, "unexpected pageflip\n");
  683. spin_unlock_irqrestore(&dev->event_lock, flags);
  684. return -EINVAL;
  685. }
  686. s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
  687. if (s->event) {
  688. /* Vblank timestamps/counts are only correct on >= NV-50 */
  689. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA)
  690. crtcid = s->crtc;
  691. drm_send_vblank_event(dev, crtcid, s->event);
  692. }
  693. /* Give up ownership of vblank for page-flipped crtc */
  694. drm_vblank_put(dev, s->crtc);
  695. list_del(&s->head);
  696. if (ps)
  697. *ps = *s;
  698. kfree(s);
  699. spin_unlock_irqrestore(&dev->event_lock, flags);
  700. return 0;
  701. }
  702. int
  703. nouveau_flip_complete(void *data)
  704. {
  705. struct nouveau_channel *chan = data;
  706. struct nouveau_drm *drm = chan->drm;
  707. struct nouveau_page_flip_state state;
  708. if (!nouveau_finish_page_flip(chan, &state)) {
  709. if (drm->device.info.family < NV_DEVICE_INFO_V0_TESLA) {
  710. nv_set_crtc_base(drm->dev, state.crtc, state.offset +
  711. state.y * state.pitch +
  712. state.x * state.bpp / 8);
  713. }
  714. }
  715. return 0;
  716. }
  717. int
  718. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  719. struct drm_mode_create_dumb *args)
  720. {
  721. struct nouveau_bo *bo;
  722. uint32_t domain;
  723. int ret;
  724. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  725. args->size = args->pitch * args->height;
  726. args->size = roundup(args->size, PAGE_SIZE);
  727. /* Use VRAM if there is any ; otherwise fallback to system memory */
  728. if (nouveau_drm(dev)->device.info.ram_size != 0)
  729. domain = NOUVEAU_GEM_DOMAIN_VRAM;
  730. else
  731. domain = NOUVEAU_GEM_DOMAIN_GART;
  732. ret = nouveau_gem_new(dev, args->size, 0, domain, 0, 0, &bo);
  733. if (ret)
  734. return ret;
  735. ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
  736. drm_gem_object_unreference_unlocked(&bo->gem);
  737. return ret;
  738. }
  739. int
  740. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  741. struct drm_device *dev,
  742. uint32_t handle, uint64_t *poffset)
  743. {
  744. struct drm_gem_object *gem;
  745. gem = drm_gem_object_lookup(dev, file_priv, handle);
  746. if (gem) {
  747. struct nouveau_bo *bo = nouveau_gem_object(gem);
  748. *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
  749. drm_gem_object_unreference_unlocked(gem);
  750. return 0;
  751. }
  752. return -ENOENT;
  753. }