intel_dvo.c 16 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. */
  27. #include <linux/i2c.h>
  28. #include <linux/slab.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm_atomic_helper.h>
  31. #include <drm/drm_crtc.h>
  32. #include "intel_drv.h"
  33. #include <drm/i915_drm.h>
  34. #include "i915_drv.h"
  35. #include "dvo.h"
  36. #define SIL164_ADDR 0x38
  37. #define CH7xxx_ADDR 0x76
  38. #define TFP410_ADDR 0x38
  39. #define NS2501_ADDR 0x38
  40. static const struct intel_dvo_device intel_dvo_devices[] = {
  41. {
  42. .type = INTEL_DVO_CHIP_TMDS,
  43. .name = "sil164",
  44. .dvo_reg = DVOC,
  45. .slave_addr = SIL164_ADDR,
  46. .dev_ops = &sil164_ops,
  47. },
  48. {
  49. .type = INTEL_DVO_CHIP_TMDS,
  50. .name = "ch7xxx",
  51. .dvo_reg = DVOC,
  52. .slave_addr = CH7xxx_ADDR,
  53. .dev_ops = &ch7xxx_ops,
  54. },
  55. {
  56. .type = INTEL_DVO_CHIP_TMDS,
  57. .name = "ch7xxx",
  58. .dvo_reg = DVOC,
  59. .slave_addr = 0x75, /* For some ch7010 */
  60. .dev_ops = &ch7xxx_ops,
  61. },
  62. {
  63. .type = INTEL_DVO_CHIP_LVDS,
  64. .name = "ivch",
  65. .dvo_reg = DVOA,
  66. .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  67. .dev_ops = &ivch_ops,
  68. },
  69. {
  70. .type = INTEL_DVO_CHIP_TMDS,
  71. .name = "tfp410",
  72. .dvo_reg = DVOC,
  73. .slave_addr = TFP410_ADDR,
  74. .dev_ops = &tfp410_ops,
  75. },
  76. {
  77. .type = INTEL_DVO_CHIP_LVDS,
  78. .name = "ch7017",
  79. .dvo_reg = DVOC,
  80. .slave_addr = 0x75,
  81. .gpio = GMBUS_PORT_DPB,
  82. .dev_ops = &ch7017_ops,
  83. },
  84. {
  85. .type = INTEL_DVO_CHIP_TMDS,
  86. .name = "ns2501",
  87. .dvo_reg = DVOB,
  88. .slave_addr = NS2501_ADDR,
  89. .dev_ops = &ns2501_ops,
  90. }
  91. };
  92. struct intel_dvo {
  93. struct intel_encoder base;
  94. struct intel_dvo_device dev;
  95. struct drm_display_mode *panel_fixed_mode;
  96. bool panel_wants_dither;
  97. };
  98. static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
  99. {
  100. return container_of(encoder, struct intel_dvo, base);
  101. }
  102. static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
  103. {
  104. return enc_to_dvo(intel_attached_encoder(connector));
  105. }
  106. static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
  107. {
  108. struct drm_device *dev = connector->base.dev;
  109. struct drm_i915_private *dev_priv = dev->dev_private;
  110. struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
  111. u32 tmp;
  112. tmp = I915_READ(intel_dvo->dev.dvo_reg);
  113. if (!(tmp & DVO_ENABLE))
  114. return false;
  115. return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
  116. }
  117. static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
  118. enum pipe *pipe)
  119. {
  120. struct drm_device *dev = encoder->base.dev;
  121. struct drm_i915_private *dev_priv = dev->dev_private;
  122. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  123. u32 tmp;
  124. tmp = I915_READ(intel_dvo->dev.dvo_reg);
  125. if (!(tmp & DVO_ENABLE))
  126. return false;
  127. *pipe = PORT_TO_PIPE(tmp);
  128. return true;
  129. }
  130. static void intel_dvo_get_config(struct intel_encoder *encoder,
  131. struct intel_crtc_state *pipe_config)
  132. {
  133. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  134. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  135. u32 tmp, flags = 0;
  136. tmp = I915_READ(intel_dvo->dev.dvo_reg);
  137. if (tmp & DVO_HSYNC_ACTIVE_HIGH)
  138. flags |= DRM_MODE_FLAG_PHSYNC;
  139. else
  140. flags |= DRM_MODE_FLAG_NHSYNC;
  141. if (tmp & DVO_VSYNC_ACTIVE_HIGH)
  142. flags |= DRM_MODE_FLAG_PVSYNC;
  143. else
  144. flags |= DRM_MODE_FLAG_NVSYNC;
  145. pipe_config->base.adjusted_mode.flags |= flags;
  146. pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
  147. }
  148. static void intel_disable_dvo(struct intel_encoder *encoder)
  149. {
  150. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  151. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  152. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  153. u32 temp = I915_READ(dvo_reg);
  154. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  155. I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
  156. I915_READ(dvo_reg);
  157. }
  158. static void intel_enable_dvo(struct intel_encoder *encoder)
  159. {
  160. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  161. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  162. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  163. u32 dvo_reg = intel_dvo->dev.dvo_reg;
  164. u32 temp = I915_READ(dvo_reg);
  165. intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
  166. &crtc->config->base.mode,
  167. &crtc->config->base.adjusted_mode);
  168. I915_WRITE(dvo_reg, temp | DVO_ENABLE);
  169. I915_READ(dvo_reg);
  170. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  171. }
  172. /* Special dpms function to support cloning between dvo/sdvo/crt. */
  173. static void intel_dvo_dpms(struct drm_connector *connector, int mode)
  174. {
  175. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  176. struct drm_crtc *crtc;
  177. struct intel_crtc_state *config;
  178. /* dvo supports only 2 dpms states. */
  179. if (mode != DRM_MODE_DPMS_ON)
  180. mode = DRM_MODE_DPMS_OFF;
  181. if (mode == connector->dpms)
  182. return;
  183. connector->dpms = mode;
  184. /* Only need to change hw state when actually enabled */
  185. crtc = intel_dvo->base.base.crtc;
  186. if (!crtc) {
  187. intel_dvo->base.connectors_active = false;
  188. return;
  189. }
  190. /* We call connector dpms manually below in case pipe dpms doesn't
  191. * change due to cloning. */
  192. if (mode == DRM_MODE_DPMS_ON) {
  193. config = to_intel_crtc(crtc)->config;
  194. intel_dvo->base.connectors_active = true;
  195. intel_crtc_update_dpms(crtc);
  196. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
  197. } else {
  198. intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
  199. intel_dvo->base.connectors_active = false;
  200. intel_crtc_update_dpms(crtc);
  201. }
  202. intel_modeset_check_state(connector->dev);
  203. }
  204. static enum drm_mode_status
  205. intel_dvo_mode_valid(struct drm_connector *connector,
  206. struct drm_display_mode *mode)
  207. {
  208. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  209. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  210. return MODE_NO_DBLESCAN;
  211. /* XXX: Validate clock range */
  212. if (intel_dvo->panel_fixed_mode) {
  213. if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
  214. return MODE_PANEL;
  215. if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
  216. return MODE_PANEL;
  217. }
  218. return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
  219. }
  220. static bool intel_dvo_compute_config(struct intel_encoder *encoder,
  221. struct intel_crtc_state *pipe_config)
  222. {
  223. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  224. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  225. /* If we have timings from the BIOS for the panel, put them in
  226. * to the adjusted mode. The CRTC will be set up for this mode,
  227. * with the panel scaling set up to source from the H/VDisplay
  228. * of the original mode.
  229. */
  230. if (intel_dvo->panel_fixed_mode != NULL) {
  231. #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
  232. C(hdisplay);
  233. C(hsync_start);
  234. C(hsync_end);
  235. C(htotal);
  236. C(vdisplay);
  237. C(vsync_start);
  238. C(vsync_end);
  239. C(vtotal);
  240. C(clock);
  241. #undef C
  242. drm_mode_set_crtcinfo(adjusted_mode, 0);
  243. }
  244. return true;
  245. }
  246. static void intel_dvo_pre_enable(struct intel_encoder *encoder)
  247. {
  248. struct drm_device *dev = encoder->base.dev;
  249. struct drm_i915_private *dev_priv = dev->dev_private;
  250. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  251. struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
  252. struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
  253. int pipe = crtc->pipe;
  254. u32 dvo_val;
  255. u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
  256. switch (dvo_reg) {
  257. case DVOA:
  258. default:
  259. dvo_srcdim_reg = DVOA_SRCDIM;
  260. break;
  261. case DVOB:
  262. dvo_srcdim_reg = DVOB_SRCDIM;
  263. break;
  264. case DVOC:
  265. dvo_srcdim_reg = DVOC_SRCDIM;
  266. break;
  267. }
  268. /* Save the data order, since I don't know what it should be set to. */
  269. dvo_val = I915_READ(dvo_reg) &
  270. (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
  271. dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
  272. DVO_BLANK_ACTIVE_HIGH;
  273. if (pipe == 1)
  274. dvo_val |= DVO_PIPE_B_SELECT;
  275. dvo_val |= DVO_PIPE_STALL;
  276. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  277. dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
  278. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  279. dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
  280. /*I915_WRITE(DVOB_SRCDIM,
  281. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  282. (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
  283. I915_WRITE(dvo_srcdim_reg,
  284. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  285. (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
  286. /*I915_WRITE(DVOB, dvo_val);*/
  287. I915_WRITE(dvo_reg, dvo_val);
  288. }
  289. /**
  290. * Detect the output connection on our DVO device.
  291. *
  292. * Unimplemented.
  293. */
  294. static enum drm_connector_status
  295. intel_dvo_detect(struct drm_connector *connector, bool force)
  296. {
  297. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  298. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
  299. connector->base.id, connector->name);
  300. return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
  301. }
  302. static int intel_dvo_get_modes(struct drm_connector *connector)
  303. {
  304. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  305. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  306. /* We should probably have an i2c driver get_modes function for those
  307. * devices which will have a fixed set of modes determined by the chip
  308. * (TV-out, for example), but for now with just TMDS and LVDS,
  309. * that's not the case.
  310. */
  311. intel_ddc_get_modes(connector,
  312. intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
  313. if (!list_empty(&connector->probed_modes))
  314. return 1;
  315. if (intel_dvo->panel_fixed_mode != NULL) {
  316. struct drm_display_mode *mode;
  317. mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
  318. if (mode) {
  319. drm_mode_probed_add(connector, mode);
  320. return 1;
  321. }
  322. }
  323. return 0;
  324. }
  325. static void intel_dvo_destroy(struct drm_connector *connector)
  326. {
  327. drm_connector_cleanup(connector);
  328. kfree(connector);
  329. }
  330. static const struct drm_connector_funcs intel_dvo_connector_funcs = {
  331. .dpms = intel_dvo_dpms,
  332. .detect = intel_dvo_detect,
  333. .destroy = intel_dvo_destroy,
  334. .fill_modes = drm_helper_probe_single_connector_modes,
  335. .atomic_get_property = intel_connector_atomic_get_property,
  336. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  337. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  338. };
  339. static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
  340. .mode_valid = intel_dvo_mode_valid,
  341. .get_modes = intel_dvo_get_modes,
  342. .best_encoder = intel_best_encoder,
  343. };
  344. static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
  345. {
  346. struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
  347. if (intel_dvo->dev.dev_ops->destroy)
  348. intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
  349. kfree(intel_dvo->panel_fixed_mode);
  350. intel_encoder_destroy(encoder);
  351. }
  352. static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
  353. .destroy = intel_dvo_enc_destroy,
  354. };
  355. /**
  356. * Attempts to get a fixed panel timing for LVDS (currently only the i830).
  357. *
  358. * Other chips with DVO LVDS will need to extend this to deal with the LVDS
  359. * chip being on DVOB/C and having multiple pipes.
  360. */
  361. static struct drm_display_mode *
  362. intel_dvo_get_current_mode(struct drm_connector *connector)
  363. {
  364. struct drm_device *dev = connector->dev;
  365. struct drm_i915_private *dev_priv = dev->dev_private;
  366. struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
  367. uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
  368. struct drm_display_mode *mode = NULL;
  369. /* If the DVO port is active, that'll be the LVDS, so we can pull out
  370. * its timings to get how the BIOS set up the panel.
  371. */
  372. if (dvo_val & DVO_ENABLE) {
  373. struct drm_crtc *crtc;
  374. int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
  375. crtc = intel_get_crtc_for_pipe(dev, pipe);
  376. if (crtc) {
  377. mode = intel_crtc_mode_get(dev, crtc);
  378. if (mode) {
  379. mode->type |= DRM_MODE_TYPE_PREFERRED;
  380. if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
  381. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  382. if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
  383. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  384. }
  385. }
  386. }
  387. return mode;
  388. }
  389. void intel_dvo_init(struct drm_device *dev)
  390. {
  391. struct drm_i915_private *dev_priv = dev->dev_private;
  392. struct intel_encoder *intel_encoder;
  393. struct intel_dvo *intel_dvo;
  394. struct intel_connector *intel_connector;
  395. int i;
  396. int encoder_type = DRM_MODE_ENCODER_NONE;
  397. intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
  398. if (!intel_dvo)
  399. return;
  400. intel_connector = intel_connector_alloc();
  401. if (!intel_connector) {
  402. kfree(intel_dvo);
  403. return;
  404. }
  405. intel_encoder = &intel_dvo->base;
  406. drm_encoder_init(dev, &intel_encoder->base,
  407. &intel_dvo_enc_funcs, encoder_type);
  408. intel_encoder->disable = intel_disable_dvo;
  409. intel_encoder->enable = intel_enable_dvo;
  410. intel_encoder->get_hw_state = intel_dvo_get_hw_state;
  411. intel_encoder->get_config = intel_dvo_get_config;
  412. intel_encoder->compute_config = intel_dvo_compute_config;
  413. intel_encoder->pre_enable = intel_dvo_pre_enable;
  414. intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
  415. intel_connector->unregister = intel_connector_unregister;
  416. /* Now, try to find a controller */
  417. for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
  418. struct drm_connector *connector = &intel_connector->base;
  419. const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
  420. struct i2c_adapter *i2c;
  421. int gpio;
  422. bool dvoinit;
  423. /* Allow the I2C driver info to specify the GPIO to be used in
  424. * special cases, but otherwise default to what's defined
  425. * in the spec.
  426. */
  427. if (intel_gmbus_is_port_valid(dvo->gpio))
  428. gpio = dvo->gpio;
  429. else if (dvo->type == INTEL_DVO_CHIP_LVDS)
  430. gpio = GMBUS_PORT_SSC;
  431. else
  432. gpio = GMBUS_PORT_DPB;
  433. /* Set up the I2C bus necessary for the chip we're probing.
  434. * It appears that everything is on GPIOE except for panels
  435. * on i830 laptops, which are on GPIOB (DVOA).
  436. */
  437. i2c = intel_gmbus_get_adapter(dev_priv, gpio);
  438. intel_dvo->dev = *dvo;
  439. /* GMBUS NAK handling seems to be unstable, hence let the
  440. * transmitter detection run in bit banging mode for now.
  441. */
  442. intel_gmbus_force_bit(i2c, true);
  443. dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
  444. intel_gmbus_force_bit(i2c, false);
  445. if (!dvoinit)
  446. continue;
  447. intel_encoder->type = INTEL_OUTPUT_DVO;
  448. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  449. switch (dvo->type) {
  450. case INTEL_DVO_CHIP_TMDS:
  451. intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
  452. (1 << INTEL_OUTPUT_DVO);
  453. drm_connector_init(dev, connector,
  454. &intel_dvo_connector_funcs,
  455. DRM_MODE_CONNECTOR_DVII);
  456. encoder_type = DRM_MODE_ENCODER_TMDS;
  457. break;
  458. case INTEL_DVO_CHIP_LVDS:
  459. intel_encoder->cloneable = 0;
  460. drm_connector_init(dev, connector,
  461. &intel_dvo_connector_funcs,
  462. DRM_MODE_CONNECTOR_LVDS);
  463. encoder_type = DRM_MODE_ENCODER_LVDS;
  464. break;
  465. }
  466. drm_connector_helper_add(connector,
  467. &intel_dvo_connector_helper_funcs);
  468. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  469. connector->interlace_allowed = false;
  470. connector->doublescan_allowed = false;
  471. intel_connector_attach_encoder(intel_connector, intel_encoder);
  472. if (dvo->type == INTEL_DVO_CHIP_LVDS) {
  473. /* For our LVDS chipsets, we should hopefully be able
  474. * to dig the fixed panel mode out of the BIOS data.
  475. * However, it's in a different format from the BIOS
  476. * data on chipsets with integrated LVDS (stored in AIM
  477. * headers, likely), so for now, just get the current
  478. * mode being output through DVO.
  479. */
  480. intel_dvo->panel_fixed_mode =
  481. intel_dvo_get_current_mode(connector);
  482. intel_dvo->panel_wants_dither = true;
  483. }
  484. drm_connector_register(connector);
  485. return;
  486. }
  487. drm_encoder_cleanup(&intel_encoder->base);
  488. kfree(intel_dvo);
  489. kfree(intel_connector);
  490. }