intel_dp_mst.c 17 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  35. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  36. struct intel_dp *intel_dp = &intel_dig_port->dp;
  37. struct drm_atomic_state *state;
  38. int bpp, i;
  39. int lane_count, slots, rate;
  40. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  41. struct intel_connector *found = NULL;
  42. int mst_pbn;
  43. pipe_config->dp_encoder_is_mst = true;
  44. pipe_config->has_pch_encoder = false;
  45. pipe_config->has_dp_encoder = true;
  46. bpp = 24;
  47. /*
  48. * for MST we always configure max link bw - the spec doesn't
  49. * seem to suggest we should do otherwise.
  50. */
  51. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  52. rate = intel_dp_max_link_rate(intel_dp);
  53. if (intel_dp->num_sink_rates) {
  54. intel_dp->link_bw = 0;
  55. intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate);
  56. } else {
  57. intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate);
  58. intel_dp->rate_select = 0;
  59. }
  60. intel_dp->lane_count = lane_count;
  61. pipe_config->pipe_bpp = 24;
  62. pipe_config->port_clock = rate;
  63. state = pipe_config->base.state;
  64. for (i = 0; i < state->num_connector; i++) {
  65. if (!state->connectors[i])
  66. continue;
  67. if (state->connector_states[i]->best_encoder == &encoder->base) {
  68. found = to_intel_connector(state->connectors[i]);
  69. break;
  70. }
  71. }
  72. if (!found) {
  73. DRM_ERROR("can't find connector\n");
  74. return false;
  75. }
  76. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
  77. pipe_config->pbn = mst_pbn;
  78. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  79. intel_link_compute_m_n(bpp, lane_count,
  80. adjusted_mode->crtc_clock,
  81. pipe_config->port_clock,
  82. &pipe_config->dp_m_n);
  83. pipe_config->dp_m_n.tu = slots;
  84. return true;
  85. }
  86. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  87. {
  88. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  89. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  90. struct intel_dp *intel_dp = &intel_dig_port->dp;
  91. int ret;
  92. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  93. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  94. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  95. if (ret) {
  96. DRM_ERROR("failed to update payload %d\n", ret);
  97. }
  98. }
  99. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  100. {
  101. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  102. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  103. struct intel_dp *intel_dp = &intel_dig_port->dp;
  104. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  105. /* this can fail */
  106. drm_dp_check_act_status(&intel_dp->mst_mgr);
  107. /* and this can also fail */
  108. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  109. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  110. intel_dp->active_mst_links--;
  111. intel_mst->port = NULL;
  112. if (intel_dp->active_mst_links == 0) {
  113. intel_dig_port->base.post_disable(&intel_dig_port->base);
  114. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  115. }
  116. }
  117. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  118. {
  119. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  120. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  121. struct intel_dp *intel_dp = &intel_dig_port->dp;
  122. struct drm_device *dev = encoder->base.dev;
  123. struct drm_i915_private *dev_priv = dev->dev_private;
  124. enum port port = intel_dig_port->port;
  125. int ret;
  126. uint32_t temp;
  127. struct intel_connector *found = NULL, *intel_connector;
  128. int slots;
  129. struct drm_crtc *crtc = encoder->base.crtc;
  130. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  131. for_each_intel_connector(dev, intel_connector) {
  132. if (intel_connector->new_encoder == encoder) {
  133. found = intel_connector;
  134. break;
  135. }
  136. }
  137. if (!found) {
  138. DRM_ERROR("can't find connector\n");
  139. return;
  140. }
  141. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  142. intel_mst->port = found->port;
  143. if (intel_dp->active_mst_links == 0) {
  144. enum port port = intel_ddi_get_encoder_port(encoder);
  145. I915_WRITE(PORT_CLK_SEL(port),
  146. intel_crtc->config->ddi_pll_sel);
  147. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  148. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  149. intel_dp_start_link_train(intel_dp);
  150. intel_dp_complete_link_train(intel_dp);
  151. intel_dp_stop_link_train(intel_dp);
  152. }
  153. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  154. intel_mst->port,
  155. intel_crtc->config->pbn, &slots);
  156. if (ret == false) {
  157. DRM_ERROR("failed to allocate vcpi\n");
  158. return;
  159. }
  160. intel_dp->active_mst_links++;
  161. temp = I915_READ(DP_TP_STATUS(port));
  162. I915_WRITE(DP_TP_STATUS(port), temp);
  163. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  164. }
  165. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  166. {
  167. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  168. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  169. struct intel_dp *intel_dp = &intel_dig_port->dp;
  170. struct drm_device *dev = intel_dig_port->base.base.dev;
  171. struct drm_i915_private *dev_priv = dev->dev_private;
  172. enum port port = intel_dig_port->port;
  173. int ret;
  174. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  175. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  176. 1))
  177. DRM_ERROR("Timed out waiting for ACT sent\n");
  178. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  179. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  180. }
  181. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  182. enum pipe *pipe)
  183. {
  184. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  185. *pipe = intel_mst->pipe;
  186. if (intel_mst->port)
  187. return true;
  188. return false;
  189. }
  190. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  191. struct intel_crtc_state *pipe_config)
  192. {
  193. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  194. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  195. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  196. struct drm_device *dev = encoder->base.dev;
  197. struct drm_i915_private *dev_priv = dev->dev_private;
  198. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  199. u32 temp, flags = 0;
  200. pipe_config->has_dp_encoder = true;
  201. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  202. if (temp & TRANS_DDI_PHSYNC)
  203. flags |= DRM_MODE_FLAG_PHSYNC;
  204. else
  205. flags |= DRM_MODE_FLAG_NHSYNC;
  206. if (temp & TRANS_DDI_PVSYNC)
  207. flags |= DRM_MODE_FLAG_PVSYNC;
  208. else
  209. flags |= DRM_MODE_FLAG_NVSYNC;
  210. switch (temp & TRANS_DDI_BPC_MASK) {
  211. case TRANS_DDI_BPC_6:
  212. pipe_config->pipe_bpp = 18;
  213. break;
  214. case TRANS_DDI_BPC_8:
  215. pipe_config->pipe_bpp = 24;
  216. break;
  217. case TRANS_DDI_BPC_10:
  218. pipe_config->pipe_bpp = 30;
  219. break;
  220. case TRANS_DDI_BPC_12:
  221. pipe_config->pipe_bpp = 36;
  222. break;
  223. default:
  224. break;
  225. }
  226. pipe_config->base.adjusted_mode.flags |= flags;
  227. intel_dp_get_m_n(crtc, pipe_config);
  228. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  229. }
  230. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  231. {
  232. struct intel_connector *intel_connector = to_intel_connector(connector);
  233. struct intel_dp *intel_dp = intel_connector->mst_port;
  234. struct edid *edid;
  235. int ret;
  236. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  237. if (!edid)
  238. return 0;
  239. ret = intel_connector_update_modes(connector, edid);
  240. kfree(edid);
  241. return ret;
  242. }
  243. static enum drm_connector_status
  244. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  245. {
  246. struct intel_connector *intel_connector = to_intel_connector(connector);
  247. struct intel_dp *intel_dp = intel_connector->mst_port;
  248. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  249. }
  250. static int
  251. intel_dp_mst_set_property(struct drm_connector *connector,
  252. struct drm_property *property,
  253. uint64_t val)
  254. {
  255. return 0;
  256. }
  257. static void
  258. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  259. {
  260. struct intel_connector *intel_connector = to_intel_connector(connector);
  261. if (!IS_ERR_OR_NULL(intel_connector->edid))
  262. kfree(intel_connector->edid);
  263. drm_connector_cleanup(connector);
  264. kfree(connector);
  265. }
  266. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  267. .dpms = intel_connector_dpms,
  268. .detect = intel_dp_mst_detect,
  269. .fill_modes = drm_helper_probe_single_connector_modes,
  270. .set_property = intel_dp_mst_set_property,
  271. .atomic_get_property = intel_connector_atomic_get_property,
  272. .destroy = intel_dp_mst_connector_destroy,
  273. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  274. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  275. };
  276. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  277. {
  278. return intel_dp_mst_get_ddc_modes(connector);
  279. }
  280. static enum drm_mode_status
  281. intel_dp_mst_mode_valid(struct drm_connector *connector,
  282. struct drm_display_mode *mode)
  283. {
  284. /* TODO - validate mode against available PBN for link */
  285. if (mode->clock < 10000)
  286. return MODE_CLOCK_LOW;
  287. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  288. return MODE_H_ILLEGAL;
  289. return MODE_OK;
  290. }
  291. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  292. {
  293. struct intel_connector *intel_connector = to_intel_connector(connector);
  294. struct intel_dp *intel_dp = intel_connector->mst_port;
  295. return &intel_dp->mst_encoders[0]->base.base;
  296. }
  297. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  298. .get_modes = intel_dp_mst_get_modes,
  299. .mode_valid = intel_dp_mst_mode_valid,
  300. .best_encoder = intel_mst_best_encoder,
  301. };
  302. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  303. {
  304. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  305. drm_encoder_cleanup(encoder);
  306. kfree(intel_mst);
  307. }
  308. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  309. .destroy = intel_dp_mst_encoder_destroy,
  310. };
  311. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  312. {
  313. if (connector->encoder) {
  314. enum pipe pipe;
  315. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  316. return false;
  317. return true;
  318. }
  319. return false;
  320. }
  321. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  322. {
  323. #ifdef CONFIG_DRM_I915_FBDEV
  324. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  325. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
  326. #endif
  327. }
  328. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  329. {
  330. #ifdef CONFIG_DRM_I915_FBDEV
  331. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  332. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
  333. #endif
  334. }
  335. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  336. {
  337. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  338. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  339. struct drm_device *dev = intel_dig_port->base.base.dev;
  340. struct intel_connector *intel_connector;
  341. struct drm_connector *connector;
  342. int i;
  343. intel_connector = intel_connector_alloc();
  344. if (!intel_connector)
  345. return NULL;
  346. connector = &intel_connector->base;
  347. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  348. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  349. intel_connector->unregister = intel_connector_unregister;
  350. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  351. intel_connector->mst_port = intel_dp;
  352. intel_connector->port = port;
  353. for (i = PIPE_A; i <= PIPE_C; i++) {
  354. drm_mode_connector_attach_encoder(&intel_connector->base,
  355. &intel_dp->mst_encoders[i]->base.base);
  356. }
  357. intel_dp_add_properties(intel_dp, connector);
  358. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  359. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  360. drm_mode_connector_set_path_property(connector, pathprop);
  361. drm_reinit_primary_mode_group(dev);
  362. mutex_lock(&dev->mode_config.mutex);
  363. intel_connector_add_to_fbdev(intel_connector);
  364. mutex_unlock(&dev->mode_config.mutex);
  365. drm_connector_register(&intel_connector->base);
  366. return connector;
  367. }
  368. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  369. struct drm_connector *connector)
  370. {
  371. struct intel_connector *intel_connector = to_intel_connector(connector);
  372. struct drm_device *dev = connector->dev;
  373. /* need to nuke the connector */
  374. mutex_lock(&dev->mode_config.mutex);
  375. intel_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  376. mutex_unlock(&dev->mode_config.mutex);
  377. intel_connector->unregister(intel_connector);
  378. mutex_lock(&dev->mode_config.mutex);
  379. intel_connector_remove_from_fbdev(intel_connector);
  380. drm_connector_cleanup(connector);
  381. mutex_unlock(&dev->mode_config.mutex);
  382. drm_reinit_primary_mode_group(dev);
  383. kfree(intel_connector);
  384. DRM_DEBUG_KMS("\n");
  385. }
  386. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  387. {
  388. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  389. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  390. struct drm_device *dev = intel_dig_port->base.base.dev;
  391. drm_kms_helper_hotplug_event(dev);
  392. }
  393. static struct drm_dp_mst_topology_cbs mst_cbs = {
  394. .add_connector = intel_dp_add_mst_connector,
  395. .destroy_connector = intel_dp_destroy_mst_connector,
  396. .hotplug = intel_dp_mst_hotplug,
  397. };
  398. static struct intel_dp_mst_encoder *
  399. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  400. {
  401. struct intel_dp_mst_encoder *intel_mst;
  402. struct intel_encoder *intel_encoder;
  403. struct drm_device *dev = intel_dig_port->base.base.dev;
  404. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  405. if (!intel_mst)
  406. return NULL;
  407. intel_mst->pipe = pipe;
  408. intel_encoder = &intel_mst->base;
  409. intel_mst->primary = intel_dig_port;
  410. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  411. DRM_MODE_ENCODER_DPMST);
  412. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  413. intel_encoder->crtc_mask = 0x7;
  414. intel_encoder->cloneable = 0;
  415. intel_encoder->compute_config = intel_dp_mst_compute_config;
  416. intel_encoder->disable = intel_mst_disable_dp;
  417. intel_encoder->post_disable = intel_mst_post_disable_dp;
  418. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  419. intel_encoder->enable = intel_mst_enable_dp;
  420. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  421. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  422. return intel_mst;
  423. }
  424. static bool
  425. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  426. {
  427. int i;
  428. struct intel_dp *intel_dp = &intel_dig_port->dp;
  429. for (i = PIPE_A; i <= PIPE_C; i++)
  430. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  431. return true;
  432. }
  433. int
  434. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  435. {
  436. struct intel_dp *intel_dp = &intel_dig_port->dp;
  437. struct drm_device *dev = intel_dig_port->base.base.dev;
  438. int ret;
  439. intel_dp->can_mst = true;
  440. intel_dp->mst_mgr.cbs = &mst_cbs;
  441. /* create encoders */
  442. intel_dp_create_fake_mst_encoders(intel_dig_port);
  443. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  444. if (ret) {
  445. intel_dp->can_mst = false;
  446. return ret;
  447. }
  448. return 0;
  449. }
  450. void
  451. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  452. {
  453. struct intel_dp *intel_dp = &intel_dig_port->dp;
  454. if (!intel_dp->can_mst)
  455. return;
  456. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  457. /* encoders will get killed by normal cleanup */
  458. }