i915_gem_render_state.c 4.1 KB

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  1. /*
  2. * Copyright © 2014 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Mika Kuoppala <mika.kuoppala@intel.com>
  25. *
  26. */
  27. #include "i915_drv.h"
  28. #include "intel_renderstate.h"
  29. static const struct intel_renderstate_rodata *
  30. render_state_get_rodata(struct drm_device *dev, const int gen)
  31. {
  32. switch (gen) {
  33. case 6:
  34. return &gen6_null_state;
  35. case 7:
  36. return &gen7_null_state;
  37. case 8:
  38. return &gen8_null_state;
  39. case 9:
  40. return &gen9_null_state;
  41. }
  42. return NULL;
  43. }
  44. static int render_state_init(struct render_state *so, struct drm_device *dev)
  45. {
  46. int ret;
  47. so->gen = INTEL_INFO(dev)->gen;
  48. so->rodata = render_state_get_rodata(dev, so->gen);
  49. if (so->rodata == NULL)
  50. return 0;
  51. if (so->rodata->batch_items * 4 > 4096)
  52. return -EINVAL;
  53. so->obj = i915_gem_alloc_object(dev, 4096);
  54. if (so->obj == NULL)
  55. return -ENOMEM;
  56. ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
  57. if (ret)
  58. goto free_gem;
  59. so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
  60. return 0;
  61. free_gem:
  62. drm_gem_object_unreference(&so->obj->base);
  63. return ret;
  64. }
  65. static int render_state_setup(struct render_state *so)
  66. {
  67. const struct intel_renderstate_rodata *rodata = so->rodata;
  68. unsigned int i = 0, reloc_index = 0;
  69. struct page *page;
  70. u32 *d;
  71. int ret;
  72. ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
  73. if (ret)
  74. return ret;
  75. page = sg_page(so->obj->pages->sgl);
  76. d = kmap(page);
  77. while (i < rodata->batch_items) {
  78. u32 s = rodata->batch[i];
  79. if (i * 4 == rodata->reloc[reloc_index]) {
  80. u64 r = s + so->ggtt_offset;
  81. s = lower_32_bits(r);
  82. if (so->gen >= 8) {
  83. if (i + 1 >= rodata->batch_items ||
  84. rodata->batch[i + 1] != 0)
  85. return -EINVAL;
  86. d[i++] = s;
  87. s = upper_32_bits(r);
  88. }
  89. reloc_index++;
  90. }
  91. d[i++] = s;
  92. }
  93. kunmap(page);
  94. ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
  95. if (ret)
  96. return ret;
  97. if (rodata->reloc[reloc_index] != -1) {
  98. DRM_ERROR("only %d relocs resolved\n", reloc_index);
  99. return -EINVAL;
  100. }
  101. return 0;
  102. }
  103. void i915_gem_render_state_fini(struct render_state *so)
  104. {
  105. i915_gem_object_ggtt_unpin(so->obj);
  106. drm_gem_object_unreference(&so->obj->base);
  107. }
  108. int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
  109. struct render_state *so)
  110. {
  111. int ret;
  112. if (WARN_ON(ring->id != RCS))
  113. return -ENOENT;
  114. ret = render_state_init(so, ring->dev);
  115. if (ret)
  116. return ret;
  117. if (so->rodata == NULL)
  118. return 0;
  119. ret = render_state_setup(so);
  120. if (ret) {
  121. i915_gem_render_state_fini(so);
  122. return ret;
  123. }
  124. return 0;
  125. }
  126. int i915_gem_render_state_init(struct intel_engine_cs *ring)
  127. {
  128. struct render_state so;
  129. int ret;
  130. ret = i915_gem_render_state_prepare(ring, &so);
  131. if (ret)
  132. return ret;
  133. if (so.rodata == NULL)
  134. return 0;
  135. ret = ring->dispatch_execbuffer(ring,
  136. so.ggtt_offset,
  137. so.rodata->batch_items * 4,
  138. I915_DISPATCH_SECURE);
  139. if (ret)
  140. goto out;
  141. i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), ring);
  142. ret = __i915_add_request(ring, NULL, so.obj);
  143. /* __i915_add_request moves object to inactive if it fails */
  144. out:
  145. i915_gem_render_state_fini(&so);
  146. return ret;
  147. }