sha1_ssse3_glue.c 4.9 KB

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  1. /*
  2. * Cryptographic API.
  3. *
  4. * Glue code for the SHA1 Secure Hash Algorithm assembler implementation using
  5. * Supplemental SSE3 instructions.
  6. *
  7. * This file is based on sha1_generic.c
  8. *
  9. * Copyright (c) Alan Smithee.
  10. * Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
  11. * Copyright (c) Jean-Francois Dive <jef@linuxbe.org>
  12. * Copyright (c) Mathias Krause <minipli@googlemail.com>
  13. * Copyright (c) Chandramouli Narayanan <mouli@linux.intel.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the Free
  17. * Software Foundation; either version 2 of the License, or (at your option)
  18. * any later version.
  19. *
  20. */
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <crypto/internal/hash.h>
  23. #include <linux/init.h>
  24. #include <linux/module.h>
  25. #include <linux/mm.h>
  26. #include <linux/cryptohash.h>
  27. #include <linux/types.h>
  28. #include <crypto/sha.h>
  29. #include <crypto/sha1_base.h>
  30. #include <asm/i387.h>
  31. #include <asm/xcr.h>
  32. #include <asm/xsave.h>
  33. asmlinkage void sha1_transform_ssse3(u32 *digest, const char *data,
  34. unsigned int rounds);
  35. #ifdef CONFIG_AS_AVX
  36. asmlinkage void sha1_transform_avx(u32 *digest, const char *data,
  37. unsigned int rounds);
  38. #endif
  39. #ifdef CONFIG_AS_AVX2
  40. #define SHA1_AVX2_BLOCK_OPTSIZE 4 /* optimal 4*64 bytes of SHA1 blocks */
  41. asmlinkage void sha1_transform_avx2(u32 *digest, const char *data,
  42. unsigned int rounds);
  43. #endif
  44. static void (*sha1_transform_asm)(u32 *, const char *, unsigned int);
  45. static int sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
  46. unsigned int len)
  47. {
  48. struct sha1_state *sctx = shash_desc_ctx(desc);
  49. if (!irq_fpu_usable() ||
  50. (sctx->count % SHA1_BLOCK_SIZE) + len < SHA1_BLOCK_SIZE)
  51. return crypto_sha1_update(desc, data, len);
  52. /* make sure casting to sha1_block_fn() is safe */
  53. BUILD_BUG_ON(offsetof(struct sha1_state, state) != 0);
  54. kernel_fpu_begin();
  55. sha1_base_do_update(desc, data, len,
  56. (sha1_block_fn *)sha1_transform_asm);
  57. kernel_fpu_end();
  58. return 0;
  59. }
  60. static int sha1_ssse3_finup(struct shash_desc *desc, const u8 *data,
  61. unsigned int len, u8 *out)
  62. {
  63. if (!irq_fpu_usable())
  64. return crypto_sha1_finup(desc, data, len, out);
  65. kernel_fpu_begin();
  66. if (len)
  67. sha1_base_do_update(desc, data, len,
  68. (sha1_block_fn *)sha1_transform_asm);
  69. sha1_base_do_finalize(desc, (sha1_block_fn *)sha1_transform_asm);
  70. kernel_fpu_end();
  71. return sha1_base_finish(desc, out);
  72. }
  73. /* Add padding and return the message digest. */
  74. static int sha1_ssse3_final(struct shash_desc *desc, u8 *out)
  75. {
  76. return sha1_ssse3_finup(desc, NULL, 0, out);
  77. }
  78. #ifdef CONFIG_AS_AVX2
  79. static void sha1_apply_transform_avx2(u32 *digest, const char *data,
  80. unsigned int rounds)
  81. {
  82. /* Select the optimal transform based on data block size */
  83. if (rounds >= SHA1_AVX2_BLOCK_OPTSIZE)
  84. sha1_transform_avx2(digest, data, rounds);
  85. else
  86. sha1_transform_avx(digest, data, rounds);
  87. }
  88. #endif
  89. static struct shash_alg alg = {
  90. .digestsize = SHA1_DIGEST_SIZE,
  91. .init = sha1_base_init,
  92. .update = sha1_ssse3_update,
  93. .final = sha1_ssse3_final,
  94. .finup = sha1_ssse3_finup,
  95. .descsize = sizeof(struct sha1_state),
  96. .base = {
  97. .cra_name = "sha1",
  98. .cra_driver_name= "sha1-ssse3",
  99. .cra_priority = 150,
  100. .cra_flags = CRYPTO_ALG_TYPE_SHASH,
  101. .cra_blocksize = SHA1_BLOCK_SIZE,
  102. .cra_module = THIS_MODULE,
  103. }
  104. };
  105. #ifdef CONFIG_AS_AVX
  106. static bool __init avx_usable(void)
  107. {
  108. u64 xcr0;
  109. if (!cpu_has_avx || !cpu_has_osxsave)
  110. return false;
  111. xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
  112. if ((xcr0 & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {
  113. pr_info("AVX detected but unusable.\n");
  114. return false;
  115. }
  116. return true;
  117. }
  118. #ifdef CONFIG_AS_AVX2
  119. static bool __init avx2_usable(void)
  120. {
  121. if (avx_usable() && cpu_has_avx2 && boot_cpu_has(X86_FEATURE_BMI1) &&
  122. boot_cpu_has(X86_FEATURE_BMI2))
  123. return true;
  124. return false;
  125. }
  126. #endif
  127. #endif
  128. static int __init sha1_ssse3_mod_init(void)
  129. {
  130. char *algo_name;
  131. /* test for SSSE3 first */
  132. if (cpu_has_ssse3) {
  133. sha1_transform_asm = sha1_transform_ssse3;
  134. algo_name = "SSSE3";
  135. }
  136. #ifdef CONFIG_AS_AVX
  137. /* allow AVX to override SSSE3, it's a little faster */
  138. if (avx_usable()) {
  139. sha1_transform_asm = sha1_transform_avx;
  140. algo_name = "AVX";
  141. #ifdef CONFIG_AS_AVX2
  142. /* allow AVX2 to override AVX, it's a little faster */
  143. if (avx2_usable()) {
  144. sha1_transform_asm = sha1_apply_transform_avx2;
  145. algo_name = "AVX2";
  146. }
  147. #endif
  148. }
  149. #endif
  150. if (sha1_transform_asm) {
  151. pr_info("Using %s optimized SHA-1 implementation\n", algo_name);
  152. return crypto_register_shash(&alg);
  153. }
  154. pr_info("Neither AVX nor AVX2 nor SSSE3 is available/usable.\n");
  155. return -ENODEV;
  156. }
  157. static void __exit sha1_ssse3_mod_fini(void)
  158. {
  159. crypto_unregister_shash(&alg);
  160. }
  161. module_init(sha1_ssse3_mod_init);
  162. module_exit(sha1_ssse3_mod_fini);
  163. MODULE_LICENSE("GPL");
  164. MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, Supplemental SSE3 accelerated");
  165. MODULE_ALIAS_CRYPTO("sha1");