pci.c 20 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define KMSG_COMPONENT "zpci"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  40. /* list of all detected zpci devices */
  41. static LIST_HEAD(zpci_list);
  42. static DEFINE_SPINLOCK(zpci_list_lock);
  43. static struct irq_chip zpci_irq_chip = {
  44. .name = "zPCI",
  45. .irq_unmask = pci_msi_unmask_irq,
  46. .irq_mask = pci_msi_mask_irq,
  47. };
  48. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  49. static DEFINE_SPINLOCK(zpci_domain_lock);
  50. static struct airq_iv *zpci_aisb_iv;
  51. static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
  52. /* Adapter interrupt definitions */
  53. static void zpci_irq_handler(struct airq_struct *airq);
  54. static struct airq_struct zpci_airq = {
  55. .handler = zpci_irq_handler,
  56. .isc = PCI_ISC,
  57. };
  58. /* I/O Map */
  59. static DEFINE_SPINLOCK(zpci_iomap_lock);
  60. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  61. struct zpci_iomap_entry *zpci_iomap_start;
  62. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  63. static struct kmem_cache *zdev_fmb_cache;
  64. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  65. {
  66. return (struct zpci_dev *) pdev->sysdata;
  67. }
  68. struct zpci_dev *get_zdev_by_fid(u32 fid)
  69. {
  70. struct zpci_dev *tmp, *zdev = NULL;
  71. spin_lock(&zpci_list_lock);
  72. list_for_each_entry(tmp, &zpci_list, entry) {
  73. if (tmp->fid == fid) {
  74. zdev = tmp;
  75. break;
  76. }
  77. }
  78. spin_unlock(&zpci_list_lock);
  79. return zdev;
  80. }
  81. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  82. {
  83. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  84. }
  85. int pci_domain_nr(struct pci_bus *bus)
  86. {
  87. return ((struct zpci_dev *) bus->sysdata)->domain;
  88. }
  89. EXPORT_SYMBOL_GPL(pci_domain_nr);
  90. int pci_proc_domain(struct pci_bus *bus)
  91. {
  92. return pci_domain_nr(bus);
  93. }
  94. EXPORT_SYMBOL_GPL(pci_proc_domain);
  95. /* Modify PCI: Register adapter interruptions */
  96. static int zpci_set_airq(struct zpci_dev *zdev)
  97. {
  98. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  99. struct zpci_fib fib = {0};
  100. fib.isc = PCI_ISC;
  101. fib.sum = 1; /* enable summary notifications */
  102. fib.noi = airq_iv_end(zdev->aibv);
  103. fib.aibv = (unsigned long) zdev->aibv->vector;
  104. fib.aibvo = 0; /* each zdev has its own interrupt vector */
  105. fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
  106. fib.aisbo = zdev->aisb & 63;
  107. return zpci_mod_fc(req, &fib);
  108. }
  109. struct mod_pci_args {
  110. u64 base;
  111. u64 limit;
  112. u64 iota;
  113. u64 fmb_addr;
  114. };
  115. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  116. {
  117. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  118. struct zpci_fib fib = {0};
  119. fib.pba = args->base;
  120. fib.pal = args->limit;
  121. fib.iota = args->iota;
  122. fib.fmb_addr = args->fmb_addr;
  123. return zpci_mod_fc(req, &fib);
  124. }
  125. /* Modify PCI: Register I/O address translation parameters */
  126. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  127. u64 base, u64 limit, u64 iota)
  128. {
  129. struct mod_pci_args args = { base, limit, iota, 0 };
  130. WARN_ON_ONCE(iota & 0x3fff);
  131. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  132. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  133. }
  134. /* Modify PCI: Unregister I/O address translation parameters */
  135. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  136. {
  137. struct mod_pci_args args = { 0, 0, 0, 0 };
  138. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  139. }
  140. /* Modify PCI: Unregister adapter interruptions */
  141. static int zpci_clear_airq(struct zpci_dev *zdev)
  142. {
  143. struct mod_pci_args args = { 0, 0, 0, 0 };
  144. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  145. }
  146. /* Modify PCI: Set PCI function measurement parameters */
  147. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  148. {
  149. struct mod_pci_args args = { 0, 0, 0, 0 };
  150. if (zdev->fmb)
  151. return -EINVAL;
  152. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  153. if (!zdev->fmb)
  154. return -ENOMEM;
  155. WARN_ON((u64) zdev->fmb & 0xf);
  156. /* reset software counters */
  157. atomic64_set(&zdev->allocated_pages, 0);
  158. atomic64_set(&zdev->mapped_pages, 0);
  159. atomic64_set(&zdev->unmapped_pages, 0);
  160. args.fmb_addr = virt_to_phys(zdev->fmb);
  161. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  162. }
  163. /* Modify PCI: Disable PCI function measurement */
  164. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  165. {
  166. struct mod_pci_args args = { 0, 0, 0, 0 };
  167. int rc;
  168. if (!zdev->fmb)
  169. return -EINVAL;
  170. /* Function measurement is disabled if fmb address is zero */
  171. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  172. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  173. zdev->fmb = NULL;
  174. return rc;
  175. }
  176. #define ZPCI_PCIAS_CFGSPC 15
  177. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  178. {
  179. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  180. u64 data;
  181. int rc;
  182. rc = zpci_load(&data, req, offset);
  183. if (!rc) {
  184. data = data << ((8 - len) * 8);
  185. data = le64_to_cpu(data);
  186. *val = (u32) data;
  187. } else
  188. *val = 0xffffffff;
  189. return rc;
  190. }
  191. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  192. {
  193. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  194. u64 data = val;
  195. int rc;
  196. data = cpu_to_le64(data);
  197. data = data >> ((8 - len) * 8);
  198. rc = zpci_store(data, req, offset);
  199. return rc;
  200. }
  201. void pcibios_fixup_bus(struct pci_bus *bus)
  202. {
  203. }
  204. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  205. resource_size_t size,
  206. resource_size_t align)
  207. {
  208. return 0;
  209. }
  210. /* combine single writes by using store-block insn */
  211. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  212. {
  213. zpci_memcpy_toio(to, from, count);
  214. }
  215. /* Create a virtual mapping cookie for a PCI BAR */
  216. void __iomem *pci_iomap_range(struct pci_dev *pdev,
  217. int bar,
  218. unsigned long offset,
  219. unsigned long max)
  220. {
  221. struct zpci_dev *zdev = get_zdev(pdev);
  222. u64 addr;
  223. int idx;
  224. if ((bar & 7) != bar)
  225. return NULL;
  226. idx = zdev->bars[bar].map_idx;
  227. spin_lock(&zpci_iomap_lock);
  228. if (zpci_iomap_start[idx].count++) {
  229. BUG_ON(zpci_iomap_start[idx].fh != zdev->fh ||
  230. zpci_iomap_start[idx].bar != bar);
  231. } else {
  232. zpci_iomap_start[idx].fh = zdev->fh;
  233. zpci_iomap_start[idx].bar = bar;
  234. }
  235. /* Detect overrun */
  236. BUG_ON(!zpci_iomap_start[idx].count);
  237. spin_unlock(&zpci_iomap_lock);
  238. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  239. return (void __iomem *) addr + offset;
  240. }
  241. EXPORT_SYMBOL(pci_iomap_range);
  242. void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
  243. {
  244. return pci_iomap_range(dev, bar, 0, maxlen);
  245. }
  246. EXPORT_SYMBOL(pci_iomap);
  247. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  248. {
  249. unsigned int idx;
  250. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  251. spin_lock(&zpci_iomap_lock);
  252. /* Detect underrun */
  253. BUG_ON(!zpci_iomap_start[idx].count);
  254. if (!--zpci_iomap_start[idx].count) {
  255. zpci_iomap_start[idx].fh = 0;
  256. zpci_iomap_start[idx].bar = 0;
  257. }
  258. spin_unlock(&zpci_iomap_lock);
  259. }
  260. EXPORT_SYMBOL(pci_iounmap);
  261. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  262. int size, u32 *val)
  263. {
  264. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  265. int ret;
  266. if (!zdev || devfn != ZPCI_DEVFN)
  267. ret = -ENODEV;
  268. else
  269. ret = zpci_cfg_load(zdev, where, val, size);
  270. return ret;
  271. }
  272. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  273. int size, u32 val)
  274. {
  275. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  276. int ret;
  277. if (!zdev || devfn != ZPCI_DEVFN)
  278. ret = -ENODEV;
  279. else
  280. ret = zpci_cfg_store(zdev, where, val, size);
  281. return ret;
  282. }
  283. static struct pci_ops pci_root_ops = {
  284. .read = pci_read,
  285. .write = pci_write,
  286. };
  287. static void zpci_irq_handler(struct airq_struct *airq)
  288. {
  289. unsigned long si, ai;
  290. struct airq_iv *aibv;
  291. int irqs_on = 0;
  292. inc_irq_stat(IRQIO_PCI);
  293. for (si = 0;;) {
  294. /* Scan adapter summary indicator bit vector */
  295. si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
  296. if (si == -1UL) {
  297. if (irqs_on++)
  298. /* End of second scan with interrupts on. */
  299. break;
  300. /* First scan complete, reenable interrupts. */
  301. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  302. si = 0;
  303. continue;
  304. }
  305. /* Scan the adapter interrupt vector for this device. */
  306. aibv = zpci_aibv[si];
  307. for (ai = 0;;) {
  308. ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
  309. if (ai == -1UL)
  310. break;
  311. inc_irq_stat(IRQIO_MSI);
  312. airq_iv_lock(aibv, ai);
  313. generic_handle_irq(airq_iv_get_data(aibv, ai));
  314. airq_iv_unlock(aibv, ai);
  315. }
  316. }
  317. }
  318. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  319. {
  320. struct zpci_dev *zdev = get_zdev(pdev);
  321. unsigned int hwirq, msi_vecs;
  322. unsigned long aisb;
  323. struct msi_desc *msi;
  324. struct msi_msg msg;
  325. int rc, irq;
  326. if (type == PCI_CAP_ID_MSI && nvec > 1)
  327. return 1;
  328. msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
  329. /* Allocate adapter summary indicator bit */
  330. rc = -EIO;
  331. aisb = airq_iv_alloc_bit(zpci_aisb_iv);
  332. if (aisb == -1UL)
  333. goto out;
  334. zdev->aisb = aisb;
  335. /* Create adapter interrupt vector */
  336. rc = -ENOMEM;
  337. zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
  338. if (!zdev->aibv)
  339. goto out_si;
  340. /* Wire up shortcut pointer */
  341. zpci_aibv[aisb] = zdev->aibv;
  342. /* Request MSI interrupts */
  343. hwirq = 0;
  344. list_for_each_entry(msi, &pdev->msi_list, list) {
  345. rc = -EIO;
  346. irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
  347. if (irq < 0)
  348. goto out_msi;
  349. rc = irq_set_msi_desc(irq, msi);
  350. if (rc)
  351. goto out_msi;
  352. irq_set_chip_and_handler(irq, &zpci_irq_chip,
  353. handle_simple_irq);
  354. msg.data = hwirq;
  355. msg.address_lo = zdev->msi_addr & 0xffffffff;
  356. msg.address_hi = zdev->msi_addr >> 32;
  357. pci_write_msi_msg(irq, &msg);
  358. airq_iv_set_data(zdev->aibv, hwirq, irq);
  359. hwirq++;
  360. }
  361. /* Enable adapter interrupts */
  362. rc = zpci_set_airq(zdev);
  363. if (rc)
  364. goto out_msi;
  365. return (msi_vecs == nvec) ? 0 : msi_vecs;
  366. out_msi:
  367. list_for_each_entry(msi, &pdev->msi_list, list) {
  368. if (hwirq-- == 0)
  369. break;
  370. irq_set_msi_desc(msi->irq, NULL);
  371. irq_free_desc(msi->irq);
  372. msi->msg.address_lo = 0;
  373. msi->msg.address_hi = 0;
  374. msi->msg.data = 0;
  375. msi->irq = 0;
  376. }
  377. zpci_aibv[aisb] = NULL;
  378. airq_iv_release(zdev->aibv);
  379. out_si:
  380. airq_iv_free_bit(zpci_aisb_iv, aisb);
  381. out:
  382. return rc;
  383. }
  384. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  385. {
  386. struct zpci_dev *zdev = get_zdev(pdev);
  387. struct msi_desc *msi;
  388. int rc;
  389. /* Disable adapter interrupts */
  390. rc = zpci_clear_airq(zdev);
  391. if (rc)
  392. return;
  393. /* Release MSI interrupts */
  394. list_for_each_entry(msi, &pdev->msi_list, list) {
  395. if (msi->msi_attrib.is_msix)
  396. __pci_msix_desc_mask_irq(msi, 1);
  397. else
  398. __pci_msi_desc_mask_irq(msi, 1, 1);
  399. irq_set_msi_desc(msi->irq, NULL);
  400. irq_free_desc(msi->irq);
  401. msi->msg.address_lo = 0;
  402. msi->msg.address_hi = 0;
  403. msi->msg.data = 0;
  404. msi->irq = 0;
  405. }
  406. zpci_aibv[zdev->aisb] = NULL;
  407. airq_iv_release(zdev->aibv);
  408. airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
  409. }
  410. static void zpci_map_resources(struct pci_dev *pdev)
  411. {
  412. resource_size_t len;
  413. int i;
  414. for (i = 0; i < PCI_BAR_COUNT; i++) {
  415. len = pci_resource_len(pdev, i);
  416. if (!len)
  417. continue;
  418. pdev->resource[i].start =
  419. (resource_size_t __force) pci_iomap(pdev, i, 0);
  420. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  421. }
  422. }
  423. static void zpci_unmap_resources(struct pci_dev *pdev)
  424. {
  425. resource_size_t len;
  426. int i;
  427. for (i = 0; i < PCI_BAR_COUNT; i++) {
  428. len = pci_resource_len(pdev, i);
  429. if (!len)
  430. continue;
  431. pci_iounmap(pdev, (void __iomem __force *)
  432. pdev->resource[i].start);
  433. }
  434. }
  435. static int __init zpci_irq_init(void)
  436. {
  437. int rc;
  438. rc = register_adapter_interrupt(&zpci_airq);
  439. if (rc)
  440. goto out;
  441. /* Set summary to 1 to be called every time for the ISC. */
  442. *zpci_airq.lsi_ptr = 1;
  443. rc = -ENOMEM;
  444. zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
  445. if (!zpci_aisb_iv)
  446. goto out_airq;
  447. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  448. return 0;
  449. out_airq:
  450. unregister_adapter_interrupt(&zpci_airq);
  451. out:
  452. return rc;
  453. }
  454. static void zpci_irq_exit(void)
  455. {
  456. airq_iv_release(zpci_aisb_iv);
  457. unregister_adapter_interrupt(&zpci_airq);
  458. }
  459. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  460. {
  461. int entry;
  462. spin_lock(&zpci_iomap_lock);
  463. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  464. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  465. spin_unlock(&zpci_iomap_lock);
  466. return -ENOSPC;
  467. }
  468. set_bit(entry, zpci_iomap);
  469. spin_unlock(&zpci_iomap_lock);
  470. return entry;
  471. }
  472. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  473. {
  474. spin_lock(&zpci_iomap_lock);
  475. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  476. clear_bit(entry, zpci_iomap);
  477. spin_unlock(&zpci_iomap_lock);
  478. }
  479. static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
  480. unsigned long size, unsigned long flags)
  481. {
  482. struct resource *r;
  483. r = kzalloc(sizeof(*r), GFP_KERNEL);
  484. if (!r)
  485. return NULL;
  486. r->start = start;
  487. r->end = r->start + size - 1;
  488. r->flags = flags;
  489. r->name = zdev->res_name;
  490. if (request_resource(&iomem_resource, r)) {
  491. kfree(r);
  492. return NULL;
  493. }
  494. return r;
  495. }
  496. static int zpci_setup_bus_resources(struct zpci_dev *zdev,
  497. struct list_head *resources)
  498. {
  499. unsigned long addr, size, flags;
  500. struct resource *res;
  501. int i, entry;
  502. snprintf(zdev->res_name, sizeof(zdev->res_name),
  503. "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
  504. for (i = 0; i < PCI_BAR_COUNT; i++) {
  505. if (!zdev->bars[i].size)
  506. continue;
  507. entry = zpci_alloc_iomap(zdev);
  508. if (entry < 0)
  509. return entry;
  510. zdev->bars[i].map_idx = entry;
  511. /* only MMIO is supported */
  512. flags = IORESOURCE_MEM;
  513. if (zdev->bars[i].val & 8)
  514. flags |= IORESOURCE_PREFETCH;
  515. if (zdev->bars[i].val & 4)
  516. flags |= IORESOURCE_MEM_64;
  517. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  518. size = 1UL << zdev->bars[i].size;
  519. res = __alloc_res(zdev, addr, size, flags);
  520. if (!res) {
  521. zpci_free_iomap(zdev, entry);
  522. return -ENOMEM;
  523. }
  524. zdev->bars[i].res = res;
  525. pci_add_resource(resources, res);
  526. }
  527. return 0;
  528. }
  529. static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
  530. {
  531. int i;
  532. for (i = 0; i < PCI_BAR_COUNT; i++) {
  533. if (!zdev->bars[i].size)
  534. continue;
  535. zpci_free_iomap(zdev, zdev->bars[i].map_idx);
  536. release_resource(zdev->bars[i].res);
  537. kfree(zdev->bars[i].res);
  538. }
  539. }
  540. int pcibios_add_device(struct pci_dev *pdev)
  541. {
  542. struct zpci_dev *zdev = get_zdev(pdev);
  543. struct resource *res;
  544. int i;
  545. zdev->pdev = pdev;
  546. pdev->dev.groups = zpci_attr_groups;
  547. zpci_map_resources(pdev);
  548. for (i = 0; i < PCI_BAR_COUNT; i++) {
  549. res = &pdev->resource[i];
  550. if (res->parent || !res->flags)
  551. continue;
  552. pci_claim_resource(pdev, i);
  553. }
  554. return 0;
  555. }
  556. void pcibios_release_device(struct pci_dev *pdev)
  557. {
  558. zpci_unmap_resources(pdev);
  559. }
  560. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  561. {
  562. struct zpci_dev *zdev = get_zdev(pdev);
  563. zdev->pdev = pdev;
  564. zpci_debug_init_device(zdev);
  565. zpci_fmb_enable_device(zdev);
  566. return pci_enable_resources(pdev, mask);
  567. }
  568. void pcibios_disable_device(struct pci_dev *pdev)
  569. {
  570. struct zpci_dev *zdev = get_zdev(pdev);
  571. zpci_fmb_disable_device(zdev);
  572. zpci_debug_exit_device(zdev);
  573. zdev->pdev = NULL;
  574. }
  575. #ifdef CONFIG_HIBERNATE_CALLBACKS
  576. static int zpci_restore(struct device *dev)
  577. {
  578. struct pci_dev *pdev = to_pci_dev(dev);
  579. struct zpci_dev *zdev = get_zdev(pdev);
  580. int ret = 0;
  581. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  582. goto out;
  583. ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  584. if (ret)
  585. goto out;
  586. zpci_map_resources(pdev);
  587. zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET,
  588. zdev->start_dma + zdev->iommu_size - 1,
  589. (u64) zdev->dma_table);
  590. out:
  591. return ret;
  592. }
  593. static int zpci_freeze(struct device *dev)
  594. {
  595. struct pci_dev *pdev = to_pci_dev(dev);
  596. struct zpci_dev *zdev = get_zdev(pdev);
  597. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  598. return 0;
  599. zpci_unregister_ioat(zdev, 0);
  600. zpci_unmap_resources(pdev);
  601. return clp_disable_fh(zdev);
  602. }
  603. struct dev_pm_ops pcibios_pm_ops = {
  604. .thaw_noirq = zpci_restore,
  605. .freeze_noirq = zpci_freeze,
  606. .restore_noirq = zpci_restore,
  607. .poweroff_noirq = zpci_freeze,
  608. };
  609. #endif /* CONFIG_HIBERNATE_CALLBACKS */
  610. static int zpci_alloc_domain(struct zpci_dev *zdev)
  611. {
  612. spin_lock(&zpci_domain_lock);
  613. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  614. if (zdev->domain == ZPCI_NR_DEVICES) {
  615. spin_unlock(&zpci_domain_lock);
  616. return -ENOSPC;
  617. }
  618. set_bit(zdev->domain, zpci_domain);
  619. spin_unlock(&zpci_domain_lock);
  620. return 0;
  621. }
  622. static void zpci_free_domain(struct zpci_dev *zdev)
  623. {
  624. spin_lock(&zpci_domain_lock);
  625. clear_bit(zdev->domain, zpci_domain);
  626. spin_unlock(&zpci_domain_lock);
  627. }
  628. void pcibios_remove_bus(struct pci_bus *bus)
  629. {
  630. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  631. zpci_exit_slot(zdev);
  632. zpci_cleanup_bus_resources(zdev);
  633. zpci_free_domain(zdev);
  634. spin_lock(&zpci_list_lock);
  635. list_del(&zdev->entry);
  636. spin_unlock(&zpci_list_lock);
  637. kfree(zdev);
  638. }
  639. static int zpci_scan_bus(struct zpci_dev *zdev)
  640. {
  641. LIST_HEAD(resources);
  642. int ret;
  643. ret = zpci_setup_bus_resources(zdev, &resources);
  644. if (ret)
  645. return ret;
  646. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  647. zdev, &resources);
  648. if (!zdev->bus) {
  649. zpci_cleanup_bus_resources(zdev);
  650. return -EIO;
  651. }
  652. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  653. pci_bus_add_devices(zdev->bus);
  654. return 0;
  655. }
  656. int zpci_enable_device(struct zpci_dev *zdev)
  657. {
  658. int rc;
  659. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  660. if (rc)
  661. goto out;
  662. rc = zpci_dma_init_device(zdev);
  663. if (rc)
  664. goto out_dma;
  665. zdev->state = ZPCI_FN_STATE_ONLINE;
  666. return 0;
  667. out_dma:
  668. clp_disable_fh(zdev);
  669. out:
  670. return rc;
  671. }
  672. EXPORT_SYMBOL_GPL(zpci_enable_device);
  673. int zpci_disable_device(struct zpci_dev *zdev)
  674. {
  675. zpci_dma_exit_device(zdev);
  676. return clp_disable_fh(zdev);
  677. }
  678. EXPORT_SYMBOL_GPL(zpci_disable_device);
  679. int zpci_create_device(struct zpci_dev *zdev)
  680. {
  681. int rc;
  682. rc = zpci_alloc_domain(zdev);
  683. if (rc)
  684. goto out;
  685. mutex_init(&zdev->lock);
  686. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  687. rc = zpci_enable_device(zdev);
  688. if (rc)
  689. goto out_free;
  690. }
  691. rc = zpci_scan_bus(zdev);
  692. if (rc)
  693. goto out_disable;
  694. spin_lock(&zpci_list_lock);
  695. list_add_tail(&zdev->entry, &zpci_list);
  696. spin_unlock(&zpci_list_lock);
  697. zpci_init_slot(zdev);
  698. return 0;
  699. out_disable:
  700. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  701. zpci_disable_device(zdev);
  702. out_free:
  703. zpci_free_domain(zdev);
  704. out:
  705. return rc;
  706. }
  707. void zpci_stop_device(struct zpci_dev *zdev)
  708. {
  709. zpci_dma_exit_device(zdev);
  710. /*
  711. * Note: SCLP disables fh via set-pci-fn so don't
  712. * do that here.
  713. */
  714. }
  715. EXPORT_SYMBOL_GPL(zpci_stop_device);
  716. static inline int barsize(u8 size)
  717. {
  718. return (size) ? (1 << size) >> 10 : 0;
  719. }
  720. static int zpci_mem_init(void)
  721. {
  722. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  723. 16, 0, NULL);
  724. if (!zdev_fmb_cache)
  725. goto error_zdev;
  726. /* TODO: use realloc */
  727. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  728. GFP_KERNEL);
  729. if (!zpci_iomap_start)
  730. goto error_iomap;
  731. return 0;
  732. error_iomap:
  733. kmem_cache_destroy(zdev_fmb_cache);
  734. error_zdev:
  735. return -ENOMEM;
  736. }
  737. static void zpci_mem_exit(void)
  738. {
  739. kfree(zpci_iomap_start);
  740. kmem_cache_destroy(zdev_fmb_cache);
  741. }
  742. static unsigned int s390_pci_probe = 1;
  743. static unsigned int s390_pci_initialized;
  744. char * __init pcibios_setup(char *str)
  745. {
  746. if (!strcmp(str, "off")) {
  747. s390_pci_probe = 0;
  748. return NULL;
  749. }
  750. return str;
  751. }
  752. bool zpci_is_enabled(void)
  753. {
  754. return s390_pci_initialized;
  755. }
  756. static int __init pci_base_init(void)
  757. {
  758. int rc;
  759. if (!s390_pci_probe)
  760. return 0;
  761. if (!test_facility(69) || !test_facility(71) || !test_facility(72))
  762. return 0;
  763. rc = zpci_debug_init();
  764. if (rc)
  765. goto out;
  766. rc = zpci_mem_init();
  767. if (rc)
  768. goto out_mem;
  769. rc = zpci_irq_init();
  770. if (rc)
  771. goto out_irq;
  772. rc = zpci_dma_init();
  773. if (rc)
  774. goto out_dma;
  775. rc = clp_scan_pci_devices();
  776. if (rc)
  777. goto out_find;
  778. s390_pci_initialized = 1;
  779. return 0;
  780. out_find:
  781. zpci_dma_exit();
  782. out_dma:
  783. zpci_irq_exit();
  784. out_irq:
  785. zpci_mem_exit();
  786. out_mem:
  787. zpci_debug_exit();
  788. out:
  789. return rc;
  790. }
  791. subsys_initcall_sync(pci_base_init);
  792. void zpci_rescan(void)
  793. {
  794. if (zpci_is_enabled())
  795. clp_rescan_pci_devices_simple();
  796. }