head.S 12 KB

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  1. /*
  2. * Copyright IBM Corp. 1999, 2010
  3. *
  4. * Author(s): Hartmut Penner <hp@de.ibm.com>
  5. * Martin Schwidefsky <schwidefsky@de.ibm.com>
  6. * Rob van der Heij <rvdhei@iae.nl>
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>
  8. *
  9. * There are 5 different IPL methods
  10. * 1) load the image directly into ram at address 0 and do an PSW restart
  11. * 2) linload will load the image from address 0x10000 to memory 0x10000
  12. * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
  13. * 3) generate the tape ipl header, store the generated image on a tape
  14. * and ipl from it
  15. * In case of SL tape you need to IPL 5 times to get past VOL1 etc
  16. * 4) generate the vm reader ipl header, move the generated image to the
  17. * VM reader (use option NOH!) and do a ipl from reader (VM only)
  18. * 5) direct call of start by the SALIPL loader
  19. * We use the cpuid to distinguish between VM and native ipl
  20. * params for kernel are pushed to 0x10400 (see setup.h)
  21. *
  22. */
  23. #include <linux/init.h>
  24. #include <linux/linkage.h>
  25. #include <asm/asm-offsets.h>
  26. #include <asm/thread_info.h>
  27. #include <asm/page.h>
  28. #define ARCH_OFFSET 4
  29. __HEAD
  30. #define IPL_BS 0x730
  31. .org 0
  32. .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
  33. .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
  34. .long 0x02000068,0x60000050 # (a PSW and two CCWs).
  35. .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
  36. .long 0x020000f0,0x60000050 # The next 160 byte are loaded
  37. .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
  38. .long 0x02000190,0x60000050 # They form the continuation
  39. .long 0x020001e0,0x60000050 # of the CCW program started
  40. .long 0x02000230,0x60000050 # by ipl and load the range
  41. .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
  42. .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
  43. .long 0x02000320,0x60000050 # in memory. At the end of
  44. .long 0x02000370,0x60000050 # the channel program the PSW
  45. .long 0x020003c0,0x60000050 # at location 0 is loaded.
  46. .long 0x02000410,0x60000050 # Initial processing starts
  47. .long 0x02000460,0x60000050 # at 0x200 = iplstart.
  48. .long 0x020004b0,0x60000050
  49. .long 0x02000500,0x60000050
  50. .long 0x02000550,0x60000050
  51. .long 0x020005a0,0x60000050
  52. .long 0x020005f0,0x60000050
  53. .long 0x02000640,0x60000050
  54. .long 0x02000690,0x60000050
  55. .long 0x020006e0,0x20000050
  56. .org 0x200
  57. #
  58. # subroutine to set architecture mode
  59. #
  60. .Lsetmode:
  61. mvi __LC_AR_MODE_ID,1 # set esame flag
  62. slr %r0,%r0 # set cpuid to zero
  63. lhi %r1,2 # mode 2 = esame (dump)
  64. sigp %r1,%r0,0x12 # switch to esame mode
  65. bras %r13,0f
  66. .fill 16,4,0x0
  67. 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
  68. sam31 # switch to 31 bit addressing mode
  69. br %r14
  70. #
  71. # subroutine to wait for end I/O
  72. #
  73. .Lirqwait:
  74. mvc 0x1f0(16),.Lnewpsw # set up IO interrupt psw
  75. lpsw .Lwaitpsw
  76. .Lioint:
  77. br %r14
  78. .align 8
  79. .Lnewpsw:
  80. .quad 0x0000000080000000,.Lioint
  81. .Lwaitpsw:
  82. .long 0x020a0000,0x80000000+.Lioint
  83. #
  84. # subroutine for loading cards from the reader
  85. #
  86. .Lloader:
  87. la %r4,0(%r14)
  88. la %r3,.Lorb # r2 = address of orb into r2
  89. la %r5,.Lirb # r4 = address of irb
  90. la %r6,.Lccws
  91. la %r7,20
  92. .Linit:
  93. st %r2,4(%r6) # initialize CCW data addresses
  94. la %r2,0x50(%r2)
  95. la %r6,8(%r6)
  96. bct 7,.Linit
  97. lctl %c6,%c6,.Lcr6 # set IO subclass mask
  98. slr %r2,%r2
  99. .Lldlp:
  100. ssch 0(%r3) # load chunk of 1600 bytes
  101. bnz .Llderr
  102. .Lwait4irq:
  103. bas %r14,.Lirqwait
  104. c %r1,0xb8 # compare subchannel number
  105. bne .Lwait4irq
  106. tsch 0(%r5)
  107. slr %r0,%r0
  108. ic %r0,8(%r5) # get device status
  109. chi %r0,8 # channel end ?
  110. be .Lcont
  111. chi %r0,12 # channel end + device end ?
  112. be .Lcont
  113. l %r0,4(%r5)
  114. s %r0,8(%r3) # r0/8 = number of ccws executed
  115. mhi %r0,10 # *10 = number of bytes in ccws
  116. lh %r3,10(%r5) # get residual count
  117. sr %r0,%r3 # #ccws*80-residual=#bytes read
  118. ar %r2,%r0
  119. br %r4 # r2 contains the total size
  120. .Lcont:
  121. ahi %r2,0x640 # add 0x640 to total size
  122. la %r6,.Lccws
  123. la %r7,20
  124. .Lincr:
  125. l %r0,4(%r6) # update CCW data addresses
  126. ahi %r0,0x640
  127. st %r0,4(%r6)
  128. ahi %r6,8
  129. bct 7,.Lincr
  130. b .Lldlp
  131. .Llderr:
  132. lpsw .Lcrash
  133. .align 8
  134. .Lorb: .long 0x00000000,0x0080ff00,.Lccws
  135. .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  136. .Lcr6: .long 0xff000000
  137. .Lloadp:.long 0,0
  138. .align 8
  139. .Lcrash:.long 0x000a0000,0x00000000
  140. .align 8
  141. .Lccws: .rept 19
  142. .long 0x02600050,0x00000000
  143. .endr
  144. .long 0x02200050,0x00000000
  145. iplstart:
  146. bas %r14,.Lsetmode # Immediately switch to 64 bit mode
  147. lh %r1,0xb8 # test if subchannel number
  148. bct %r1,.Lnoload # is valid
  149. l %r1,0xb8 # load ipl subchannel number
  150. la %r2,IPL_BS # load start address
  151. bas %r14,.Lloader # load rest of ipl image
  152. l %r12,.Lparm # pointer to parameter area
  153. st %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number
  154. #
  155. # load parameter file from ipl device
  156. #
  157. .Lagain1:
  158. l %r2,.Linitrd # ramdisk loc. is temp
  159. bas %r14,.Lloader # load parameter file
  160. ltr %r2,%r2 # got anything ?
  161. bz .Lnopf
  162. chi %r2,895
  163. bnh .Lnotrunc
  164. la %r2,895
  165. .Lnotrunc:
  166. l %r4,.Linitrd
  167. clc 0(3,%r4),.L_hdr # if it is HDRx
  168. bz .Lagain1 # skip dataset header
  169. clc 0(3,%r4),.L_eof # if it is EOFx
  170. bz .Lagain1 # skip dateset trailer
  171. la %r5,0(%r4,%r2)
  172. lr %r3,%r2
  173. la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
  174. mvc 0(256,%r3),0(%r4)
  175. mvc 256(256,%r3),256(%r4)
  176. mvc 512(256,%r3),512(%r4)
  177. mvc 768(122,%r3),768(%r4)
  178. slr %r0,%r0
  179. b .Lcntlp
  180. .Ldelspc:
  181. ic %r0,0(%r2,%r3)
  182. chi %r0,0x20 # is it a space ?
  183. be .Lcntlp
  184. ahi %r2,1
  185. b .Leolp
  186. .Lcntlp:
  187. brct %r2,.Ldelspc
  188. .Leolp:
  189. slr %r0,%r0
  190. stc %r0,0(%r2,%r3) # terminate buffer
  191. .Lnopf:
  192. #
  193. # load ramdisk from ipl device
  194. #
  195. .Lagain2:
  196. l %r2,.Linitrd # addr of ramdisk
  197. st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12)
  198. bas %r14,.Lloader # load ramdisk
  199. st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd
  200. ltr %r2,%r2
  201. bnz .Lrdcont
  202. st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found
  203. .Lrdcont:
  204. l %r2,.Linitrd
  205. clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
  206. bz .Lagain2
  207. clc 0(3,%r2),.L_eof
  208. bz .Lagain2
  209. #
  210. # reset files in VM reader
  211. #
  212. stidp .Lcpuid # store cpuid
  213. tm .Lcpuid,0xff # running VM ?
  214. bno .Lnoreset
  215. la %r2,.Lreset
  216. lhi %r3,26
  217. diag %r2,%r3,8
  218. la %r5,.Lirb
  219. stsch 0(%r5) # check if irq is pending
  220. tm 30(%r5),0x0f # by verifying if any of the
  221. bnz .Lwaitforirq # activity or status control
  222. tm 31(%r5),0xff # bits is set in the schib
  223. bz .Lnoreset
  224. .Lwaitforirq:
  225. bas %r14,.Lirqwait # wait for IO interrupt
  226. c %r1,0xb8 # compare subchannel number
  227. bne .Lwaitforirq
  228. la %r5,.Lirb
  229. tsch 0(%r5)
  230. .Lnoreset:
  231. b .Lnoload
  232. #
  233. # everything loaded, go for it
  234. #
  235. .Lnoload:
  236. l %r1,.Lstartup
  237. br %r1
  238. .Linitrd:.long _end # default address of initrd
  239. .Lparm: .long PARMAREA
  240. .Lstartup: .long startup
  241. .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
  242. .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
  243. .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
  244. .L_eof: .long 0xc5d6c600 /* C'EOF' */
  245. .L_hdr: .long 0xc8c4d900 /* C'HDR' */
  246. .align 8
  247. .Lcpuid:.fill 8,1,0
  248. #
  249. # SALIPL loader support. Based on a patch by Rob van der Heij.
  250. # This entry point is called directly from the SALIPL loader and
  251. # doesn't need a builtin ipl record.
  252. #
  253. .org 0x800
  254. ENTRY(start)
  255. stm %r0,%r15,0x07b0 # store registers
  256. bas %r14,.Lsetmode # Immediately switch to 64 bit mode
  257. basr %r12,%r0
  258. .base:
  259. l %r11,.parm
  260. l %r8,.cmd # pointer to command buffer
  261. ltr %r9,%r9 # do we have SALIPL parameters?
  262. bp .sk8x8
  263. mvc 0(64,%r8),0x00b0 # copy saved registers
  264. xc 64(240-64,%r8),0(%r8) # remainder of buffer
  265. tr 0(64,%r8),.lowcase
  266. b .gotr
  267. .sk8x8:
  268. mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
  269. .gotr:
  270. slr %r0,%r0
  271. st %r0,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r11)
  272. st %r0,INITRD_START+ARCH_OFFSET-PARMAREA(%r11)
  273. j startup # continue with startup
  274. .cmd: .long COMMAND_LINE # address of command line buffer
  275. .parm: .long PARMAREA
  276. .lowcase:
  277. .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
  278. .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
  279. .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
  280. .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
  281. .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
  282. .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
  283. .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
  284. .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
  285. .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
  286. .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
  287. .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
  288. .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
  289. .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
  290. .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
  291. .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
  292. .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
  293. .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
  294. .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
  295. .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
  296. .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
  297. .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
  298. .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
  299. .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
  300. .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
  301. .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
  302. .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
  303. .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
  304. .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
  305. .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
  306. .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
  307. .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
  308. .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
  309. #
  310. # startup-code at 0x10000, running in absolute addressing mode
  311. # this is called either by the ipl loader or directly by PSW restart
  312. # or linload or SALIPL
  313. #
  314. .org 0x10000
  315. ENTRY(startup)
  316. j .Lep_startup_normal
  317. .org 0x10008
  318. #
  319. # This is a list of s390 kernel entry points. At address 0x1000f the number of
  320. # valid entry points is stored.
  321. #
  322. # IMPORTANT: Do not change this table, it is s390 kernel ABI!
  323. #
  324. .ascii "S390EP"
  325. .byte 0x00,0x01
  326. #
  327. # kdump startup-code at 0x10010, running in 64 bit absolute addressing mode
  328. #
  329. .org 0x10010
  330. ENTRY(startup_kdump)
  331. j .Lep_startup_kdump
  332. .Lep_startup_normal:
  333. mvi __LC_AR_MODE_ID,1 # set esame flag
  334. slr %r0,%r0 # set cpuid to zero
  335. lhi %r1,2 # mode 2 = esame (dump)
  336. sigp %r1,%r0,0x12 # switch to esame mode
  337. bras %r13,0f
  338. .fill 16,4,0x0
  339. 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs
  340. sam31 # switch to 31 bit addressing mode
  341. basr %r13,0 # get base
  342. .LPG0:
  343. xc 0x200(256),0x200 # partially clear lowcore
  344. xc 0x300(256),0x300
  345. xc 0xe00(256),0xe00
  346. stck __LC_LAST_UPDATE_CLOCK
  347. spt 6f-.LPG0(%r13)
  348. mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
  349. xc __LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST
  350. # check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10}
  351. .insn s,0xb2b10000,0 # store facilities @ __LC_STFL_FAC_LIST
  352. tm __LC_STFL_FAC_LIST,0x01 # stfle available ?
  353. jz 0f
  354. la %r0,1
  355. .insn s,0xb2b00000,__LC_STFL_FAC_LIST # store facility list extended
  356. # verify if all required facilities are supported by the machine
  357. 0: la %r1,__LC_STFL_FAC_LIST
  358. la %r2,3f+8-.LPG0(%r13)
  359. l %r3,0(%r2)
  360. 1: l %r0,0(%r1)
  361. n %r0,4(%r2)
  362. cl %r0,4(%r2)
  363. jne 2f
  364. la %r1,4(%r1)
  365. la %r2,4(%r2)
  366. ahi %r3,-1
  367. jnz 1b
  368. j 4f
  369. 2: l %r15,.Lstack-.LPG0(%r13)
  370. ahi %r15,-96
  371. la %r2,.Lals_string-.LPG0(%r13)
  372. l %r3,.Lsclp_print-.LPG0(%r13)
  373. basr %r14,%r3
  374. lpsw 3f-.LPG0(%r13) # machine type not good enough, crash
  375. .Lals_string:
  376. .asciz "The Linux kernel requires more recent processor hardware"
  377. .Lsclp_print:
  378. .long _sclp_print_early
  379. .Lstack:
  380. .long 0x8000 + (1<<(PAGE_SHIFT+THREAD_ORDER))
  381. .align 16
  382. 3: .long 0x000a0000,0x8badcccc
  383. # List of facilities that are required. If not all facilities are present
  384. # the kernel will crash. Format is number of facility words with bits set,
  385. # followed by the facility words.
  386. #if defined(CONFIG_MARCH_Z13)
  387. .long 3, 0xc100eff2, 0xf46ce800, 0x00400000
  388. #elif defined(CONFIG_MARCH_ZEC12)
  389. .long 3, 0xc100eff2, 0xf46ce800, 0x00400000
  390. #elif defined(CONFIG_MARCH_Z196)
  391. .long 2, 0xc100eff2, 0xf46c0000
  392. #elif defined(CONFIG_MARCH_Z10)
  393. .long 2, 0xc100eff2, 0xf0680000
  394. #elif defined(CONFIG_MARCH_Z9_109)
  395. .long 1, 0xc100efc2
  396. #elif defined(CONFIG_MARCH_Z990)
  397. .long 1, 0xc0002000
  398. #elif defined(CONFIG_MARCH_Z900)
  399. .long 1, 0xc0000000
  400. #endif
  401. 4:
  402. /* Continue with 64bit startup code in head64.S */
  403. sam64 # switch to 64 bit mode
  404. jg startup_continue
  405. .align 8
  406. 6: .long 0x7fffffff,0xffffffff
  407. #include "head_kdump.S"
  408. #
  409. # params at 10400 (setup.h)
  410. #
  411. .org PARMAREA
  412. .long 0,0 # IPL_DEVICE
  413. .long 0,0 # INITRD_START
  414. .long 0,0 # INITRD_SIZE
  415. .long 0,0 # OLDMEM_BASE
  416. .long 0,0 # OLDMEM_SIZE
  417. .org COMMAND_LINE
  418. .byte "root=/dev/ram0 ro"
  419. .byte 0
  420. .org 0x11000