switch_to.h 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175
  1. /*
  2. * Copyright IBM Corp. 1999, 2009
  3. *
  4. * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
  5. */
  6. #ifndef __ASM_SWITCH_TO_H
  7. #define __ASM_SWITCH_TO_H
  8. #include <linux/thread_info.h>
  9. #include <asm/ptrace.h>
  10. extern struct task_struct *__switch_to(void *, void *);
  11. extern void update_cr_regs(struct task_struct *task);
  12. static inline int test_fp_ctl(u32 fpc)
  13. {
  14. u32 orig_fpc;
  15. int rc;
  16. asm volatile(
  17. " efpc %1\n"
  18. " sfpc %2\n"
  19. "0: sfpc %1\n"
  20. " la %0,0\n"
  21. "1:\n"
  22. EX_TABLE(0b,1b)
  23. : "=d" (rc), "=d" (orig_fpc)
  24. : "d" (fpc), "0" (-EINVAL));
  25. return rc;
  26. }
  27. static inline void save_fp_ctl(u32 *fpc)
  28. {
  29. asm volatile(
  30. " stfpc %0\n"
  31. : "+Q" (*fpc));
  32. }
  33. static inline int restore_fp_ctl(u32 *fpc)
  34. {
  35. int rc;
  36. asm volatile(
  37. " lfpc %1\n"
  38. "0: la %0,0\n"
  39. "1:\n"
  40. EX_TABLE(0b,1b)
  41. : "=d" (rc) : "Q" (*fpc), "0" (-EINVAL));
  42. return rc;
  43. }
  44. static inline void save_fp_regs(freg_t *fprs)
  45. {
  46. asm volatile("std 0,%0" : "=Q" (fprs[0]));
  47. asm volatile("std 2,%0" : "=Q" (fprs[2]));
  48. asm volatile("std 4,%0" : "=Q" (fprs[4]));
  49. asm volatile("std 6,%0" : "=Q" (fprs[6]));
  50. asm volatile("std 1,%0" : "=Q" (fprs[1]));
  51. asm volatile("std 3,%0" : "=Q" (fprs[3]));
  52. asm volatile("std 5,%0" : "=Q" (fprs[5]));
  53. asm volatile("std 7,%0" : "=Q" (fprs[7]));
  54. asm volatile("std 8,%0" : "=Q" (fprs[8]));
  55. asm volatile("std 9,%0" : "=Q" (fprs[9]));
  56. asm volatile("std 10,%0" : "=Q" (fprs[10]));
  57. asm volatile("std 11,%0" : "=Q" (fprs[11]));
  58. asm volatile("std 12,%0" : "=Q" (fprs[12]));
  59. asm volatile("std 13,%0" : "=Q" (fprs[13]));
  60. asm volatile("std 14,%0" : "=Q" (fprs[14]));
  61. asm volatile("std 15,%0" : "=Q" (fprs[15]));
  62. }
  63. static inline void restore_fp_regs(freg_t *fprs)
  64. {
  65. asm volatile("ld 0,%0" : : "Q" (fprs[0]));
  66. asm volatile("ld 2,%0" : : "Q" (fprs[2]));
  67. asm volatile("ld 4,%0" : : "Q" (fprs[4]));
  68. asm volatile("ld 6,%0" : : "Q" (fprs[6]));
  69. asm volatile("ld 1,%0" : : "Q" (fprs[1]));
  70. asm volatile("ld 3,%0" : : "Q" (fprs[3]));
  71. asm volatile("ld 5,%0" : : "Q" (fprs[5]));
  72. asm volatile("ld 7,%0" : : "Q" (fprs[7]));
  73. asm volatile("ld 8,%0" : : "Q" (fprs[8]));
  74. asm volatile("ld 9,%0" : : "Q" (fprs[9]));
  75. asm volatile("ld 10,%0" : : "Q" (fprs[10]));
  76. asm volatile("ld 11,%0" : : "Q" (fprs[11]));
  77. asm volatile("ld 12,%0" : : "Q" (fprs[12]));
  78. asm volatile("ld 13,%0" : : "Q" (fprs[13]));
  79. asm volatile("ld 14,%0" : : "Q" (fprs[14]));
  80. asm volatile("ld 15,%0" : : "Q" (fprs[15]));
  81. }
  82. static inline void save_vx_regs(__vector128 *vxrs)
  83. {
  84. typedef struct { __vector128 _[__NUM_VXRS]; } addrtype;
  85. asm volatile(
  86. " la 1,%0\n"
  87. " .word 0xe70f,0x1000,0x003e\n" /* vstm 0,15,0(1) */
  88. " .word 0xe70f,0x1100,0x0c3e\n" /* vstm 16,31,256(1) */
  89. : "=Q" (*(addrtype *) vxrs) : : "1");
  90. }
  91. static inline void save_vx_regs_safe(__vector128 *vxrs)
  92. {
  93. unsigned long cr0, flags;
  94. flags = arch_local_irq_save();
  95. __ctl_store(cr0, 0, 0);
  96. __ctl_set_bit(0, 17);
  97. __ctl_set_bit(0, 18);
  98. save_vx_regs(vxrs);
  99. __ctl_load(cr0, 0, 0);
  100. arch_local_irq_restore(flags);
  101. }
  102. static inline void restore_vx_regs(__vector128 *vxrs)
  103. {
  104. typedef struct { __vector128 _[__NUM_VXRS]; } addrtype;
  105. asm volatile(
  106. " la 1,%0\n"
  107. " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */
  108. " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */
  109. : : "Q" (*(addrtype *) vxrs) : "1");
  110. }
  111. static inline void save_fp_vx_regs(struct task_struct *task)
  112. {
  113. if (task->thread.vxrs)
  114. save_vx_regs(task->thread.vxrs);
  115. else
  116. save_fp_regs(task->thread.fp_regs.fprs);
  117. }
  118. static inline void restore_fp_vx_regs(struct task_struct *task)
  119. {
  120. if (task->thread.vxrs)
  121. restore_vx_regs(task->thread.vxrs);
  122. else
  123. restore_fp_regs(task->thread.fp_regs.fprs);
  124. }
  125. static inline void save_access_regs(unsigned int *acrs)
  126. {
  127. typedef struct { int _[NUM_ACRS]; } acrstype;
  128. asm volatile("stam 0,15,%0" : "=Q" (*(acrstype *)acrs));
  129. }
  130. static inline void restore_access_regs(unsigned int *acrs)
  131. {
  132. typedef struct { int _[NUM_ACRS]; } acrstype;
  133. asm volatile("lam 0,15,%0" : : "Q" (*(acrstype *)acrs));
  134. }
  135. #define switch_to(prev,next,last) do { \
  136. if (prev->mm) { \
  137. save_fp_ctl(&prev->thread.fp_regs.fpc); \
  138. save_fp_vx_regs(prev); \
  139. save_access_regs(&prev->thread.acrs[0]); \
  140. save_ri_cb(prev->thread.ri_cb); \
  141. } \
  142. if (next->mm) { \
  143. update_cr_regs(next); \
  144. restore_fp_ctl(&next->thread.fp_regs.fpc); \
  145. restore_fp_vx_regs(next); \
  146. restore_access_regs(&next->thread.acrs[0]); \
  147. restore_ri_cb(next->thread.ri_cb, prev->thread.ri_cb); \
  148. } \
  149. prev = __switch_to(prev,next); \
  150. } while (0)
  151. #endif /* __ASM_SWITCH_TO_H */