bpf_jit_comp.c 19 KB

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  1. /*
  2. * BPF JIT compiler for ARM64
  3. *
  4. * Copyright (C) 2014 Zi Shen Lim <zlim.lnx@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #define pr_fmt(fmt) "bpf_jit: " fmt
  19. #include <linux/filter.h>
  20. #include <linux/printk.h>
  21. #include <linux/skbuff.h>
  22. #include <linux/slab.h>
  23. #include <asm/byteorder.h>
  24. #include <asm/cacheflush.h>
  25. #include <asm/debug-monitors.h>
  26. #include "bpf_jit.h"
  27. int bpf_jit_enable __read_mostly;
  28. #define TMP_REG_1 (MAX_BPF_REG + 0)
  29. #define TMP_REG_2 (MAX_BPF_REG + 1)
  30. /* Map BPF registers to A64 registers */
  31. static const int bpf2a64[] = {
  32. /* return value from in-kernel function, and exit value from eBPF */
  33. [BPF_REG_0] = A64_R(7),
  34. /* arguments from eBPF program to in-kernel function */
  35. [BPF_REG_1] = A64_R(0),
  36. [BPF_REG_2] = A64_R(1),
  37. [BPF_REG_3] = A64_R(2),
  38. [BPF_REG_4] = A64_R(3),
  39. [BPF_REG_5] = A64_R(4),
  40. /* callee saved registers that in-kernel function will preserve */
  41. [BPF_REG_6] = A64_R(19),
  42. [BPF_REG_7] = A64_R(20),
  43. [BPF_REG_8] = A64_R(21),
  44. [BPF_REG_9] = A64_R(22),
  45. /* read-only frame pointer to access stack */
  46. [BPF_REG_FP] = A64_FP,
  47. /* temporary register for internal BPF JIT */
  48. [TMP_REG_1] = A64_R(23),
  49. [TMP_REG_2] = A64_R(24),
  50. };
  51. struct jit_ctx {
  52. const struct bpf_prog *prog;
  53. int idx;
  54. int tmp_used;
  55. int epilogue_offset;
  56. int *offset;
  57. u32 *image;
  58. };
  59. static inline void emit(const u32 insn, struct jit_ctx *ctx)
  60. {
  61. if (ctx->image != NULL)
  62. ctx->image[ctx->idx] = cpu_to_le32(insn);
  63. ctx->idx++;
  64. }
  65. static inline void emit_a64_mov_i64(const int reg, const u64 val,
  66. struct jit_ctx *ctx)
  67. {
  68. u64 tmp = val;
  69. int shift = 0;
  70. emit(A64_MOVZ(1, reg, tmp & 0xffff, shift), ctx);
  71. tmp >>= 16;
  72. shift += 16;
  73. while (tmp) {
  74. if (tmp & 0xffff)
  75. emit(A64_MOVK(1, reg, tmp & 0xffff, shift), ctx);
  76. tmp >>= 16;
  77. shift += 16;
  78. }
  79. }
  80. static inline void emit_a64_mov_i(const int is64, const int reg,
  81. const s32 val, struct jit_ctx *ctx)
  82. {
  83. u16 hi = val >> 16;
  84. u16 lo = val & 0xffff;
  85. if (hi & 0x8000) {
  86. if (hi == 0xffff) {
  87. emit(A64_MOVN(is64, reg, (u16)~lo, 0), ctx);
  88. } else {
  89. emit(A64_MOVN(is64, reg, (u16)~hi, 16), ctx);
  90. emit(A64_MOVK(is64, reg, lo, 0), ctx);
  91. }
  92. } else {
  93. emit(A64_MOVZ(is64, reg, lo, 0), ctx);
  94. if (hi)
  95. emit(A64_MOVK(is64, reg, hi, 16), ctx);
  96. }
  97. }
  98. static inline int bpf2a64_offset(int bpf_to, int bpf_from,
  99. const struct jit_ctx *ctx)
  100. {
  101. int to = ctx->offset[bpf_to + 1];
  102. /* -1 to account for the Branch instruction */
  103. int from = ctx->offset[bpf_from + 1] - 1;
  104. return to - from;
  105. }
  106. static void jit_fill_hole(void *area, unsigned int size)
  107. {
  108. u32 *ptr;
  109. /* We are guaranteed to have aligned memory. */
  110. for (ptr = area; size >= sizeof(u32); size -= sizeof(u32))
  111. *ptr++ = cpu_to_le32(AARCH64_BREAK_FAULT);
  112. }
  113. static inline int epilogue_offset(const struct jit_ctx *ctx)
  114. {
  115. int to = ctx->epilogue_offset;
  116. int from = ctx->idx;
  117. return to - from;
  118. }
  119. /* Stack must be multiples of 16B */
  120. #define STACK_ALIGN(sz) (((sz) + 15) & ~15)
  121. static void build_prologue(struct jit_ctx *ctx)
  122. {
  123. const u8 r6 = bpf2a64[BPF_REG_6];
  124. const u8 r7 = bpf2a64[BPF_REG_7];
  125. const u8 r8 = bpf2a64[BPF_REG_8];
  126. const u8 r9 = bpf2a64[BPF_REG_9];
  127. const u8 fp = bpf2a64[BPF_REG_FP];
  128. const u8 ra = bpf2a64[BPF_REG_A];
  129. const u8 rx = bpf2a64[BPF_REG_X];
  130. const u8 tmp1 = bpf2a64[TMP_REG_1];
  131. const u8 tmp2 = bpf2a64[TMP_REG_2];
  132. int stack_size = MAX_BPF_STACK;
  133. stack_size += 4; /* extra for skb_copy_bits buffer */
  134. stack_size = STACK_ALIGN(stack_size);
  135. /* Save callee-saved register */
  136. emit(A64_PUSH(r6, r7, A64_SP), ctx);
  137. emit(A64_PUSH(r8, r9, A64_SP), ctx);
  138. if (ctx->tmp_used)
  139. emit(A64_PUSH(tmp1, tmp2, A64_SP), ctx);
  140. /* Set up BPF stack */
  141. emit(A64_SUB_I(1, A64_SP, A64_SP, stack_size), ctx);
  142. /* Set up frame pointer */
  143. emit(A64_MOV(1, fp, A64_SP), ctx);
  144. /* Clear registers A and X */
  145. emit_a64_mov_i64(ra, 0, ctx);
  146. emit_a64_mov_i64(rx, 0, ctx);
  147. }
  148. static void build_epilogue(struct jit_ctx *ctx)
  149. {
  150. const u8 r0 = bpf2a64[BPF_REG_0];
  151. const u8 r6 = bpf2a64[BPF_REG_6];
  152. const u8 r7 = bpf2a64[BPF_REG_7];
  153. const u8 r8 = bpf2a64[BPF_REG_8];
  154. const u8 r9 = bpf2a64[BPF_REG_9];
  155. const u8 fp = bpf2a64[BPF_REG_FP];
  156. const u8 tmp1 = bpf2a64[TMP_REG_1];
  157. const u8 tmp2 = bpf2a64[TMP_REG_2];
  158. int stack_size = MAX_BPF_STACK;
  159. stack_size += 4; /* extra for skb_copy_bits buffer */
  160. stack_size = STACK_ALIGN(stack_size);
  161. /* We're done with BPF stack */
  162. emit(A64_ADD_I(1, A64_SP, A64_SP, stack_size), ctx);
  163. /* Restore callee-saved register */
  164. if (ctx->tmp_used)
  165. emit(A64_POP(tmp1, tmp2, A64_SP), ctx);
  166. emit(A64_POP(r8, r9, A64_SP), ctx);
  167. emit(A64_POP(r6, r7, A64_SP), ctx);
  168. /* Restore frame pointer */
  169. emit(A64_MOV(1, fp, A64_SP), ctx);
  170. /* Set return value */
  171. emit(A64_MOV(1, A64_R(0), r0), ctx);
  172. emit(A64_RET(A64_LR), ctx);
  173. }
  174. /* JITs an eBPF instruction.
  175. * Returns:
  176. * 0 - successfully JITed an 8-byte eBPF instruction.
  177. * >0 - successfully JITed a 16-byte eBPF instruction.
  178. * <0 - failed to JIT.
  179. */
  180. static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
  181. {
  182. const u8 code = insn->code;
  183. const u8 dst = bpf2a64[insn->dst_reg];
  184. const u8 src = bpf2a64[insn->src_reg];
  185. const u8 tmp = bpf2a64[TMP_REG_1];
  186. const u8 tmp2 = bpf2a64[TMP_REG_2];
  187. const s16 off = insn->off;
  188. const s32 imm = insn->imm;
  189. const int i = insn - ctx->prog->insnsi;
  190. const bool is64 = BPF_CLASS(code) == BPF_ALU64;
  191. u8 jmp_cond;
  192. s32 jmp_offset;
  193. switch (code) {
  194. /* dst = src */
  195. case BPF_ALU | BPF_MOV | BPF_X:
  196. case BPF_ALU64 | BPF_MOV | BPF_X:
  197. emit(A64_MOV(is64, dst, src), ctx);
  198. break;
  199. /* dst = dst OP src */
  200. case BPF_ALU | BPF_ADD | BPF_X:
  201. case BPF_ALU64 | BPF_ADD | BPF_X:
  202. emit(A64_ADD(is64, dst, dst, src), ctx);
  203. break;
  204. case BPF_ALU | BPF_SUB | BPF_X:
  205. case BPF_ALU64 | BPF_SUB | BPF_X:
  206. emit(A64_SUB(is64, dst, dst, src), ctx);
  207. break;
  208. case BPF_ALU | BPF_AND | BPF_X:
  209. case BPF_ALU64 | BPF_AND | BPF_X:
  210. emit(A64_AND(is64, dst, dst, src), ctx);
  211. break;
  212. case BPF_ALU | BPF_OR | BPF_X:
  213. case BPF_ALU64 | BPF_OR | BPF_X:
  214. emit(A64_ORR(is64, dst, dst, src), ctx);
  215. break;
  216. case BPF_ALU | BPF_XOR | BPF_X:
  217. case BPF_ALU64 | BPF_XOR | BPF_X:
  218. emit(A64_EOR(is64, dst, dst, src), ctx);
  219. break;
  220. case BPF_ALU | BPF_MUL | BPF_X:
  221. case BPF_ALU64 | BPF_MUL | BPF_X:
  222. emit(A64_MUL(is64, dst, dst, src), ctx);
  223. break;
  224. case BPF_ALU | BPF_DIV | BPF_X:
  225. case BPF_ALU64 | BPF_DIV | BPF_X:
  226. emit(A64_UDIV(is64, dst, dst, src), ctx);
  227. break;
  228. case BPF_ALU | BPF_MOD | BPF_X:
  229. case BPF_ALU64 | BPF_MOD | BPF_X:
  230. ctx->tmp_used = 1;
  231. emit(A64_UDIV(is64, tmp, dst, src), ctx);
  232. emit(A64_MUL(is64, tmp, tmp, src), ctx);
  233. emit(A64_SUB(is64, dst, dst, tmp), ctx);
  234. break;
  235. case BPF_ALU | BPF_LSH | BPF_X:
  236. case BPF_ALU64 | BPF_LSH | BPF_X:
  237. emit(A64_LSLV(is64, dst, dst, src), ctx);
  238. break;
  239. case BPF_ALU | BPF_RSH | BPF_X:
  240. case BPF_ALU64 | BPF_RSH | BPF_X:
  241. emit(A64_LSRV(is64, dst, dst, src), ctx);
  242. break;
  243. case BPF_ALU | BPF_ARSH | BPF_X:
  244. case BPF_ALU64 | BPF_ARSH | BPF_X:
  245. emit(A64_ASRV(is64, dst, dst, src), ctx);
  246. break;
  247. /* dst = -dst */
  248. case BPF_ALU | BPF_NEG:
  249. case BPF_ALU64 | BPF_NEG:
  250. emit(A64_NEG(is64, dst, dst), ctx);
  251. break;
  252. /* dst = BSWAP##imm(dst) */
  253. case BPF_ALU | BPF_END | BPF_FROM_LE:
  254. case BPF_ALU | BPF_END | BPF_FROM_BE:
  255. #ifdef CONFIG_CPU_BIG_ENDIAN
  256. if (BPF_SRC(code) == BPF_FROM_BE)
  257. break;
  258. #else /* !CONFIG_CPU_BIG_ENDIAN */
  259. if (BPF_SRC(code) == BPF_FROM_LE)
  260. break;
  261. #endif
  262. switch (imm) {
  263. case 16:
  264. emit(A64_REV16(is64, dst, dst), ctx);
  265. break;
  266. case 32:
  267. emit(A64_REV32(is64, dst, dst), ctx);
  268. break;
  269. case 64:
  270. emit(A64_REV64(dst, dst), ctx);
  271. break;
  272. }
  273. break;
  274. /* dst = imm */
  275. case BPF_ALU | BPF_MOV | BPF_K:
  276. case BPF_ALU64 | BPF_MOV | BPF_K:
  277. emit_a64_mov_i(is64, dst, imm, ctx);
  278. break;
  279. /* dst = dst OP imm */
  280. case BPF_ALU | BPF_ADD | BPF_K:
  281. case BPF_ALU64 | BPF_ADD | BPF_K:
  282. ctx->tmp_used = 1;
  283. emit_a64_mov_i(is64, tmp, imm, ctx);
  284. emit(A64_ADD(is64, dst, dst, tmp), ctx);
  285. break;
  286. case BPF_ALU | BPF_SUB | BPF_K:
  287. case BPF_ALU64 | BPF_SUB | BPF_K:
  288. ctx->tmp_used = 1;
  289. emit_a64_mov_i(is64, tmp, imm, ctx);
  290. emit(A64_SUB(is64, dst, dst, tmp), ctx);
  291. break;
  292. case BPF_ALU | BPF_AND | BPF_K:
  293. case BPF_ALU64 | BPF_AND | BPF_K:
  294. ctx->tmp_used = 1;
  295. emit_a64_mov_i(is64, tmp, imm, ctx);
  296. emit(A64_AND(is64, dst, dst, tmp), ctx);
  297. break;
  298. case BPF_ALU | BPF_OR | BPF_K:
  299. case BPF_ALU64 | BPF_OR | BPF_K:
  300. ctx->tmp_used = 1;
  301. emit_a64_mov_i(is64, tmp, imm, ctx);
  302. emit(A64_ORR(is64, dst, dst, tmp), ctx);
  303. break;
  304. case BPF_ALU | BPF_XOR | BPF_K:
  305. case BPF_ALU64 | BPF_XOR | BPF_K:
  306. ctx->tmp_used = 1;
  307. emit_a64_mov_i(is64, tmp, imm, ctx);
  308. emit(A64_EOR(is64, dst, dst, tmp), ctx);
  309. break;
  310. case BPF_ALU | BPF_MUL | BPF_K:
  311. case BPF_ALU64 | BPF_MUL | BPF_K:
  312. ctx->tmp_used = 1;
  313. emit_a64_mov_i(is64, tmp, imm, ctx);
  314. emit(A64_MUL(is64, dst, dst, tmp), ctx);
  315. break;
  316. case BPF_ALU | BPF_DIV | BPF_K:
  317. case BPF_ALU64 | BPF_DIV | BPF_K:
  318. ctx->tmp_used = 1;
  319. emit_a64_mov_i(is64, tmp, imm, ctx);
  320. emit(A64_UDIV(is64, dst, dst, tmp), ctx);
  321. break;
  322. case BPF_ALU | BPF_MOD | BPF_K:
  323. case BPF_ALU64 | BPF_MOD | BPF_K:
  324. ctx->tmp_used = 1;
  325. emit_a64_mov_i(is64, tmp2, imm, ctx);
  326. emit(A64_UDIV(is64, tmp, dst, tmp2), ctx);
  327. emit(A64_MUL(is64, tmp, tmp, tmp2), ctx);
  328. emit(A64_SUB(is64, dst, dst, tmp), ctx);
  329. break;
  330. case BPF_ALU | BPF_LSH | BPF_K:
  331. case BPF_ALU64 | BPF_LSH | BPF_K:
  332. emit(A64_LSL(is64, dst, dst, imm), ctx);
  333. break;
  334. case BPF_ALU | BPF_RSH | BPF_K:
  335. case BPF_ALU64 | BPF_RSH | BPF_K:
  336. emit(A64_LSR(is64, dst, dst, imm), ctx);
  337. break;
  338. case BPF_ALU | BPF_ARSH | BPF_K:
  339. case BPF_ALU64 | BPF_ARSH | BPF_K:
  340. emit(A64_ASR(is64, dst, dst, imm), ctx);
  341. break;
  342. #define check_imm(bits, imm) do { \
  343. if ((((imm) > 0) && ((imm) >> (bits))) || \
  344. (((imm) < 0) && (~(imm) >> (bits)))) { \
  345. pr_info("[%2d] imm=%d(0x%x) out of range\n", \
  346. i, imm, imm); \
  347. return -EINVAL; \
  348. } \
  349. } while (0)
  350. #define check_imm19(imm) check_imm(19, imm)
  351. #define check_imm26(imm) check_imm(26, imm)
  352. /* JUMP off */
  353. case BPF_JMP | BPF_JA:
  354. jmp_offset = bpf2a64_offset(i + off, i, ctx);
  355. check_imm26(jmp_offset);
  356. emit(A64_B(jmp_offset), ctx);
  357. break;
  358. /* IF (dst COND src) JUMP off */
  359. case BPF_JMP | BPF_JEQ | BPF_X:
  360. case BPF_JMP | BPF_JGT | BPF_X:
  361. case BPF_JMP | BPF_JGE | BPF_X:
  362. case BPF_JMP | BPF_JNE | BPF_X:
  363. case BPF_JMP | BPF_JSGT | BPF_X:
  364. case BPF_JMP | BPF_JSGE | BPF_X:
  365. emit(A64_CMP(1, dst, src), ctx);
  366. emit_cond_jmp:
  367. jmp_offset = bpf2a64_offset(i + off, i, ctx);
  368. check_imm19(jmp_offset);
  369. switch (BPF_OP(code)) {
  370. case BPF_JEQ:
  371. jmp_cond = A64_COND_EQ;
  372. break;
  373. case BPF_JGT:
  374. jmp_cond = A64_COND_HI;
  375. break;
  376. case BPF_JGE:
  377. jmp_cond = A64_COND_CS;
  378. break;
  379. case BPF_JNE:
  380. jmp_cond = A64_COND_NE;
  381. break;
  382. case BPF_JSGT:
  383. jmp_cond = A64_COND_GT;
  384. break;
  385. case BPF_JSGE:
  386. jmp_cond = A64_COND_GE;
  387. break;
  388. default:
  389. return -EFAULT;
  390. }
  391. emit(A64_B_(jmp_cond, jmp_offset), ctx);
  392. break;
  393. case BPF_JMP | BPF_JSET | BPF_X:
  394. emit(A64_TST(1, dst, src), ctx);
  395. goto emit_cond_jmp;
  396. /* IF (dst COND imm) JUMP off */
  397. case BPF_JMP | BPF_JEQ | BPF_K:
  398. case BPF_JMP | BPF_JGT | BPF_K:
  399. case BPF_JMP | BPF_JGE | BPF_K:
  400. case BPF_JMP | BPF_JNE | BPF_K:
  401. case BPF_JMP | BPF_JSGT | BPF_K:
  402. case BPF_JMP | BPF_JSGE | BPF_K:
  403. ctx->tmp_used = 1;
  404. emit_a64_mov_i(1, tmp, imm, ctx);
  405. emit(A64_CMP(1, dst, tmp), ctx);
  406. goto emit_cond_jmp;
  407. case BPF_JMP | BPF_JSET | BPF_K:
  408. ctx->tmp_used = 1;
  409. emit_a64_mov_i(1, tmp, imm, ctx);
  410. emit(A64_TST(1, dst, tmp), ctx);
  411. goto emit_cond_jmp;
  412. /* function call */
  413. case BPF_JMP | BPF_CALL:
  414. {
  415. const u8 r0 = bpf2a64[BPF_REG_0];
  416. const u64 func = (u64)__bpf_call_base + imm;
  417. ctx->tmp_used = 1;
  418. emit_a64_mov_i64(tmp, func, ctx);
  419. emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
  420. emit(A64_MOV(1, A64_FP, A64_SP), ctx);
  421. emit(A64_BLR(tmp), ctx);
  422. emit(A64_MOV(1, r0, A64_R(0)), ctx);
  423. emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
  424. break;
  425. }
  426. /* function return */
  427. case BPF_JMP | BPF_EXIT:
  428. /* Optimization: when last instruction is EXIT,
  429. simply fallthrough to epilogue. */
  430. if (i == ctx->prog->len - 1)
  431. break;
  432. jmp_offset = epilogue_offset(ctx);
  433. check_imm26(jmp_offset);
  434. emit(A64_B(jmp_offset), ctx);
  435. break;
  436. /* dst = imm64 */
  437. case BPF_LD | BPF_IMM | BPF_DW:
  438. {
  439. const struct bpf_insn insn1 = insn[1];
  440. u64 imm64;
  441. if (insn1.code != 0 || insn1.src_reg != 0 ||
  442. insn1.dst_reg != 0 || insn1.off != 0) {
  443. /* Note: verifier in BPF core must catch invalid
  444. * instructions.
  445. */
  446. pr_err_once("Invalid BPF_LD_IMM64 instruction\n");
  447. return -EINVAL;
  448. }
  449. imm64 = (u64)insn1.imm << 32 | (u32)imm;
  450. emit_a64_mov_i64(dst, imm64, ctx);
  451. return 1;
  452. }
  453. /* LDX: dst = *(size *)(src + off) */
  454. case BPF_LDX | BPF_MEM | BPF_W:
  455. case BPF_LDX | BPF_MEM | BPF_H:
  456. case BPF_LDX | BPF_MEM | BPF_B:
  457. case BPF_LDX | BPF_MEM | BPF_DW:
  458. ctx->tmp_used = 1;
  459. emit_a64_mov_i(1, tmp, off, ctx);
  460. switch (BPF_SIZE(code)) {
  461. case BPF_W:
  462. emit(A64_LDR32(dst, src, tmp), ctx);
  463. break;
  464. case BPF_H:
  465. emit(A64_LDRH(dst, src, tmp), ctx);
  466. break;
  467. case BPF_B:
  468. emit(A64_LDRB(dst, src, tmp), ctx);
  469. break;
  470. case BPF_DW:
  471. emit(A64_LDR64(dst, src, tmp), ctx);
  472. break;
  473. }
  474. break;
  475. /* ST: *(size *)(dst + off) = imm */
  476. case BPF_ST | BPF_MEM | BPF_W:
  477. case BPF_ST | BPF_MEM | BPF_H:
  478. case BPF_ST | BPF_MEM | BPF_B:
  479. case BPF_ST | BPF_MEM | BPF_DW:
  480. goto notyet;
  481. /* STX: *(size *)(dst + off) = src */
  482. case BPF_STX | BPF_MEM | BPF_W:
  483. case BPF_STX | BPF_MEM | BPF_H:
  484. case BPF_STX | BPF_MEM | BPF_B:
  485. case BPF_STX | BPF_MEM | BPF_DW:
  486. ctx->tmp_used = 1;
  487. emit_a64_mov_i(1, tmp, off, ctx);
  488. switch (BPF_SIZE(code)) {
  489. case BPF_W:
  490. emit(A64_STR32(src, dst, tmp), ctx);
  491. break;
  492. case BPF_H:
  493. emit(A64_STRH(src, dst, tmp), ctx);
  494. break;
  495. case BPF_B:
  496. emit(A64_STRB(src, dst, tmp), ctx);
  497. break;
  498. case BPF_DW:
  499. emit(A64_STR64(src, dst, tmp), ctx);
  500. break;
  501. }
  502. break;
  503. /* STX XADD: lock *(u32 *)(dst + off) += src */
  504. case BPF_STX | BPF_XADD | BPF_W:
  505. /* STX XADD: lock *(u64 *)(dst + off) += src */
  506. case BPF_STX | BPF_XADD | BPF_DW:
  507. goto notyet;
  508. /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */
  509. case BPF_LD | BPF_ABS | BPF_W:
  510. case BPF_LD | BPF_ABS | BPF_H:
  511. case BPF_LD | BPF_ABS | BPF_B:
  512. /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */
  513. case BPF_LD | BPF_IND | BPF_W:
  514. case BPF_LD | BPF_IND | BPF_H:
  515. case BPF_LD | BPF_IND | BPF_B:
  516. {
  517. const u8 r0 = bpf2a64[BPF_REG_0]; /* r0 = return value */
  518. const u8 r6 = bpf2a64[BPF_REG_6]; /* r6 = pointer to sk_buff */
  519. const u8 fp = bpf2a64[BPF_REG_FP];
  520. const u8 r1 = bpf2a64[BPF_REG_1]; /* r1: struct sk_buff *skb */
  521. const u8 r2 = bpf2a64[BPF_REG_2]; /* r2: int k */
  522. const u8 r3 = bpf2a64[BPF_REG_3]; /* r3: unsigned int size */
  523. const u8 r4 = bpf2a64[BPF_REG_4]; /* r4: void *buffer */
  524. const u8 r5 = bpf2a64[BPF_REG_5]; /* r5: void *(*func)(...) */
  525. int size;
  526. emit(A64_MOV(1, r1, r6), ctx);
  527. emit_a64_mov_i(0, r2, imm, ctx);
  528. if (BPF_MODE(code) == BPF_IND)
  529. emit(A64_ADD(0, r2, r2, src), ctx);
  530. switch (BPF_SIZE(code)) {
  531. case BPF_W:
  532. size = 4;
  533. break;
  534. case BPF_H:
  535. size = 2;
  536. break;
  537. case BPF_B:
  538. size = 1;
  539. break;
  540. default:
  541. return -EINVAL;
  542. }
  543. emit_a64_mov_i64(r3, size, ctx);
  544. emit(A64_ADD_I(1, r4, fp, MAX_BPF_STACK), ctx);
  545. emit_a64_mov_i64(r5, (unsigned long)bpf_load_pointer, ctx);
  546. emit(A64_PUSH(A64_FP, A64_LR, A64_SP), ctx);
  547. emit(A64_MOV(1, A64_FP, A64_SP), ctx);
  548. emit(A64_BLR(r5), ctx);
  549. emit(A64_MOV(1, r0, A64_R(0)), ctx);
  550. emit(A64_POP(A64_FP, A64_LR, A64_SP), ctx);
  551. jmp_offset = epilogue_offset(ctx);
  552. check_imm19(jmp_offset);
  553. emit(A64_CBZ(1, r0, jmp_offset), ctx);
  554. emit(A64_MOV(1, r5, r0), ctx);
  555. switch (BPF_SIZE(code)) {
  556. case BPF_W:
  557. emit(A64_LDR32(r0, r5, A64_ZR), ctx);
  558. #ifndef CONFIG_CPU_BIG_ENDIAN
  559. emit(A64_REV32(0, r0, r0), ctx);
  560. #endif
  561. break;
  562. case BPF_H:
  563. emit(A64_LDRH(r0, r5, A64_ZR), ctx);
  564. #ifndef CONFIG_CPU_BIG_ENDIAN
  565. emit(A64_REV16(0, r0, r0), ctx);
  566. #endif
  567. break;
  568. case BPF_B:
  569. emit(A64_LDRB(r0, r5, A64_ZR), ctx);
  570. break;
  571. }
  572. break;
  573. }
  574. notyet:
  575. pr_info_once("*** NOT YET: opcode %02x ***\n", code);
  576. return -EFAULT;
  577. default:
  578. pr_err_once("unknown opcode %02x\n", code);
  579. return -EINVAL;
  580. }
  581. return 0;
  582. }
  583. static int build_body(struct jit_ctx *ctx)
  584. {
  585. const struct bpf_prog *prog = ctx->prog;
  586. int i;
  587. for (i = 0; i < prog->len; i++) {
  588. const struct bpf_insn *insn = &prog->insnsi[i];
  589. int ret;
  590. if (ctx->image == NULL)
  591. ctx->offset[i] = ctx->idx;
  592. ret = build_insn(insn, ctx);
  593. if (ret > 0) {
  594. i++;
  595. continue;
  596. }
  597. if (ret)
  598. return ret;
  599. }
  600. return 0;
  601. }
  602. static inline void bpf_flush_icache(void *start, void *end)
  603. {
  604. flush_icache_range((unsigned long)start, (unsigned long)end);
  605. }
  606. void bpf_jit_compile(struct bpf_prog *prog)
  607. {
  608. /* Nothing to do here. We support Internal BPF. */
  609. }
  610. void bpf_int_jit_compile(struct bpf_prog *prog)
  611. {
  612. struct bpf_binary_header *header;
  613. struct jit_ctx ctx;
  614. int image_size;
  615. u8 *image_ptr;
  616. if (!bpf_jit_enable)
  617. return;
  618. if (!prog || !prog->len)
  619. return;
  620. memset(&ctx, 0, sizeof(ctx));
  621. ctx.prog = prog;
  622. ctx.offset = kcalloc(prog->len, sizeof(int), GFP_KERNEL);
  623. if (ctx.offset == NULL)
  624. return;
  625. /* 1. Initial fake pass to compute ctx->idx. */
  626. /* Fake pass to fill in ctx->offset and ctx->tmp_used. */
  627. if (build_body(&ctx))
  628. goto out;
  629. build_prologue(&ctx);
  630. ctx.epilogue_offset = ctx.idx;
  631. build_epilogue(&ctx);
  632. /* Now we know the actual image size. */
  633. image_size = sizeof(u32) * ctx.idx;
  634. header = bpf_jit_binary_alloc(image_size, &image_ptr,
  635. sizeof(u32), jit_fill_hole);
  636. if (header == NULL)
  637. goto out;
  638. /* 2. Now, the actual pass. */
  639. ctx.image = (u32 *)image_ptr;
  640. ctx.idx = 0;
  641. build_prologue(&ctx);
  642. if (build_body(&ctx)) {
  643. bpf_jit_binary_free(header);
  644. goto out;
  645. }
  646. build_epilogue(&ctx);
  647. /* And we're done. */
  648. if (bpf_jit_enable > 1)
  649. bpf_jit_dump(prog->len, image_size, 2, ctx.image);
  650. bpf_flush_icache(ctx.image, ctx.image + ctx.idx);
  651. set_memory_ro((unsigned long)header, header->pages);
  652. prog->bpf_func = (void *)ctx.image;
  653. prog->jited = true;
  654. out:
  655. kfree(ctx.offset);
  656. }
  657. void bpf_jit_free(struct bpf_prog *prog)
  658. {
  659. unsigned long addr = (unsigned long)prog->bpf_func & PAGE_MASK;
  660. struct bpf_binary_header *header = (void *)addr;
  661. if (!prog->jited)
  662. goto free_filter;
  663. set_memory_rw(addr, header->pages);
  664. bpf_jit_binary_free(header);
  665. free_filter:
  666. bpf_prog_unlock_free(prog);
  667. }