smp.c 14 KB

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  1. /*
  2. * SMP initialisation and IPI support
  3. * Based on arch/arm/kernel/smp.c
  4. *
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/init.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/sched.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cache.h>
  25. #include <linux/profile.h>
  26. #include <linux/errno.h>
  27. #include <linux/mm.h>
  28. #include <linux/err.h>
  29. #include <linux/cpu.h>
  30. #include <linux/smp.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/irq.h>
  33. #include <linux/percpu.h>
  34. #include <linux/clockchips.h>
  35. #include <linux/completion.h>
  36. #include <linux/of.h>
  37. #include <linux/irq_work.h>
  38. #include <asm/alternative.h>
  39. #include <asm/atomic.h>
  40. #include <asm/cacheflush.h>
  41. #include <asm/cpu.h>
  42. #include <asm/cputype.h>
  43. #include <asm/cpu_ops.h>
  44. #include <asm/mmu_context.h>
  45. #include <asm/pgtable.h>
  46. #include <asm/pgalloc.h>
  47. #include <asm/processor.h>
  48. #include <asm/smp_plat.h>
  49. #include <asm/sections.h>
  50. #include <asm/tlbflush.h>
  51. #include <asm/ptrace.h>
  52. #define CREATE_TRACE_POINTS
  53. #include <trace/events/ipi.h>
  54. /*
  55. * as from 2.5, kernels no longer have an init_tasks structure
  56. * so we need some other way of telling a new secondary core
  57. * where to place its SVC stack
  58. */
  59. struct secondary_data secondary_data;
  60. enum ipi_msg_type {
  61. IPI_RESCHEDULE,
  62. IPI_CALL_FUNC,
  63. IPI_CPU_STOP,
  64. IPI_TIMER,
  65. IPI_IRQ_WORK,
  66. };
  67. /*
  68. * Boot a secondary CPU, and assign it the specified idle task.
  69. * This also gives us the initial stack to use for this CPU.
  70. */
  71. static int boot_secondary(unsigned int cpu, struct task_struct *idle)
  72. {
  73. if (cpu_ops[cpu]->cpu_boot)
  74. return cpu_ops[cpu]->cpu_boot(cpu);
  75. return -EOPNOTSUPP;
  76. }
  77. static DECLARE_COMPLETION(cpu_running);
  78. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  79. {
  80. int ret;
  81. /*
  82. * We need to tell the secondary core where to find its stack and the
  83. * page tables.
  84. */
  85. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  86. __flush_dcache_area(&secondary_data, sizeof(secondary_data));
  87. /*
  88. * Now bring the CPU into our world.
  89. */
  90. ret = boot_secondary(cpu, idle);
  91. if (ret == 0) {
  92. /*
  93. * CPU was successfully started, wait for it to come online or
  94. * time out.
  95. */
  96. wait_for_completion_timeout(&cpu_running,
  97. msecs_to_jiffies(1000));
  98. if (!cpu_online(cpu)) {
  99. pr_crit("CPU%u: failed to come online\n", cpu);
  100. ret = -EIO;
  101. }
  102. } else {
  103. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  104. }
  105. secondary_data.stack = NULL;
  106. return ret;
  107. }
  108. static void smp_store_cpu_info(unsigned int cpuid)
  109. {
  110. store_cpu_topology(cpuid);
  111. }
  112. /*
  113. * This is the secondary CPU boot entry. We're using this CPUs
  114. * idle thread stack, but a set of temporary page tables.
  115. */
  116. asmlinkage void secondary_start_kernel(void)
  117. {
  118. struct mm_struct *mm = &init_mm;
  119. unsigned int cpu = smp_processor_id();
  120. /*
  121. * All kernel threads share the same mm context; grab a
  122. * reference and switch to it.
  123. */
  124. atomic_inc(&mm->mm_count);
  125. current->active_mm = mm;
  126. cpumask_set_cpu(cpu, mm_cpumask(mm));
  127. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  128. printk("CPU%u: Booted secondary processor\n", cpu);
  129. /*
  130. * TTBR0 is only used for the identity mapping at this stage. Make it
  131. * point to zero page to avoid speculatively fetching new entries.
  132. */
  133. cpu_set_reserved_ttbr0();
  134. flush_tlb_all();
  135. cpu_set_default_tcr_t0sz();
  136. preempt_disable();
  137. trace_hardirqs_off();
  138. if (cpu_ops[cpu]->cpu_postboot)
  139. cpu_ops[cpu]->cpu_postboot();
  140. /*
  141. * Log the CPU info before it is marked online and might get read.
  142. */
  143. cpuinfo_store_cpu();
  144. /*
  145. * Enable GIC and timers.
  146. */
  147. notify_cpu_starting(cpu);
  148. smp_store_cpu_info(cpu);
  149. /*
  150. * OK, now it's safe to let the boot CPU continue. Wait for
  151. * the CPU migration code to notice that the CPU is online
  152. * before we continue.
  153. */
  154. set_cpu_online(cpu, true);
  155. complete(&cpu_running);
  156. local_dbg_enable();
  157. local_irq_enable();
  158. local_async_enable();
  159. /*
  160. * OK, it's off to the idle thread for us
  161. */
  162. cpu_startup_entry(CPUHP_ONLINE);
  163. }
  164. #ifdef CONFIG_HOTPLUG_CPU
  165. static int op_cpu_disable(unsigned int cpu)
  166. {
  167. /*
  168. * If we don't have a cpu_die method, abort before we reach the point
  169. * of no return. CPU0 may not have an cpu_ops, so test for it.
  170. */
  171. if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
  172. return -EOPNOTSUPP;
  173. /*
  174. * We may need to abort a hot unplug for some other mechanism-specific
  175. * reason.
  176. */
  177. if (cpu_ops[cpu]->cpu_disable)
  178. return cpu_ops[cpu]->cpu_disable(cpu);
  179. return 0;
  180. }
  181. /*
  182. * __cpu_disable runs on the processor to be shutdown.
  183. */
  184. int __cpu_disable(void)
  185. {
  186. unsigned int cpu = smp_processor_id();
  187. int ret;
  188. ret = op_cpu_disable(cpu);
  189. if (ret)
  190. return ret;
  191. /*
  192. * Take this CPU offline. Once we clear this, we can't return,
  193. * and we must not schedule until we're ready to give up the cpu.
  194. */
  195. set_cpu_online(cpu, false);
  196. /*
  197. * OK - migrate IRQs away from this CPU
  198. */
  199. migrate_irqs();
  200. /*
  201. * Remove this CPU from the vm mask set of all processes.
  202. */
  203. clear_tasks_mm_cpumask(cpu);
  204. return 0;
  205. }
  206. static int op_cpu_kill(unsigned int cpu)
  207. {
  208. /*
  209. * If we have no means of synchronising with the dying CPU, then assume
  210. * that it is really dead. We can only wait for an arbitrary length of
  211. * time and hope that it's dead, so let's skip the wait and just hope.
  212. */
  213. if (!cpu_ops[cpu]->cpu_kill)
  214. return 1;
  215. return cpu_ops[cpu]->cpu_kill(cpu);
  216. }
  217. static DECLARE_COMPLETION(cpu_died);
  218. /*
  219. * called on the thread which is asking for a CPU to be shutdown -
  220. * waits until shutdown has completed, or it is timed out.
  221. */
  222. void __cpu_die(unsigned int cpu)
  223. {
  224. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  225. pr_crit("CPU%u: cpu didn't die\n", cpu);
  226. return;
  227. }
  228. pr_notice("CPU%u: shutdown\n", cpu);
  229. /*
  230. * Now that the dying CPU is beyond the point of no return w.r.t.
  231. * in-kernel synchronisation, try to get the firwmare to help us to
  232. * verify that it has really left the kernel before we consider
  233. * clobbering anything it might still be using.
  234. */
  235. if (!op_cpu_kill(cpu))
  236. pr_warn("CPU%d may not have shut down cleanly\n", cpu);
  237. }
  238. /*
  239. * Called from the idle thread for the CPU which has been shutdown.
  240. *
  241. * Note that we disable IRQs here, but do not re-enable them
  242. * before returning to the caller. This is also the behaviour
  243. * of the other hotplug-cpu capable cores, so presumably coming
  244. * out of idle fixes this.
  245. */
  246. void cpu_die(void)
  247. {
  248. unsigned int cpu = smp_processor_id();
  249. idle_task_exit();
  250. local_irq_disable();
  251. /* Tell __cpu_die() that this CPU is now safe to dispose of */
  252. complete(&cpu_died);
  253. /*
  254. * Actually shutdown the CPU. This must never fail. The specific hotplug
  255. * mechanism must perform all required cache maintenance to ensure that
  256. * no dirty lines are lost in the process of shutting down the CPU.
  257. */
  258. cpu_ops[cpu]->cpu_die(cpu);
  259. BUG();
  260. }
  261. #endif
  262. void __init smp_cpus_done(unsigned int max_cpus)
  263. {
  264. pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
  265. do_post_cpus_up_work();
  266. }
  267. void __init smp_prepare_boot_cpu(void)
  268. {
  269. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  270. }
  271. /*
  272. * Enumerate the possible CPU set from the device tree and build the
  273. * cpu logical map array containing MPIDR values related to logical
  274. * cpus. Assumes that cpu_logical_map(0) has already been initialized.
  275. */
  276. void __init of_smp_init_cpus(void)
  277. {
  278. struct device_node *dn = NULL;
  279. unsigned int i, cpu = 1;
  280. bool bootcpu_valid = false;
  281. while ((dn = of_find_node_by_type(dn, "cpu"))) {
  282. const u32 *cell;
  283. u64 hwid;
  284. /*
  285. * A cpu node with missing "reg" property is
  286. * considered invalid to build a cpu_logical_map
  287. * entry.
  288. */
  289. cell = of_get_property(dn, "reg", NULL);
  290. if (!cell) {
  291. pr_err("%s: missing reg property\n", dn->full_name);
  292. goto next;
  293. }
  294. hwid = of_read_number(cell, of_n_addr_cells(dn));
  295. /*
  296. * Non affinity bits must be set to 0 in the DT
  297. */
  298. if (hwid & ~MPIDR_HWID_BITMASK) {
  299. pr_err("%s: invalid reg property\n", dn->full_name);
  300. goto next;
  301. }
  302. /*
  303. * Duplicate MPIDRs are a recipe for disaster. Scan
  304. * all initialized entries and check for
  305. * duplicates. If any is found just ignore the cpu.
  306. * cpu_logical_map was initialized to INVALID_HWID to
  307. * avoid matching valid MPIDR values.
  308. */
  309. for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
  310. if (cpu_logical_map(i) == hwid) {
  311. pr_err("%s: duplicate cpu reg properties in the DT\n",
  312. dn->full_name);
  313. goto next;
  314. }
  315. }
  316. /*
  317. * The numbering scheme requires that the boot CPU
  318. * must be assigned logical id 0. Record it so that
  319. * the logical map built from DT is validated and can
  320. * be used.
  321. */
  322. if (hwid == cpu_logical_map(0)) {
  323. if (bootcpu_valid) {
  324. pr_err("%s: duplicate boot cpu reg property in DT\n",
  325. dn->full_name);
  326. goto next;
  327. }
  328. bootcpu_valid = true;
  329. /*
  330. * cpu_logical_map has already been
  331. * initialized and the boot cpu doesn't need
  332. * the enable-method so continue without
  333. * incrementing cpu.
  334. */
  335. continue;
  336. }
  337. if (cpu >= NR_CPUS)
  338. goto next;
  339. if (cpu_read_ops(dn, cpu) != 0)
  340. goto next;
  341. if (cpu_ops[cpu]->cpu_init(dn, cpu))
  342. goto next;
  343. pr_debug("cpu logical map 0x%llx\n", hwid);
  344. cpu_logical_map(cpu) = hwid;
  345. next:
  346. cpu++;
  347. }
  348. /* sanity check */
  349. if (cpu > NR_CPUS)
  350. pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
  351. cpu, NR_CPUS);
  352. if (!bootcpu_valid) {
  353. pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
  354. return;
  355. }
  356. /*
  357. * All the cpus that made it to the cpu_logical_map have been
  358. * validated so set them as possible cpus.
  359. */
  360. for (i = 0; i < NR_CPUS; i++)
  361. if (cpu_logical_map(i) != INVALID_HWID)
  362. set_cpu_possible(i, true);
  363. }
  364. void __init smp_prepare_cpus(unsigned int max_cpus)
  365. {
  366. int err;
  367. unsigned int cpu, ncores = num_possible_cpus();
  368. init_cpu_topology();
  369. smp_store_cpu_info(smp_processor_id());
  370. /*
  371. * are we trying to boot more cores than exist?
  372. */
  373. if (max_cpus > ncores)
  374. max_cpus = ncores;
  375. /* Don't bother if we're effectively UP */
  376. if (max_cpus <= 1)
  377. return;
  378. /*
  379. * Initialise the present map (which describes the set of CPUs
  380. * actually populated at the present time) and release the
  381. * secondaries from the bootloader.
  382. *
  383. * Make sure we online at most (max_cpus - 1) additional CPUs.
  384. */
  385. max_cpus--;
  386. for_each_possible_cpu(cpu) {
  387. if (max_cpus == 0)
  388. break;
  389. if (cpu == smp_processor_id())
  390. continue;
  391. if (!cpu_ops[cpu])
  392. continue;
  393. err = cpu_ops[cpu]->cpu_prepare(cpu);
  394. if (err)
  395. continue;
  396. set_cpu_present(cpu, true);
  397. max_cpus--;
  398. }
  399. }
  400. void (*__smp_cross_call)(const struct cpumask *, unsigned int);
  401. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  402. {
  403. __smp_cross_call = fn;
  404. }
  405. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  406. #define S(x,s) [x] = s
  407. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  408. S(IPI_CALL_FUNC, "Function call interrupts"),
  409. S(IPI_CPU_STOP, "CPU stop interrupts"),
  410. S(IPI_TIMER, "Timer broadcast interrupts"),
  411. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  412. };
  413. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  414. {
  415. trace_ipi_raise(target, ipi_types[ipinr]);
  416. __smp_cross_call(target, ipinr);
  417. }
  418. void show_ipi_list(struct seq_file *p, int prec)
  419. {
  420. unsigned int cpu, i;
  421. for (i = 0; i < NR_IPI; i++) {
  422. seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
  423. prec >= 4 ? " " : "");
  424. for_each_online_cpu(cpu)
  425. seq_printf(p, "%10u ",
  426. __get_irq_stat(cpu, ipi_irqs[i]));
  427. seq_printf(p, " %s\n", ipi_types[i]);
  428. }
  429. }
  430. u64 smp_irq_stat_cpu(unsigned int cpu)
  431. {
  432. u64 sum = 0;
  433. int i;
  434. for (i = 0; i < NR_IPI; i++)
  435. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  436. return sum;
  437. }
  438. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  439. {
  440. smp_cross_call(mask, IPI_CALL_FUNC);
  441. }
  442. void arch_send_call_function_single_ipi(int cpu)
  443. {
  444. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
  445. }
  446. #ifdef CONFIG_IRQ_WORK
  447. void arch_irq_work_raise(void)
  448. {
  449. if (__smp_cross_call)
  450. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  451. }
  452. #endif
  453. static DEFINE_RAW_SPINLOCK(stop_lock);
  454. /*
  455. * ipi_cpu_stop - handle IPI from smp_send_stop()
  456. */
  457. static void ipi_cpu_stop(unsigned int cpu)
  458. {
  459. if (system_state == SYSTEM_BOOTING ||
  460. system_state == SYSTEM_RUNNING) {
  461. raw_spin_lock(&stop_lock);
  462. pr_crit("CPU%u: stopping\n", cpu);
  463. dump_stack();
  464. raw_spin_unlock(&stop_lock);
  465. }
  466. set_cpu_online(cpu, false);
  467. local_irq_disable();
  468. while (1)
  469. cpu_relax();
  470. }
  471. /*
  472. * Main handler for inter-processor interrupts
  473. */
  474. void handle_IPI(int ipinr, struct pt_regs *regs)
  475. {
  476. unsigned int cpu = smp_processor_id();
  477. struct pt_regs *old_regs = set_irq_regs(regs);
  478. if ((unsigned)ipinr < NR_IPI) {
  479. trace_ipi_entry(ipi_types[ipinr]);
  480. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  481. }
  482. switch (ipinr) {
  483. case IPI_RESCHEDULE:
  484. scheduler_ipi();
  485. break;
  486. case IPI_CALL_FUNC:
  487. irq_enter();
  488. generic_smp_call_function_interrupt();
  489. irq_exit();
  490. break;
  491. case IPI_CPU_STOP:
  492. irq_enter();
  493. ipi_cpu_stop(cpu);
  494. irq_exit();
  495. break;
  496. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  497. case IPI_TIMER:
  498. irq_enter();
  499. tick_receive_broadcast();
  500. irq_exit();
  501. break;
  502. #endif
  503. #ifdef CONFIG_IRQ_WORK
  504. case IPI_IRQ_WORK:
  505. irq_enter();
  506. irq_work_run();
  507. irq_exit();
  508. break;
  509. #endif
  510. default:
  511. pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
  512. break;
  513. }
  514. if ((unsigned)ipinr < NR_IPI)
  515. trace_ipi_exit(ipi_types[ipinr]);
  516. set_irq_regs(old_regs);
  517. }
  518. void smp_send_reschedule(int cpu)
  519. {
  520. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  521. }
  522. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  523. void tick_broadcast(const struct cpumask *mask)
  524. {
  525. smp_cross_call(mask, IPI_TIMER);
  526. }
  527. #endif
  528. void smp_send_stop(void)
  529. {
  530. unsigned long timeout;
  531. if (num_online_cpus() > 1) {
  532. cpumask_t mask;
  533. cpumask_copy(&mask, cpu_online_mask);
  534. cpumask_clear_cpu(smp_processor_id(), &mask);
  535. smp_cross_call(&mask, IPI_CPU_STOP);
  536. }
  537. /* Wait up to one second for other CPUs to stop */
  538. timeout = USEC_PER_SEC;
  539. while (num_online_cpus() > 1 && timeout--)
  540. udelay(1);
  541. if (num_online_cpus() > 1)
  542. pr_warning("SMP: failed to stop secondary CPUs\n");
  543. }
  544. /*
  545. * not supported here
  546. */
  547. int setup_profiling_timer(unsigned int multiplier)
  548. {
  549. return -EINVAL;
  550. }