platsmp.c 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105
  1. /*
  2. * Copyright 2010-2011 Calxeda, Inc.
  3. * Copyright 2012 Pavel Machek <pavel@denx.de>
  4. * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
  5. * Copyright (C) 2012 Altera Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms and conditions of the GNU General Public License,
  9. * version 2, as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/init.h>
  21. #include <linux/smp.h>
  22. #include <linux/io.h>
  23. #include <linux/of.h>
  24. #include <linux/of_address.h>
  25. #include <asm/cacheflush.h>
  26. #include <asm/smp_scu.h>
  27. #include <asm/smp_plat.h>
  28. #include "core.h"
  29. static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
  30. {
  31. int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
  32. if (socfpga_cpu1start_addr) {
  33. /* This will put CPU #1 into reset. */
  34. writel(RSTMGR_MPUMODRST_CPU1,
  35. rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
  36. memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
  37. writel(virt_to_phys(socfpga_secondary_startup),
  38. sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
  39. flush_cache_all();
  40. smp_wmb();
  41. outer_clean_range(0, trampoline_size);
  42. /* This will release CPU #1 out of reset. */
  43. writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
  44. }
  45. return 0;
  46. }
  47. /*
  48. * Initialise the CPU possible map early - this describes the CPUs
  49. * which may be present or become present in the system.
  50. */
  51. static void __init socfpga_smp_init_cpus(void)
  52. {
  53. unsigned int i, ncores;
  54. ncores = scu_get_core_count(socfpga_scu_base_addr);
  55. for (i = 0; i < ncores; i++)
  56. set_cpu_possible(i, true);
  57. /* sanity check */
  58. if (ncores > num_possible_cpus()) {
  59. pr_warn("socfpga: no. of cores (%d) greater than configured"
  60. "maximum of %d - clipping\n", ncores, num_possible_cpus());
  61. ncores = num_possible_cpus();
  62. }
  63. for (i = 0; i < ncores; i++)
  64. set_cpu_possible(i, true);
  65. }
  66. static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
  67. {
  68. scu_enable(socfpga_scu_base_addr);
  69. }
  70. /*
  71. * platform-specific code to shutdown a CPU
  72. *
  73. * Called with IRQs disabled
  74. */
  75. static void socfpga_cpu_die(unsigned int cpu)
  76. {
  77. /* Do WFI. If we wake up early, go back into WFI */
  78. while (1)
  79. cpu_do_idle();
  80. }
  81. struct smp_operations socfpga_smp_ops __initdata = {
  82. .smp_init_cpus = socfpga_smp_init_cpus,
  83. .smp_prepare_cpus = socfpga_smp_prepare_cpus,
  84. .smp_boot_secondary = socfpga_boot_secondary,
  85. #ifdef CONFIG_HOTPLUG_CPU
  86. .cpu_die = socfpga_cpu_die,
  87. #endif
  88. };