timer.c 3.1 KB

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  1. /*
  2. * SH-Mobile Timer
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2002 - 2009 Paul Mundt
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/platform_device.h>
  17. #include <linux/clocksource.h>
  18. #include <linux/delay.h>
  19. #include <linux/of_address.h>
  20. static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
  21. unsigned int mult, unsigned int div)
  22. {
  23. /* calculate a worst-case loops-per-jiffy value
  24. * based on maximum cpu core hz setting and the
  25. * __delay() implementation in arch/arm/lib/delay.S
  26. *
  27. * this will result in a longer delay than expected
  28. * when the cpu core runs on lower frequencies.
  29. */
  30. unsigned int value = HZ * div / mult;
  31. if (!preset_lpj)
  32. preset_lpj = max_cpu_core_hz / value;
  33. }
  34. void __init shmobile_init_delay(void)
  35. {
  36. struct device_node *np, *cpus;
  37. bool is_a7_a8_a9 = false;
  38. bool is_a15 = false;
  39. bool has_arch_timer = false;
  40. u32 max_freq = 0;
  41. cpus = of_find_node_by_path("/cpus");
  42. if (!cpus)
  43. return;
  44. for_each_child_of_node(cpus, np) {
  45. u32 freq;
  46. if (!of_property_read_u32(np, "clock-frequency", &freq))
  47. max_freq = max(max_freq, freq);
  48. if (of_device_is_compatible(np, "arm,cortex-a8") ||
  49. of_device_is_compatible(np, "arm,cortex-a9")) {
  50. is_a7_a8_a9 = true;
  51. } else if (of_device_is_compatible(np, "arm,cortex-a7")) {
  52. is_a7_a8_a9 = true;
  53. has_arch_timer = true;
  54. } else if (of_device_is_compatible(np, "arm,cortex-a15")) {
  55. is_a15 = true;
  56. has_arch_timer = true;
  57. }
  58. }
  59. of_node_put(cpus);
  60. if (!max_freq)
  61. return;
  62. #ifdef CONFIG_ARCH_SHMOBILE_LEGACY
  63. /* Non-multiplatform r8a73a4 SoC cannot use arch timer due
  64. * to GIC being initialized from C and arch timer via DT */
  65. if (of_machine_is_compatible("renesas,r8a73a4"))
  66. has_arch_timer = false;
  67. /* Non-multiplatform r8a7790 SoC cannot use arch timer due
  68. * to GIC being initialized from C and arch timer via DT */
  69. if (of_machine_is_compatible("renesas,r8a7790"))
  70. has_arch_timer = false;
  71. #endif
  72. if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
  73. if (is_a7_a8_a9)
  74. shmobile_setup_delay_hz(max_freq, 1, 3);
  75. else if (is_a15)
  76. shmobile_setup_delay_hz(max_freq, 2, 4);
  77. }
  78. }
  79. static void __init shmobile_late_time_init(void)
  80. {
  81. /*
  82. * Make sure all compiled-in early timers register themselves.
  83. *
  84. * Run probe() for two "earlytimer" devices, these will be the
  85. * clockevents and clocksource devices respectively. In the event
  86. * that only a clockevents device is available, we -ENODEV on the
  87. * clocksource and the jiffies clocksource is used transparently
  88. * instead. No error handling is necessary here.
  89. */
  90. early_platform_driver_register_all("earlytimer");
  91. early_platform_driver_probe("earlytimer", 2, 0);
  92. }
  93. void __init shmobile_earlytimer_init(void)
  94. {
  95. late_time_init = shmobile_late_time_init;
  96. }