board-bockw.c 18 KB

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  1. /*
  2. * Bock-W board support
  3. *
  4. * Copyright (C) 2013-2014 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. * Copyright (C) 2013-2014 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/mfd/tmio.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/mmc/sh_mobile_sdhi.h>
  20. #include <linux/mmc/sh_mmcif.h>
  21. #include <linux/mtd/partitions.h>
  22. #include <linux/pinctrl/machine.h>
  23. #include <linux/platform_data/camera-rcar.h>
  24. #include <linux/platform_data/usb-rcar-phy.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/regulator/fixed.h>
  27. #include <linux/regulator/machine.h>
  28. #include <linux/smsc911x.h>
  29. #include <linux/spi/spi.h>
  30. #include <linux/spi/flash.h>
  31. #include <linux/usb/renesas_usbhs.h>
  32. #include <media/soc_camera.h>
  33. #include <asm/mach/arch.h>
  34. #include <sound/rcar_snd.h>
  35. #include <sound/simple_card.h>
  36. #include "common.h"
  37. #include "irqs.h"
  38. #include "r8a7778.h"
  39. #define FPGA 0x18200000
  40. #define IRQ0MR 0x30
  41. #define COMCTLR 0x101c
  42. static void __iomem *fpga;
  43. /*
  44. * CN9(Upper side) SCIF/RCAN selection
  45. *
  46. * 1,4 3,6
  47. * SW40 SCIF RCAN
  48. * SW41 SCIF RCAN
  49. */
  50. /*
  51. * MMC (CN26) pin
  52. *
  53. * SW6 (D2) 3 pin
  54. * SW7 (D5) ON
  55. * SW8 (D3) 3 pin
  56. * SW10 (D4) 1 pin
  57. * SW12 (CLK) 1 pin
  58. * SW13 (D6) 3 pin
  59. * SW14 (CMD) ON
  60. * SW15 (D6) 1 pin
  61. * SW16 (D0) ON
  62. * SW17 (D1) ON
  63. * SW18 (D7) 3 pin
  64. * SW19 (MMC) 1 pin
  65. */
  66. /*
  67. * SSI settings
  68. *
  69. * SW45: 1-4 side (SSI5 out, ROUT/LOUT CN19 Mid)
  70. * SW46: 1101 (SSI6 Recorde)
  71. * SW47: 1110 (SSI5 Playback)
  72. * SW48: 11 (Recorde power)
  73. * SW49: 1 (SSI slave mode)
  74. * SW50: 1111 (SSI7, SSI8)
  75. * SW51: 1111 (SSI3, SSI4)
  76. * SW54: 1pin (ak4554 FPGA control)
  77. * SW55: 1 (CLKB is 24.5760MHz)
  78. * SW60: 1pin (ak4554 FPGA control)
  79. * SW61: 3pin (use X11 clock)
  80. * SW78: 3-6 (ak4642 connects I2C0)
  81. *
  82. * You can use sound as
  83. *
  84. * hw0: CN19: SSI56-AK4643
  85. * hw1: CN21: SSI3-AK4554(playback)
  86. * hw2: CN21: SSI4-AK4554(capture)
  87. * hw3: CN20: SSI7-AK4554(playback)
  88. * hw4: CN20: SSI8-AK4554(capture)
  89. *
  90. * this command is required when playback on hw0.
  91. *
  92. * # amixer set "LINEOUT Mixer DACL" on
  93. */
  94. /*
  95. * USB
  96. *
  97. * USB1 (CN29) can be Host/Function
  98. *
  99. * Host Func
  100. * SW98 1 2
  101. * SW99 1 3
  102. */
  103. /* Dummy supplies, where voltage doesn't matter */
  104. static struct regulator_consumer_supply dummy_supplies[] = {
  105. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  106. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  107. };
  108. static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
  109. REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
  110. REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
  111. };
  112. static struct smsc911x_platform_config smsc911x_data __initdata = {
  113. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  114. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  115. .flags = SMSC911X_USE_32BIT,
  116. .phy_interface = PHY_INTERFACE_MODE_MII,
  117. };
  118. static struct resource smsc911x_resources[] __initdata = {
  119. DEFINE_RES_MEM(0x18300000, 0x1000),
  120. DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  121. };
  122. #if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
  123. /*
  124. * When USB1 is Func
  125. */
  126. static int usbhsf_get_id(struct platform_device *pdev)
  127. {
  128. return USBHS_GADGET;
  129. }
  130. #define SUSPMODE 0x102
  131. static int usbhsf_power_ctrl(struct platform_device *pdev,
  132. void __iomem *base, int enable)
  133. {
  134. enable = !!enable;
  135. r8a7778_usb_phy_power(enable);
  136. iowrite16(enable << 14, base + SUSPMODE);
  137. return 0;
  138. }
  139. static struct resource usbhsf_resources[] __initdata = {
  140. DEFINE_RES_MEM(0xffe60000, 0x110),
  141. DEFINE_RES_IRQ(gic_iid(0x4f)),
  142. };
  143. static struct renesas_usbhs_platform_info usbhs_info __initdata = {
  144. .platform_callback = {
  145. .get_id = usbhsf_get_id,
  146. .power_ctrl = usbhsf_power_ctrl,
  147. },
  148. .driver_param = {
  149. .buswait_bwait = 4,
  150. .d0_tx_id = HPBDMA_SLAVE_USBFUNC_TX,
  151. .d1_rx_id = HPBDMA_SLAVE_USBFUNC_RX,
  152. },
  153. };
  154. #define USB_PHY_SETTING {.port1_func = 1, .ovc_pin[1].active_high = 1,}
  155. #define USB1_DEVICE "renesas_usbhs"
  156. #define ADD_USB_FUNC_DEVICE_IF_POSSIBLE() \
  157. platform_device_register_resndata( \
  158. NULL, "renesas_usbhs", -1, \
  159. usbhsf_resources, \
  160. ARRAY_SIZE(usbhsf_resources), \
  161. &usbhs_info, sizeof(struct renesas_usbhs_platform_info))
  162. #else
  163. /*
  164. * When USB1 is Host
  165. */
  166. #define USB_PHY_SETTING { }
  167. #define USB1_DEVICE "ehci-platform"
  168. #define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()
  169. #endif
  170. /* USB */
  171. static struct resource usb_phy_resources[] __initdata = {
  172. DEFINE_RES_MEM(0xffe70800, 0x100),
  173. DEFINE_RES_MEM(0xffe76000, 0x100),
  174. };
  175. static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
  176. USB_PHY_SETTING;
  177. /* SDHI */
  178. static struct tmio_mmc_data sdhi0_info __initdata = {
  179. .chan_priv_tx = (void *)HPBDMA_SLAVE_SDHI0_TX,
  180. .chan_priv_rx = (void *)HPBDMA_SLAVE_SDHI0_RX,
  181. .capabilities = MMC_CAP_SD_HIGHSPEED,
  182. .ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  183. .flags = TMIO_MMC_HAS_IDLE_WAIT,
  184. };
  185. static struct resource sdhi0_resources[] __initdata = {
  186. DEFINE_RES_MEM(0xFFE4C000, 0x100),
  187. DEFINE_RES_IRQ(gic_iid(0x77)),
  188. };
  189. /* Ether */
  190. static struct resource ether_resources[] __initdata = {
  191. DEFINE_RES_MEM(0xfde00000, 0x400),
  192. DEFINE_RES_IRQ(gic_iid(0x89)),
  193. };
  194. static struct sh_eth_plat_data ether_platform_data __initdata = {
  195. .phy = 0x01,
  196. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  197. .phy_interface = PHY_INTERFACE_MODE_RMII,
  198. /*
  199. * Although the LINK signal is available on the board, it's connected to
  200. * the link/activity LED output of the PHY, thus the link disappears and
  201. * reappears after each packet. We'd be better off ignoring such signal
  202. * and getting the link state from the PHY indirectly.
  203. */
  204. .no_ether_link = 1,
  205. };
  206. static struct platform_device_info ether_info __initdata = {
  207. .name = "r8a777x-ether",
  208. .id = -1,
  209. .res = ether_resources,
  210. .num_res = ARRAY_SIZE(ether_resources),
  211. .data = &ether_platform_data,
  212. .size_data = sizeof(ether_platform_data),
  213. .dma_mask = DMA_BIT_MASK(32),
  214. };
  215. /* I2C */
  216. static struct i2c_board_info i2c0_devices[] = {
  217. {
  218. I2C_BOARD_INFO("rx8581", 0x51),
  219. }, {
  220. I2C_BOARD_INFO("ak4643", 0x12),
  221. }
  222. };
  223. /* HSPI*/
  224. static struct mtd_partition m25p80_spi_flash_partitions[] = {
  225. {
  226. .name = "data(spi)",
  227. .size = 0x0100000,
  228. .offset = 0,
  229. },
  230. };
  231. static struct flash_platform_data spi_flash_data = {
  232. .name = "m25p80",
  233. .type = "s25fl008k",
  234. .parts = m25p80_spi_flash_partitions,
  235. .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
  236. };
  237. static struct spi_board_info spi_board_info[] __initdata = {
  238. {
  239. .modalias = "m25p80",
  240. .max_speed_hz = 104000000,
  241. .chip_select = 0,
  242. .bus_num = 0,
  243. .mode = SPI_MODE_0,
  244. .platform_data = &spi_flash_data,
  245. },
  246. };
  247. /* MMC */
  248. static struct resource mmc_resources[] __initdata = {
  249. DEFINE_RES_MEM(0xffe4e000, 0x100),
  250. DEFINE_RES_IRQ(gic_iid(0x5d)),
  251. };
  252. static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
  253. .sup_pclk = 0,
  254. .caps = MMC_CAP_4_BIT_DATA |
  255. MMC_CAP_8_BIT_DATA |
  256. MMC_CAP_NEEDS_POLL,
  257. };
  258. /* In the default configuration both decoders reside on I2C bus 0 */
  259. #define BOCKW_CAMERA(idx) \
  260. static struct i2c_board_info camera##idx##_info = { \
  261. I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
  262. }; \
  263. \
  264. static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
  265. .bus_id = idx, \
  266. .i2c_adapter_id = 0, \
  267. .board_info = &camera##idx##_info, \
  268. }
  269. BOCKW_CAMERA(0);
  270. BOCKW_CAMERA(1);
  271. /* VIN */
  272. static struct rcar_vin_platform_data vin_platform_data __initdata = {
  273. .flags = RCAR_VIN_BT656,
  274. };
  275. #define R8A7778_VIN(idx) \
  276. static struct resource vin##idx##_resources[] __initdata = { \
  277. DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
  278. DEFINE_RES_IRQ(gic_iid(0x5a)), \
  279. }; \
  280. \
  281. static struct platform_device_info vin##idx##_info __initdata = { \
  282. .name = "r8a7778-vin", \
  283. .id = idx, \
  284. .res = vin##idx##_resources, \
  285. .num_res = ARRAY_SIZE(vin##idx##_resources), \
  286. .dma_mask = DMA_BIT_MASK(32), \
  287. .data = &vin_platform_data, \
  288. .size_data = sizeof(vin_platform_data), \
  289. }
  290. R8A7778_VIN(0);
  291. R8A7778_VIN(1);
  292. /* Sound */
  293. static struct resource rsnd_resources[] __initdata = {
  294. [RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
  295. [RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
  296. [RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
  297. };
  298. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  299. RSND_SSI_UNUSED, /* SSI 0 */
  300. RSND_SSI_UNUSED, /* SSI 1 */
  301. RSND_SSI_UNUSED, /* SSI 2 */
  302. RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
  303. RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
  304. RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
  305. RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
  306. RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
  307. RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
  308. };
  309. static struct rsnd_src_platform_info rsnd_src[9] = {
  310. RSND_SRC_UNUSED, /* SRU 0 */
  311. RSND_SRC_UNUSED, /* SRU 1 */
  312. RSND_SRC_UNUSED, /* SRU 2 */
  313. RSND_SRC(0, 0),
  314. RSND_SRC(0, 0),
  315. RSND_SRC(0, 0),
  316. RSND_SRC(0, 0),
  317. RSND_SRC(0, 0),
  318. RSND_SRC(0, 0),
  319. };
  320. static struct rsnd_dai_platform_info rsnd_dai[] = {
  321. {
  322. .playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
  323. .capture = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
  324. }, {
  325. .playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
  326. }, {
  327. .capture = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
  328. }, {
  329. .playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
  330. }, {
  331. .capture = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
  332. },
  333. };
  334. enum {
  335. AK4554_34 = 0,
  336. AK4643_56,
  337. AK4554_78,
  338. SOUND_MAX,
  339. };
  340. static int rsnd_codec_power(int id, int enable)
  341. {
  342. static int sound_user[SOUND_MAX] = {0, 0, 0};
  343. int *usr = NULL;
  344. u32 bit;
  345. switch (id) {
  346. case 3:
  347. case 4:
  348. usr = sound_user + AK4554_34;
  349. bit = (1 << 10);
  350. break;
  351. case 5:
  352. case 6:
  353. usr = sound_user + AK4643_56;
  354. bit = (1 << 6);
  355. break;
  356. case 7:
  357. case 8:
  358. usr = sound_user + AK4554_78;
  359. bit = (1 << 7);
  360. break;
  361. }
  362. if (!usr)
  363. return -EIO;
  364. if (enable) {
  365. if (*usr == 0) {
  366. u32 val = ioread16(fpga + COMCTLR);
  367. val &= ~bit;
  368. iowrite16(val, fpga + COMCTLR);
  369. }
  370. (*usr)++;
  371. } else {
  372. if (*usr == 0)
  373. return 0;
  374. (*usr)--;
  375. if (*usr == 0) {
  376. u32 val = ioread16(fpga + COMCTLR);
  377. val |= bit;
  378. iowrite16(val, fpga + COMCTLR);
  379. }
  380. }
  381. return 0;
  382. }
  383. static int rsnd_start(int id)
  384. {
  385. return rsnd_codec_power(id, 1);
  386. }
  387. static int rsnd_stop(int id)
  388. {
  389. return rsnd_codec_power(id, 0);
  390. }
  391. static struct rcar_snd_info rsnd_info = {
  392. .flags = RSND_GEN1,
  393. .ssi_info = rsnd_ssi,
  394. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  395. .src_info = rsnd_src,
  396. .src_info_nr = ARRAY_SIZE(rsnd_src),
  397. .dai_info = rsnd_dai,
  398. .dai_info_nr = ARRAY_SIZE(rsnd_dai),
  399. .start = rsnd_start,
  400. .stop = rsnd_stop,
  401. };
  402. static struct asoc_simple_card_info rsnd_card_info[] = {
  403. /* SSI5, SSI6 */
  404. {
  405. .name = "AK4643",
  406. .card = "SSI56-AK4643",
  407. .codec = "ak4642-codec.0-0012",
  408. .platform = "rcar_sound",
  409. .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
  410. .cpu_dai = {
  411. .name = "rsnd-dai.0",
  412. },
  413. .codec_dai = {
  414. .name = "ak4642-hifi",
  415. .sysclk = 11289600,
  416. },
  417. },
  418. /* SSI3 */
  419. {
  420. .name = "AK4554",
  421. .card = "SSI3-AK4554(playback)",
  422. .codec = "ak4554-adc-dac.0",
  423. .platform = "rcar_sound",
  424. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_RIGHT_J,
  425. .cpu_dai = {
  426. .name = "rsnd-dai.1",
  427. },
  428. .codec_dai = {
  429. .name = "ak4554-hifi",
  430. },
  431. },
  432. /* SSI4 */
  433. {
  434. .name = "AK4554",
  435. .card = "SSI4-AK4554(capture)",
  436. .codec = "ak4554-adc-dac.0",
  437. .platform = "rcar_sound",
  438. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_LEFT_J,
  439. .cpu_dai = {
  440. .name = "rsnd-dai.2",
  441. },
  442. .codec_dai = {
  443. .name = "ak4554-hifi",
  444. },
  445. },
  446. /* SSI7 */
  447. {
  448. .name = "AK4554",
  449. .card = "SSI7-AK4554(playback)",
  450. .codec = "ak4554-adc-dac.1",
  451. .platform = "rcar_sound",
  452. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_RIGHT_J,
  453. .cpu_dai = {
  454. .name = "rsnd-dai.3",
  455. },
  456. .codec_dai = {
  457. .name = "ak4554-hifi",
  458. },
  459. },
  460. /* SSI8 */
  461. {
  462. .name = "AK4554",
  463. .card = "SSI8-AK4554(capture)",
  464. .codec = "ak4554-adc-dac.1",
  465. .platform = "rcar_sound",
  466. .daifmt = SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_LEFT_J,
  467. .cpu_dai = {
  468. .name = "rsnd-dai.4",
  469. },
  470. .codec_dai = {
  471. .name = "ak4554-hifi",
  472. },
  473. }
  474. };
  475. static const struct pinctrl_map bockw_pinctrl_map[] = {
  476. /* AUDIO */
  477. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  478. "audio_clk_a", "audio_clk"),
  479. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  480. "audio_clk_b", "audio_clk"),
  481. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  482. "ssi34_ctrl", "ssi"),
  483. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  484. "ssi3_data", "ssi"),
  485. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  486. "ssi4_data", "ssi"),
  487. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  488. "ssi5_ctrl", "ssi"),
  489. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  490. "ssi5_data", "ssi"),
  491. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  492. "ssi6_ctrl", "ssi"),
  493. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  494. "ssi6_data", "ssi"),
  495. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  496. "ssi78_ctrl", "ssi"),
  497. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  498. "ssi7_data", "ssi"),
  499. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  500. "ssi8_data", "ssi"),
  501. /* Ether */
  502. PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
  503. "ether_rmii", "ether"),
  504. /* HSPI0 */
  505. PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
  506. "hspi0_a", "hspi0"),
  507. /* MMC */
  508. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  509. "mmc_data8", "mmc"),
  510. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  511. "mmc_ctrl", "mmc"),
  512. /* SCIF0 */
  513. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  514. "scif0_data_a", "scif0"),
  515. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  516. "scif0_ctrl", "scif0"),
  517. /* USB */
  518. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  519. "usb0", "usb0"),
  520. PIN_MAP_MUX_GROUP_DEFAULT(USB1_DEVICE, "pfc-r8a7778",
  521. "usb1", "usb1"),
  522. /* SDHI0 */
  523. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  524. "sdhi0_data4", "sdhi0"),
  525. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  526. "sdhi0_ctrl", "sdhi0"),
  527. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  528. "sdhi0_cd", "sdhi0"),
  529. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  530. "sdhi0_wp", "sdhi0"),
  531. /* VIN0 */
  532. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  533. "vin0_clk", "vin0"),
  534. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  535. "vin0_data8", "vin0"),
  536. /* VIN1 */
  537. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  538. "vin1_clk", "vin1"),
  539. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  540. "vin1_data8", "vin1"),
  541. };
  542. #define PFC 0xfffc0000
  543. #define PUPR4 0x110
  544. static void __init bockw_init(void)
  545. {
  546. void __iomem *base;
  547. struct clk *clk;
  548. struct platform_device *pdev;
  549. int i;
  550. r8a7778_clock_init();
  551. r8a7778_init_irq_extpin(1);
  552. r8a7778_add_standard_devices();
  553. platform_device_register_full(&ether_info);
  554. platform_device_register_full(&vin0_info);
  555. /* VIN1 has a pin conflict with Ether */
  556. if (!IS_ENABLED(CONFIG_SH_ETH))
  557. platform_device_register_full(&vin1_info);
  558. platform_device_register_data(NULL, "soc-camera-pdrv", 0,
  559. &iclink0_ml86v7667,
  560. sizeof(iclink0_ml86v7667));
  561. platform_device_register_data(NULL, "soc-camera-pdrv", 1,
  562. &iclink1_ml86v7667,
  563. sizeof(iclink1_ml86v7667));
  564. i2c_register_board_info(0, i2c0_devices,
  565. ARRAY_SIZE(i2c0_devices));
  566. spi_register_board_info(spi_board_info,
  567. ARRAY_SIZE(spi_board_info));
  568. pinctrl_register_mappings(bockw_pinctrl_map,
  569. ARRAY_SIZE(bockw_pinctrl_map));
  570. r8a7778_pinmux_init();
  571. platform_device_register_resndata(
  572. NULL, "sh_mmcif", -1,
  573. mmc_resources, ARRAY_SIZE(mmc_resources),
  574. &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
  575. platform_device_register_resndata(
  576. NULL, "rcar_usb_phy", -1,
  577. usb_phy_resources,
  578. ARRAY_SIZE(usb_phy_resources),
  579. &usb_phy_platform_data,
  580. sizeof(struct rcar_phy_platform_data));
  581. regulator_register_fixed(0, dummy_supplies,
  582. ARRAY_SIZE(dummy_supplies));
  583. regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
  584. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  585. /* for SMSC */
  586. fpga = ioremap_nocache(FPGA, SZ_1M);
  587. if (fpga) {
  588. /*
  589. * CAUTION
  590. *
  591. * IRQ0/1 is cascaded interrupt from FPGA.
  592. * it should be cared in the future
  593. * Now, it is assuming IRQ0 was used only from SMSC.
  594. */
  595. u16 val = ioread16(fpga + IRQ0MR);
  596. val &= ~(1 << 4); /* enable SMSC911x */
  597. iowrite16(val, fpga + IRQ0MR);
  598. platform_device_register_resndata(
  599. NULL, "smsc911x", -1,
  600. smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
  601. &smsc911x_data, sizeof(smsc911x_data));
  602. }
  603. /* for SDHI */
  604. base = ioremap_nocache(PFC, 0x200);
  605. if (base) {
  606. /*
  607. * FIXME
  608. *
  609. * SDHI CD/WP pin needs pull-up
  610. */
  611. iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
  612. iounmap(base);
  613. platform_device_register_resndata(
  614. NULL, "sh_mobile_sdhi", 0,
  615. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  616. &sdhi0_info, sizeof(struct tmio_mmc_data));
  617. }
  618. /* for Audio */
  619. rsnd_codec_power(5, 1); /* enable ak4642 */
  620. platform_device_register_simple(
  621. "ak4554-adc-dac", 0, NULL, 0);
  622. platform_device_register_simple(
  623. "ak4554-adc-dac", 1, NULL, 0);
  624. pdev = platform_device_register_resndata(
  625. NULL, "rcar_sound", -1,
  626. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  627. &rsnd_info, sizeof(rsnd_info));
  628. clk = clk_get(&pdev->dev, "clk_b");
  629. clk_set_rate(clk, 24576000);
  630. clk_put(clk);
  631. for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
  632. struct platform_device_info cardinfo = {
  633. .name = "asoc-simple-card",
  634. .id = i,
  635. .data = &rsnd_card_info[i],
  636. .size_data = sizeof(struct asoc_simple_card_info),
  637. .dma_mask = DMA_BIT_MASK(32),
  638. };
  639. platform_device_register_full(&cardinfo);
  640. }
  641. }
  642. static void __init bockw_init_late(void)
  643. {
  644. r8a7778_init_late();
  645. ADD_USB_FUNC_DEVICE_IF_POSSIBLE();
  646. }
  647. static const char *bockw_boards_compat_dt[] __initdata = {
  648. "renesas,bockw",
  649. NULL,
  650. };
  651. DT_MACHINE_START(BOCKW_DT, "bockw")
  652. .init_early = shmobile_init_delay,
  653. .init_irq = r8a7778_init_irq_dt,
  654. .init_machine = bockw_init,
  655. .dt_compat = bockw_boards_compat_dt,
  656. .init_late = bockw_init_late,
  657. MACHINE_END