clk.h 4.3 KB

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  1. #ifndef __MACH_IMX_CLK_H
  2. #define __MACH_IMX_CLK_H
  3. #include <linux/spinlock.h>
  4. #include <linux/clk-provider.h>
  5. extern spinlock_t imx_ccm_lock;
  6. void imx_check_clocks(struct clk *clks[], unsigned int count);
  7. extern void imx_cscmr1_fixup(u32 *val);
  8. struct clk *imx_clk_pllv1(const char *name, const char *parent,
  9. void __iomem *base);
  10. struct clk *imx_clk_pllv2(const char *name, const char *parent,
  11. void __iomem *base);
  12. enum imx_pllv3_type {
  13. IMX_PLLV3_GENERIC,
  14. IMX_PLLV3_SYS,
  15. IMX_PLLV3_USB,
  16. IMX_PLLV3_USB_VF610,
  17. IMX_PLLV3_AV,
  18. IMX_PLLV3_ENET,
  19. };
  20. struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
  21. const char *parent_name, void __iomem *base, u32 div_mask);
  22. struct clk *clk_register_gate2(struct device *dev, const char *name,
  23. const char *parent_name, unsigned long flags,
  24. void __iomem *reg, u8 bit_idx,
  25. u8 clk_gate_flags, spinlock_t *lock,
  26. unsigned int *share_count);
  27. struct clk * imx_obtain_fixed_clock(
  28. const char *name, unsigned long rate);
  29. struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
  30. void __iomem *reg, u8 shift, u32 exclusive_mask);
  31. static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
  32. void __iomem *reg, u8 shift)
  33. {
  34. return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  35. shift, 0, &imx_ccm_lock, NULL);
  36. }
  37. static inline struct clk *imx_clk_gate2_shared(const char *name,
  38. const char *parent, void __iomem *reg, u8 shift,
  39. unsigned int *share_count)
  40. {
  41. return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  42. shift, 0, &imx_ccm_lock, share_count);
  43. }
  44. struct clk *imx_clk_pfd(const char *name, const char *parent_name,
  45. void __iomem *reg, u8 idx);
  46. struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
  47. void __iomem *reg, u8 shift, u8 width,
  48. void __iomem *busy_reg, u8 busy_shift);
  49. struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
  50. u8 width, void __iomem *busy_reg, u8 busy_shift,
  51. const char **parent_names, int num_parents);
  52. struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
  53. void __iomem *reg, u8 shift, u8 width,
  54. void (*fixup)(u32 *val));
  55. struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
  56. u8 shift, u8 width, const char **parents,
  57. int num_parents, void (*fixup)(u32 *val));
  58. static inline struct clk *imx_clk_fixed(const char *name, int rate)
  59. {
  60. return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
  61. }
  62. static inline struct clk *imx_clk_divider(const char *name, const char *parent,
  63. void __iomem *reg, u8 shift, u8 width)
  64. {
  65. return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
  66. reg, shift, width, 0, &imx_ccm_lock);
  67. }
  68. static inline struct clk *imx_clk_divider_flags(const char *name,
  69. const char *parent, void __iomem *reg, u8 shift, u8 width,
  70. unsigned long flags)
  71. {
  72. return clk_register_divider(NULL, name, parent, flags,
  73. reg, shift, width, 0, &imx_ccm_lock);
  74. }
  75. static inline struct clk *imx_clk_gate(const char *name, const char *parent,
  76. void __iomem *reg, u8 shift)
  77. {
  78. return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  79. shift, 0, &imx_ccm_lock);
  80. }
  81. static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
  82. void __iomem *reg, u8 shift)
  83. {
  84. return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  85. shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
  86. }
  87. static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
  88. u8 shift, u8 width, const char **parents, int num_parents)
  89. {
  90. return clk_register_mux(NULL, name, parents, num_parents,
  91. CLK_SET_RATE_NO_REPARENT, reg, shift,
  92. width, 0, &imx_ccm_lock);
  93. }
  94. static inline struct clk *imx_clk_mux_flags(const char *name,
  95. void __iomem *reg, u8 shift, u8 width, const char **parents,
  96. int num_parents, unsigned long flags)
  97. {
  98. return clk_register_mux(NULL, name, parents, num_parents,
  99. flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
  100. &imx_ccm_lock);
  101. }
  102. static inline struct clk *imx_clk_fixed_factor(const char *name,
  103. const char *parent, unsigned int mult, unsigned int div)
  104. {
  105. return clk_register_fixed_factor(NULL, name, parent,
  106. CLK_SET_RATE_PARENT, mult, div);
  107. }
  108. struct clk *imx_clk_cpu(const char *name, const char *parent_name,
  109. struct clk *div, struct clk *mux, struct clk *pll,
  110. struct clk *step);
  111. #endif