smp.c 16 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/cache.h>
  17. #include <linux/profile.h>
  18. #include <linux/errno.h>
  19. #include <linux/mm.h>
  20. #include <linux/err.h>
  21. #include <linux/cpu.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/irq.h>
  24. #include <linux/percpu.h>
  25. #include <linux/clockchips.h>
  26. #include <linux/completion.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/irq_work.h>
  29. #include <linux/atomic.h>
  30. #include <asm/smp.h>
  31. #include <asm/cacheflush.h>
  32. #include <asm/cpu.h>
  33. #include <asm/cputype.h>
  34. #include <asm/exception.h>
  35. #include <asm/idmap.h>
  36. #include <asm/topology.h>
  37. #include <asm/mmu_context.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/pgalloc.h>
  40. #include <asm/processor.h>
  41. #include <asm/sections.h>
  42. #include <asm/tlbflush.h>
  43. #include <asm/ptrace.h>
  44. #include <asm/smp_plat.h>
  45. #include <asm/virt.h>
  46. #include <asm/mach/arch.h>
  47. #include <asm/mpu.h>
  48. #define CREATE_TRACE_POINTS
  49. #include <trace/events/ipi.h>
  50. /*
  51. * as from 2.5, kernels no longer have an init_tasks structure
  52. * so we need some other way of telling a new secondary core
  53. * where to place its SVC stack
  54. */
  55. struct secondary_data secondary_data;
  56. /*
  57. * control for which core is the next to come out of the secondary
  58. * boot "holding pen"
  59. */
  60. volatile int pen_release = -1;
  61. enum ipi_msg_type {
  62. IPI_WAKEUP,
  63. IPI_TIMER,
  64. IPI_RESCHEDULE,
  65. IPI_CALL_FUNC,
  66. IPI_CALL_FUNC_SINGLE,
  67. IPI_CPU_STOP,
  68. IPI_IRQ_WORK,
  69. IPI_COMPLETION,
  70. };
  71. static DECLARE_COMPLETION(cpu_running);
  72. static struct smp_operations smp_ops;
  73. void __init smp_set_ops(struct smp_operations *ops)
  74. {
  75. if (ops)
  76. smp_ops = *ops;
  77. };
  78. static unsigned long get_arch_pgd(pgd_t *pgd)
  79. {
  80. phys_addr_t pgdir = virt_to_idmap(pgd);
  81. BUG_ON(pgdir & ARCH_PGD_MASK);
  82. return pgdir >> ARCH_PGD_SHIFT;
  83. }
  84. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  85. {
  86. int ret;
  87. if (!smp_ops.smp_boot_secondary)
  88. return -ENOSYS;
  89. /*
  90. * We need to tell the secondary core where to find
  91. * its stack and the page tables.
  92. */
  93. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  94. #ifdef CONFIG_ARM_MPU
  95. secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
  96. #endif
  97. #ifdef CONFIG_MMU
  98. secondary_data.pgdir = get_arch_pgd(idmap_pgd);
  99. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  100. #endif
  101. sync_cache_w(&secondary_data);
  102. /*
  103. * Now bring the CPU into our world.
  104. */
  105. ret = smp_ops.smp_boot_secondary(cpu, idle);
  106. if (ret == 0) {
  107. /*
  108. * CPU was successfully started, wait for it
  109. * to come online or time out.
  110. */
  111. wait_for_completion_timeout(&cpu_running,
  112. msecs_to_jiffies(1000));
  113. if (!cpu_online(cpu)) {
  114. pr_crit("CPU%u: failed to come online\n", cpu);
  115. ret = -EIO;
  116. }
  117. } else {
  118. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  119. }
  120. memset(&secondary_data, 0, sizeof(secondary_data));
  121. return ret;
  122. }
  123. /* platform specific SMP operations */
  124. void __init smp_init_cpus(void)
  125. {
  126. if (smp_ops.smp_init_cpus)
  127. smp_ops.smp_init_cpus();
  128. }
  129. int platform_can_secondary_boot(void)
  130. {
  131. return !!smp_ops.smp_boot_secondary;
  132. }
  133. int platform_can_cpu_hotplug(void)
  134. {
  135. #ifdef CONFIG_HOTPLUG_CPU
  136. if (smp_ops.cpu_kill)
  137. return 1;
  138. #endif
  139. return 0;
  140. }
  141. #ifdef CONFIG_HOTPLUG_CPU
  142. static int platform_cpu_kill(unsigned int cpu)
  143. {
  144. if (smp_ops.cpu_kill)
  145. return smp_ops.cpu_kill(cpu);
  146. return 1;
  147. }
  148. static int platform_cpu_disable(unsigned int cpu)
  149. {
  150. if (smp_ops.cpu_disable)
  151. return smp_ops.cpu_disable(cpu);
  152. /*
  153. * By default, allow disabling all CPUs except the first one,
  154. * since this is special on a lot of platforms, e.g. because
  155. * of clock tick interrupts.
  156. */
  157. return cpu == 0 ? -EPERM : 0;
  158. }
  159. /*
  160. * __cpu_disable runs on the processor to be shutdown.
  161. */
  162. int __cpu_disable(void)
  163. {
  164. unsigned int cpu = smp_processor_id();
  165. int ret;
  166. ret = platform_cpu_disable(cpu);
  167. if (ret)
  168. return ret;
  169. /*
  170. * Take this CPU offline. Once we clear this, we can't return,
  171. * and we must not schedule until we're ready to give up the cpu.
  172. */
  173. set_cpu_online(cpu, false);
  174. /*
  175. * OK - migrate IRQs away from this CPU
  176. */
  177. migrate_irqs();
  178. /*
  179. * Flush user cache and TLB mappings, and then remove this CPU
  180. * from the vm mask set of all processes.
  181. *
  182. * Caches are flushed to the Level of Unification Inner Shareable
  183. * to write-back dirty lines to unified caches shared by all CPUs.
  184. */
  185. flush_cache_louis();
  186. local_flush_tlb_all();
  187. clear_tasks_mm_cpumask(cpu);
  188. return 0;
  189. }
  190. static DECLARE_COMPLETION(cpu_died);
  191. /*
  192. * called on the thread which is asking for a CPU to be shutdown -
  193. * waits until shutdown has completed, or it is timed out.
  194. */
  195. void __cpu_die(unsigned int cpu)
  196. {
  197. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  198. pr_err("CPU%u: cpu didn't die\n", cpu);
  199. return;
  200. }
  201. pr_notice("CPU%u: shutdown\n", cpu);
  202. /*
  203. * platform_cpu_kill() is generally expected to do the powering off
  204. * and/or cutting of clocks to the dying CPU. Optionally, this may
  205. * be done by the CPU which is dying in preference to supporting
  206. * this call, but that means there is _no_ synchronisation between
  207. * the requesting CPU and the dying CPU actually losing power.
  208. */
  209. if (!platform_cpu_kill(cpu))
  210. pr_err("CPU%u: unable to kill\n", cpu);
  211. }
  212. /*
  213. * Called from the idle thread for the CPU which has been shutdown.
  214. *
  215. * Note that we disable IRQs here, but do not re-enable them
  216. * before returning to the caller. This is also the behaviour
  217. * of the other hotplug-cpu capable cores, so presumably coming
  218. * out of idle fixes this.
  219. */
  220. void __ref cpu_die(void)
  221. {
  222. unsigned int cpu = smp_processor_id();
  223. idle_task_exit();
  224. local_irq_disable();
  225. /*
  226. * Flush the data out of the L1 cache for this CPU. This must be
  227. * before the completion to ensure that data is safely written out
  228. * before platform_cpu_kill() gets called - which may disable
  229. * *this* CPU and power down its cache.
  230. */
  231. flush_cache_louis();
  232. /*
  233. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  234. * this returns, power and/or clocks can be removed at any point
  235. * from this CPU and its cache by platform_cpu_kill().
  236. */
  237. complete(&cpu_died);
  238. /*
  239. * Ensure that the cache lines associated with that completion are
  240. * written out. This covers the case where _this_ CPU is doing the
  241. * powering down, to ensure that the completion is visible to the
  242. * CPU waiting for this one.
  243. */
  244. flush_cache_louis();
  245. /*
  246. * The actual CPU shutdown procedure is at least platform (if not
  247. * CPU) specific. This may remove power, or it may simply spin.
  248. *
  249. * Platforms are generally expected *NOT* to return from this call,
  250. * although there are some which do because they have no way to
  251. * power down the CPU. These platforms are the _only_ reason we
  252. * have a return path which uses the fragment of assembly below.
  253. *
  254. * The return path should not be used for platforms which can
  255. * power off the CPU.
  256. */
  257. if (smp_ops.cpu_die)
  258. smp_ops.cpu_die(cpu);
  259. pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
  260. cpu);
  261. /*
  262. * Do not return to the idle loop - jump back to the secondary
  263. * cpu initialisation. There's some initialisation which needs
  264. * to be repeated to undo the effects of taking the CPU offline.
  265. */
  266. __asm__("mov sp, %0\n"
  267. " mov fp, #0\n"
  268. " b secondary_start_kernel"
  269. :
  270. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  271. }
  272. #endif /* CONFIG_HOTPLUG_CPU */
  273. /*
  274. * Called by both boot and secondaries to move global data into
  275. * per-processor storage.
  276. */
  277. static void smp_store_cpu_info(unsigned int cpuid)
  278. {
  279. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  280. cpu_info->loops_per_jiffy = loops_per_jiffy;
  281. cpu_info->cpuid = read_cpuid_id();
  282. store_cpu_topology(cpuid);
  283. }
  284. /*
  285. * This is the secondary CPU boot entry. We're using this CPUs
  286. * idle thread stack, but a set of temporary page tables.
  287. */
  288. asmlinkage void secondary_start_kernel(void)
  289. {
  290. struct mm_struct *mm = &init_mm;
  291. unsigned int cpu;
  292. /*
  293. * The identity mapping is uncached (strongly ordered), so
  294. * switch away from it before attempting any exclusive accesses.
  295. */
  296. cpu_switch_mm(mm->pgd, mm);
  297. local_flush_bp_all();
  298. enter_lazy_tlb(mm, current);
  299. local_flush_tlb_all();
  300. /*
  301. * All kernel threads share the same mm context; grab a
  302. * reference and switch to it.
  303. */
  304. cpu = smp_processor_id();
  305. atomic_inc(&mm->mm_count);
  306. current->active_mm = mm;
  307. cpumask_set_cpu(cpu, mm_cpumask(mm));
  308. cpu_init();
  309. pr_debug("CPU%u: Booted secondary processor\n", cpu);
  310. preempt_disable();
  311. trace_hardirqs_off();
  312. /*
  313. * Give the platform a chance to do its own initialisation.
  314. */
  315. if (smp_ops.smp_secondary_init)
  316. smp_ops.smp_secondary_init(cpu);
  317. notify_cpu_starting(cpu);
  318. calibrate_delay();
  319. smp_store_cpu_info(cpu);
  320. /*
  321. * OK, now it's safe to let the boot CPU continue. Wait for
  322. * the CPU migration code to notice that the CPU is online
  323. * before we continue - which happens after __cpu_up returns.
  324. */
  325. set_cpu_online(cpu, true);
  326. complete(&cpu_running);
  327. local_irq_enable();
  328. local_fiq_enable();
  329. /*
  330. * OK, it's off to the idle thread for us
  331. */
  332. cpu_startup_entry(CPUHP_ONLINE);
  333. }
  334. void __init smp_cpus_done(unsigned int max_cpus)
  335. {
  336. int cpu;
  337. unsigned long bogosum = 0;
  338. for_each_online_cpu(cpu)
  339. bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
  340. printk(KERN_INFO "SMP: Total of %d processors activated "
  341. "(%lu.%02lu BogoMIPS).\n",
  342. num_online_cpus(),
  343. bogosum / (500000/HZ),
  344. (bogosum / (5000/HZ)) % 100);
  345. hyp_mode_check();
  346. }
  347. void __init smp_prepare_boot_cpu(void)
  348. {
  349. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  350. }
  351. void __init smp_prepare_cpus(unsigned int max_cpus)
  352. {
  353. unsigned int ncores = num_possible_cpus();
  354. init_cpu_topology();
  355. smp_store_cpu_info(smp_processor_id());
  356. /*
  357. * are we trying to boot more cores than exist?
  358. */
  359. if (max_cpus > ncores)
  360. max_cpus = ncores;
  361. if (ncores > 1 && max_cpus) {
  362. /*
  363. * Initialise the present map, which describes the set of CPUs
  364. * actually populated at the present time. A platform should
  365. * re-initialize the map in the platforms smp_prepare_cpus()
  366. * if present != possible (e.g. physical hotplug).
  367. */
  368. init_cpu_present(cpu_possible_mask);
  369. /*
  370. * Initialise the SCU if there are more than one CPU
  371. * and let them know where to start.
  372. */
  373. if (smp_ops.smp_prepare_cpus)
  374. smp_ops.smp_prepare_cpus(max_cpus);
  375. }
  376. }
  377. static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
  378. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  379. {
  380. if (!__smp_cross_call)
  381. __smp_cross_call = fn;
  382. }
  383. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  384. #define S(x,s) [x] = s
  385. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  386. S(IPI_TIMER, "Timer broadcast interrupts"),
  387. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  388. S(IPI_CALL_FUNC, "Function call interrupts"),
  389. S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
  390. S(IPI_CPU_STOP, "CPU stop interrupts"),
  391. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  392. S(IPI_COMPLETION, "completion interrupts"),
  393. };
  394. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  395. {
  396. trace_ipi_raise(target, ipi_types[ipinr]);
  397. __smp_cross_call(target, ipinr);
  398. }
  399. void show_ipi_list(struct seq_file *p, int prec)
  400. {
  401. unsigned int cpu, i;
  402. for (i = 0; i < NR_IPI; i++) {
  403. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  404. for_each_online_cpu(cpu)
  405. seq_printf(p, "%10u ",
  406. __get_irq_stat(cpu, ipi_irqs[i]));
  407. seq_printf(p, " %s\n", ipi_types[i]);
  408. }
  409. }
  410. u64 smp_irq_stat_cpu(unsigned int cpu)
  411. {
  412. u64 sum = 0;
  413. int i;
  414. for (i = 0; i < NR_IPI; i++)
  415. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  416. return sum;
  417. }
  418. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  419. {
  420. smp_cross_call(mask, IPI_CALL_FUNC);
  421. }
  422. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  423. {
  424. smp_cross_call(mask, IPI_WAKEUP);
  425. }
  426. void arch_send_call_function_single_ipi(int cpu)
  427. {
  428. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  429. }
  430. #ifdef CONFIG_IRQ_WORK
  431. void arch_irq_work_raise(void)
  432. {
  433. if (arch_irq_work_has_interrupt())
  434. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  435. }
  436. #endif
  437. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  438. void tick_broadcast(const struct cpumask *mask)
  439. {
  440. smp_cross_call(mask, IPI_TIMER);
  441. }
  442. #endif
  443. static DEFINE_RAW_SPINLOCK(stop_lock);
  444. /*
  445. * ipi_cpu_stop - handle IPI from smp_send_stop()
  446. */
  447. static void ipi_cpu_stop(unsigned int cpu)
  448. {
  449. if (system_state == SYSTEM_BOOTING ||
  450. system_state == SYSTEM_RUNNING) {
  451. raw_spin_lock(&stop_lock);
  452. pr_crit("CPU%u: stopping\n", cpu);
  453. dump_stack();
  454. raw_spin_unlock(&stop_lock);
  455. }
  456. set_cpu_online(cpu, false);
  457. local_fiq_disable();
  458. local_irq_disable();
  459. while (1)
  460. cpu_relax();
  461. }
  462. static DEFINE_PER_CPU(struct completion *, cpu_completion);
  463. int register_ipi_completion(struct completion *completion, int cpu)
  464. {
  465. per_cpu(cpu_completion, cpu) = completion;
  466. return IPI_COMPLETION;
  467. }
  468. static void ipi_complete(unsigned int cpu)
  469. {
  470. complete(per_cpu(cpu_completion, cpu));
  471. }
  472. /*
  473. * Main handler for inter-processor interrupts
  474. */
  475. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  476. {
  477. handle_IPI(ipinr, regs);
  478. }
  479. void handle_IPI(int ipinr, struct pt_regs *regs)
  480. {
  481. unsigned int cpu = smp_processor_id();
  482. struct pt_regs *old_regs = set_irq_regs(regs);
  483. if ((unsigned)ipinr < NR_IPI) {
  484. trace_ipi_entry(ipi_types[ipinr]);
  485. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  486. }
  487. switch (ipinr) {
  488. case IPI_WAKEUP:
  489. break;
  490. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  491. case IPI_TIMER:
  492. irq_enter();
  493. tick_receive_broadcast();
  494. irq_exit();
  495. break;
  496. #endif
  497. case IPI_RESCHEDULE:
  498. scheduler_ipi();
  499. break;
  500. case IPI_CALL_FUNC:
  501. irq_enter();
  502. generic_smp_call_function_interrupt();
  503. irq_exit();
  504. break;
  505. case IPI_CALL_FUNC_SINGLE:
  506. irq_enter();
  507. generic_smp_call_function_single_interrupt();
  508. irq_exit();
  509. break;
  510. case IPI_CPU_STOP:
  511. irq_enter();
  512. ipi_cpu_stop(cpu);
  513. irq_exit();
  514. break;
  515. #ifdef CONFIG_IRQ_WORK
  516. case IPI_IRQ_WORK:
  517. irq_enter();
  518. irq_work_run();
  519. irq_exit();
  520. break;
  521. #endif
  522. case IPI_COMPLETION:
  523. irq_enter();
  524. ipi_complete(cpu);
  525. irq_exit();
  526. break;
  527. default:
  528. pr_crit("CPU%u: Unknown IPI message 0x%x\n",
  529. cpu, ipinr);
  530. break;
  531. }
  532. if ((unsigned)ipinr < NR_IPI)
  533. trace_ipi_exit(ipi_types[ipinr]);
  534. set_irq_regs(old_regs);
  535. }
  536. void smp_send_reschedule(int cpu)
  537. {
  538. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  539. }
  540. void smp_send_stop(void)
  541. {
  542. unsigned long timeout;
  543. struct cpumask mask;
  544. cpumask_copy(&mask, cpu_online_mask);
  545. cpumask_clear_cpu(smp_processor_id(), &mask);
  546. if (!cpumask_empty(&mask))
  547. smp_cross_call(&mask, IPI_CPU_STOP);
  548. /* Wait up to one second for other CPUs to stop */
  549. timeout = USEC_PER_SEC;
  550. while (num_online_cpus() > 1 && timeout--)
  551. udelay(1);
  552. if (num_online_cpus() > 1)
  553. pr_warn("SMP: failed to stop secondary CPUs\n");
  554. }
  555. /*
  556. * not supported here
  557. */
  558. int setup_profiling_timer(unsigned int multiplier)
  559. {
  560. return -EINVAL;
  561. }
  562. #ifdef CONFIG_CPU_FREQ
  563. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  564. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  565. static unsigned long global_l_p_j_ref;
  566. static unsigned long global_l_p_j_ref_freq;
  567. static int cpufreq_callback(struct notifier_block *nb,
  568. unsigned long val, void *data)
  569. {
  570. struct cpufreq_freqs *freq = data;
  571. int cpu = freq->cpu;
  572. if (freq->flags & CPUFREQ_CONST_LOOPS)
  573. return NOTIFY_OK;
  574. if (!per_cpu(l_p_j_ref, cpu)) {
  575. per_cpu(l_p_j_ref, cpu) =
  576. per_cpu(cpu_data, cpu).loops_per_jiffy;
  577. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  578. if (!global_l_p_j_ref) {
  579. global_l_p_j_ref = loops_per_jiffy;
  580. global_l_p_j_ref_freq = freq->old;
  581. }
  582. }
  583. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  584. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  585. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  586. global_l_p_j_ref_freq,
  587. freq->new);
  588. per_cpu(cpu_data, cpu).loops_per_jiffy =
  589. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  590. per_cpu(l_p_j_ref_freq, cpu),
  591. freq->new);
  592. }
  593. return NOTIFY_OK;
  594. }
  595. static struct notifier_block cpufreq_notifier = {
  596. .notifier_call = cpufreq_callback,
  597. };
  598. static int __init register_cpufreq_notifier(void)
  599. {
  600. return cpufreq_register_notifier(&cpufreq_notifier,
  601. CPUFREQ_TRANSITION_NOTIFIER);
  602. }
  603. core_initcall(register_cpufreq_notifier);
  604. #endif