setup.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485
  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/seq_file.h>
  9. #include <linux/fs.h>
  10. #include <linux/delay.h>
  11. #include <linux/root_dev.h>
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/cpu.h>
  15. #include <linux/clk-provider.h>
  16. #include <linux/of_fdt.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/cache.h>
  19. #include <asm/sections.h>
  20. #include <asm/arcregs.h>
  21. #include <asm/tlb.h>
  22. #include <asm/setup.h>
  23. #include <asm/page.h>
  24. #include <asm/irq.h>
  25. #include <asm/unwind.h>
  26. #include <asm/clk.h>
  27. #include <asm/mach_desc.h>
  28. #include <asm/smp.h>
  29. #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
  30. /* Part of U-boot ABI: see head.S */
  31. int __initdata uboot_tag;
  32. char __initdata *uboot_arg;
  33. const struct machine_desc *machine_desc;
  34. struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
  35. struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  36. static void read_arc_build_cfg_regs(void)
  37. {
  38. struct bcr_perip uncached_space;
  39. struct bcr_generic bcr;
  40. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  41. FIX_PTR(cpu);
  42. READ_BCR(AUX_IDENTITY, cpu->core);
  43. READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
  44. READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
  45. cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
  46. READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
  47. cpu->uncached_base = uncached_space.start << 24;
  48. READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
  49. cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
  50. cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
  51. cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
  52. cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
  53. cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
  54. /* Note that we read the CCM BCRs independent of kernel config
  55. * This is to catch the cases where user doesn't know that
  56. * CCMs are present in hardware build
  57. */
  58. {
  59. struct bcr_iccm iccm;
  60. struct bcr_dccm dccm;
  61. struct bcr_dccm_base dccm_base;
  62. unsigned int bcr_32bit_val;
  63. bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
  64. if (bcr_32bit_val) {
  65. iccm = *((struct bcr_iccm *)&bcr_32bit_val);
  66. cpu->iccm.base_addr = iccm.base << 16;
  67. cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
  68. }
  69. bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
  70. if (bcr_32bit_val) {
  71. dccm = *((struct bcr_dccm *)&bcr_32bit_val);
  72. cpu->dccm.sz = 0x800 << (dccm.sz);
  73. READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
  74. cpu->dccm.base_addr = dccm_base.addr << 8;
  75. }
  76. }
  77. READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
  78. read_decode_mmu_bcr();
  79. read_decode_cache_bcr();
  80. {
  81. struct bcr_fp_arcompact sp, dp;
  82. struct bcr_bpu_arcompact bpu;
  83. READ_BCR(ARC_REG_FP_BCR, sp);
  84. READ_BCR(ARC_REG_DPFP_BCR, dp);
  85. cpu->extn.fpu_sp = sp.ver ? 1 : 0;
  86. cpu->extn.fpu_dp = dp.ver ? 1 : 0;
  87. READ_BCR(ARC_REG_BPU_BCR, bpu);
  88. cpu->bpu.ver = bpu.ver;
  89. cpu->bpu.full = bpu.fam ? 1 : 0;
  90. if (bpu.ent) {
  91. cpu->bpu.num_cache = 256 << (bpu.ent - 1);
  92. cpu->bpu.num_pred = 256 << (bpu.ent - 1);
  93. }
  94. }
  95. READ_BCR(ARC_REG_AP_BCR, bcr);
  96. cpu->extn.ap = bcr.ver ? 1 : 0;
  97. READ_BCR(ARC_REG_SMART_BCR, bcr);
  98. cpu->extn.smart = bcr.ver ? 1 : 0;
  99. READ_BCR(ARC_REG_RTT_BCR, bcr);
  100. cpu->extn.rtt = bcr.ver ? 1 : 0;
  101. cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
  102. }
  103. static const struct cpuinfo_data arc_cpu_tbl[] = {
  104. { {0x20, "ARC 600" }, 0x2F},
  105. { {0x30, "ARC 700" }, 0x33},
  106. { {0x34, "ARC 700 R4.10"}, 0x34},
  107. { {0x35, "ARC 700 R4.11"}, 0x35},
  108. { {0x00, NULL } }
  109. };
  110. #define IS_AVAIL1(v, str) ((v) ? str : "")
  111. #define IS_USED(cfg) (IS_ENABLED(cfg) ? "" : "(not used) ")
  112. #define IS_AVAIL2(v, str, cfg) IS_AVAIL1(v, str), IS_AVAIL1(v, IS_USED(cfg))
  113. static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
  114. {
  115. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  116. struct bcr_identity *core = &cpu->core;
  117. const struct cpuinfo_data *tbl;
  118. char *isa_nm;
  119. int i, be, atomic;
  120. int n = 0;
  121. FIX_PTR(cpu);
  122. {
  123. isa_nm = "ARCompact";
  124. be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
  125. atomic = cpu->isa.atomic1;
  126. if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
  127. atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
  128. }
  129. n += scnprintf(buf + n, len - n,
  130. "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
  131. core->family, core->cpu_id, core->chip_id);
  132. for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
  133. if ((core->family >= tbl->info.id) &&
  134. (core->family <= tbl->up_range)) {
  135. n += scnprintf(buf + n, len - n,
  136. "processor [%d]\t: %s (%s ISA) %s\n",
  137. cpu_id, tbl->info.str, isa_nm,
  138. IS_AVAIL1(be, "[Big-Endian]"));
  139. break;
  140. }
  141. }
  142. if (tbl->info.id == 0)
  143. n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
  144. n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
  145. (unsigned int)(arc_get_core_freq() / 1000000),
  146. (unsigned int)(arc_get_core_freq() / 10000) % 100);
  147. n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
  148. IS_AVAIL1(cpu->timers.t0, "Timer0 "),
  149. IS_AVAIL1(cpu->timers.t1, "Timer1 "),
  150. IS_AVAIL2(cpu->timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC));
  151. n += i = scnprintf(buf + n, len - n, "%s%s",
  152. IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC));
  153. if (i)
  154. n += scnprintf(buf + n, len - n, "\n\t\t: ");
  155. n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
  156. IS_AVAIL1(cpu->extn_mpy.ver, "mpy "),
  157. IS_AVAIL1(cpu->extn.norm, "norm "),
  158. IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
  159. IS_AVAIL1(cpu->extn.swap, "swap "),
  160. IS_AVAIL1(cpu->extn.minmax, "minmax "),
  161. IS_AVAIL1(cpu->extn.crc, "crc "),
  162. IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
  163. if (cpu->bpu.ver)
  164. n += scnprintf(buf + n, len - n,
  165. "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
  166. IS_AVAIL1(cpu->bpu.full, "full"),
  167. IS_AVAIL1(!cpu->bpu.full, "partial"),
  168. cpu->bpu.num_cache, cpu->bpu.num_pred);
  169. return buf;
  170. }
  171. static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
  172. {
  173. int n = 0;
  174. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  175. FIX_PTR(cpu);
  176. n += scnprintf(buf + n, len - n,
  177. "Vector Table\t: %#x\nUncached Base\t: %#x\n",
  178. cpu->vec_base, cpu->uncached_base);
  179. if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
  180. n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
  181. IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
  182. IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
  183. if (cpu->extn.debug)
  184. n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
  185. IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
  186. IS_AVAIL1(cpu->extn.smart, "smaRT "),
  187. IS_AVAIL1(cpu->extn.rtt, "RTT "));
  188. if (cpu->dccm.sz || cpu->iccm.sz)
  189. n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
  190. cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
  191. cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
  192. n += scnprintf(buf + n, len - n,
  193. "OS ABI [v3]\t: no-legacy-syscalls\n");
  194. return buf;
  195. }
  196. static void arc_chk_core_config(void)
  197. {
  198. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  199. int fpu_enabled;
  200. if (!cpu->timers.t0)
  201. panic("Timer0 is not present!\n");
  202. if (!cpu->timers.t1)
  203. panic("Timer1 is not present!\n");
  204. if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) && !cpu->timers.rtsc)
  205. panic("RTSC is not present\n");
  206. #ifdef CONFIG_ARC_HAS_DCCM
  207. /*
  208. * DCCM can be arbit placed in hardware.
  209. * Make sure it's placement/sz matches what Linux is built with
  210. */
  211. if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
  212. panic("Linux built with incorrect DCCM Base address\n");
  213. if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
  214. panic("Linux built with incorrect DCCM Size\n");
  215. #endif
  216. #ifdef CONFIG_ARC_HAS_ICCM
  217. if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
  218. panic("Linux built with incorrect ICCM Size\n");
  219. #endif
  220. /*
  221. * FP hardware/software config sanity
  222. * -If hardware contains DPFP, kernel needs to save/restore FPU state
  223. * -If not, it will crash trying to save/restore the non-existant regs
  224. *
  225. * (only DPDP checked since SP has no arch visible regs)
  226. */
  227. fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
  228. if (cpu->extn.fpu_dp && !fpu_enabled)
  229. pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
  230. else if (!cpu->extn.fpu_dp && fpu_enabled)
  231. panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
  232. }
  233. /*
  234. * Initialize and setup the processor core
  235. * This is called by all the CPUs thus should not do special case stuff
  236. * such as only for boot CPU etc
  237. */
  238. void setup_processor(void)
  239. {
  240. char str[512];
  241. int cpu_id = smp_processor_id();
  242. read_arc_build_cfg_regs();
  243. arc_init_IRQ();
  244. printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
  245. arc_mmu_init();
  246. arc_cache_init();
  247. printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
  248. printk(arc_platform_smp_cpuinfo());
  249. arc_chk_core_config();
  250. }
  251. static inline int is_kernel(unsigned long addr)
  252. {
  253. if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
  254. return 1;
  255. return 0;
  256. }
  257. void __init setup_arch(char **cmdline_p)
  258. {
  259. /* make sure that uboot passed pointer to cmdline/dtb is valid */
  260. if (uboot_tag && is_kernel((unsigned long)uboot_arg))
  261. panic("Invalid uboot arg\n");
  262. /* See if u-boot passed an external Device Tree blob */
  263. machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
  264. if (!machine_desc) {
  265. /* No, so try the embedded one */
  266. machine_desc = setup_machine_fdt(__dtb_start);
  267. if (!machine_desc)
  268. panic("Embedded DT invalid\n");
  269. /*
  270. * If we are here, it is established that @uboot_arg didn't
  271. * point to DT blob. Instead if u-boot says it is cmdline,
  272. * Appent to embedded DT cmdline.
  273. * setup_machine_fdt() would have populated @boot_command_line
  274. */
  275. if (uboot_tag == 1) {
  276. /* Ensure a whitespace between the 2 cmdlines */
  277. strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
  278. strlcat(boot_command_line, uboot_arg,
  279. COMMAND_LINE_SIZE);
  280. }
  281. }
  282. /* Save unparsed command line copy for /proc/cmdline */
  283. *cmdline_p = boot_command_line;
  284. /* To force early parsing of things like mem=xxx */
  285. parse_early_param();
  286. /* Platform/board specific: e.g. early console registration */
  287. if (machine_desc->init_early)
  288. machine_desc->init_early();
  289. setup_processor();
  290. smp_init_cpus();
  291. setup_arch_memory();
  292. /* copy flat DT out of .init and then unflatten it */
  293. unflatten_and_copy_device_tree();
  294. /* Can be issue if someone passes cmd line arg "ro"
  295. * But that is unlikely so keeping it as it is
  296. */
  297. root_mountflags &= ~MS_RDONLY;
  298. #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
  299. conswitchp = &dummy_con;
  300. #endif
  301. arc_unwind_init();
  302. arc_unwind_setup();
  303. }
  304. static int __init customize_machine(void)
  305. {
  306. of_clk_init(NULL);
  307. /*
  308. * Traverses flattened DeviceTree - registering platform devices
  309. * (if any) complete with their resources
  310. */
  311. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  312. if (machine_desc->init_machine)
  313. machine_desc->init_machine();
  314. return 0;
  315. }
  316. arch_initcall(customize_machine);
  317. static int __init init_late_machine(void)
  318. {
  319. if (machine_desc->init_late)
  320. machine_desc->init_late();
  321. return 0;
  322. }
  323. late_initcall(init_late_machine);
  324. /*
  325. * Get CPU information for use by the procfs.
  326. */
  327. #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
  328. #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
  329. static int show_cpuinfo(struct seq_file *m, void *v)
  330. {
  331. char *str;
  332. int cpu_id = ptr_to_cpu(v);
  333. if (!cpu_online(cpu_id)) {
  334. seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
  335. goto done;
  336. }
  337. str = (char *)__get_free_page(GFP_TEMPORARY);
  338. if (!str)
  339. goto done;
  340. seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  341. seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
  342. loops_per_jiffy / (500000 / HZ),
  343. (loops_per_jiffy / (5000 / HZ)) % 100);
  344. seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  345. seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
  346. seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
  347. seq_printf(m, arc_platform_smp_cpuinfo());
  348. free_page((unsigned long)str);
  349. done:
  350. seq_printf(m, "\n");
  351. return 0;
  352. }
  353. static void *c_start(struct seq_file *m, loff_t *pos)
  354. {
  355. /*
  356. * Callback returns cpu-id to iterator for show routine, NULL to stop.
  357. * However since NULL is also a valid cpu-id (0), we use a round-about
  358. * way to pass it w/o having to kmalloc/free a 2 byte string.
  359. * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
  360. */
  361. return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
  362. }
  363. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  364. {
  365. ++*pos;
  366. return c_start(m, pos);
  367. }
  368. static void c_stop(struct seq_file *m, void *v)
  369. {
  370. }
  371. const struct seq_operations cpuinfo_op = {
  372. .start = c_start,
  373. .next = c_next,
  374. .stop = c_stop,
  375. .show = show_cpuinfo
  376. };
  377. static DEFINE_PER_CPU(struct cpu, cpu_topology);
  378. static int __init topology_init(void)
  379. {
  380. int cpu;
  381. for_each_present_cpu(cpu)
  382. register_cpu(&per_cpu(cpu_topology, cpu), cpu);
  383. return 0;
  384. }
  385. subsys_initcall(topology_init);