intel_pstate.c 22 KB

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  1. /*
  2. * intel_pstate.c: Native P state management for Intel processors
  3. *
  4. * (C) Copyright 2012 Intel Corporation
  5. * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/module.h>
  15. #include <linux/ktime.h>
  16. #include <linux/hrtimer.h>
  17. #include <linux/tick.h>
  18. #include <linux/slab.h>
  19. #include <linux/sched.h>
  20. #include <linux/list.h>
  21. #include <linux/cpu.h>
  22. #include <linux/cpufreq.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/types.h>
  25. #include <linux/fs.h>
  26. #include <linux/debugfs.h>
  27. #include <linux/acpi.h>
  28. #include <trace/events/power.h>
  29. #include <asm/div64.h>
  30. #include <asm/msr.h>
  31. #include <asm/cpu_device_id.h>
  32. #define BYT_RATIOS 0x66a
  33. #define BYT_VIDS 0x66b
  34. #define BYT_TURBO_RATIOS 0x66c
  35. #define BYT_TURBO_VIDS 0x66d
  36. #define FRAC_BITS 8
  37. #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
  38. #define fp_toint(X) ((X) >> FRAC_BITS)
  39. static inline int32_t mul_fp(int32_t x, int32_t y)
  40. {
  41. return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
  42. }
  43. static inline int32_t div_fp(int32_t x, int32_t y)
  44. {
  45. return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
  46. }
  47. struct sample {
  48. int32_t core_pct_busy;
  49. u64 aperf;
  50. u64 mperf;
  51. int freq;
  52. ktime_t time;
  53. };
  54. struct pstate_data {
  55. int current_pstate;
  56. int min_pstate;
  57. int max_pstate;
  58. int turbo_pstate;
  59. };
  60. struct vid_data {
  61. int min;
  62. int max;
  63. int turbo;
  64. int32_t ratio;
  65. };
  66. struct _pid {
  67. int setpoint;
  68. int32_t integral;
  69. int32_t p_gain;
  70. int32_t i_gain;
  71. int32_t d_gain;
  72. int deadband;
  73. int32_t last_err;
  74. };
  75. struct cpudata {
  76. int cpu;
  77. struct timer_list timer;
  78. struct pstate_data pstate;
  79. struct vid_data vid;
  80. struct _pid pid;
  81. ktime_t last_sample_time;
  82. u64 prev_aperf;
  83. u64 prev_mperf;
  84. struct sample sample;
  85. };
  86. static struct cpudata **all_cpu_data;
  87. struct pstate_adjust_policy {
  88. int sample_rate_ms;
  89. int deadband;
  90. int setpoint;
  91. int p_gain_pct;
  92. int d_gain_pct;
  93. int i_gain_pct;
  94. };
  95. struct pstate_funcs {
  96. int (*get_max)(void);
  97. int (*get_min)(void);
  98. int (*get_turbo)(void);
  99. void (*set)(struct cpudata*, int pstate);
  100. void (*get_vid)(struct cpudata *);
  101. };
  102. struct cpu_defaults {
  103. struct pstate_adjust_policy pid_policy;
  104. struct pstate_funcs funcs;
  105. };
  106. static struct pstate_adjust_policy pid_params;
  107. static struct pstate_funcs pstate_funcs;
  108. struct perf_limits {
  109. int no_turbo;
  110. int max_perf_pct;
  111. int min_perf_pct;
  112. int32_t max_perf;
  113. int32_t min_perf;
  114. int max_policy_pct;
  115. int max_sysfs_pct;
  116. };
  117. static struct perf_limits limits = {
  118. .no_turbo = 0,
  119. .max_perf_pct = 100,
  120. .max_perf = int_tofp(1),
  121. .min_perf_pct = 0,
  122. .min_perf = 0,
  123. .max_policy_pct = 100,
  124. .max_sysfs_pct = 100,
  125. };
  126. static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
  127. int deadband, int integral) {
  128. pid->setpoint = setpoint;
  129. pid->deadband = deadband;
  130. pid->integral = int_tofp(integral);
  131. pid->last_err = int_tofp(setpoint) - int_tofp(busy);
  132. }
  133. static inline void pid_p_gain_set(struct _pid *pid, int percent)
  134. {
  135. pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
  136. }
  137. static inline void pid_i_gain_set(struct _pid *pid, int percent)
  138. {
  139. pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
  140. }
  141. static inline void pid_d_gain_set(struct _pid *pid, int percent)
  142. {
  143. pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
  144. }
  145. static signed int pid_calc(struct _pid *pid, int32_t busy)
  146. {
  147. signed int result;
  148. int32_t pterm, dterm, fp_error;
  149. int32_t integral_limit;
  150. fp_error = int_tofp(pid->setpoint) - busy;
  151. if (abs(fp_error) <= int_tofp(pid->deadband))
  152. return 0;
  153. pterm = mul_fp(pid->p_gain, fp_error);
  154. pid->integral += fp_error;
  155. /* limit the integral term */
  156. integral_limit = int_tofp(30);
  157. if (pid->integral > integral_limit)
  158. pid->integral = integral_limit;
  159. if (pid->integral < -integral_limit)
  160. pid->integral = -integral_limit;
  161. dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
  162. pid->last_err = fp_error;
  163. result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
  164. result = result + (1 << (FRAC_BITS-1));
  165. return (signed int)fp_toint(result);
  166. }
  167. static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
  168. {
  169. pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
  170. pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
  171. pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
  172. pid_reset(&cpu->pid,
  173. pid_params.setpoint,
  174. 100,
  175. pid_params.deadband,
  176. 0);
  177. }
  178. static inline void intel_pstate_reset_all_pid(void)
  179. {
  180. unsigned int cpu;
  181. for_each_online_cpu(cpu) {
  182. if (all_cpu_data[cpu])
  183. intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
  184. }
  185. }
  186. /************************** debugfs begin ************************/
  187. static int pid_param_set(void *data, u64 val)
  188. {
  189. *(u32 *)data = val;
  190. intel_pstate_reset_all_pid();
  191. return 0;
  192. }
  193. static int pid_param_get(void *data, u64 *val)
  194. {
  195. *val = *(u32 *)data;
  196. return 0;
  197. }
  198. DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
  199. pid_param_set, "%llu\n");
  200. struct pid_param {
  201. char *name;
  202. void *value;
  203. };
  204. static struct pid_param pid_files[] = {
  205. {"sample_rate_ms", &pid_params.sample_rate_ms},
  206. {"d_gain_pct", &pid_params.d_gain_pct},
  207. {"i_gain_pct", &pid_params.i_gain_pct},
  208. {"deadband", &pid_params.deadband},
  209. {"setpoint", &pid_params.setpoint},
  210. {"p_gain_pct", &pid_params.p_gain_pct},
  211. {NULL, NULL}
  212. };
  213. static struct dentry *debugfs_parent;
  214. static void intel_pstate_debug_expose_params(void)
  215. {
  216. int i = 0;
  217. debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
  218. if (IS_ERR_OR_NULL(debugfs_parent))
  219. return;
  220. while (pid_files[i].name) {
  221. debugfs_create_file(pid_files[i].name, 0660,
  222. debugfs_parent, pid_files[i].value,
  223. &fops_pid_param);
  224. i++;
  225. }
  226. }
  227. /************************** debugfs end ************************/
  228. /************************** sysfs begin ************************/
  229. #define show_one(file_name, object) \
  230. static ssize_t show_##file_name \
  231. (struct kobject *kobj, struct attribute *attr, char *buf) \
  232. { \
  233. return sprintf(buf, "%u\n", limits.object); \
  234. }
  235. static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
  236. const char *buf, size_t count)
  237. {
  238. unsigned int input;
  239. int ret;
  240. ret = sscanf(buf, "%u", &input);
  241. if (ret != 1)
  242. return -EINVAL;
  243. limits.no_turbo = clamp_t(int, input, 0 , 1);
  244. return count;
  245. }
  246. static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
  247. const char *buf, size_t count)
  248. {
  249. unsigned int input;
  250. int ret;
  251. ret = sscanf(buf, "%u", &input);
  252. if (ret != 1)
  253. return -EINVAL;
  254. limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
  255. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  256. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  257. return count;
  258. }
  259. static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
  260. const char *buf, size_t count)
  261. {
  262. unsigned int input;
  263. int ret;
  264. ret = sscanf(buf, "%u", &input);
  265. if (ret != 1)
  266. return -EINVAL;
  267. limits.min_perf_pct = clamp_t(int, input, 0 , 100);
  268. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  269. return count;
  270. }
  271. show_one(no_turbo, no_turbo);
  272. show_one(max_perf_pct, max_perf_pct);
  273. show_one(min_perf_pct, min_perf_pct);
  274. define_one_global_rw(no_turbo);
  275. define_one_global_rw(max_perf_pct);
  276. define_one_global_rw(min_perf_pct);
  277. static struct attribute *intel_pstate_attributes[] = {
  278. &no_turbo.attr,
  279. &max_perf_pct.attr,
  280. &min_perf_pct.attr,
  281. NULL
  282. };
  283. static struct attribute_group intel_pstate_attr_group = {
  284. .attrs = intel_pstate_attributes,
  285. };
  286. static struct kobject *intel_pstate_kobject;
  287. static void intel_pstate_sysfs_expose_params(void)
  288. {
  289. int rc;
  290. intel_pstate_kobject = kobject_create_and_add("intel_pstate",
  291. &cpu_subsys.dev_root->kobj);
  292. BUG_ON(!intel_pstate_kobject);
  293. rc = sysfs_create_group(intel_pstate_kobject,
  294. &intel_pstate_attr_group);
  295. BUG_ON(rc);
  296. }
  297. /************************** sysfs end ************************/
  298. static int byt_get_min_pstate(void)
  299. {
  300. u64 value;
  301. rdmsrl(BYT_RATIOS, value);
  302. return (value >> 8) & 0x3F;
  303. }
  304. static int byt_get_max_pstate(void)
  305. {
  306. u64 value;
  307. rdmsrl(BYT_RATIOS, value);
  308. return (value >> 16) & 0x3F;
  309. }
  310. static int byt_get_turbo_pstate(void)
  311. {
  312. u64 value;
  313. rdmsrl(BYT_TURBO_RATIOS, value);
  314. return value & 0x3F;
  315. }
  316. static void byt_set_pstate(struct cpudata *cpudata, int pstate)
  317. {
  318. u64 val;
  319. int32_t vid_fp;
  320. u32 vid;
  321. val = pstate << 8;
  322. if (limits.no_turbo)
  323. val |= (u64)1 << 32;
  324. vid_fp = cpudata->vid.min + mul_fp(
  325. int_tofp(pstate - cpudata->pstate.min_pstate),
  326. cpudata->vid.ratio);
  327. vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
  328. vid = fp_toint(vid_fp);
  329. if (pstate > cpudata->pstate.max_pstate)
  330. vid = cpudata->vid.turbo;
  331. val |= vid;
  332. wrmsrl(MSR_IA32_PERF_CTL, val);
  333. }
  334. static void byt_get_vid(struct cpudata *cpudata)
  335. {
  336. u64 value;
  337. rdmsrl(BYT_VIDS, value);
  338. cpudata->vid.min = int_tofp((value >> 8) & 0x3f);
  339. cpudata->vid.max = int_tofp((value >> 16) & 0x3f);
  340. cpudata->vid.ratio = div_fp(
  341. cpudata->vid.max - cpudata->vid.min,
  342. int_tofp(cpudata->pstate.max_pstate -
  343. cpudata->pstate.min_pstate));
  344. rdmsrl(BYT_TURBO_VIDS, value);
  345. cpudata->vid.turbo = value & 0x7f;
  346. }
  347. static int core_get_min_pstate(void)
  348. {
  349. u64 value;
  350. rdmsrl(MSR_PLATFORM_INFO, value);
  351. return (value >> 40) & 0xFF;
  352. }
  353. static int core_get_max_pstate(void)
  354. {
  355. u64 value;
  356. rdmsrl(MSR_PLATFORM_INFO, value);
  357. return (value >> 8) & 0xFF;
  358. }
  359. static int core_get_turbo_pstate(void)
  360. {
  361. u64 value;
  362. int nont, ret;
  363. rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
  364. nont = core_get_max_pstate();
  365. ret = ((value) & 255);
  366. if (ret <= nont)
  367. ret = nont;
  368. return ret;
  369. }
  370. static void core_set_pstate(struct cpudata *cpudata, int pstate)
  371. {
  372. u64 val;
  373. val = pstate << 8;
  374. if (limits.no_turbo)
  375. val |= (u64)1 << 32;
  376. wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
  377. }
  378. static struct cpu_defaults core_params = {
  379. .pid_policy = {
  380. .sample_rate_ms = 10,
  381. .deadband = 0,
  382. .setpoint = 97,
  383. .p_gain_pct = 20,
  384. .d_gain_pct = 0,
  385. .i_gain_pct = 0,
  386. },
  387. .funcs = {
  388. .get_max = core_get_max_pstate,
  389. .get_min = core_get_min_pstate,
  390. .get_turbo = core_get_turbo_pstate,
  391. .set = core_set_pstate,
  392. },
  393. };
  394. static struct cpu_defaults byt_params = {
  395. .pid_policy = {
  396. .sample_rate_ms = 10,
  397. .deadband = 0,
  398. .setpoint = 97,
  399. .p_gain_pct = 14,
  400. .d_gain_pct = 0,
  401. .i_gain_pct = 4,
  402. },
  403. .funcs = {
  404. .get_max = byt_get_max_pstate,
  405. .get_min = byt_get_min_pstate,
  406. .get_turbo = byt_get_turbo_pstate,
  407. .set = byt_set_pstate,
  408. .get_vid = byt_get_vid,
  409. },
  410. };
  411. static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
  412. {
  413. int max_perf = cpu->pstate.turbo_pstate;
  414. int max_perf_adj;
  415. int min_perf;
  416. if (limits.no_turbo)
  417. max_perf = cpu->pstate.max_pstate;
  418. max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
  419. *max = clamp_t(int, max_perf_adj,
  420. cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
  421. min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
  422. *min = clamp_t(int, min_perf,
  423. cpu->pstate.min_pstate, max_perf);
  424. }
  425. static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
  426. {
  427. int max_perf, min_perf;
  428. intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
  429. pstate = clamp_t(int, pstate, min_perf, max_perf);
  430. if (pstate == cpu->pstate.current_pstate)
  431. return;
  432. trace_cpu_frequency(pstate * 100000, cpu->cpu);
  433. cpu->pstate.current_pstate = pstate;
  434. pstate_funcs.set(cpu, pstate);
  435. }
  436. static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
  437. {
  438. int target;
  439. target = cpu->pstate.current_pstate + steps;
  440. intel_pstate_set_pstate(cpu, target);
  441. }
  442. static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
  443. {
  444. int target;
  445. target = cpu->pstate.current_pstate - steps;
  446. intel_pstate_set_pstate(cpu, target);
  447. }
  448. static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
  449. {
  450. cpu->pstate.min_pstate = pstate_funcs.get_min();
  451. cpu->pstate.max_pstate = pstate_funcs.get_max();
  452. cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
  453. if (pstate_funcs.get_vid)
  454. pstate_funcs.get_vid(cpu);
  455. intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
  456. }
  457. static inline void intel_pstate_calc_busy(struct cpudata *cpu)
  458. {
  459. struct sample *sample = &cpu->sample;
  460. int64_t core_pct;
  461. int32_t rem;
  462. core_pct = int_tofp(sample->aperf) * int_tofp(100);
  463. core_pct = div_u64_rem(core_pct, int_tofp(sample->mperf), &rem);
  464. if ((rem << 1) >= int_tofp(sample->mperf))
  465. core_pct += 1;
  466. sample->freq = fp_toint(
  467. mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
  468. sample->core_pct_busy = (int32_t)core_pct;
  469. }
  470. static inline void intel_pstate_sample(struct cpudata *cpu)
  471. {
  472. u64 aperf, mperf;
  473. rdmsrl(MSR_IA32_APERF, aperf);
  474. rdmsrl(MSR_IA32_MPERF, mperf);
  475. aperf = aperf >> FRAC_BITS;
  476. mperf = mperf >> FRAC_BITS;
  477. cpu->last_sample_time = cpu->sample.time;
  478. cpu->sample.time = ktime_get();
  479. cpu->sample.aperf = aperf;
  480. cpu->sample.mperf = mperf;
  481. cpu->sample.aperf -= cpu->prev_aperf;
  482. cpu->sample.mperf -= cpu->prev_mperf;
  483. intel_pstate_calc_busy(cpu);
  484. cpu->prev_aperf = aperf;
  485. cpu->prev_mperf = mperf;
  486. }
  487. static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
  488. {
  489. int sample_time, delay;
  490. sample_time = pid_params.sample_rate_ms;
  491. delay = msecs_to_jiffies(sample_time);
  492. mod_timer_pinned(&cpu->timer, jiffies + delay);
  493. }
  494. static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
  495. {
  496. int32_t core_busy, max_pstate, current_pstate, sample_ratio;
  497. u32 duration_us;
  498. u32 sample_time;
  499. core_busy = cpu->sample.core_pct_busy;
  500. max_pstate = int_tofp(cpu->pstate.max_pstate);
  501. current_pstate = int_tofp(cpu->pstate.current_pstate);
  502. core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
  503. sample_time = (pid_params.sample_rate_ms * USEC_PER_MSEC);
  504. duration_us = (u32) ktime_us_delta(cpu->sample.time,
  505. cpu->last_sample_time);
  506. if (duration_us > sample_time * 3) {
  507. sample_ratio = div_fp(int_tofp(sample_time),
  508. int_tofp(duration_us));
  509. core_busy = mul_fp(core_busy, sample_ratio);
  510. }
  511. return core_busy;
  512. }
  513. static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
  514. {
  515. int32_t busy_scaled;
  516. struct _pid *pid;
  517. signed int ctl = 0;
  518. int steps;
  519. pid = &cpu->pid;
  520. busy_scaled = intel_pstate_get_scaled_busy(cpu);
  521. ctl = pid_calc(pid, busy_scaled);
  522. steps = abs(ctl);
  523. if (ctl < 0)
  524. intel_pstate_pstate_increase(cpu, steps);
  525. else
  526. intel_pstate_pstate_decrease(cpu, steps);
  527. }
  528. static void intel_pstate_timer_func(unsigned long __data)
  529. {
  530. struct cpudata *cpu = (struct cpudata *) __data;
  531. struct sample *sample;
  532. intel_pstate_sample(cpu);
  533. sample = &cpu->sample;
  534. intel_pstate_adjust_busy_pstate(cpu);
  535. trace_pstate_sample(fp_toint(sample->core_pct_busy),
  536. fp_toint(intel_pstate_get_scaled_busy(cpu)),
  537. cpu->pstate.current_pstate,
  538. sample->mperf,
  539. sample->aperf,
  540. sample->freq);
  541. intel_pstate_set_sample_time(cpu);
  542. }
  543. #define ICPU(model, policy) \
  544. { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
  545. (unsigned long)&policy }
  546. static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
  547. ICPU(0x2a, core_params),
  548. ICPU(0x2d, core_params),
  549. ICPU(0x37, byt_params),
  550. ICPU(0x3a, core_params),
  551. ICPU(0x3c, core_params),
  552. ICPU(0x3d, core_params),
  553. ICPU(0x3e, core_params),
  554. ICPU(0x3f, core_params),
  555. ICPU(0x45, core_params),
  556. ICPU(0x46, core_params),
  557. ICPU(0x4f, core_params),
  558. ICPU(0x56, core_params),
  559. {}
  560. };
  561. MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
  562. static int intel_pstate_init_cpu(unsigned int cpunum)
  563. {
  564. struct cpudata *cpu;
  565. all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
  566. if (!all_cpu_data[cpunum])
  567. return -ENOMEM;
  568. cpu = all_cpu_data[cpunum];
  569. intel_pstate_get_cpu_pstates(cpu);
  570. cpu->cpu = cpunum;
  571. init_timer_deferrable(&cpu->timer);
  572. cpu->timer.function = intel_pstate_timer_func;
  573. cpu->timer.data =
  574. (unsigned long)cpu;
  575. cpu->timer.expires = jiffies + HZ/100;
  576. intel_pstate_busy_pid_reset(cpu);
  577. intel_pstate_sample(cpu);
  578. add_timer_on(&cpu->timer, cpunum);
  579. pr_info("Intel pstate controlling: cpu %d\n", cpunum);
  580. return 0;
  581. }
  582. static unsigned int intel_pstate_get(unsigned int cpu_num)
  583. {
  584. struct sample *sample;
  585. struct cpudata *cpu;
  586. cpu = all_cpu_data[cpu_num];
  587. if (!cpu)
  588. return 0;
  589. sample = &cpu->sample;
  590. return sample->freq;
  591. }
  592. static int intel_pstate_set_policy(struct cpufreq_policy *policy)
  593. {
  594. struct cpudata *cpu;
  595. cpu = all_cpu_data[policy->cpu];
  596. if (!policy->cpuinfo.max_freq)
  597. return -ENODEV;
  598. if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  599. limits.min_perf_pct = 100;
  600. limits.min_perf = int_tofp(1);
  601. limits.max_perf_pct = 100;
  602. limits.max_perf = int_tofp(1);
  603. limits.no_turbo = 0;
  604. return 0;
  605. }
  606. limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
  607. limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
  608. limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
  609. limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
  610. limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
  611. limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
  612. limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
  613. return 0;
  614. }
  615. static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
  616. {
  617. cpufreq_verify_within_cpu_limits(policy);
  618. if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
  619. (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
  620. return -EINVAL;
  621. return 0;
  622. }
  623. static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
  624. {
  625. int cpu_num = policy->cpu;
  626. struct cpudata *cpu = all_cpu_data[cpu_num];
  627. pr_info("intel_pstate CPU %d exiting\n", cpu_num);
  628. del_timer_sync(&all_cpu_data[cpu_num]->timer);
  629. intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
  630. kfree(all_cpu_data[cpu_num]);
  631. all_cpu_data[cpu_num] = NULL;
  632. }
  633. static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
  634. {
  635. struct cpudata *cpu;
  636. int rc;
  637. rc = intel_pstate_init_cpu(policy->cpu);
  638. if (rc)
  639. return rc;
  640. cpu = all_cpu_data[policy->cpu];
  641. if (!limits.no_turbo &&
  642. limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
  643. policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  644. else
  645. policy->policy = CPUFREQ_POLICY_POWERSAVE;
  646. policy->min = cpu->pstate.min_pstate * 100000;
  647. policy->max = cpu->pstate.turbo_pstate * 100000;
  648. /* cpuinfo and default policy values */
  649. policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
  650. policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
  651. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  652. cpumask_set_cpu(policy->cpu, policy->cpus);
  653. return 0;
  654. }
  655. static struct cpufreq_driver intel_pstate_driver = {
  656. .flags = CPUFREQ_CONST_LOOPS,
  657. .verify = intel_pstate_verify_policy,
  658. .setpolicy = intel_pstate_set_policy,
  659. .get = intel_pstate_get,
  660. .init = intel_pstate_cpu_init,
  661. .stop_cpu = intel_pstate_stop_cpu,
  662. .name = "intel_pstate",
  663. };
  664. static int __initdata no_load;
  665. static int intel_pstate_msrs_not_valid(void)
  666. {
  667. /* Check that all the msr's we are using are valid. */
  668. u64 aperf, mperf, tmp;
  669. rdmsrl(MSR_IA32_APERF, aperf);
  670. rdmsrl(MSR_IA32_MPERF, mperf);
  671. if (!pstate_funcs.get_max() ||
  672. !pstate_funcs.get_min() ||
  673. !pstate_funcs.get_turbo())
  674. return -ENODEV;
  675. rdmsrl(MSR_IA32_APERF, tmp);
  676. if (!(tmp - aperf))
  677. return -ENODEV;
  678. rdmsrl(MSR_IA32_MPERF, tmp);
  679. if (!(tmp - mperf))
  680. return -ENODEV;
  681. return 0;
  682. }
  683. static void copy_pid_params(struct pstate_adjust_policy *policy)
  684. {
  685. pid_params.sample_rate_ms = policy->sample_rate_ms;
  686. pid_params.p_gain_pct = policy->p_gain_pct;
  687. pid_params.i_gain_pct = policy->i_gain_pct;
  688. pid_params.d_gain_pct = policy->d_gain_pct;
  689. pid_params.deadband = policy->deadband;
  690. pid_params.setpoint = policy->setpoint;
  691. }
  692. static void copy_cpu_funcs(struct pstate_funcs *funcs)
  693. {
  694. pstate_funcs.get_max = funcs->get_max;
  695. pstate_funcs.get_min = funcs->get_min;
  696. pstate_funcs.get_turbo = funcs->get_turbo;
  697. pstate_funcs.set = funcs->set;
  698. pstate_funcs.get_vid = funcs->get_vid;
  699. }
  700. #if IS_ENABLED(CONFIG_ACPI)
  701. #include <acpi/processor.h>
  702. static bool intel_pstate_no_acpi_pss(void)
  703. {
  704. int i;
  705. for_each_possible_cpu(i) {
  706. acpi_status status;
  707. union acpi_object *pss;
  708. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  709. struct acpi_processor *pr = per_cpu(processors, i);
  710. if (!pr)
  711. continue;
  712. status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
  713. if (ACPI_FAILURE(status))
  714. continue;
  715. pss = buffer.pointer;
  716. if (pss && pss->type == ACPI_TYPE_PACKAGE) {
  717. kfree(pss);
  718. return false;
  719. }
  720. kfree(pss);
  721. }
  722. return true;
  723. }
  724. struct hw_vendor_info {
  725. u16 valid;
  726. char oem_id[ACPI_OEM_ID_SIZE];
  727. char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
  728. };
  729. /* Hardware vendor-specific info that has its own power management modes */
  730. static struct hw_vendor_info vendor_info[] = {
  731. {1, "HP ", "ProLiant"},
  732. {0, "", ""},
  733. };
  734. static bool intel_pstate_platform_pwr_mgmt_exists(void)
  735. {
  736. struct acpi_table_header hdr;
  737. struct hw_vendor_info *v_info;
  738. if (acpi_disabled
  739. || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
  740. return false;
  741. for (v_info = vendor_info; v_info->valid; v_info++) {
  742. if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
  743. && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
  744. && intel_pstate_no_acpi_pss())
  745. return true;
  746. }
  747. return false;
  748. }
  749. #else /* CONFIG_ACPI not enabled */
  750. static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
  751. #endif /* CONFIG_ACPI */
  752. static int __init intel_pstate_init(void)
  753. {
  754. int cpu, rc = 0;
  755. const struct x86_cpu_id *id;
  756. struct cpu_defaults *cpu_info;
  757. if (no_load)
  758. return -ENODEV;
  759. id = x86_match_cpu(intel_pstate_cpu_ids);
  760. if (!id)
  761. return -ENODEV;
  762. /*
  763. * The Intel pstate driver will be ignored if the platform
  764. * firmware has its own power management modes.
  765. */
  766. if (intel_pstate_platform_pwr_mgmt_exists())
  767. return -ENODEV;
  768. cpu_info = (struct cpu_defaults *)id->driver_data;
  769. copy_pid_params(&cpu_info->pid_policy);
  770. copy_cpu_funcs(&cpu_info->funcs);
  771. if (intel_pstate_msrs_not_valid())
  772. return -ENODEV;
  773. pr_info("Intel P-state driver initializing.\n");
  774. all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
  775. if (!all_cpu_data)
  776. return -ENOMEM;
  777. rc = cpufreq_register_driver(&intel_pstate_driver);
  778. if (rc)
  779. goto out;
  780. intel_pstate_debug_expose_params();
  781. intel_pstate_sysfs_expose_params();
  782. return rc;
  783. out:
  784. get_online_cpus();
  785. for_each_online_cpu(cpu) {
  786. if (all_cpu_data[cpu]) {
  787. del_timer_sync(&all_cpu_data[cpu]->timer);
  788. kfree(all_cpu_data[cpu]);
  789. }
  790. }
  791. put_online_cpus();
  792. vfree(all_cpu_data);
  793. return -ENODEV;
  794. }
  795. device_initcall(intel_pstate_init);
  796. static int __init intel_pstate_setup(char *str)
  797. {
  798. if (!str)
  799. return -EINVAL;
  800. if (!strcmp(str, "disable"))
  801. no_load = 1;
  802. return 0;
  803. }
  804. early_param("intel_pstate", intel_pstate_setup);
  805. MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
  806. MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
  807. MODULE_LICENSE("GPL");