fw.c 32 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  11. * Copyright(c) 2018 Intel Corporation
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of version 2 of the GNU General Public License as
  15. * published by the Free Software Foundation.
  16. *
  17. * This program is distributed in the hope that it will be useful, but
  18. * WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  20. * General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  25. * USA
  26. *
  27. * The full GNU General Public License is included in this distribution
  28. * in the file called COPYING.
  29. *
  30. * Contact Information:
  31. * Intel Linux Wireless <linuxwifi@intel.com>
  32. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  33. *
  34. * BSD LICENSE
  35. *
  36. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  37. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  38. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  39. * Copyright(c) 2018 Intel Corporation
  40. * All rights reserved.
  41. *
  42. * Redistribution and use in source and binary forms, with or without
  43. * modification, are permitted provided that the following conditions
  44. * are met:
  45. *
  46. * * Redistributions of source code must retain the above copyright
  47. * notice, this list of conditions and the following disclaimer.
  48. * * Redistributions in binary form must reproduce the above copyright
  49. * notice, this list of conditions and the following disclaimer in
  50. * the documentation and/or other materials provided with the
  51. * distribution.
  52. * * Neither the name Intel Corporation nor the names of its
  53. * contributors may be used to endorse or promote products derived
  54. * from this software without specific prior written permission.
  55. *
  56. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  57. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  58. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  59. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  60. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  61. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  62. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  63. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  64. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  65. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  66. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  67. *
  68. *****************************************************************************/
  69. #include <net/mac80211.h>
  70. #include <linux/netdevice.h>
  71. #include "iwl-trans.h"
  72. #include "iwl-op-mode.h"
  73. #include "fw/img.h"
  74. #include "iwl-debug.h"
  75. #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
  76. #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
  77. #include "iwl-prph.h"
  78. #include "fw/acpi.h"
  79. #include "mvm.h"
  80. #include "fw/dbg.h"
  81. #include "iwl-phy-db.h"
  82. #include "iwl-modparams.h"
  83. #include "iwl-nvm-parse.h"
  84. #define MVM_UCODE_ALIVE_TIMEOUT HZ
  85. #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
  86. #define UCODE_VALID_OK cpu_to_le32(0x1)
  87. struct iwl_mvm_alive_data {
  88. bool valid;
  89. u32 scd_base_addr;
  90. };
  91. static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
  92. {
  93. struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
  94. .valid = cpu_to_le32(valid_tx_ant),
  95. };
  96. IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
  97. return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
  98. sizeof(tx_ant_cmd), &tx_ant_cmd);
  99. }
  100. static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
  101. {
  102. int i;
  103. struct iwl_rss_config_cmd cmd = {
  104. .flags = cpu_to_le32(IWL_RSS_ENABLE),
  105. .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
  106. IWL_RSS_HASH_TYPE_IPV4_UDP |
  107. IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
  108. IWL_RSS_HASH_TYPE_IPV6_TCP |
  109. IWL_RSS_HASH_TYPE_IPV6_UDP |
  110. IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
  111. };
  112. if (mvm->trans->num_rx_queues == 1)
  113. return 0;
  114. /* Do not direct RSS traffic to Q 0 which is our fallback queue */
  115. for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
  116. cmd.indirection_table[i] =
  117. 1 + (i % (mvm->trans->num_rx_queues - 1));
  118. netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
  119. return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
  120. }
  121. static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
  122. {
  123. struct iwl_dqa_enable_cmd dqa_cmd = {
  124. .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
  125. };
  126. u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
  127. int ret;
  128. ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
  129. if (ret)
  130. IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
  131. else
  132. IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
  133. return ret;
  134. }
  135. void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
  136. struct iwl_rx_cmd_buffer *rxb)
  137. {
  138. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  139. struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
  140. __le32 *dump_data = mfu_dump_notif->data;
  141. int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
  142. int i;
  143. if (mfu_dump_notif->index_num == 0)
  144. IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
  145. le32_to_cpu(mfu_dump_notif->assert_id));
  146. for (i = 0; i < n_words; i++)
  147. IWL_DEBUG_INFO(mvm,
  148. "MFUART assert dump, dword %u: 0x%08x\n",
  149. le16_to_cpu(mfu_dump_notif->index_num) *
  150. n_words + i,
  151. le32_to_cpu(dump_data[i]));
  152. }
  153. static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
  154. struct iwl_rx_packet *pkt, void *data)
  155. {
  156. struct iwl_mvm *mvm =
  157. container_of(notif_wait, struct iwl_mvm, notif_wait);
  158. struct iwl_mvm_alive_data *alive_data = data;
  159. struct mvm_alive_resp_v3 *palive3;
  160. struct mvm_alive_resp *palive;
  161. struct iwl_umac_alive *umac;
  162. struct iwl_lmac_alive *lmac1;
  163. struct iwl_lmac_alive *lmac2 = NULL;
  164. u16 status;
  165. u32 umac_error_event_table;
  166. if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
  167. palive = (void *)pkt->data;
  168. umac = &palive->umac_data;
  169. lmac1 = &palive->lmac_data[0];
  170. lmac2 = &palive->lmac_data[1];
  171. status = le16_to_cpu(palive->status);
  172. } else {
  173. palive3 = (void *)pkt->data;
  174. umac = &palive3->umac_data;
  175. lmac1 = &palive3->lmac_data;
  176. status = le16_to_cpu(palive3->status);
  177. }
  178. mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr);
  179. if (lmac2)
  180. mvm->error_event_table[1] =
  181. le32_to_cpu(lmac2->error_event_table_ptr);
  182. mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr);
  183. umac_error_event_table = le32_to_cpu(umac->error_info_addr);
  184. if (!umac_error_event_table) {
  185. mvm->support_umac_log = false;
  186. } else if (umac_error_event_table >=
  187. mvm->trans->cfg->min_umac_error_event_table) {
  188. mvm->support_umac_log = true;
  189. mvm->umac_error_event_table = umac_error_event_table;
  190. } else {
  191. IWL_ERR(mvm,
  192. "Not valid error log pointer 0x%08X for %s uCode\n",
  193. mvm->umac_error_event_table,
  194. (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) ?
  195. "Init" : "RT");
  196. mvm->support_umac_log = false;
  197. }
  198. alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr);
  199. alive_data->valid = status == IWL_ALIVE_STATUS_OK;
  200. IWL_DEBUG_FW(mvm,
  201. "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
  202. status, lmac1->ver_type, lmac1->ver_subtype);
  203. if (lmac2)
  204. IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
  205. IWL_DEBUG_FW(mvm,
  206. "UMAC version: Major - 0x%x, Minor - 0x%x\n",
  207. le32_to_cpu(umac->umac_major),
  208. le32_to_cpu(umac->umac_minor));
  209. return true;
  210. }
  211. static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
  212. struct iwl_rx_packet *pkt, void *data)
  213. {
  214. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  215. return true;
  216. }
  217. static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
  218. struct iwl_rx_packet *pkt, void *data)
  219. {
  220. struct iwl_phy_db *phy_db = data;
  221. if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
  222. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  223. return true;
  224. }
  225. WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
  226. return false;
  227. }
  228. static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
  229. enum iwl_ucode_type ucode_type)
  230. {
  231. struct iwl_notification_wait alive_wait;
  232. struct iwl_mvm_alive_data alive_data;
  233. const struct fw_img *fw;
  234. int ret, i;
  235. enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
  236. static const u16 alive_cmd[] = { MVM_ALIVE };
  237. if (ucode_type == IWL_UCODE_REGULAR &&
  238. iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
  239. !(fw_has_capa(&mvm->fw->ucode_capa,
  240. IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
  241. fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
  242. else
  243. fw = iwl_get_ucode_image(mvm->fw, ucode_type);
  244. if (WARN_ON(!fw))
  245. return -EINVAL;
  246. iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
  247. clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
  248. iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
  249. alive_cmd, ARRAY_SIZE(alive_cmd),
  250. iwl_alive_fn, &alive_data);
  251. ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
  252. if (ret) {
  253. iwl_fw_set_current_image(&mvm->fwrt, old_type);
  254. iwl_remove_notification(&mvm->notif_wait, &alive_wait);
  255. return ret;
  256. }
  257. /*
  258. * Some things may run in the background now, but we
  259. * just wait for the ALIVE notification here.
  260. */
  261. ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
  262. MVM_UCODE_ALIVE_TIMEOUT);
  263. if (ret) {
  264. struct iwl_trans *trans = mvm->trans;
  265. if (trans->cfg->device_family == IWL_DEVICE_FAMILY_22000)
  266. IWL_ERR(mvm,
  267. "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
  268. iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS),
  269. iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS));
  270. else if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
  271. IWL_ERR(mvm,
  272. "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
  273. iwl_read_prph(trans, SB_CPU_1_STATUS),
  274. iwl_read_prph(trans, SB_CPU_2_STATUS));
  275. iwl_fw_set_current_image(&mvm->fwrt, old_type);
  276. return ret;
  277. }
  278. if (!alive_data.valid) {
  279. IWL_ERR(mvm, "Loaded ucode is not valid!\n");
  280. iwl_fw_set_current_image(&mvm->fwrt, old_type);
  281. return -EIO;
  282. }
  283. iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
  284. /*
  285. * Note: all the queues are enabled as part of the interface
  286. * initialization, but in firmware restart scenarios they
  287. * could be stopped, so wake them up. In firmware restart,
  288. * mac80211 will have the queues stopped as well until the
  289. * reconfiguration completes. During normal startup, they
  290. * will be empty.
  291. */
  292. memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
  293. mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
  294. for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
  295. atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
  296. set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
  297. return 0;
  298. }
  299. static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  300. {
  301. struct iwl_notification_wait init_wait;
  302. struct iwl_nvm_access_complete_cmd nvm_complete = {};
  303. struct iwl_init_extended_cfg_cmd init_cfg = {
  304. .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
  305. };
  306. static const u16 init_complete[] = {
  307. INIT_COMPLETE_NOTIF,
  308. };
  309. int ret;
  310. lockdep_assert_held(&mvm->mutex);
  311. iwl_init_notification_wait(&mvm->notif_wait,
  312. &init_wait,
  313. init_complete,
  314. ARRAY_SIZE(init_complete),
  315. iwl_wait_init_complete,
  316. NULL);
  317. /* Will also start the device */
  318. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  319. if (ret) {
  320. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  321. goto error;
  322. }
  323. /* Send init config command to mark that we are sending NVM access
  324. * commands
  325. */
  326. ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
  327. INIT_EXTENDED_CFG_CMD), 0,
  328. sizeof(init_cfg), &init_cfg);
  329. if (ret) {
  330. IWL_ERR(mvm, "Failed to run init config command: %d\n",
  331. ret);
  332. goto error;
  333. }
  334. /* Load NVM to NIC if needed */
  335. if (mvm->nvm_file_name) {
  336. iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
  337. mvm->nvm_sections);
  338. iwl_mvm_load_nvm_to_nic(mvm);
  339. }
  340. if (IWL_MVM_PARSE_NVM && read_nvm) {
  341. ret = iwl_nvm_init(mvm);
  342. if (ret) {
  343. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  344. goto error;
  345. }
  346. }
  347. ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
  348. NVM_ACCESS_COMPLETE), 0,
  349. sizeof(nvm_complete), &nvm_complete);
  350. if (ret) {
  351. IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
  352. ret);
  353. goto error;
  354. }
  355. /* We wait for the INIT complete notification */
  356. ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
  357. MVM_UCODE_ALIVE_TIMEOUT);
  358. if (ret)
  359. return ret;
  360. /* Read the NVM only at driver load time, no need to do this twice */
  361. if (!IWL_MVM_PARSE_NVM && read_nvm) {
  362. mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw);
  363. if (IS_ERR(mvm->nvm_data)) {
  364. ret = PTR_ERR(mvm->nvm_data);
  365. mvm->nvm_data = NULL;
  366. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  367. return ret;
  368. }
  369. }
  370. return 0;
  371. error:
  372. iwl_remove_notification(&mvm->notif_wait, &init_wait);
  373. return ret;
  374. }
  375. static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
  376. {
  377. struct iwl_phy_cfg_cmd phy_cfg_cmd;
  378. enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
  379. /* Set parameters */
  380. phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
  381. /* set flags extra PHY configuration flags from the device's cfg */
  382. phy_cfg_cmd.phy_cfg |= cpu_to_le32(mvm->cfg->extra_phy_cfg_flags);
  383. phy_cfg_cmd.calib_control.event_trigger =
  384. mvm->fw->default_calib[ucode_type].event_trigger;
  385. phy_cfg_cmd.calib_control.flow_trigger =
  386. mvm->fw->default_calib[ucode_type].flow_trigger;
  387. IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
  388. phy_cfg_cmd.phy_cfg);
  389. return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
  390. sizeof(phy_cfg_cmd), &phy_cfg_cmd);
  391. }
  392. int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  393. {
  394. struct iwl_notification_wait calib_wait;
  395. static const u16 init_complete[] = {
  396. INIT_COMPLETE_NOTIF,
  397. CALIB_RES_NOTIF_PHY_DB
  398. };
  399. int ret;
  400. if (iwl_mvm_has_unified_ucode(mvm))
  401. return iwl_run_unified_mvm_ucode(mvm, true);
  402. lockdep_assert_held(&mvm->mutex);
  403. if (WARN_ON_ONCE(mvm->calibrating))
  404. return 0;
  405. iwl_init_notification_wait(&mvm->notif_wait,
  406. &calib_wait,
  407. init_complete,
  408. ARRAY_SIZE(init_complete),
  409. iwl_wait_phy_db_entry,
  410. mvm->phy_db);
  411. /* Will also start the device */
  412. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
  413. if (ret) {
  414. IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
  415. goto remove_notif;
  416. }
  417. if (mvm->cfg->device_family < IWL_DEVICE_FAMILY_8000) {
  418. ret = iwl_mvm_send_bt_init_conf(mvm);
  419. if (ret)
  420. goto remove_notif;
  421. }
  422. /* Read the NVM only at driver load time, no need to do this twice */
  423. if (read_nvm) {
  424. ret = iwl_nvm_init(mvm);
  425. if (ret) {
  426. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  427. goto remove_notif;
  428. }
  429. }
  430. /* In case we read the NVM from external file, load it to the NIC */
  431. if (mvm->nvm_file_name)
  432. iwl_mvm_load_nvm_to_nic(mvm);
  433. WARN_ON(iwl_nvm_check_version(mvm->nvm_data, mvm->trans));
  434. /*
  435. * abort after reading the nvm in case RF Kill is on, we will complete
  436. * the init seq later when RF kill will switch to off
  437. */
  438. if (iwl_mvm_is_radio_hw_killed(mvm)) {
  439. IWL_DEBUG_RF_KILL(mvm,
  440. "jump over all phy activities due to RF kill\n");
  441. goto remove_notif;
  442. }
  443. mvm->calibrating = true;
  444. /* Send TX valid antennas before triggering calibrations */
  445. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  446. if (ret)
  447. goto remove_notif;
  448. ret = iwl_send_phy_cfg_cmd(mvm);
  449. if (ret) {
  450. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  451. ret);
  452. goto remove_notif;
  453. }
  454. /*
  455. * Some things may run in the background now, but we
  456. * just wait for the calibration complete notification.
  457. */
  458. ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
  459. MVM_UCODE_CALIB_TIMEOUT);
  460. if (!ret)
  461. goto out;
  462. if (iwl_mvm_is_radio_hw_killed(mvm)) {
  463. IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
  464. ret = 0;
  465. } else {
  466. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  467. ret);
  468. }
  469. goto out;
  470. remove_notif:
  471. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  472. out:
  473. mvm->calibrating = false;
  474. if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
  475. /* we want to debug INIT and we have no NVM - fake */
  476. mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
  477. sizeof(struct ieee80211_channel) +
  478. sizeof(struct ieee80211_rate),
  479. GFP_KERNEL);
  480. if (!mvm->nvm_data)
  481. return -ENOMEM;
  482. mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
  483. mvm->nvm_data->bands[0].n_channels = 1;
  484. mvm->nvm_data->bands[0].n_bitrates = 1;
  485. mvm->nvm_data->bands[0].bitrates =
  486. (void *)mvm->nvm_data->channels + 1;
  487. mvm->nvm_data->bands[0].bitrates->hw_value = 10;
  488. }
  489. return ret;
  490. }
  491. static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
  492. {
  493. struct iwl_ltr_config_cmd cmd = {
  494. .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
  495. };
  496. if (!mvm->trans->ltr_enabled)
  497. return 0;
  498. return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
  499. sizeof(cmd), &cmd);
  500. }
  501. #ifdef CONFIG_ACPI
  502. static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
  503. union acpi_object *table,
  504. struct iwl_mvm_sar_profile *profile,
  505. bool enabled)
  506. {
  507. int i;
  508. profile->enabled = enabled;
  509. for (i = 0; i < ACPI_SAR_TABLE_SIZE; i++) {
  510. if ((table[i].type != ACPI_TYPE_INTEGER) ||
  511. (table[i].integer.value > U8_MAX))
  512. return -EINVAL;
  513. profile->table[i] = table[i].integer.value;
  514. }
  515. return 0;
  516. }
  517. static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
  518. {
  519. union acpi_object *wifi_pkg, *table, *data;
  520. bool enabled;
  521. int ret;
  522. data = iwl_acpi_get_object(mvm->dev, ACPI_WRDS_METHOD);
  523. if (IS_ERR(data))
  524. return PTR_ERR(data);
  525. wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
  526. ACPI_WRDS_WIFI_DATA_SIZE);
  527. if (IS_ERR(wifi_pkg)) {
  528. ret = PTR_ERR(wifi_pkg);
  529. goto out_free;
  530. }
  531. if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
  532. ret = -EINVAL;
  533. goto out_free;
  534. }
  535. enabled = !!(wifi_pkg->package.elements[1].integer.value);
  536. /* position of the actual table */
  537. table = &wifi_pkg->package.elements[2];
  538. /* The profile from WRDS is officially profile 1, but goes
  539. * into sar_profiles[0] (because we don't have a profile 0).
  540. */
  541. ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
  542. enabled);
  543. out_free:
  544. kfree(data);
  545. return ret;
  546. }
  547. static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
  548. {
  549. union acpi_object *wifi_pkg, *data;
  550. bool enabled;
  551. int i, n_profiles, ret;
  552. data = iwl_acpi_get_object(mvm->dev, ACPI_EWRD_METHOD);
  553. if (IS_ERR(data))
  554. return PTR_ERR(data);
  555. wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
  556. ACPI_EWRD_WIFI_DATA_SIZE);
  557. if (IS_ERR(wifi_pkg)) {
  558. ret = PTR_ERR(wifi_pkg);
  559. goto out_free;
  560. }
  561. if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
  562. (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
  563. ret = -EINVAL;
  564. goto out_free;
  565. }
  566. enabled = !!(wifi_pkg->package.elements[1].integer.value);
  567. n_profiles = wifi_pkg->package.elements[2].integer.value;
  568. /* in case of BIOS bug */
  569. if (n_profiles <= 0) {
  570. ret = -EINVAL;
  571. goto out_free;
  572. }
  573. for (i = 0; i < n_profiles; i++) {
  574. /* the tables start at element 3 */
  575. static int pos = 3;
  576. /* The EWRD profiles officially go from 2 to 4, but we
  577. * save them in sar_profiles[1-3] (because we don't
  578. * have profile 0). So in the array we start from 1.
  579. */
  580. ret = iwl_mvm_sar_set_profile(mvm,
  581. &wifi_pkg->package.elements[pos],
  582. &mvm->sar_profiles[i + 1],
  583. enabled);
  584. if (ret < 0)
  585. break;
  586. /* go to the next table */
  587. pos += ACPI_SAR_TABLE_SIZE;
  588. }
  589. out_free:
  590. kfree(data);
  591. return ret;
  592. }
  593. static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm)
  594. {
  595. union acpi_object *wifi_pkg, *data;
  596. int i, j, ret;
  597. int idx = 1;
  598. data = iwl_acpi_get_object(mvm->dev, ACPI_WGDS_METHOD);
  599. if (IS_ERR(data))
  600. return PTR_ERR(data);
  601. wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data,
  602. ACPI_WGDS_WIFI_DATA_SIZE);
  603. if (IS_ERR(wifi_pkg)) {
  604. ret = PTR_ERR(wifi_pkg);
  605. goto out_free;
  606. }
  607. for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
  608. for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) {
  609. union acpi_object *entry;
  610. entry = &wifi_pkg->package.elements[idx++];
  611. if ((entry->type != ACPI_TYPE_INTEGER) ||
  612. (entry->integer.value > U8_MAX)) {
  613. ret = -EINVAL;
  614. goto out_free;
  615. }
  616. mvm->geo_profiles[i].values[j] = entry->integer.value;
  617. }
  618. }
  619. ret = 0;
  620. out_free:
  621. kfree(data);
  622. return ret;
  623. }
  624. int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
  625. {
  626. struct iwl_dev_tx_power_cmd cmd = {
  627. .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
  628. };
  629. int i, j, idx;
  630. int profs[ACPI_SAR_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
  631. int len = sizeof(cmd);
  632. BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS < 2);
  633. BUILD_BUG_ON(ACPI_SAR_NUM_CHAIN_LIMITS * ACPI_SAR_NUM_SUB_BANDS !=
  634. ACPI_SAR_TABLE_SIZE);
  635. if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
  636. len = sizeof(cmd.v3);
  637. for (i = 0; i < ACPI_SAR_NUM_CHAIN_LIMITS; i++) {
  638. struct iwl_mvm_sar_profile *prof;
  639. /* don't allow SAR to be disabled (profile 0 means disable) */
  640. if (profs[i] == 0)
  641. return -EPERM;
  642. /* we are off by one, so allow up to ACPI_SAR_PROFILE_NUM */
  643. if (profs[i] > ACPI_SAR_PROFILE_NUM)
  644. return -EINVAL;
  645. /* profiles go from 1 to 4, so decrement to access the array */
  646. prof = &mvm->sar_profiles[profs[i] - 1];
  647. /* if the profile is disabled, do nothing */
  648. if (!prof->enabled) {
  649. IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
  650. profs[i]);
  651. /* if one of the profiles is disabled, we fail all */
  652. return -ENOENT;
  653. }
  654. IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
  655. for (j = 0; j < ACPI_SAR_NUM_SUB_BANDS; j++) {
  656. idx = (i * ACPI_SAR_NUM_SUB_BANDS) + j;
  657. cmd.v3.per_chain_restriction[i][j] =
  658. cpu_to_le16(prof->table[idx]);
  659. IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
  660. j, prof->table[idx]);
  661. }
  662. }
  663. IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
  664. return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
  665. }
  666. int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
  667. {
  668. struct iwl_geo_tx_power_profiles_resp *resp;
  669. int ret;
  670. struct iwl_geo_tx_power_profiles_cmd geo_cmd = {
  671. .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE),
  672. };
  673. struct iwl_host_cmd cmd = {
  674. .id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT),
  675. .len = { sizeof(geo_cmd), },
  676. .flags = CMD_WANT_SKB,
  677. .data = { &geo_cmd },
  678. };
  679. ret = iwl_mvm_send_cmd(mvm, &cmd);
  680. if (ret) {
  681. IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
  682. return ret;
  683. }
  684. resp = (void *)cmd.resp_pkt->data;
  685. ret = le32_to_cpu(resp->profile_idx);
  686. if (WARN_ON(ret > ACPI_NUM_GEO_PROFILES)) {
  687. ret = -EIO;
  688. IWL_WARN(mvm, "Invalid geographic profile idx (%d)\n", ret);
  689. }
  690. iwl_free_resp(&cmd);
  691. return ret;
  692. }
  693. static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
  694. {
  695. struct iwl_geo_tx_power_profiles_cmd cmd = {
  696. .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
  697. };
  698. int ret, i, j;
  699. u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
  700. ret = iwl_mvm_sar_get_wgds_table(mvm);
  701. if (ret < 0) {
  702. IWL_DEBUG_RADIO(mvm,
  703. "Geo SAR BIOS table invalid or unavailable. (%d)\n",
  704. ret);
  705. /* we don't fail if the table is not available */
  706. return 0;
  707. }
  708. IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
  709. BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
  710. ACPI_WGDS_TABLE_SIZE != ACPI_WGDS_WIFI_DATA_SIZE);
  711. BUILD_BUG_ON(ACPI_NUM_GEO_PROFILES > IWL_NUM_GEO_PROFILES);
  712. for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) {
  713. struct iwl_per_chain_offset *chain =
  714. (struct iwl_per_chain_offset *)&cmd.table[i];
  715. for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
  716. u8 *value;
  717. value = &mvm->geo_profiles[i].values[j *
  718. ACPI_GEO_PER_CHAIN_SIZE];
  719. chain[j].max_tx_power = cpu_to_le16(value[0]);
  720. chain[j].chain_a = value[1];
  721. chain[j].chain_b = value[2];
  722. IWL_DEBUG_RADIO(mvm,
  723. "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
  724. i, j, value[1], value[2], value[0]);
  725. }
  726. }
  727. return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
  728. }
  729. #else /* CONFIG_ACPI */
  730. static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
  731. {
  732. return -ENOENT;
  733. }
  734. static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
  735. {
  736. return -ENOENT;
  737. }
  738. static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
  739. {
  740. return 0;
  741. }
  742. int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a,
  743. int prof_b)
  744. {
  745. return -ENOENT;
  746. }
  747. int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
  748. {
  749. return -ENOENT;
  750. }
  751. #endif /* CONFIG_ACPI */
  752. static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
  753. {
  754. int ret;
  755. ret = iwl_mvm_sar_get_wrds_table(mvm);
  756. if (ret < 0) {
  757. IWL_DEBUG_RADIO(mvm,
  758. "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
  759. ret);
  760. /* if not available, don't fail and don't bother with EWRD */
  761. return 0;
  762. }
  763. ret = iwl_mvm_sar_get_ewrd_table(mvm);
  764. /* if EWRD is not available, we can still use WRDS, so don't fail */
  765. if (ret < 0)
  766. IWL_DEBUG_RADIO(mvm,
  767. "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
  768. ret);
  769. /* choose profile 1 (WRDS) as default for both chains */
  770. ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
  771. /* if we don't have profile 0 from BIOS, just skip it */
  772. if (ret == -ENOENT)
  773. return 0;
  774. return ret;
  775. }
  776. static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
  777. {
  778. int ret;
  779. if (iwl_mvm_has_unified_ucode(mvm))
  780. return iwl_run_unified_mvm_ucode(mvm, false);
  781. ret = iwl_run_init_mvm_ucode(mvm, false);
  782. if (ret) {
  783. IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
  784. if (iwlmvm_mod_params.init_dbg)
  785. return 0;
  786. return ret;
  787. }
  788. /*
  789. * Stop and start the transport without entering low power
  790. * mode. This will save the state of other components on the
  791. * device that are triggered by the INIT firwmare (MFUART).
  792. */
  793. _iwl_trans_stop_device(mvm->trans, false);
  794. ret = _iwl_trans_start_hw(mvm->trans, false);
  795. if (ret)
  796. return ret;
  797. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  798. if (ret)
  799. return ret;
  800. return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
  801. }
  802. int iwl_mvm_up(struct iwl_mvm *mvm)
  803. {
  804. int ret, i;
  805. struct ieee80211_channel *chan;
  806. struct cfg80211_chan_def chandef;
  807. lockdep_assert_held(&mvm->mutex);
  808. ret = iwl_trans_start_hw(mvm->trans);
  809. if (ret)
  810. return ret;
  811. ret = iwl_mvm_load_rt_fw(mvm);
  812. if (ret) {
  813. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  814. goto error;
  815. }
  816. iwl_get_shared_mem_conf(&mvm->fwrt);
  817. ret = iwl_mvm_sf_update(mvm, NULL, false);
  818. if (ret)
  819. IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
  820. mvm->fwrt.dump.conf = FW_DBG_INVALID;
  821. /* if we have a destination, assume EARLY START */
  822. if (mvm->fw->dbg_dest_tlv)
  823. mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
  824. iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
  825. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  826. if (ret)
  827. goto error;
  828. if (!iwl_mvm_has_unified_ucode(mvm)) {
  829. /* Send phy db control command and then phy db calibration */
  830. ret = iwl_send_phy_db_data(mvm->phy_db);
  831. if (ret)
  832. goto error;
  833. ret = iwl_send_phy_cfg_cmd(mvm);
  834. if (ret)
  835. goto error;
  836. }
  837. ret = iwl_mvm_send_bt_init_conf(mvm);
  838. if (ret)
  839. goto error;
  840. /* Init RSS configuration */
  841. /* TODO - remove 22000 disablement when we have RXQ config API */
  842. if (iwl_mvm_has_new_rx_api(mvm) &&
  843. mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_22000) {
  844. ret = iwl_send_rss_cfg_cmd(mvm);
  845. if (ret) {
  846. IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
  847. ret);
  848. goto error;
  849. }
  850. }
  851. /* init the fw <-> mac80211 STA mapping */
  852. for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
  853. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  854. mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
  855. /* reset quota debouncing buffer - 0xff will yield invalid data */
  856. memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
  857. ret = iwl_mvm_send_dqa_cmd(mvm);
  858. if (ret)
  859. goto error;
  860. /* Add auxiliary station for scanning */
  861. ret = iwl_mvm_add_aux_sta(mvm);
  862. if (ret)
  863. goto error;
  864. /* Add all the PHY contexts */
  865. chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
  866. cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
  867. for (i = 0; i < NUM_PHY_CTX; i++) {
  868. /*
  869. * The channel used here isn't relevant as it's
  870. * going to be overwritten in the other flows.
  871. * For now use the first channel we have.
  872. */
  873. ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
  874. &chandef, 1, 1);
  875. if (ret)
  876. goto error;
  877. }
  878. #ifdef CONFIG_THERMAL
  879. if (iwl_mvm_is_tt_in_fw(mvm)) {
  880. /* in order to give the responsibility of ct-kill and
  881. * TX backoff to FW we need to send empty temperature reporting
  882. * cmd during init time
  883. */
  884. iwl_mvm_send_temp_report_ths_cmd(mvm);
  885. } else {
  886. /* Initialize tx backoffs to the minimal possible */
  887. iwl_mvm_tt_tx_backoff(mvm, 0);
  888. }
  889. /* TODO: read the budget from BIOS / Platform NVM */
  890. /*
  891. * In case there is no budget from BIOS / Platform NVM the default
  892. * budget should be 2000mW (cooling state 0).
  893. */
  894. if (iwl_mvm_is_ctdp_supported(mvm)) {
  895. ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
  896. mvm->cooling_dev.cur_state);
  897. if (ret)
  898. goto error;
  899. }
  900. #else
  901. /* Initialize tx backoffs to the minimal possible */
  902. iwl_mvm_tt_tx_backoff(mvm, 0);
  903. #endif
  904. WARN_ON(iwl_mvm_config_ltr(mvm));
  905. ret = iwl_mvm_power_update_device(mvm);
  906. if (ret)
  907. goto error;
  908. /*
  909. * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
  910. * anyway, so don't init MCC.
  911. */
  912. if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
  913. ret = iwl_mvm_init_mcc(mvm);
  914. if (ret)
  915. goto error;
  916. }
  917. if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
  918. mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
  919. mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
  920. ret = iwl_mvm_config_scan(mvm);
  921. if (ret)
  922. goto error;
  923. }
  924. /* allow FW/transport low power modes if not during restart */
  925. if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
  926. iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
  927. ret = iwl_mvm_sar_init(mvm);
  928. if (ret)
  929. goto error;
  930. ret = iwl_mvm_sar_geo_init(mvm);
  931. if (ret)
  932. goto error;
  933. iwl_mvm_leds_sync(mvm);
  934. IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
  935. return 0;
  936. error:
  937. if (!iwlmvm_mod_params.init_dbg || !ret)
  938. iwl_mvm_stop_device(mvm);
  939. return ret;
  940. }
  941. int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
  942. {
  943. int ret, i;
  944. lockdep_assert_held(&mvm->mutex);
  945. ret = iwl_trans_start_hw(mvm->trans);
  946. if (ret)
  947. return ret;
  948. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
  949. if (ret) {
  950. IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
  951. goto error;
  952. }
  953. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  954. if (ret)
  955. goto error;
  956. /* Send phy db control command and then phy db calibration*/
  957. ret = iwl_send_phy_db_data(mvm->phy_db);
  958. if (ret)
  959. goto error;
  960. ret = iwl_send_phy_cfg_cmd(mvm);
  961. if (ret)
  962. goto error;
  963. /* init the fw <-> mac80211 STA mapping */
  964. for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
  965. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  966. /* Add auxiliary station for scanning */
  967. ret = iwl_mvm_add_aux_sta(mvm);
  968. if (ret)
  969. goto error;
  970. return 0;
  971. error:
  972. iwl_mvm_stop_device(mvm);
  973. return ret;
  974. }
  975. void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
  976. struct iwl_rx_cmd_buffer *rxb)
  977. {
  978. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  979. struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
  980. u32 flags = le32_to_cpu(card_state_notif->flags);
  981. IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
  982. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  983. (flags & SW_CARD_DISABLED) ? "Kill" : "On",
  984. (flags & CT_KILL_CARD_DISABLED) ?
  985. "Reached" : "Not reached");
  986. }
  987. void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
  988. struct iwl_rx_cmd_buffer *rxb)
  989. {
  990. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  991. struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
  992. IWL_DEBUG_INFO(mvm,
  993. "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
  994. le32_to_cpu(mfuart_notif->installed_ver),
  995. le32_to_cpu(mfuart_notif->external_ver),
  996. le32_to_cpu(mfuart_notif->status),
  997. le32_to_cpu(mfuart_notif->duration));
  998. if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
  999. IWL_DEBUG_INFO(mvm,
  1000. "MFUART: image size: 0x%08x\n",
  1001. le32_to_cpu(mfuart_notif->image_size));
  1002. }