intel_quark_i2c_gpio.c 7.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288
  1. /*
  2. * Intel Quark MFD PCI driver for I2C & GPIO
  3. *
  4. * Copyright(c) 2014 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * Intel Quark PCI device for I2C and GPIO controller sharing the same
  16. * PCI function. This PCI driver will split the 2 devices into their
  17. * respective drivers.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/mfd/core.h>
  23. #include <linux/clkdev.h>
  24. #include <linux/clk-provider.h>
  25. #include <linux/dmi.h>
  26. #include <linux/platform_data/gpio-dwapb.h>
  27. #include <linux/platform_data/i2c-designware.h>
  28. /* PCI BAR for register base address */
  29. #define MFD_I2C_BAR 0
  30. #define MFD_GPIO_BAR 1
  31. /* ACPI _ADR value to match the child node */
  32. #define MFD_ACPI_MATCH_GPIO 0ULL
  33. #define MFD_ACPI_MATCH_I2C 1ULL
  34. /* The base GPIO number under GPIOLIB framework */
  35. #define INTEL_QUARK_MFD_GPIO_BASE 8
  36. /* The default number of South-Cluster GPIO on Quark. */
  37. #define INTEL_QUARK_MFD_NGPIO 8
  38. /* The DesignWare GPIO ports on Quark. */
  39. #define INTEL_QUARK_GPIO_NPORTS 1
  40. #define INTEL_QUARK_IORES_MEM 0
  41. #define INTEL_QUARK_IORES_IRQ 1
  42. #define INTEL_QUARK_I2C_CONTROLLER_CLK "i2c_designware.0"
  43. /* The Quark I2C controller source clock */
  44. #define INTEL_QUARK_I2C_CLK_HZ 33000000
  45. struct intel_quark_mfd {
  46. struct device *dev;
  47. struct clk *i2c_clk;
  48. struct clk_lookup *i2c_clk_lookup;
  49. };
  50. static const struct dmi_system_id dmi_platform_info[] = {
  51. {
  52. .matches = {
  53. DMI_EXACT_MATCH(DMI_BOARD_NAME, "Galileo"),
  54. },
  55. .driver_data = (void *)100000,
  56. },
  57. {
  58. .matches = {
  59. DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
  60. },
  61. .driver_data = (void *)400000,
  62. },
  63. {}
  64. };
  65. static struct resource intel_quark_i2c_res[] = {
  66. [INTEL_QUARK_IORES_MEM] = {
  67. .flags = IORESOURCE_MEM,
  68. },
  69. [INTEL_QUARK_IORES_IRQ] = {
  70. .flags = IORESOURCE_IRQ,
  71. },
  72. };
  73. static struct mfd_cell_acpi_match intel_quark_acpi_match_i2c = {
  74. .adr = MFD_ACPI_MATCH_I2C,
  75. };
  76. static struct resource intel_quark_gpio_res[] = {
  77. [INTEL_QUARK_IORES_MEM] = {
  78. .flags = IORESOURCE_MEM,
  79. },
  80. };
  81. static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = {
  82. .adr = MFD_ACPI_MATCH_GPIO,
  83. };
  84. static struct mfd_cell intel_quark_mfd_cells[] = {
  85. {
  86. .id = MFD_GPIO_BAR,
  87. .name = "gpio-dwapb",
  88. .acpi_match = &intel_quark_acpi_match_gpio,
  89. .num_resources = ARRAY_SIZE(intel_quark_gpio_res),
  90. .resources = intel_quark_gpio_res,
  91. .ignore_resource_conflicts = true,
  92. },
  93. {
  94. .id = MFD_I2C_BAR,
  95. .name = "i2c_designware",
  96. .acpi_match = &intel_quark_acpi_match_i2c,
  97. .num_resources = ARRAY_SIZE(intel_quark_i2c_res),
  98. .resources = intel_quark_i2c_res,
  99. .ignore_resource_conflicts = true,
  100. },
  101. };
  102. static const struct pci_device_id intel_quark_mfd_ids[] = {
  103. { PCI_VDEVICE(INTEL, 0x0934), },
  104. {},
  105. };
  106. MODULE_DEVICE_TABLE(pci, intel_quark_mfd_ids);
  107. static int intel_quark_register_i2c_clk(struct device *dev)
  108. {
  109. struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
  110. struct clk *i2c_clk;
  111. i2c_clk = clk_register_fixed_rate(dev,
  112. INTEL_QUARK_I2C_CONTROLLER_CLK, NULL,
  113. 0, INTEL_QUARK_I2C_CLK_HZ);
  114. if (IS_ERR(i2c_clk))
  115. return PTR_ERR(i2c_clk);
  116. quark_mfd->i2c_clk = i2c_clk;
  117. quark_mfd->i2c_clk_lookup = clkdev_create(i2c_clk, NULL,
  118. INTEL_QUARK_I2C_CONTROLLER_CLK);
  119. if (!quark_mfd->i2c_clk_lookup) {
  120. clk_unregister(quark_mfd->i2c_clk);
  121. dev_err(dev, "Fixed clk register failed\n");
  122. return -ENOMEM;
  123. }
  124. return 0;
  125. }
  126. static void intel_quark_unregister_i2c_clk(struct device *dev)
  127. {
  128. struct intel_quark_mfd *quark_mfd = dev_get_drvdata(dev);
  129. if (!quark_mfd->i2c_clk_lookup)
  130. return;
  131. clkdev_drop(quark_mfd->i2c_clk_lookup);
  132. clk_unregister(quark_mfd->i2c_clk);
  133. }
  134. static int intel_quark_i2c_setup(struct pci_dev *pdev, struct mfd_cell *cell)
  135. {
  136. const struct dmi_system_id *dmi_id;
  137. struct dw_i2c_platform_data *pdata;
  138. struct resource *res = (struct resource *)cell->resources;
  139. struct device *dev = &pdev->dev;
  140. res[INTEL_QUARK_IORES_MEM].start =
  141. pci_resource_start(pdev, MFD_I2C_BAR);
  142. res[INTEL_QUARK_IORES_MEM].end =
  143. pci_resource_end(pdev, MFD_I2C_BAR);
  144. res[INTEL_QUARK_IORES_IRQ].start = pdev->irq;
  145. res[INTEL_QUARK_IORES_IRQ].end = pdev->irq;
  146. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  147. if (!pdata)
  148. return -ENOMEM;
  149. /* Normal mode by default */
  150. pdata->i2c_scl_freq = 100000;
  151. dmi_id = dmi_first_match(dmi_platform_info);
  152. if (dmi_id)
  153. pdata->i2c_scl_freq = (uintptr_t)dmi_id->driver_data;
  154. cell->platform_data = pdata;
  155. cell->pdata_size = sizeof(*pdata);
  156. return 0;
  157. }
  158. static int intel_quark_gpio_setup(struct pci_dev *pdev, struct mfd_cell *cell)
  159. {
  160. struct dwapb_platform_data *pdata;
  161. struct resource *res = (struct resource *)cell->resources;
  162. struct device *dev = &pdev->dev;
  163. res[INTEL_QUARK_IORES_MEM].start =
  164. pci_resource_start(pdev, MFD_GPIO_BAR);
  165. res[INTEL_QUARK_IORES_MEM].end =
  166. pci_resource_end(pdev, MFD_GPIO_BAR);
  167. pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
  168. if (!pdata)
  169. return -ENOMEM;
  170. /* For intel quark x1000, it has only one port: portA */
  171. pdata->nports = INTEL_QUARK_GPIO_NPORTS;
  172. pdata->properties = devm_kcalloc(dev, pdata->nports,
  173. sizeof(*pdata->properties),
  174. GFP_KERNEL);
  175. if (!pdata->properties)
  176. return -ENOMEM;
  177. /* Set the properties for portA */
  178. pdata->properties->fwnode = NULL;
  179. pdata->properties->idx = 0;
  180. pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO;
  181. pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE;
  182. pdata->properties->irq = pdev->irq;
  183. pdata->properties->irq_shared = true;
  184. cell->platform_data = pdata;
  185. cell->pdata_size = sizeof(*pdata);
  186. return 0;
  187. }
  188. static int intel_quark_mfd_probe(struct pci_dev *pdev,
  189. const struct pci_device_id *id)
  190. {
  191. struct intel_quark_mfd *quark_mfd;
  192. int ret;
  193. ret = pcim_enable_device(pdev);
  194. if (ret)
  195. return ret;
  196. quark_mfd = devm_kzalloc(&pdev->dev, sizeof(*quark_mfd), GFP_KERNEL);
  197. if (!quark_mfd)
  198. return -ENOMEM;
  199. quark_mfd->dev = &pdev->dev;
  200. dev_set_drvdata(&pdev->dev, quark_mfd);
  201. ret = intel_quark_register_i2c_clk(&pdev->dev);
  202. if (ret)
  203. return ret;
  204. ret = intel_quark_i2c_setup(pdev, &intel_quark_mfd_cells[1]);
  205. if (ret)
  206. goto err_unregister_i2c_clk;
  207. ret = intel_quark_gpio_setup(pdev, &intel_quark_mfd_cells[0]);
  208. if (ret)
  209. goto err_unregister_i2c_clk;
  210. ret = mfd_add_devices(&pdev->dev, 0, intel_quark_mfd_cells,
  211. ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0,
  212. NULL);
  213. if (ret)
  214. goto err_unregister_i2c_clk;
  215. return 0;
  216. err_unregister_i2c_clk:
  217. intel_quark_unregister_i2c_clk(&pdev->dev);
  218. return ret;
  219. }
  220. static void intel_quark_mfd_remove(struct pci_dev *pdev)
  221. {
  222. intel_quark_unregister_i2c_clk(&pdev->dev);
  223. mfd_remove_devices(&pdev->dev);
  224. }
  225. static struct pci_driver intel_quark_mfd_driver = {
  226. .name = "intel_quark_mfd_i2c_gpio",
  227. .id_table = intel_quark_mfd_ids,
  228. .probe = intel_quark_mfd_probe,
  229. .remove = intel_quark_mfd_remove,
  230. };
  231. module_pci_driver(intel_quark_mfd_driver);
  232. MODULE_AUTHOR("Raymond Tan <raymond.tan@intel.com>");
  233. MODULE_DESCRIPTION("Intel Quark MFD PCI driver for I2C & GPIO");
  234. MODULE_LICENSE("GPL v2");