xhci-mtk-sch.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2015 MediaTek Inc.
  4. * Author:
  5. * Zhigang.Wei <zhigang.wei@mediatek.com>
  6. * Chunfeng.Yun <chunfeng.yun@mediatek.com>
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include "xhci.h"
  12. #include "xhci-mtk.h"
  13. #define SS_BW_BOUNDARY 51000
  14. /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
  15. #define HS_BW_BOUNDARY 6144
  16. /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
  17. #define FS_PAYLOAD_MAX 188
  18. /* mtk scheduler bitmasks */
  19. #define EP_BPKTS(p) ((p) & 0x3f)
  20. #define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
  21. #define EP_BBM(p) ((p) << 11)
  22. #define EP_BOFFSET(p) ((p) & 0x3fff)
  23. #define EP_BREPEAT(p) (((p) & 0x7fff) << 16)
  24. static int is_fs_or_ls(enum usb_device_speed speed)
  25. {
  26. return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
  27. }
  28. /*
  29. * get the index of bandwidth domains array which @ep belongs to.
  30. *
  31. * the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk,
  32. * each HS root port is treated as a single bandwidth domain,
  33. * but each SS root port is treated as two bandwidth domains, one for IN eps,
  34. * one for OUT eps.
  35. * @real_port value is defined as follow according to xHCI spec:
  36. * 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc
  37. * so the bandwidth domain array is organized as follow for simplification:
  38. * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
  39. */
  40. static int get_bw_index(struct xhci_hcd *xhci, struct usb_device *udev,
  41. struct usb_host_endpoint *ep)
  42. {
  43. struct xhci_virt_device *virt_dev;
  44. int bw_index;
  45. virt_dev = xhci->devs[udev->slot_id];
  46. if (udev->speed == USB_SPEED_SUPER) {
  47. if (usb_endpoint_dir_out(&ep->desc))
  48. bw_index = (virt_dev->real_port - 1) * 2;
  49. else
  50. bw_index = (virt_dev->real_port - 1) * 2 + 1;
  51. } else {
  52. /* add one more for each SS port */
  53. bw_index = virt_dev->real_port + xhci->usb3_rhub.num_ports - 1;
  54. }
  55. return bw_index;
  56. }
  57. static void setup_sch_info(struct usb_device *udev,
  58. struct xhci_ep_ctx *ep_ctx, struct mu3h_sch_ep_info *sch_ep)
  59. {
  60. u32 ep_type;
  61. u32 ep_interval;
  62. u32 max_packet_size;
  63. u32 max_burst;
  64. u32 mult;
  65. u32 esit_pkts;
  66. ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
  67. ep_interval = CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info));
  68. max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
  69. max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2));
  70. mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info));
  71. sch_ep->esit = 1 << ep_interval;
  72. sch_ep->offset = 0;
  73. sch_ep->burst_mode = 0;
  74. if (udev->speed == USB_SPEED_HIGH) {
  75. sch_ep->cs_count = 0;
  76. /*
  77. * usb_20 spec section5.9
  78. * a single microframe is enough for HS synchromous endpoints
  79. * in a interval
  80. */
  81. sch_ep->num_budget_microframes = 1;
  82. sch_ep->repeat = 0;
  83. /*
  84. * xHCI spec section6.2.3.4
  85. * @max_burst is the number of additional transactions
  86. * opportunities per microframe
  87. */
  88. sch_ep->pkts = max_burst + 1;
  89. sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
  90. } else if (udev->speed == USB_SPEED_SUPER) {
  91. /* usb3_r1 spec section4.4.7 & 4.4.8 */
  92. sch_ep->cs_count = 0;
  93. esit_pkts = (mult + 1) * (max_burst + 1);
  94. if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
  95. sch_ep->pkts = esit_pkts;
  96. sch_ep->num_budget_microframes = 1;
  97. sch_ep->repeat = 0;
  98. }
  99. if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
  100. if (esit_pkts <= sch_ep->esit)
  101. sch_ep->pkts = 1;
  102. else
  103. sch_ep->pkts = roundup_pow_of_two(esit_pkts)
  104. / sch_ep->esit;
  105. sch_ep->num_budget_microframes =
  106. DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
  107. if (sch_ep->num_budget_microframes > 1)
  108. sch_ep->repeat = 1;
  109. else
  110. sch_ep->repeat = 0;
  111. }
  112. sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
  113. } else if (is_fs_or_ls(udev->speed)) {
  114. /*
  115. * usb_20 spec section11.18.4
  116. * assume worst cases
  117. */
  118. sch_ep->repeat = 0;
  119. sch_ep->pkts = 1; /* at most one packet for each microframe */
  120. if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
  121. sch_ep->cs_count = 3; /* at most need 3 CS*/
  122. /* one for SS and one for budgeted transaction */
  123. sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
  124. sch_ep->bw_cost_per_microframe = max_packet_size;
  125. }
  126. if (ep_type == ISOC_OUT_EP) {
  127. /*
  128. * the best case FS budget assumes that 188 FS bytes
  129. * occur in each microframe
  130. */
  131. sch_ep->num_budget_microframes = DIV_ROUND_UP(
  132. max_packet_size, FS_PAYLOAD_MAX);
  133. sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
  134. sch_ep->cs_count = sch_ep->num_budget_microframes;
  135. }
  136. if (ep_type == ISOC_IN_EP) {
  137. /* at most need additional two CS. */
  138. sch_ep->cs_count = DIV_ROUND_UP(
  139. max_packet_size, FS_PAYLOAD_MAX) + 2;
  140. sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
  141. sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
  142. }
  143. }
  144. }
  145. /* Get maximum bandwidth when we schedule at offset slot. */
  146. static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw,
  147. struct mu3h_sch_ep_info *sch_ep, u32 offset)
  148. {
  149. u32 num_esit;
  150. u32 max_bw = 0;
  151. int i;
  152. int j;
  153. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  154. for (i = 0; i < num_esit; i++) {
  155. u32 base = offset + i * sch_ep->esit;
  156. for (j = 0; j < sch_ep->num_budget_microframes; j++) {
  157. if (sch_bw->bus_bw[base + j] > max_bw)
  158. max_bw = sch_bw->bus_bw[base + j];
  159. }
  160. }
  161. return max_bw;
  162. }
  163. static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
  164. struct mu3h_sch_ep_info *sch_ep, int bw_cost)
  165. {
  166. u32 num_esit;
  167. u32 base;
  168. int i;
  169. int j;
  170. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  171. for (i = 0; i < num_esit; i++) {
  172. base = sch_ep->offset + i * sch_ep->esit;
  173. for (j = 0; j < sch_ep->num_budget_microframes; j++)
  174. sch_bw->bus_bw[base + j] += bw_cost;
  175. }
  176. }
  177. static int check_sch_bw(struct usb_device *udev,
  178. struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep)
  179. {
  180. u32 offset;
  181. u32 esit;
  182. u32 num_budget_microframes;
  183. u32 min_bw;
  184. u32 min_index;
  185. u32 worst_bw;
  186. u32 bw_boundary;
  187. if (sch_ep->esit > XHCI_MTK_MAX_ESIT)
  188. sch_ep->esit = XHCI_MTK_MAX_ESIT;
  189. esit = sch_ep->esit;
  190. num_budget_microframes = sch_ep->num_budget_microframes;
  191. /*
  192. * Search through all possible schedule microframes.
  193. * and find a microframe where its worst bandwidth is minimum.
  194. */
  195. min_bw = ~0;
  196. min_index = 0;
  197. for (offset = 0; offset < esit; offset++) {
  198. if ((offset + num_budget_microframes) > sch_ep->esit)
  199. break;
  200. /*
  201. * usb_20 spec section11.18:
  202. * must never schedule Start-Split in Y6
  203. */
  204. if (is_fs_or_ls(udev->speed) && (offset % 8 == 6))
  205. continue;
  206. worst_bw = get_max_bw(sch_bw, sch_ep, offset);
  207. if (min_bw > worst_bw) {
  208. min_bw = worst_bw;
  209. min_index = offset;
  210. }
  211. if (min_bw == 0)
  212. break;
  213. }
  214. sch_ep->offset = min_index;
  215. bw_boundary = (udev->speed == USB_SPEED_SUPER)
  216. ? SS_BW_BOUNDARY : HS_BW_BOUNDARY;
  217. /* check bandwidth */
  218. if (min_bw + sch_ep->bw_cost_per_microframe > bw_boundary)
  219. return -ERANGE;
  220. /* update bus bandwidth info */
  221. update_bus_bw(sch_bw, sch_ep, sch_ep->bw_cost_per_microframe);
  222. return 0;
  223. }
  224. static bool need_bw_sch(struct usb_host_endpoint *ep,
  225. enum usb_device_speed speed, int has_tt)
  226. {
  227. /* only for periodic endpoints */
  228. if (usb_endpoint_xfer_control(&ep->desc)
  229. || usb_endpoint_xfer_bulk(&ep->desc))
  230. return false;
  231. /*
  232. * for LS & FS periodic endpoints which its device is not behind
  233. * a TT are also ignored, root-hub will schedule them directly,
  234. * but need set @bpkts field of endpoint context to 1.
  235. */
  236. if (is_fs_or_ls(speed) && !has_tt)
  237. return false;
  238. return true;
  239. }
  240. int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
  241. {
  242. struct xhci_hcd *xhci = hcd_to_xhci(mtk->hcd);
  243. struct mu3h_sch_bw_info *sch_array;
  244. int num_usb_bus;
  245. int i;
  246. /* ss IN and OUT are separated */
  247. num_usb_bus = xhci->usb3_rhub.num_ports * 2 + xhci->usb2_rhub.num_ports;
  248. sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
  249. if (sch_array == NULL)
  250. return -ENOMEM;
  251. for (i = 0; i < num_usb_bus; i++)
  252. INIT_LIST_HEAD(&sch_array[i].bw_ep_list);
  253. mtk->sch_array = sch_array;
  254. return 0;
  255. }
  256. EXPORT_SYMBOL_GPL(xhci_mtk_sch_init);
  257. void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk)
  258. {
  259. kfree(mtk->sch_array);
  260. }
  261. EXPORT_SYMBOL_GPL(xhci_mtk_sch_exit);
  262. int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  263. struct usb_host_endpoint *ep)
  264. {
  265. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  266. struct xhci_hcd *xhci;
  267. struct xhci_ep_ctx *ep_ctx;
  268. struct xhci_slot_ctx *slot_ctx;
  269. struct xhci_virt_device *virt_dev;
  270. struct mu3h_sch_bw_info *sch_bw;
  271. struct mu3h_sch_ep_info *sch_ep;
  272. struct mu3h_sch_bw_info *sch_array;
  273. unsigned int ep_index;
  274. int bw_index;
  275. int ret = 0;
  276. xhci = hcd_to_xhci(hcd);
  277. virt_dev = xhci->devs[udev->slot_id];
  278. ep_index = xhci_get_endpoint_index(&ep->desc);
  279. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  280. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
  281. sch_array = mtk->sch_array;
  282. xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
  283. __func__, usb_endpoint_type(&ep->desc), udev->speed,
  284. usb_endpoint_maxp(&ep->desc),
  285. usb_endpoint_dir_in(&ep->desc), ep);
  286. if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
  287. /*
  288. * set @bpkts to 1 if it is LS or FS periodic endpoint, and its
  289. * device does not connected through an external HS hub
  290. */
  291. if (usb_endpoint_xfer_int(&ep->desc)
  292. || usb_endpoint_xfer_isoc(&ep->desc))
  293. ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(1));
  294. return 0;
  295. }
  296. bw_index = get_bw_index(xhci, udev, ep);
  297. sch_bw = &sch_array[bw_index];
  298. sch_ep = kzalloc(sizeof(struct mu3h_sch_ep_info), GFP_NOIO);
  299. if (!sch_ep)
  300. return -ENOMEM;
  301. setup_sch_info(udev, ep_ctx, sch_ep);
  302. ret = check_sch_bw(udev, sch_bw, sch_ep);
  303. if (ret) {
  304. xhci_err(xhci, "Not enough bandwidth!\n");
  305. kfree(sch_ep);
  306. return -ENOSPC;
  307. }
  308. list_add_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list);
  309. sch_ep->ep = ep;
  310. ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(sch_ep->pkts)
  311. | EP_BCSCOUNT(sch_ep->cs_count) | EP_BBM(sch_ep->burst_mode));
  312. ep_ctx->reserved[1] |= cpu_to_le32(EP_BOFFSET(sch_ep->offset)
  313. | EP_BREPEAT(sch_ep->repeat));
  314. xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
  315. sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode,
  316. sch_ep->offset, sch_ep->repeat);
  317. return 0;
  318. }
  319. EXPORT_SYMBOL_GPL(xhci_mtk_add_ep_quirk);
  320. void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  321. struct usb_host_endpoint *ep)
  322. {
  323. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  324. struct xhci_hcd *xhci;
  325. struct xhci_slot_ctx *slot_ctx;
  326. struct xhci_virt_device *virt_dev;
  327. struct mu3h_sch_bw_info *sch_array;
  328. struct mu3h_sch_bw_info *sch_bw;
  329. struct mu3h_sch_ep_info *sch_ep;
  330. int bw_index;
  331. xhci = hcd_to_xhci(hcd);
  332. virt_dev = xhci->devs[udev->slot_id];
  333. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  334. sch_array = mtk->sch_array;
  335. xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
  336. __func__, usb_endpoint_type(&ep->desc), udev->speed,
  337. usb_endpoint_maxp(&ep->desc),
  338. usb_endpoint_dir_in(&ep->desc), ep);
  339. if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
  340. return;
  341. bw_index = get_bw_index(xhci, udev, ep);
  342. sch_bw = &sch_array[bw_index];
  343. list_for_each_entry(sch_ep, &sch_bw->bw_ep_list, endpoint) {
  344. if (sch_ep->ep == ep) {
  345. update_bus_bw(sch_bw, sch_ep,
  346. -sch_ep->bw_cost_per_microframe);
  347. list_del(&sch_ep->endpoint);
  348. kfree(sch_ep);
  349. break;
  350. }
  351. }
  352. }
  353. EXPORT_SYMBOL_GPL(xhci_mtk_drop_ep_quirk);